CN115225838B - FPGA-based control device, method and display equipment - Google Patents
FPGA-based control device, method and display equipment Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/445—Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/3406—Control of illumination source
- G09G3/3413—Details of control of colour illumination sources
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Abstract
本申请提供一种基于FPGA的控制装置、方法及显示设备，涉及视频处理技术，可应用于包含包括液晶面板、背光板和背光板的驱动芯片的液晶显示屏。控制装置包括：与SOC电连接第一通信单元，用于从SOC获取源视频数据；与第一通信单元电连接的第一处理单元，用于从源视频数据中提取背光数据，并将背光数据分别传输至第二处理单元和第三处理单元；第二处理单元用于对背光数据进行优化处理，并将优化处理后的背光数据传输至驱动芯片，以控制背光显示；第三处理单元用于根据背光数据和源视频数据获得第一图像数据，并将第一图像数据传输至液晶面板，以显示图像。本申请可降低对SOC的要求。
The present application provides a control device, method and display device based on FPGA, which relates to video processing technology and can be applied to a liquid crystal display screen including a liquid crystal panel, a backlight plate and a driver chip of the backlight plate. The control device includes: a first communication unit electrically connected to the SOC, used to obtain source video data from the SOC; a first processing unit electrically connected to the first communication unit, used to extract backlight data from the source video data, and transmit the backlight data to a second processing unit and a third processing unit respectively; the second processing unit is used to optimize the backlight data, and transmit the optimized backlight data to the driver chip to control the backlight display; the third processing unit is used to obtain first image data according to the backlight data and the source video data, and transmit the first image data to the liquid crystal panel to display the image. The present application can reduce the requirements for the SOC.
Description
Technical Field
The present application relates to video processing technologies, and in particular, to a control device, a method, and a display device based on an FPGA.
Background
With the continuous progress of video processing technology, liquid crystal display panels are increasingly used. In terms of the development trend of technology, the technology of locally adjusting (Local Dimming) backlight to be matched with a Light-Emitting Diode (LED for short) is easy to better realize the effects of reducing electric quantity, improving the contrast ratio of a display picture, improving the gray scale number, reducing the afterimage and the like.
Currently, implementation architectures for local backlight adjustment include a low-partition local backlight adjustment scheme and a high-partition local backlight adjustment scheme. In the low-partition local backlight adjustment scheme, a System On Chip (SOC) outputs image data to a timing control circuit (timing controller, abbreviated as TCON) board, and outputs backlight data to a light emitting diode (LED DRIVER, i.e., a driving Chip of a backlight board) in a driving mode of the light emitting diode, and then the TCON board drives a liquid crystal display, and the driving Chip of the backlight board drives an LED lamp on the backlight board. In the high-partition local backlight adjustment scheme, a micro control unit (Microcontroller Unit, MCU for short) or a programmable logic gate array (Field Programmable GATE ARRAY, FPGA for short) is additionally arranged between the SOC and the backlight plate and is used for processing the work of a driving chip of the backlight plate, so that the partial processing capacity is improved, and the partition number is improved.
The inventor finds that the implementation architecture of the local backlight adjustment has at least the following defects in the research process:
The SOC function is fixed, and the driving mode of rear end is also relatively fixed, if want to change the drive chip kind of backlight to be difficult degree very much, need make new SOC again, the collocation is inflexible, and throw the piece again with high costs, the model is too many hardly reaches the certain order of magnitude and reduces the cost.
Disclosure of Invention
The application provides a control device, a control method and display equipment based on an FPGA (field programmable gate array) so as to reduce the requirement on SOC (system on chip).
In a first aspect, an embodiment of the present application provides an FPGA-based control device, which is applied to a liquid crystal display, where the liquid crystal display includes a liquid crystal panel, a backlight plate, and a driving chip of the backlight plate. The control device comprises a first processing unit, a second processing unit, a third processing unit and a first communication unit. The first communication unit is electrically connected with the SOC, the first processing unit is electrically connected with the first communication unit, and the second processing unit and the third processing unit are respectively electrically connected with the first processing unit. The first communication unit is used for acquiring source video data from the SOC. The first processing unit is used for extracting backlight data from the source video data and transmitting the backlight data to the second processing unit and the third processing unit respectively. The second processing unit is used for optimizing the backlight data and transmitting the optimized backlight data to the driving chip so as to control backlight display. The third processing unit is used for obtaining first image data according to the backlight data and the source video data and transmitting the first image data to the liquid crystal panel so as to display an image corresponding to the first image data.
In a possible implementation, the second processing unit may include a first processing subunit and a first communication subunit. Wherein the first processing subunit is connected between the first processing unit and the first communication subunit. The first processing subunit is configured to perform optimization processing on the backlight data by using a preset backlight optimization algorithm, so as to obtain the optimized backlight data. The first communication subunit is used for transmitting the optimized backlight data to the driving chip according to the driving mode of the backlight plate.
In a possible embodiment, the third processing unit may include a second processing subunit, a third processing subunit, and a second communication subunit. The second processing subunit is electrically connected with the first processing unit, and the third processing subunit is connected between the second processing subunit and the second communication subunit. The second processing subunit is configured to obtain image compensation data according to the backlight data and a preset backlight smoothing algorithm. And the third processing subunit is used for carrying out fusion processing on the image compensation data and the source video data to obtain first image data. The second communication subunit is configured to transmit the first image data to the liquid crystal panel.
In a possible implementation manner, the liquid crystal display screen may further include a touch chip for detecting a touch operation on the liquid crystal display screen and obtaining touch data based on the touch operation. Correspondingly, the control device can further comprise a fourth processing unit and a second communication unit. The second communication unit is electrically connected with the touch chip, and the fourth processing unit is electrically connected between the second communication unit and the third processing unit. The second communication unit is used for acquiring touch data from the touch chip. The fourth processing unit is used for obtaining second image data corresponding to the liquid crystal panel according to the touch data. The third processing unit may be further configured to perform superposition processing on the first image data and the second image data, and transmit the superimposed data to the liquid crystal panel.
In a possible implementation manner, the fourth processing unit may be specifically configured to store the touch data in a position corresponding to the storage space of the liquid crystal panel according to coordinates, and obtain the second image data.
In a possible implementation manner, the third processing unit may be specifically configured to perform superposition processing on the first image data and the second image data based on a preset superposition ratio, and transmit the superposed data to the liquid crystal panel.
In one possible implementation manner, the control device may further include a storage unit, where the storage unit is electrically connected to the first communication unit and the third processing unit. The storage unit may be used to store source video data.
In a possible implementation manner, the control device may further comprise a control unit. The control unit is used for controlling the second processing unit and the third processing unit to synchronously send the optimized backlight data or the first image data.
In a second aspect, an embodiment of the present application provides a control method based on FPGA, which is applied to a liquid crystal display screen. The liquid crystal display comprises a liquid crystal panel, a backlight plate and a driving chip of the backlight plate. The control method comprises the following steps:
Acquiring source video data from the SOC;
extracting backlight data from the source video data;
Optimizing the backlight data, and transmitting the optimized backlight data to a driving chip of a backlight plate to control backlight display;
First image data is obtained according to the backlight data and the source video data, and the first image data is transmitted to the liquid crystal panel to display an image.
In a third aspect, an embodiment of the present application provides a display device, including an SOC, a liquid crystal display screen, and a control apparatus according to any one of the first aspects, wherein the liquid crystal display screen includes a liquid crystal panel, a backlight plate, and a driving chip of the backlight plate.
In a possible embodiment, the display device may further comprise a memory electrically connected to the first communication unit and the third processing unit for storing the source video data.
In a possible implementation manner, the liquid crystal display screen further comprises a touch chip, wherein the touch chip is used for detecting touch operation on the liquid crystal display screen, acquiring touch data based on the touch operation, and transmitting the touch data to the FPGA-based control device so that the FPGA-based control device can generate a corresponding image according to the touch data.
In a fourth aspect, an embodiment of the present application provides a computer readable storage medium having a computer program stored thereon, the computer program, when executed, implementing the method according to any of the second aspects.
In a fifth aspect, an embodiment of the present application provides a computer program product comprising a computer program which, when executed, implements a method according to any of the second aspects.
The control device and method based on the FPGA and the display device provided by the embodiment of the application relate to the video processing technology and can be applied to a liquid crystal display screen comprising a liquid crystal panel, a backlight plate and a driving chip of the backlight plate. The control device comprises a first communication unit electrically connected with the SOC and used for acquiring source video data from the SOC, a first processing unit electrically connected with the first communication unit and used for extracting backlight data from the source video data and respectively transmitting the backlight data to a second processing unit and a third processing unit, the second processing unit is used for carrying out optimization processing on the backlight data and transmitting the optimized backlight data to a driving chip so as to control backlight display, and the third processing unit is used for acquiring first image data according to the backlight data and the source video data and transmitting the first image data to a liquid crystal panel so as to display images. The application realizes backlight extraction, backlight display and image display based on the FPGA, weakens the requirements on SOC, such as the type selection requirement and the processing capacity requirement, and the internal logic of the FPGA can be changed along with the project requirement, so that the drive mode of the drive chip of the backlight plate can be matched more flexibly.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, and it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1a is a schematic architecture diagram of a low-partition local backlight adjustment scheme;
FIG. 1b is a schematic architecture diagram of a high partition local backlight adjustment scheme;
FIG. 2 is an exemplary diagram of an application scenario provided in an embodiment of the present application;
FIG. 3a is a schematic block diagram of an FPGA-based control device according to an embodiment of the present application;
FIG. 3b is a schematic diagram of the data flow of the FPGA-based control device shown in FIG. 3 a;
FIG. 4 is a schematic block diagram of an FPGA-based control device according to another embodiment of the present application;
FIG. 5 is a schematic block diagram of an FPGA-based control device according to another embodiment of the present application;
FIG. 6 is a schematic block diagram of an FPGA-based control device according to yet another embodiment of the present application;
FIG. 7 is a flow chart of an FPGA-based control method according to an embodiment of the present application;
Fig. 8 is a schematic structural diagram of a display device according to an embodiment of the application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
The terms first and second and the like in the description of embodiments of the application, in the claims and in the above-described figures, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the application described herein may be implemented, for example, in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
It should be understood that the term "and/or" as used herein is merely an association relationship describing the associated object, and means that there may be three relationships, e.g., a and/or B, and that there may be three cases where a exists alone, while a and B exist together, and B exists alone. "/" indicates a relationship of "or".
The local backlight adjustment utilizes the backlight composed of LED lamps to replace cold cathode fluorescent lamp (Cold Cathode Fluorescent Lamp, CCFL) backlight lamps, and adjusts according to the brightness of the image, so that the highlight part in the display screen image can reach the maximum, and the dark part can reduce the brightness and even be closed at the same time, so as to achieve the optimal contrast ratio.
Taking an LED backlight television as an example, the LED backlight television partitions can be divided into a low partition and a high partition, and the architectures of the partitions are slightly different. The low partition mainly refers to a partition within tens of partitions, and the high partition generally refers to a partition above a percentage. At present, the high partition can generally reach more than 300 partitions, the relative cost performance is higher, and the highest support partition is developed towards the direction of over ten thousandth of the partition.
Current implementations of local backlight adjustment architecture include a low-partition local backlight adjustment scheme (as shown in fig. 1 a) and a high-partition local backlight adjustment scheme (as shown in fig. 1 b), as previously described. The implementation architecture of the local backlight adjustment has at least the following defects:
referring to fig. 1a, in the low-partition local backlight adjustment scheme, the SOC is required to obtain backlight data by adopting a local backlight adjustment algorithm, and a driving chip for driving a backlight plate is required to be driven, so that the processing capacity of the driving chip cannot support too high partitions, and the driving chip is generally within 32 partitions.
Referring to fig. 1b, in the high-partition local backlight adjustment scheme, the processing capacity of the SOC is increased to increase the number of partitions, which results in an increase in the cost of the SOC, the SOC model is relatively fixed, the cost of re-customizing the SOC is high, and in addition, it is difficult to achieve a certain magnitude for the SOC model to be too many to reduce the cost. Although the processing capability requirement on the SOC is relieved by processing the work of the driving chip of the backlight plate through the MCU or the FPGA, the cost is increased compared with a direct driving mode of a low partition, and in addition, the communication speed of a serial peripheral interface (SERIAL PERIPHERAL INTERFACE, SPI for short) between the SOC and the MCU/FPGA also limits the upper limit of the effect and the partition number.
In summary, the SOC function is fixed in the current implementation architecture of local backlight adjustment, the driving mode of the rear end is relatively fixed, if the type of the driving chip of the backlight plate is required to be replaced, a new SOC needs to be manufactured again, the collocation is inflexible, the re-projection cost is high, and the cost is reduced because of a certain magnitude of excessive models.
Based on the above problems, the application provides a control device, a method and a display device based on an FPGA, which are used for implementing backlight processing and display processing on source video data based on the FPGA, so as to obtain optimized backlight data and first image data which are output to a liquid crystal panel for image display, thereby alleviating the problem of insufficient processing capacity of an SOC, further reducing the requirements on the SOC, such as the type selection requirement and the processing capacity requirement, and more flexibly matching the driving mode of a driving chip of a backlight panel.
Next, an application scenario according to the present application will be described as an example.
Fig. 2 is an exemplary diagram of an application scenario provided in an embodiment of the present application. As shown in fig. 2, a user may perform writing operation on the liquid crystal display 11 of the display device 10 by using a stylus (not shown) or a finger, a touch chip (not shown) in the display device 10 obtains touch data corresponding to the touch operation in response to detecting the touch operation on the liquid crystal display 11, and transmits the touch data to a control device (not shown) based on an FPGA, the control device based on the FPGA performs superposition processing on the touch data and the image data, and finally displays an image corresponding to the image data and a track corresponding to the touch data on the liquid crystal display 11.
As also shown in fig. 2, the display device 10 is also in data communication with the server 20 via a variety of communication means. Display device 10 may be permitted to make communication connections via a Local Area Network (LAN), a Wireless Local Area Network (WLAN), and other networks. Server 20 may provide various content and interactions to display device 10. The server 20 may be a cluster or a plurality of clusters, and may include one or more types of servers. Other web service content such as video on demand and advertising services are provided through the server 20.
The embodiments of the present application are not limited in terms of the type, size, resolution, etc. of the particular display device 10, and those skilled in the art will appreciate that the display device 10 may be modified in terms of performance and configuration as desired.
The FPGA-based control device provided by the present application is explained below with reference to specific embodiments.
Fig. 3a is a schematic block diagram of an FPGA-based control device according to an embodiment of the present application. The embodiment of the application provides a control device based on an FPGA, which is applied to a liquid crystal display screen, wherein the liquid crystal display screen comprises a liquid crystal panel, a backlight plate and a driving chip of the backlight plate. Referring to fig. 3a, the FPGA-based control device 30 includes a first processing unit 31, a second processing unit 32, a third processing unit 33, and a first communication unit 34. Wherein:
The first communication unit 34 is electrically connected to the SOC, the first processing unit 31 is electrically connected to the first communication unit 34, and the second processing unit 32 and the third processing unit 33 are electrically connected to the first processing unit 31, respectively.
The first communication unit 34 is used to acquire source video data from the SOC. The first processing unit 31 is configured to extract backlight data from the source video data and transmit the backlight data to the second processing unit 32 and the third processing unit 33, respectively. The second processing unit 32 is configured to perform optimization processing on the backlight data, and transmit the optimized backlight data to a driving chip (not shown) to control backlight display. The third processing unit 33 is configured to obtain first image data according to the backlight data and the source video data, and transmit the first image data to a liquid crystal panel (not shown) to display an image corresponding to the first image data.
For example, the source video data generated By the SOC is transmitted to the FPGA-based control device 30 through V-By-One (VBO) VBO, or the SOC transmits source video data from an external video source to the FPGA-based control device 30 through VBO. The VBO is a digital interface standard technology facing image information transmission, and can support 4.0Gbps high-speed signal transmission at maximum, and the special coding mode avoids the time lag problem between the data of the receiving end and the clock, so that the VBO is widely applied to the field of ultra-high definition liquid crystal televisions, and the ultra-thin ultra-narrow television is possible.
The embodiment of the present application is not limited to the specific implementation adopted by the first processing unit 31 to extract the backlight data from the source video data. For example, the first processing unit 31 extracts backlight data from the source video data by a preset backlight data extraction algorithm. The preset backlight data extraction algorithm may include at least one of a mean value method, a histogram weighting method, a mean value combined maximum value method, a histogram inversion mapping function, and the like. For the specific implementation of each backlight data extraction algorithm, taking the average method as an example, the following exemplary description is made:
Assume that, for example, 384 partitions (or referred to as "backlight partitions") are taken from a 4K display device, where the resolution of the display device is 3840×2160, in this case, each partition corresponds to 160×135 pixels, and in this case, the mean value of the pixel values of 160×135 pixels is taken as the mean value of the pixel values of the corresponding partition.
The specific implementation of the rest of the backlight data extraction algorithm may refer to the related art, and will not be described herein.
It is added that, because the processing effects of different backlight data extraction algorithms are different relative to the same source video data, or the processing effects of the same backlight data extraction algorithm are different relative to different source video data, and at least one algorithm scheme can be supported by considering that the internal logic of the FPGA can be changed along with project requirements, in practical application, the corresponding backlight data extraction algorithm can be selected based on the characteristics of the source video data, so that after the FPGA analyzes each frame of source video data, the optimal algorithm can be selected according to the image content, and the presentation result is optimal.
As shown in fig. 3b, the video data flows:
The source video data from the SOC is transmitted to the first communication unit 34, and the source video data is transmitted to the first processing unit 31 by the first communication unit 34, and the first processing unit 31 extracts the backlight data from the source video data and divides the backlight data into two paths:
The first path of backlight data is transmitted to the second processing unit 32 by the first processing unit 31, the second processing unit 32 performs optimization processing on the backlight data, and the optimized backlight data is transmitted to the driving chip to control backlight display;
The second path of backlight data is transmitted to the third processing unit 33 by the first processing unit 31, the third processing unit 33 obtains first image data according to the backlight data and the source video data, and transmits the first image data to the liquid crystal panel for liquid crystal display.
The control device based on the FPGA comprises a first communication unit electrically connected with the SOC and used for acquiring source video data from the SOC, a first processing unit electrically connected with the first communication unit and used for extracting backlight data from the source video data and respectively transmitting the backlight data to a second processing unit and a third processing unit, the second processing unit is used for carrying out optimization processing on the backlight data and transmitting the backlight data after the optimization processing to a driving chip so as to control backlight display, and the third processing unit is used for obtaining first image data according to the backlight data and the source video data and transmitting the first image data to a liquid crystal panel so as to display images. The application realizes backlight extraction (namely 'extracting backlight data from source video data'), backlight display (namely 'transmitting the optimized backlight data to a driving chip to control backlight display') and image display (namely 'transmitting the first image data to a liquid crystal panel to display images') based on the FPGA, weakens the requirement on SOC (for example, the type selection requirement and the processing capacity requirement), and the internal logic of the FPGA can be changed along with the project requirement so as to more flexibly match the driving mode of the driving chip of the backlight plate.
On the basis of the above-described embodiment, as a possible implementation manner, as shown in fig. 4, in the FPGA-based control device 40, the second processing unit 32 may include a first processing subunit 321 and a first communication subunit 322. Wherein the first processing subunit 321 is connected between the first processing unit 31 and the first communication subunit 322. The first processing subunit 321 is configured to perform optimization processing on the backlight data by using a preset backlight optimization algorithm, so as to obtain the optimized backlight data. The first communication subunit 322 is configured to transmit the optimized backlight data to the driving chip according to a driving manner of the backlight board. In this embodiment, the preset backlight optimization algorithm may refer to the current backlight optimization algorithm, and will not be described herein.
Still referring to fig. 4, in some embodiments, the third processing unit 33 may include a second processing subunit 331, a third processing subunit 332, and a second communication subunit 333. The second processing subunit 331 is electrically connected to the first processing unit 31, and the third processing subunit 332 is connected between the second processing subunit 331 and the second communication subunit 333. The second processing subunit 331 is configured to obtain image compensation data according to the backlight data and a preset backlight smoothing algorithm. The third processing subunit 332 is configured to perform fusion processing on the image compensation data and the source video data to obtain first image data. The second communication subunit 333 is configured to transmit the first image data to the liquid crystal panel. In this embodiment, the second processing subunit 331 expands the backlight data again to image compensation data with a size equal to that of the source video data by a preset backlight smoothing algorithm, and the third processing subunit 332 performs fusion processing on the image compensation data and the source video data to obtain the first image data. For example, the second processing subunit 331 expands the 384-partitioned backlight data again to the 4K image compensation data by the preset backlight smoothing algorithm, and the third processing subunit 332 performs fusion processing on the 4K image compensation data and the 4K source video data to obtain the 4K first image data, and the first image data is transmitted to the liquid crystal panel for display through the second communication subunit 333 and the LCD display interface of the liquid crystal display. In addition, the preset backlight smoothing algorithm may refer to the current backlight smoothing algorithm, and will not be described herein.
Further, the implementation architecture of the local backlight adjustment as shown in fig. 1a and 1b has a problem that has not been solved, that is, the liquid crystal display and the LED backlight control cannot be synchronized. The SOC transmits the image data to the TCON plate, the TCON plate transmits the image data to the liquid crystal panel, the image A is generated from the SOC to the liquid crystal panel for displaying the image A, the time delay is more than 1 frame, the SOC converts the image data of the image A into backlight data, at least 1 frame time is needed, the backlight data are transmitted to the MCU or the FPGA for processing, the time delay is needed to be 1 frame to 2 frames, the image data are transmitted to the driving chip of the backlight plate, the driving chip of the backlight plate delays the time delay by 1 frame to 2 frames and then the driving chip of the backlight plate is transmitted to the LED lamp for displaying, the image A displayed by the LED lamp is 2 frames to 3 frames later than the image A displayed by the liquid crystal, and the tailing phenomenon of the backlight can be seen when the image with high conversion speed is played. This is a problem that is not addressed in the current industry. In order to solve the problem, the application is improved as follows:
The setting liquid crystal display may further include a touch chip for detecting a touch operation on the liquid crystal display and obtaining touch data based on the touch operation. Accordingly, as shown in FIG. 5, the FPGA-based control device 50 may further include a fourth processing unit 51 and a second communication unit 52 on the basis of the structure shown in FIG. 3 a. Wherein the second communication unit 52 is electrically connected to the touch chip, and the fourth processing unit 51 is electrically connected between the second communication unit 52 and the third processing unit 33. The second communication unit 52 is used to acquire touch data from the touch chip 53. The fourth processing unit 51 is configured to obtain second image data corresponding to the liquid crystal panel according to the touch data. The third processing unit 33 may be further configured to perform superposition processing on the first image data and the second image data, and transmit the superimposed data to the liquid crystal panel.
It can be understood that if there is a touch operation on the liquid crystal display, the image data output by the FPGA-based control device is the data obtained by superimposing the first image data and the second image data, and if there is no touch operation on the liquid crystal display, the image data output by the FPGA-based control device is the first image data.
In this embodiment, the FPGA-based control device increases the integration processing of the touch data, the touch data is sent to the FPGA-based control device through the touch chip, after the FPGA-based control device analyzes the touch data, the second image data corresponding to the liquid crystal panel is obtained, and after the first image data and the second image data are subjected to the superposition processing, the superimposed data are transmitted to the liquid crystal panel, so that the display of the track of the liquid crystal display screen acted by the image and the touch operation is realized.
In one implementation, the fourth processing unit 51 may be specifically configured to store the touch data in a location corresponding to the storage space of the liquid crystal panel according to coordinates, and obtain the second image data. For example, the fourth processing unit 51 stores touch data containing coordinate information in a position corresponding to a storage space of the 4K display image in terms of coordinates, and obtains second image data. In this example, the second image data corresponds to an image size of 4K.
Alternatively, the third processing unit 33 may be specifically configured to perform superposition processing on the first image data and the second image data based on a preset superposition ratio, and transmit the superimposed data to the liquid crystal panel. The preset superposition proportion can be selected according to transparency, and the transparency can be set through the system.
Still referring to FIG. 5, in some embodiments, the FPGA-based control 50 may also include a control unit (not shown). The control unit is configured to control the second processing unit 32 and the third processing unit 33 to synchronously transmit the optimized backlight data or the first image data.
Referring to fig. 6, in some embodiments, the FPGA-based control device 60 may further include a storage unit 61 on the basis of the structure shown in fig. 5, and the storage unit 61 is electrically connected to the first communication unit 34 and the third processing unit 33. The storage unit 61 may be used to store source video data. Here, the backup of the source video data is realized by the storage unit.
In summary, the FPGA-based control device provided by the present application has at least the following advantages:
1) The functions of backlight extraction, backlight display, touch fusion and LCD display are realized by the FPGA, the existence of a TCON plate and an MCU is canceled, the requirement on the SOC is weakened, and the SOC does not bear the work of picture processing and touch data fusion. The selection and cost of the SOC can be reduced, and the internal logic of the FPGA can be changed according to project requirements.
2) The backlight data and the image data are generated and transmitted by the same hardware of the FPGA and are not separated into different devices, so that the synchronization of the two data is more accurate and can be flexibly adjusted. And the FPGA is used for designing an algorithm dynamic conversion function, and a more suitable backlight extraction algorithm is selected according to different display pictures.
3) In the traditional scheme, backlight data and source video data are overlapped to form new video data, and then the new video data are sequentially delayed, buffered and processed by various algorithms and finally displayed on a liquid crystal panel, so that the touch data can be displayed finally from generation to display, and at least more than 2 frames of picture delay exists in the middle. In the application, the FPGA superimposes the touch data and the processed image data (the second image data is described above) and outputs the superimposed touch data and the processed image data to a liquid crystal panel (namely an LCD display screen) for display, and the delay from generation to display is within 1 frame. This greatly reduces the picture delay in touching and writing as the same experience is possessed by writing on books.
4) The partitions can be allocated at will, the FPGA is a parallel processing mechanism, and the FPGA does not have fixed IO settings like a TCON board or an SOC, defines the output port function, and can define the output port function at will. When the partition is enlarged, the idle IO can be used for driving the partition through configuration, and the partition has multiple purposes and extremely high universality.
The above embodiment explains the structure and functions of the FPGA-based control device provided in the embodiment of the present application, and the following is a method embodiment of the present application, which may be executed by the FPGA-based control device described in the above device embodiment of the present application. For details not disclosed in the method embodiments of the application reference is made to the device embodiments of the application as described above.
Fig. 7 is a flowchart of a control method based on FPGA according to an embodiment of the present application. As shown in fig. 7, the FPGA-based control method includes:
S701, acquiring source video data from the SOC.
S702, extracting backlight data from source video data;
S703, carrying out optimization processing on the backlight data, and transmitting the backlight data after the optimization processing to a driving chip of a backlight plate so as to control backlight display;
S704, obtaining first image data according to the backlight data and the source video data, and transmitting the first image data to the liquid crystal panel to display an image.
Optionally, the optimizing the backlight data may include optimizing the backlight data by a preset backlight optimization algorithm to obtain optimized backlight data.
Further, obtaining the first image data according to the backlight data and the source video data may include obtaining image compensation data according to the backlight data and a preset backlight smoothing algorithm, and performing fusion processing on the image compensation data and the source video data to obtain the first image data.
In some embodiments, the liquid crystal display may further include a touch chip for detecting a touch operation on the liquid crystal display and obtaining touch data based on the touch operation. Correspondingly, the control method can further comprise the steps of obtaining touch data from the touch chip, obtaining second image data corresponding to the liquid crystal panel according to the touch data, performing superposition processing on the first image data and the second image data, and transmitting the superposed data to the liquid crystal panel.
Further, obtaining second image data corresponding to the liquid crystal panel according to the touch data may include storing the touch data in a position corresponding to a storage space of the liquid crystal panel according to coordinates to obtain the second image data.
In some embodiments, the superimposing of the first image data and the second image data may include superimposing the first image data and the second image data based on a preset superimposing scale.
Optionally, after acquiring the source video data from the SOC, storing the source video data to the storage unit may be further included. Accordingly, before the first image data is obtained from the backlight data and the source video data, it may further include acquiring the source video data from the storage unit.
Wherein the transmission time of the optimized backlight data and the first image data is the same.
Fig. 8 is a schematic structural diagram of a display device according to an embodiment of the application. As shown in fig. 8, display device 80 includes SOC 81, liquid crystal display 82, and FPGA-based control 83. The liquid crystal display 82 includes a liquid crystal panel 821, a backlight 822, and a driving chip 823 of the backlight 822. The FPGA-based control 83 may be embodied as the FPGA-based control described in any of the embodiments above.
The display device 80 may be, for example, a liquid crystal television, an interactive tablet (INTERACTIVE WHITE board), a mobile phone, or a tablet or other electronic device with display function. Wherein, the interactive flat board is integrated with any one or more functions of projector, electronic whiteboard, curtain, stereo, television, video conference terminal and the like.
In some embodiments, the liquid crystal display 82 may also include a touch chip 824. The touch chip 824 is configured to detect a touch operation on the liquid crystal display 82, obtain touch data based on the touch operation, and transmit the touch data to the FPGA-based control device 83, so that the FPGA-based control device 83 generates a corresponding image according to the touch data.
In some embodiments, the display device 80 may also include a memory 84 for storing source video data. If the FPGA-based control device 83 does not include a storage unit, the FPGA-based control device 83 may store the source video data in the memory 84 after acquiring the source video data to acquire the source video data from the memory 84 during a subsequent video processing. The memory 84 may be embodied as a double rate synchronous dynamic random access memory (Double Data Rate Synchronous Dynamic Random Access Memory, referred to as DDR SDRAM or DDR). This embodiment replaces the hardware architecture of the current TCON board or TCON board and FPGA/MCU with a combination of FPGA-based control 83 and memory 84.
In addition, the memory 84 may also be used to store computer programs, including computer programs corresponding to FPGA-based control methods. The memory 84 may include a stored program area and a stored data area. The storage program area may store an operating system, an application program required for at least one function, and the like. The storage data area may store data created during use of the display device 80 (e.g., audio-visual data, etc.), and so on.
The display device of the present embodiment may be used to implement the technical solution in the foregoing method embodiment, and its implementation principle and technical effects are similar, and are not described herein again.
The embodiment of the application also provides a computer readable storage medium, wherein the computer readable storage medium is stored with a computer program, and when the computer program is executed, the scheme provided by any method embodiment is realized.
The embodiment of the application also provides a computer program product, which comprises a computer program. The computer program may be stored in a readable storage medium, from which the computer program may be read by at least one processor of the display device, the at least one processor executing the computer program causing the display device to perform the solution provided by any of the method embodiments described above.
In the above embodiments, it should be understood that the disclosed apparatus and method may be implemented in other manners. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, the division of the modules is merely a logical function division, and there may be additional divisions when actually implemented, for example, multiple modules may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or modules, which may be in electrical, mechanical, or other forms.
In addition, each functional module in the embodiments of the present application may be integrated in one processing unit, or each module may exist alone physically, or two or more modules may be integrated in one unit. The units formed by the modules can be realized in a form of hardware or a form of hardware and software functional units.
The integrated modules, which are implemented in the form of software functional modules, may be stored in a computer readable storage medium. The software functional modules described above are stored in a storage medium and include instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor (processor) to perform some of the steps of the methods described in the various embodiments of the application.
The storage medium may be implemented by any type or combination of volatile or nonvolatile memory devices such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disk, and the like. A storage media may be any available media that can be accessed by a general purpose or special purpose computer.
Those of ordinary skill in the art will appreciate that all or a portion of the steps of implementing the method embodiments described above may be performed by computer program related hardware. The foregoing program may be stored in a computer readable storage medium. The program, when executed, performs the steps comprising the method embodiments described above, and the storage medium described above includes various media capable of storing program code, such as ROM, RAM, magnetic or optical disk.
It should be noted that the above embodiments are merely for illustrating the technical solution of the present application and not for limiting the same, and although the present application has been described in detail with reference to the above embodiments, it should be understood by those skilled in the art that the technical solution described in the above embodiments may be modified or some or all of the technical features may be equivalently replaced, and these modifications or substitutions do not make the essence of the corresponding technical solution deviate from the scope of the technical solution of the embodiments of the present application.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108962105A (en) * | 2018-06-27 | 2018-12-07 | 武汉精测电子集团股份有限公司 | A kind of liquid crystal module testing device for touch screens and method based on FPGA |
| CN109036295A (en) * | 2018-08-09 | 2018-12-18 | 京东方科技集团股份有限公司 | Image display processing method and device, display device and storage medium |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101339450B (en) * | 2007-07-04 | 2011-08-17 | 群康科技(深圳)有限公司 | Touch control display and its drive method |
| CN100583229C (en) * | 2008-03-26 | 2010-01-20 | 青岛海信电器股份有限公司 | LCD device |
| US10201049B1 (en) * | 2017-08-03 | 2019-02-05 | Apple Inc. | Local display backlighting systems and methods |
| CN108833814B (en) * | 2018-07-12 | 2020-09-22 | 深圳创维－Rgb电子有限公司 | Multi-region backlight control system, method, television and readable storage medium |
| CN110136654B (en) * | 2019-04-03 | 2021-01-26 | 深圳康佳电子科技有限公司 | Dimming backlight partition dimming control method, intelligent terminal and storage medium |
| CN112397032B (en) * | 2019-08-19 | 2022-06-07 | Tcl科技集团股份有限公司 | Dynamic backlight driving module, method and display driving module |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108962105A (en) * | 2018-06-27 | 2018-12-07 | 武汉精测电子集团股份有限公司 | A kind of liquid crystal module testing device for touch screens and method based on FPGA |
| CN109036295A (en) * | 2018-08-09 | 2018-12-18 | 京东方科技集团股份有限公司 | Image display processing method and device, display device and storage medium |
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