CN115164949A - a capacitive sensor - Google Patents

Abstract

The application discloses capacitanc sensor is applied to circuit technical field, includes: the capacitance sensitive part is used for reflecting the numerical value of the detected target quantity to be detected through the capacitance change of the capacitance sensitive part; the direct current excitation generating circuit is used for outputting set direct current; the capacitance voltage conversion circuit is respectively connected with the capacitance sensitive part and the direct current excitation generating circuit and used for utilizing the output of the direct current excitation generating circuit as a direct current reference and carrying out capacitance voltage conversion so as to output a voltage signal for reflecting the current capacitance value of the capacitance sensitive part; and the amplifying circuit is connected with the capacitance-voltage conversion circuit and is used for amplifying the voltage signal so that the post-stage circuit can determine the current value of the target quantity to be measured based on the output voltage of the amplifying circuit. By applying the scheme of the application, the capacitance detection is realized by adopting direct current carrier excitation, the circuit structure is simple, the cost is lower, and the reliability is very high.

Description

a capacitive sensor

technical field

The present invention relates to the technical field of circuits, in particular to a capacitive sensor.

Background technique

Capacitive sensors are often used to detect sensitive engineering physical quantities, such as the current MEMS (Micro-Electro-Mechanical System, micro-electro-mechanical system) acceleration sensor, which can measure the resonator of the mechanical second-order system that receives the forced vibration of the machine in the sensor relative to and The change in capacitance caused by the relative vibration of the fixed body of the sensor to which the machine is attached. The current capacitive sensor usually uses an AC carrier to excite the capacitance of the capacitive sensor, and at the same time obtains the change of the AC carrier current caused by the change of the capacitance of the sensor, so as to realize the measurement of the changing capacitance. However, the AC carrier will also cause the fixed capacitor to generate a changing current. Therefore, it is necessary to subtract the alternating current caused by the fixed capacitance from the detected changing current to obtain the current caused by the changing capacitance, and it needs to go through a complex modulation and demodulation conversion process. , to realize the measurement of variable capacitance and engineering physical quantities.

Referring to Figure 1, it is a schematic block diagram of the differential capacitance detection circuit based on the AC carrier excitation in the traditional scheme. The advantage of this scheme is that it can detect extremely slowly changing changing capacitance and its corresponding physical quantity. It is used to measure the acceleration of gravity, acceleration and deceleration of uniformly variable motion, etc. However, the capacitance detection circuit based on AC carrier excitation needs to have a high-frequency carrier signal generation circuit, a switching phase-sensitive detection circuit, a low-pass demodulation circuit, etc., which makes the circuit structure complex and has low reliability. performance requirements are high.

To sum up, how to implement a capacitive sensor more simply and conveniently to enhance reliability is a technical problem that those skilled in the art urgently need to solve.

SUMMARY OF THE INVENTION

The purpose of the present invention is to provide a capacitive sensor, so as to realize the capacitive sensor more simply and conveniently, and to enhance the reliability.

In order to solve the above-mentioned technical problems, the present invention provides the following technical solutions:

A capacitive sensor comprising:

The capacitance sensitive part is used to reflect the detected value of the target quantity to be measured through its own capacitance change;

The DC excitation generating circuit is used to output the set DC power;

A capacitance-to-voltage conversion circuit connected to the capacitance-sensitive part and the DC excitation generation circuit respectively, is used for using the output of the DC excitation generation circuit as a DC reference, and performs capacitance-to-voltage conversion, so that the output is used to reflect the capacitance The voltage signal of the current capacitance value of the sensitive part;

The amplifying circuit connected with the capacitance-voltage converting circuit is used for amplifying the voltage signal, so that the post-stage circuit determines the current value of the target quantity to be measured based on the output voltage of the amplifying circuit.

Preferably, the capacitance-voltage conversion circuit is a differential capacitance-voltage conversion circuit, the amplifying circuit is a differential amplifying circuit, and the DC excitation generating circuit is specifically used for:

The set first direct current and second direct current are output, and the voltage of the first direct current -VREF=VREF-the voltage of the second direct current, where VREF represents the voltage of the reference voltage terminal.

Preferably, the amplitudes of the first direct current and the second direct current are equal.

Preferably, the DC excitation generating circuit includes: a first operational amplifier, a second operational amplifier, a first resistor, a second resistor, a third resistor and a fourth resistor;

The positive input terminal of the first operational amplifier is connected to the first terminal of the first resistor and the connection terminal is connected to the reference voltage terminal; the negative input terminal of the first operational amplifier is respectively connected to the third resistor. The first end is connected to the first end of the fourth resistor, the output end of the first operational amplifier is connected to the second end of the third resistor, and the connection end is used as the forward output end of the DC excitation generating circuit to output the set first direct current;

The output terminal of the second operational amplifier is respectively connected with the second terminal of the fourth resistor and the negative input terminal of the second operational amplifier, and the connection terminal is used as the negative output terminal of the DC excitation generating circuit to The set second direct current is output, the forward input terminal of the second operational amplifier is respectively connected to the second terminal of the first resistor and the first terminal of the second resistor, and the The second terminal is grounded.

Preferably, the capacitance sensitive part is a capacitance sensitive part adopting a bipolar differential capacitance structure. When the amount of the object to be measured changes, the differential capacitance value of the capacitance sensitive part changes synchronously, so as to reflect the detected object to be measured. quantity value.

Preferably, the capacitance sensitive part includes: a first dynamic capacitance, a second dynamic capacitance, a first static capacitance and a second static capacitance;

The first end of the first dynamic capacitor is connected to the first end of the first static capacitor, and the connection end is used as the first electrode end of the capacitance sensitive part; the second end of the second dynamic capacitor is connected to the first electrode end of the capacitance sensitive part. The second end of the second static capacitor is connected, and the connection end is used as the second electrode end of the capacitance sensitive part; the second end of the first dynamic capacitor is respectively connected with the second end of the first static capacitor, so The first end of the second dynamic capacitor and the first end of the second static capacitor are connected.

Preferably, the connection terminal of the first dynamic capacitor and the second dynamic capacitor is used as the common terminal of the capacitance sensitive part;

Wherein, the common terminal is suspended, or the common terminal is grounded, or the common terminal is connected to the reference voltage terminal, or the common terminal is connected to the machine ground of the capacitive sensor.

Preferably, it further includes: a first shielded wire for the first transmission line and a second shielded wire for the second transmission line;

The first transmission line is a wire used to connect the first excitation detection end of the differential capacitance-to-voltage conversion circuit and the first electrode end of the capacitance sensitive part, and the second transmission line is used to connect the differential capacitance-to-voltage conversion circuit. A wire between the second excitation detection end of the capacitance-to-voltage conversion circuit and the second electrode end of the capacitance sensitive part.

Preferably, the first end of the first shielding wire is connected to the first shielding end of the capacitive sensor housing, and the first end of the first shielding wire is connected to the common end through a first shielding capacitor;

The first end of the second shielding wire is connected to the second shielding end of the capacitive sensor housing, and the first end of the second shielding wire is connected to the common terminal through the second shielding capacitor;

The second end of the first shielded wire and the second end of the second shielded wire are both connected to the reference voltage terminal or grounded.

Preferably, the first end of the first shielding wire is connected to the first shielding end of the capacitive sensor housing, and the first end of the first shielding wire is connected to the common end through the first shielding capacitor, so the second end of the first shielded wire is connected to the forward output end of the direct current excitation generating circuit for outputting the first direct current;

The first end of the second shielded wire is connected to the second shielded end of the capacitive sensor housing, and the first end of the second shielded wire is connected to the common end through a second shielding capacitor, and the second shielded wire is connected to the common end through a second shielding capacitor. the second end of the shielded wire is connected to the negative output end of the direct current excitation generating circuit for outputting the second direct current;

The common terminal is a connection terminal of the first dynamic capacitor and the second dynamic capacitor.

Preferably, the differential amplifying circuit includes: a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a third operational amplifier and a third Four op amps;

The first end of the fifth resistor is used as the positive input end of the differential amplifier circuit, and the second end of the fifth resistor is respectively connected with the second end of the sixth resistor and the positive end of the third operational amplifier. connected to the input end, the first end of the sixth resistor is used to receive the second direct current output from the direct current excitation generating circuit, and the negative input end of the third operational amplifier is respectively connected to the seventh resistor. The second end is connected to the first end of the eighth resistor, the first end of the seventh resistor is used as the negative input end of the differential amplifier circuit, and the output end of the third operational amplifier is respectively connected to the first end of the the second end of the eighth resistor is connected with the first end of the ninth resistor;

The second end of the ninth resistor is respectively connected to the second end of the tenth resistor and the forward input end of the fourth operational amplifier, and the first end of the tenth resistor is connected to the reference voltage end, so the The negative input end of the fourth operational amplifier is respectively connected to the second end of the eleventh resistor and the first end of the twelfth resistor, and the first end of the eleventh resistor is used to receive the The DC excitation generates the first DC power output by the circuit, and the output terminal of the fourth operational amplifier is connected to the second terminal of the twelfth resistor, and the connection terminal is used as the output terminal of the differential amplifier circuit.

Preferably, the differential amplifier circuit includes: a twenty-ninth resistor, a thirty-first resistor, a thirty-first resistor, a thirty-second resistor, a thirty-third resistor, a thirty-fourth resistor and a ninth operational amplifier;

The first end of the twenty-ninth resistor is used as the forward input end of the differential amplifier circuit, the second end of the twenty-ninth resistor is respectively the second end of the thirtieth resistor, and the third The second end of the thirty-one resistor is connected to the forward input end of the ninth operational amplifier, and the first end of the thirty-first resistor is used to receive the second direct current output by the direct current excitation generating circuit, so The first end of the thirty-first resistor is connected to the reference voltage end;

The negative input terminal of the ninth operational amplifier is respectively connected with the second terminal of the thirty-second resistor, the second terminal of the thirty-third resistor and the first terminal of the thirty-fourth resistor, The output terminal of the ninth operational amplifier is connected to the second terminal of the thirty-fourth resistor and the connection terminal is used as the output terminal of the differential amplifier circuit, and the first terminal of the thirty-second resistor is used to receive the The first direct current output from the direct current excitation generating circuit, the first end of the thirty-third resistor is used as the negative input end of the differential amplifier circuit.

Preferably, the differential capacitor-voltage conversion circuit includes: a fifth operational amplifier, a sixth operational amplifier, a first capacitor, a second capacitor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor and a sixteenth resistor ;

The negative input terminal of the fifth operational amplifier is respectively connected to the first terminal of the first capacitor and the first terminal of the thirteenth resistor, and the connection terminal is used as the first terminal of the differential capacitor-voltage conversion circuit. Excitation detection terminal; the forward input terminal of the fifth operational amplifier is used to receive the first direct current output from the direct current excitation generating circuit, and the second terminal of the thirteenth resistor is connected to the fourteenth resistor. the first end is connected, the output end of the fifth operational amplifier is respectively connected with the second end of the first capacitor and the second end of the fourteenth resistor, and the connection end is used as the differential capacitor-voltage conversion circuit The positive output terminal of ;

The negative input terminal of the sixth operational amplifier is respectively connected to the first terminal of the second capacitor and the first terminal of the fifteenth resistor, and the connection terminal serves as the second terminal of the differential capacitor-voltage conversion circuit. Excitation detection terminal; the forward input terminal of the sixth operational amplifier is used to receive the second DC power output by the DC excitation generating circuit, and the second terminal of the fifteenth resistor is connected to the sixteenth resistor. the first terminal is connected, the output terminal of the sixth operational amplifier is respectively connected with the second terminal of the second capacitor and the second terminal of the sixteenth resistor, and the connection terminal is used as the differential capacitor-voltage conversion circuit the negative output terminal.

Preferably, it also includes:

a first RC circuit, the first end of the first RC circuit is respectively connected to the second end of the thirteenth resistor and the first end of the fourteenth resistor, and the second end of the first RC circuit are respectively connected to the second end of the fifteenth resistor and the first end of the sixteenth resistor.

Preferably, the first RC circuit includes: a third capacitor and a seventeenth resistor;

The first end of the third capacitor is used as the first end of the first RC circuit, the second end of the third capacitor is connected to the first end of the seventeenth resistor, and the The second terminal serves as the second terminal of the first RC circuit.

Preferably, it also includes:

Connected to the differential capacitance-voltage conversion circuit, the common mode negative feedback circuit used for reducing the common mode input current through the output negative feedback current.

Preferably, the common mode negative feedback circuit includes: an eighteenth resistor, a nineteenth resistor, a fourth capacitor and a fifth capacitor;

The first end of the eighteenth resistor is connected to the positive output end of the differential capacitor-voltage conversion circuit, and the second end of the eighteenth resistor is respectively connected to the first end of the nineteenth resistor, so The second end of the fourth capacitor is connected to the first end of the fifth capacitor, the second end of the nineteenth resistor is connected to the negative output end of the differential capacitor-voltage conversion circuit, and the fourth The first end of the capacitor is connected to the second excitation and detection end of the differential capacitance-voltage conversion circuit, and the second end of the fifth capacitor is connected to the first excitation and detection end of the differential capacitance-to-voltage conversion circuit.

Preferably, it also includes:

A charge multiplying circuit for increasing the gain of the differential capacitance-to-voltage conversion circuit is connected to the differential capacitance-to-voltage conversion circuit.

Preferably, the charge multiplying circuit is specifically used for:

Feeding back a multiplied current signal proportional to the output current signal of the differential capacitance-to-voltage conversion circuit to the differential capacitance-to-voltage conversion circuit, so as to increase the input current of the differential capacitance-to-voltage conversion circuit to improve the Gain factor for differential capacitance-to-voltage conversion circuits.

Preferably, the charge multiplying circuit includes: a sixth capacitor and a seventh capacitor;

The first end of the sixth capacitor is connected to the forward output end of the differential capacitor-voltage conversion circuit, and the second end of the sixth capacitor is connected to the second excitation and detection end of the differential capacitor-voltage conversion circuit , the second end of the seventh capacitor is connected to the negative output end of the differential capacitor-voltage conversion circuit, and the first end of the seventh capacitor is connected to the first excitation detection end of the differential capacitor-voltage conversion circuit connect.

Preferably, it also includes:

A leakage suppression circuit for reducing the external leakage resistance of the differential capacitance-to-voltage conversion circuit, connected to the differential capacitance-to-voltage conversion circuit.

Preferably, the leakage suppression circuit is composed of two identical comparative amplification feedback control circuits, and the leakage suppression circuit is specifically used for:

When there is an external leakage resistance in the differential capacitance-to-voltage conversion circuit, the DC drift caused by the external leakage resistance is identified by means of comparison and amplification, and fed back to the corresponding transmission line of the differential capacitance-to-voltage conversion circuit through filtering, to suppress the DC drift caused by the external leakage resistance.

Preferably, it further includes: a leakage suppression circuit connected to the differential capacitance-voltage conversion circuit for reducing the external leakage resistance of the differential capacitance-to-voltage conversion circuit, and the leakage suppression circuit comprises: a twentieth resistor, Twenty-first resistor, twenty-second resistor, twenty-third resistor, twenty-fourth resistor, twenty-fifth resistor, twenty-sixth resistor, twenty-seventh resistor, seventh op amp, eighth op amp amplifier and the second RC circuit;

The first end of the twentieth resistor is used as the first input end of the leakage suppression circuit, and the second end of the twentieth resistor is respectively connected with the first end of the second RC circuit and the seventh circuit. The positive input terminal of the amplifier is connected to the negative input terminal of the seventh operational amplifier, and the negative input terminal of the seventh operational amplifier is respectively connected to the second terminal of the twenty-first resistor and the first terminal of the twenty-second resistor. The output terminal of the operational amplifier is respectively connected to the second terminal of the twenty-second resistor and the first terminal of the twenty-third resistor, and the second terminal of the twenty-third resistor is connected to the differential capacitor voltage The first excitation detection end of the conversion circuit is connected, and the first end of the twenty-first resistor is used for receiving the first direct current output from the direct current excitation generating circuit;

The first end of the twenty-sixth resistor is used as the second input end of the leakage suppression circuit, and the second end of the twenty-sixth resistor is respectively connected with the second end of the second RC circuit and the second end of the second RC circuit. The positive input terminal of the eighth operational amplifier is connected, and the negative input terminal of the eighth operational amplifier is respectively connected to the second terminal of the twenty-fifth resistor and the first terminal of the twenty-fourth resistor, and the The output end of the eighth operational amplifier is respectively connected to the second end of the twenty-fourth resistor and the first end of the twenty-seventh resistor, and the second end of the twenty-seventh resistor is connected to the differential the second excitation detection end of the capacitance-voltage conversion circuit is connected, and the first end of the twenty-fifth resistor is used for receiving the second direct current output from the direct current excitation generating circuit;

The first input end of the leakage suppression circuit is respectively connected to the second end of the thirteenth resistor and the first end of the fourteenth resistor, and the second input end of the leakage suppression circuit is respectively connected to the first end of the thirteenth resistor. The second end of the fifteenth resistor is connected with the first end of the sixteenth resistor.

Applying the technical solutions provided by the embodiments of the present invention, considering that although the traditional capacitance detection circuit based on AC carrier excitation has the advantage of being able to detect extremely slowly changing changing capacitance and its corresponding physical quantity, that is, it can measure static information, however, in In current engineering applications, a large number of detection requirements are aimed at dynamic information, such as the acceleration of machine vibration, the rotational speed of the rotating shaft, the relative dynamic distance between two machine parts, etc. That is to say, static information cannot be measured but dynamic information can be measured. The capacitive sensor can be used in most fields. In this regard, the solution of the present application considers that the present application does not need to set up a circuit for generating a high-frequency carrier excitation signal, but realizes capacitive detection based on DC carrier excitation, which can realize the measurement of dynamic information and at the same time make the capacitive sensor simple in structure , high reliability.

Specifically, in the solution of the present application, the capacitance sensitive part can reflect the detected value of the target quantity to be measured through its own capacitance change, and the capacitance-to-voltage conversion circuit of the present application can use the output of the DC excitation generating circuit as a DC reference, and then Capacitance-to-voltage conversion is performed on the output of the capacitance-sensitive part to output a voltage signal that reflects the current capacitance value of the capacitance-sensitive part. Therefore, after the amplifier circuit amplifies the voltage signal, the subsequent circuit can determine the output voltage based on the amplifier circuit. The current value of the target quantity to be measured is displayed. It can be seen that the solution of the present application can realize the detection of dynamic information, that is, the numerical change of the target quantity to be measured will be reflected on the capacitance change of the capacitance sensitive part. In addition, because the solution of the present application does not need to generate a high-frequency carrier excitation signal as in the traditional solution, but uses the DC excitation to generate the set DC current output by the circuit, that is, the application uses the DC carrier excitation to realize the capacitance detection, so the circuit structure is simple, Low cost and high reliability.

Description of drawings

In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the following briefly introduces the accompanying drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only These are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can also be obtained according to these drawings without creative efforts.

Fig. 1 is the principle block diagram of the differential capacitance detection circuit based on AC carrier excitation in the traditional scheme;

2a is a schematic structural diagram of a capacitive sensor in the present invention;

2b is a schematic structural diagram of a capacitive sensor in a specific embodiment of the present invention;

3a is a schematic structural diagram of a capacitance sensitive part in a specific embodiment;

3b is a schematic diagram of setting a first shielded wire and a second shielded wire in a specific embodiment;

3c is a schematic diagram of the connection structure of the first shielded wire and the second shielded wire in a specific embodiment;

3d is a schematic diagram of the connection structure of the first shielded wire and the second shielded wire in another specific embodiment;

4 is a schematic structural diagram of a DC excitation generating circuit in a specific embodiment;

5 is a schematic structural diagram of a differential capacitance-voltage conversion circuit in a specific embodiment;

6 is a schematic structural diagram of a differential capacitor-voltage conversion circuit in another specific embodiment;

7a is a schematic structural diagram of a differential amplifier circuit in a specific embodiment;

7b is a schematic structural diagram of a differential amplifier circuit in another specific embodiment;

8a is a schematic diagram of the position of the external leakage resistance of the differential capacitor-voltage conversion circuit in a specific embodiment;

8b is a schematic structural diagram of a leakage suppression circuit in a specific embodiment;

Fig. 9a is the simulation waveform schematic diagram in the first occasion;

Fig. 9b is the simulation waveform schematic diagram in the second occasion;

Figure 9c is a schematic diagram of a simulation waveform in the third occasion;

Figure 9d is a schematic diagram of the simulation waveform in the fourth occasion;

Fig. 9e is the simulation waveform schematic diagram in the fifth occasion;

Fig. 9f is the simulation waveform schematic diagram in the sixth occasion;

FIG. 9g is a schematic diagram of a simulation waveform in the seventh situation.

Detailed ways

The core of the invention is to provide a capacitive sensor, which adopts DC carrier wave excitation to realize capacitive detection, has simple circuit structure, low cost and high reliability.

In order to make those skilled in the art better understand the solution of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are only some, but not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

Please refer to FIG. 2a. FIG. 2a is a schematic structural diagram of a capacitive sensor in the present invention. The capacitive sensor may include:

The capacitance sensitive part 10 is used to reflect the detected value of the target quantity to be measured through its own capacitance change;

The DC excitation generating circuit 20 is used for outputting the set DC power;

The capacitance-to-voltage conversion circuit 30, which is respectively connected with the capacitance-sensitive part 10 and the DC excitation generation circuit 20, is used for using the output of the DC excitation generation circuit 20 as a DC reference, and performs capacitance-to-voltage conversion, so as to output the output for reflecting the current state of the capacitance-sensitive part 10. The voltage signal of the capacitance value;

The amplifying circuit 40 connected to the capacitance-voltage converting circuit 30 is used for amplifying the voltage signal, so that the subsequent stage circuit can determine the current value of the target quantity to be measured based on the output voltage of the amplifying circuit 40 .

Specifically, the specific structure of the capacitance sensitive part 10 can be set and adjusted as required, as long as the value of the detected target quantity to be measured can be reflected through its own capacitance change, and the specific type of the target quantity to be measured can also be more Such as the acceleration of machine vibration, the speed of rotation of the rotating shaft, the relative dynamic distance of two machine parts, and so on.

In practical applications, considering the accuracy of the measurement, the capacitance-to-voltage conversion circuit 30 may be specifically a differential capacitance-to-voltage conversion circuit 30, and the amplifier circuit 40 may be specifically a differential amplifier circuit 40. When the differential capacitance-to-voltage conversion circuit 30 is used, the capacitance The sensitive part 10 can be a capacitive sensitive part 10 with two output ports, that is, the capacitive sensitive part 10 can be specifically a capacitive sensitive part using a bipolar differential capacitor structure. When the target quantity to be measured changes, the differential capacitance of the capacitive sensitive part 10 The value changes accordingly to reflect the detected value of the target quantity to be measured.

That is to say, when the capacitance sensitive part 10 adopts the bipolar differential capacitance structure, when the external physical quantities, such as vibration, rotation speed, angle, displacement, etc., change, the differential capacitance value thereof changes correspondingly synchronously.

Of course, the specific structure of the capacitance sensitive part 10 using the bipolar differential capacitance structure can be selected as required. For example, in a specific embodiment of the present invention, please refer to FIG. 3 a , which is a schematic structural diagram of the capacitance sensitive portion 10 in a specific embodiment. It may include: a first dynamic capacitor CD1, a second dynamic capacitor CD2, a first static capacitor CJ1 and a second static capacitor CJ2;

The first terminal of the first dynamic capacitor CD1 is connected to the first terminal of the first static capacitor CJ1, and the connection terminal serves as the first electrode terminal of the capacitance sensitive part 10; the second terminal of the second dynamic capacitor CD2 is connected to the second static capacitor CJ2 The second end of the first dynamic capacitor CD1 is connected to the second end of the capacitance sensitive part 10; the second end of the first dynamic capacitor CD1 is respectively connected with the second end of the first static capacitor CJ1 and the first end of the second dynamic capacitor CD2 and the first terminal of the second static capacitor CJ2 is connected.

In the embodiment of FIG. 3 a , the capacitance sensitive part 10 has two output ports, which are respectively marked as the first electrode terminal and the second electrode terminal of the capacitance sensitive part 10 . When the value of the detected target quantity to be measured is 0, the capacitance values of the first dynamic capacitor CD1 and the second dynamic capacitor CD2 in FIG. 3a are both 0, and when the target quantity to be measured changes, the first dynamic capacitor CD1 and the second dynamic capacitor CD2 have a capacitance value of 0. The capacitance values of the dynamic capacitance CD1 and the second dynamic capacitance CD2 also make the capacitance of the capacitance sensitive part 10 itself change.

In addition, it should be noted that when the target quantity to be measured changes, the specific physical structure design that causes the first dynamic capacitance CD1 and the second dynamic capacitance CD2 of the capacitance sensitive part 10 to change can be various, and can be set according to actual needs. However, for example, due to the change of the target quantity to be measured, the position of the corresponding electrode plate in the capacitance sensitive part 10 changes, and thus the capacitance values of the first dynamic capacitance CD1 and the second dynamic capacitance CD2 change.

The capacitance sensitive part 10 in FIG. 3a includes a first capacitance sensitive part CMG1 and a second capacitance sensitive part CMG2. When the target quantity to be measured changes, CMG1 and CMG2 can have the same capacitance change, or have capacitance changes in similar proportions , depending on the structural design of the capacitance sensitive part 10 . The capacitance values of the first static capacitance CJ1 and the second static capacitance CJ2 are not affected by the target quantity to be measured. CMG1=CJ1+CD1, CMG2=CJ2+CD2. In this application, the connection terminal of CMG1 and CMG2 is called the common terminal, that is, the connection terminal of the first dynamic capacitor CD1 and the second dynamic capacitor CD2 is used as the common terminal of the capacitance sensitive part 10. Of course, the common terminal is also the first static capacitor. The connection terminal between CJ1 and the second static capacitor CJ2.

In a specific embodiment of the present invention, the common terminal can be suspended, or the common terminal can be grounded, or the common terminal can be connected to the reference voltage terminal, or the common terminal can be connected to the machine ground of the capacitive sensor. It can be seen that the This embodiment has high flexibility for the connection mode of the common terminal. In practical applications, when the common terminal is grounded or connected to the reference voltage terminal, a dedicated cable can be used to connect it to the ground wire GND or the reference voltage terminal VREF. The mechanical ground of the capacitive sensor can be the casing of the capacitive sensor, or the conductive layer inside the casing of the capacitive sensor that is insulated from the sensor casing. In addition, the mechanical ground can also be artificially or naturally connected to the power ground of the circuit. GND connection.

In a specific embodiment of the present invention, it may further include: a first shielded wire for the first transmission line, and a second shielded wire for the second transmission line;

The first transmission line is a wire used to connect the first excitation detection end of the differential capacitance-to-voltage conversion circuit 30 and the first electrode end of the capacitance sensitive part 10 , and the second transmission line is used to connect the second of the differential capacitance-to-voltage conversion circuit 30 . The wire between the detection end and the second electrode end of the capacitance sensitive part 10 is excited.

In this embodiment, a first shielded wire and a second shielded wire are respectively provided for the first transmission line and the second transmission line, which can effectively reduce external interference. Referring to FIG. 3b, a first shielded wire and a second shielded wire are respectively provided for the first transmission line and the second transmission line.

Further, in a specific embodiment of the present invention, referring to FIG. 3d, the first end of the first shielded wire is connected to the first shielded end of the capacitive sensor housing, and the first end of the first shielded wire passes through the The first shielding capacitor CC01 is connected to the common terminal;

The first end of the second shielding wire is connected to the second shielding end of the capacitive sensor housing, and the first end of the second shielding wire is connected to the common terminal through the second shielding capacitor CC02;

The second end of the first shielded wire and the second end of the second shielded wire are both connected to the reference voltage terminal or grounded.

In this embodiment, both the second end of the first shielded wire and the second end of the second shielded wire are connected to the reference voltage terminal VREF, or both are connected to GND. Since the first shielding capacitor CC01 and the second shielding capacitor CC02 are set, it is beneficial to reduce interference.

Further, in a specific embodiment of the present invention, the first end of the first shielding wire is connected to the first shielding end of the capacitive sensor housing, and the first end of the first shielding wire passes through the first shielding capacitor CC01 connected to the common terminal, and the second terminal of the first shielded wire is connected to the forward output terminal of the DC excitation generating circuit 20 for outputting the first DC power;

The first end of the second shielded wire is connected to the second shielded end of the capacitive sensor housing, the first end of the second shielded wire is connected to the common terminal through the second shielding capacitor CC02, and the second end of the second shielded wire is connected to the common terminal. The DC excitation generating circuit 20 is connected to a negative output terminal for outputting the second DC power;

The common terminal is the connection terminal of the first dynamic capacitor CD1 and the second dynamic capacitor CD2.

Referring to FIG. 3 c , it is a schematic diagram of the connection structure of the first shielded wire and the second shielded wire in a specific embodiment. In FIG. 3c, CP1 represents the distributed capacitance of the first shielded line to the first transmission line, and CP2 represents the distributed capacitance of the second shielded line to the second transmission line. If the distributed capacitances CP1 and CP2 are fixed, they are equivalent to being connected in parallel to the static capacitances CJ1 and CJ2 of the capacitance sensitive part 10 , and do not affect the performance of the sensor. However, if the distributed capacitances CP1 and CP2 vibrate slightly due to machine vibration and other reasons, and alternating components CPD1 and CPD2 appear, they are equivalent to being connected in parallel to the dynamic capacitances CD1 and CD2 of the capacitance sensitive part 10, thereby causing noise interference.

In this regard, different from the above-mentioned one embodiment in which the second end of the first shielded wire and the second end of the second shielded wire are both connected to GND or VREF, in this embodiment of the present application, in order to overcome the transmission line and the The noise caused by the above-mentioned alternating components CPD1 and CPD2 caused by the vibration of the shielded wire is that the second end of the first shielded wire is connected to the positive output terminal of the DC excitation generating circuit 20 for outputting the first direct current, and the second shielded wire is connected to The second terminal of the DC excitation generating circuit 20 is connected to the negative output terminal of the DC excitation generating circuit 20 for outputting the second DC power. That is, the second end of the first shielded wire is connected to UR1, the second end of the second shielded wire is connected to UR2, and the equipotential driving of the distributed capacitances CP1 and CP2 of the transmission line surrounded by the shielded wire is implemented, which can eliminate the Noise due to alternating components CPD1, CPD2. The first shielded wire and the second shielded wire respectively connected to UR1 and UR2 are connected to the capacitance sensitive part 10 through equal capacitors, that is, through the first shielded capacitor CC01 and the second shielded capacitor CC02. The common terminal of CMG1 and CMG2 of 10, that is, the connection terminal of the first dynamic capacitor CD1 and the second dynamic capacitor CD2, implements equipotential driving for the transmission line and the capacitance sensitive part 10, so as to prevent the common terminal from coupling external interference.

The capacitance-to-voltage conversion circuit 30 is a C/V conversion circuit, and the capacitance-to-voltage conversion circuit 30 of the present application is respectively connected to the capacitance sensitive part 10 and the DC excitation generating circuit 20 . The DC excitation generating circuit 20 is used for outputting the set DC power, that is, providing a DC reference voltage for the capacitance-voltage converting circuit 30, and the capacitance-voltage converting circuit 30 can perform capacitance-voltage converting on the output of the capacitance-sensitive part 10, so that the output is used to reflect the capacitance The voltage signal of the current capacitance value of the sensitive part 10 .

The specific structures of the capacitance-to-voltage conversion circuit 30 and the DC excitation generation circuit 20 can be set and adjusted as required, and as described above, the capacitance-to-voltage conversion circuit 30 can usually be selected as a differential capacitance-to-voltage conversion circuit 30, then the DC The excitation generating circuit 20 can be specifically used for: outputting the set first DC power and the second DC power, and the voltage of the first DC power -VREF=VREF-the voltage of the second DC power, where VREF represents the voltage of the reference voltage terminal. And in practical applications, in order to enable the capacitor-voltage conversion circuit 30 to filter out common-mode interference conveniently and effectively, the amplitudes of the first direct current and the second direct current may generally be equal.

Referring to FIG. 2b, which is a schematic structural diagram of a capacitive sensor in an embodiment of the present invention, the capacitance-to-voltage conversion circuit 30 in FIG. 2b is a differential capacitance-to-voltage conversion circuit 30, which is composed of two C/V circuits. The capacitance sensitive part in FIG. 2b also selects the capacitance sensitive part 10 with two output ports, and the amplifying circuit 40 in FIG.

In a specific embodiment of the present invention, please refer to FIG. 4 , which is a schematic structural diagram of the DC excitation generation circuit 20 in a specific embodiment. In this embodiment, the DC excitation generation circuit 20 has a simple structure and high reliability. Direct currents UR1 and UR2 with opposite polarities and equal in magnitude to the reference voltage terminal VREF can be effectively output, that is, the first direct current-VREF=VREF-the second direct current. In the following embodiments of the present application, the first DC power output by the DC excitation generating circuit 20 is marked as UR1 as the positive output terminal, and the output second DC power is marked as UR2 as the negative output terminal.

In FIG. 4, the DC excitation generating circuit 20 includes: a first operational amplifier OP1, a second operational amplifier OP2, a first resistor R1, a second resistor R2, a third resistor R3 and a fourth resistor R4;

The positive input terminal of the first operational amplifier OP1 is connected to the first terminal of the first resistor R1 and the connection terminal is connected to the reference voltage terminal; the negative input terminal of the first operational amplifier OP1 is respectively connected to the first terminal of the third resistor R3 and the reference voltage terminal. The first terminal of the fourth resistor R4 is connected, the output terminal of the first operational amplifier OP1 is connected to the second terminal of the third resistor R3 and the connection terminal is used as the forward output terminal of the DC excitation generating circuit 20 to output the set first DC current. ;

The output terminal of the second operational amplifier OP2 is respectively connected with the second terminal of the fourth resistor R4 and the negative input terminal of the second operational amplifier OP2, and the connection terminal is used as the negative output terminal of the DC excitation generating circuit 20 to output the set For the second direct current, the forward input end of the second operational amplifier OP2 is respectively connected to the second end of the first resistor R1 and the first end of the second resistor R2, and the second end of the second resistor R2 is grounded.

In FIG. 4 , the reference voltage VREF is divided by the ground voltage GND through the first resistor R1 and the second resistor R2, and a negative excitation voltage UR2 relative to VREF is generated at both ends of the first resistor R1. The output terminal of the second operational amplifier OP2 follows and amplifies the voltage on the first resistor R1, and outputs a negative excitation voltage UR2. In practical applications, usually the third resistor R3 can be set equal to the fourth resistor R4, and the first operational amplifier OP1 inverts and amplifies the negative excitation voltage UR2 by a factor of 1, and outputs the positive excitation voltage UR1.

It should be noted that the specific value of the reference voltage VREF in this application and the supply circuit of VREF can be set as required. For example, in the embodiment of FIG. 4 , the supply circuit of VREF is realized by a resistor R402 and a Zener diode V401 .

When the capacitance-to-voltage conversion circuit 30 is selected as the differential capacitance-to-voltage conversion circuit 30, it can be composed of a positive C/V conversion circuit and a negative C/V conversion circuit, and referring to FIG. A schematic diagram of the structure of the capacitor-to-voltage conversion circuit 30, the differential capacitor-to-voltage conversion circuit 30 includes: a fifth operational amplifier OP5, a sixth operational amplifier OP6, a first capacitor C1, a second capacitor C2, a thirteenth resistor R13, and a tenth Four resistors R14, fifteenth resistors R15 and sixteenth resistors R16;

The negative input terminal of the fifth operational amplifier OP5 is respectively connected with the first terminal of the first capacitor C1 and the first terminal of the thirteenth resistor R13, and the connection terminal is used as the first excitation detection terminal of the differential capacitor-voltage conversion circuit 30; The forward input terminal of the fifth operational amplifier OP5 is used to receive the first DC power output by the DC excitation generating circuit 20, the second terminal of the thirteenth resistor R13 is connected to the first terminal of the fourteenth resistor R14, and the fifth operational amplifier OP5 The output terminals of the capacitor C1 are respectively connected with the second terminal of the first capacitor C1 and the second terminal of the fourteenth resistor R14, and the connection terminals are used as the forward output terminal of the differential capacitor-voltage conversion circuit 30;

The negative input terminal of the sixth operational amplifier OP6 is respectively connected with the first terminal of the second capacitor C2 and the first terminal of the fifteenth resistor R15, and the connection terminal is used as the second excitation detection terminal of the differential capacitor-voltage conversion circuit 30; The forward input terminal of the sixth operational amplifier OP6 is used to receive the second DC power output by the DC excitation generating circuit 20, the second terminal of the fifteenth resistor R15 is connected to the first terminal of the sixteenth resistor R16, and the sixth operational amplifier OP6 The output terminals of the capacitor C2 are respectively connected to the second terminal of the second capacitor C2 and the second terminal of the sixteenth resistor R16 , and the connection terminals serve as the negative output terminals of the differential capacitor-voltage conversion circuit 30 .

In Figure 5, both the positive C/V conversion circuit and the negative C/V conversion circuit include an operational amplifier, 2 resistors and a capacitor, and the positive C/V conversion circuit of the fifth operational amplifier OP5 has a positive direction The input terminal is connected to the positive excitation voltage UR1 , that is, it receives the first DC power output from the DC excitation generating circuit 20 . The positive input terminal of the sixth operational amplifier OP6 in the negative C/V conversion circuit is connected to the negative excitation voltage UR2 , that is, receives the second DC power output by the DC excitation generating circuit 20 . In FIG. 5 , the first excitation detection terminal and the second excitation detection terminal of the capacitance-to-voltage conversion circuit 30 are marked as I1 and I2, respectively. The positive output terminal and the negative output terminal of the capacitance-to-voltage conversion circuit 30 are marked as U01 and U02, respectively.

In a specific embodiment, the basic detection sensitivity function S of the positive C/V conversion circuit and the negative C/V conversion circuit can be expressed as: S=UR*CD/CM, where the parameter UR=UR1-VREF=VREF- UR2, CD=CD1=CD2, is the dynamic capacitance of the capacitance sensitive part 10, CM=C1=C2, is the feedback capacitance from the output terminal of the fifth operational amplifier OP5 and the sixth operational amplifier OP6 to the negative input terminal.

In a specific embodiment of the present invention, it can also include:

Connected to the differential capacitance-voltage conversion circuit 30, it is a common mode negative feedback circuit for reducing the common mode input current through the output negative feedback current.

The common-mode negative feedback circuit provided in this embodiment can be used to suppress common-mode interference. Through the common-mode negative feedback circuit, it is beneficial for the common-mode input voltage to not exceed the common mode of the fifth operational amplifier OP5 and the sixth operational amplifier OP6. The mode input range reduces the common mode voltage output by the fifth operational amplifier OP5 and the sixth operational amplifier OP6, which also enables the subsequent differential amplifier circuit 40 to more effectively eliminate common mode interference through differential amplification.

The specific structure of the common-mode negative feedback circuit can also be various. For example, in the embodiment of FIG. 6 , the common-mode negative feedback circuit can specifically include: an eighteenth resistor R18, a nineteenth resistor R19, a fourth capacitor C4, and a fourth capacitor C4. Five capacitors C5;

The first end of the eighteenth resistor R18 is connected to the positive output end of the differential capacitor-voltage conversion circuit 30, the second end of the eighteenth resistor R18 is respectively connected to the first end of the nineteenth resistor R19, and the fourth capacitor C4 The second end is connected to the first end of the fifth capacitor C5, the second end of the nineteenth resistor R19 is connected to the negative output end of the differential capacitor-voltage conversion circuit 30, and the first end of the fourth capacitor C4 is connected to the differential capacitor The second excitation detection terminal of the voltage conversion circuit 30 is connected, and the second terminal of the fifth capacitor C5 is connected to the first excitation detection terminal of the differential capacitance-voltage conversion circuit 30 .

In the embodiment shown in FIG. 6 , the eighteenth resistor R18 and the nineteenth resistor R19 of equal value can be set as two sampling devices, and in other embodiments, two capacitors of equal value can also be set as two sampling devices. The fourth capacitor C4 and the fifth capacitor C5 are two common mode feedback capacitors. In addition, it should be noted that the connection terminals of the two sampling devices, that is, the connection terminals of the eighteenth resistor R18 and the nineteenth resistor R19 in the embodiment of FIG. 6 , can be directly connected or connected to the common mode feedback after being followed by an operational amplifier. The connection terminals of the capacitors C4 and C5 are directly connected in FIG. 6 . The other ends of C4 and C5 are respectively connected to the two excitation detection ends I1 and I2 of the capacitor-voltage conversion circuit 30 , that is, the negative input end of the fifth operational amplifier OP5 in the positive C/V conversion circuit, and the negative C/V conversion circuit. The negative input terminal of the sixth operational amplifier OP6 in the circuit.

For the common mode negative feedback circuit shown in Figure 6, when the connection terminals of the eighteenth resistor R18 and the nineteenth resistor R19 are followed by the operational amplifier and then connected to the connection terminals of C4 and C5, the common mode suppression effect function GM is: GM= 20log(CG/CM), where CG=C4=C5. CM=C1=C2, which is the feedback capacitance from the output terminal of the fifth operational amplifier OP5 and the sixth operational amplifier OP6 to the negative input terminal.

For example, when CG=C4=C5=1n, CM=C1=C2=10pF, the common mode rejection effect can be expressed as: GM=20log(CG/CM)=20log(1n/10p)=40dB, therefore, the common mode The common mode rejection effect of output UO1 and UO2 is -40dB.

Further, in a specific embodiment of the present invention, referring to FIG. 6 , it may also include:

The first RC circuit, the first end of the first RC circuit is respectively connected with the second end of the thirteenth resistor R13 and the first end of the fourteenth resistor R14, and the second end of the first RC circuit is respectively connected with the fifteenth resistor The second end of R15 is connected to the first end of the sixteenth resistor R16.

In this specific embodiment of the present invention, a first RC circuit connected to the differential capacitor-voltage conversion circuit 30 is also provided, that is, the low-frequency bootstrap bypass, which can effectively reduce the low-frequency cut-off frequency and expand the bandwidth, which is effective improved low-frequency performance,

In the embodiment of FIG. 6 , the first RC circuit specifically includes: a third capacitor C3 and a seventeenth resistor R17;

The first end of the third capacitor C3 serves as the first end of the first RC circuit, the second end of the third capacitor C3 is connected to the first end of the seventeenth resistor R17, and the second end of the seventeenth resistor R17 serves as the first end The second end of the RC circuit. In this embodiment, the first RC circuit is composed of the third capacitor C3 and the seventeenth resistor R17, which has a simple structure and high reliability.

In a specific embodiment of the present invention, it can also include:

A charge multiplying circuit for increasing the gain of the differential capacitance-voltage converting circuit 30 is connected to the differential capacitance-voltage converting circuit 30 .

In this embodiment, the gain of the differential capacitance-voltage conversion circuit 30 is increased by the charge multiplying circuit, which improves the flexibility of use of the solution of the present application.

The specific structure of the charge multiplying circuit can be set and adjusted as required. In a specific implementation manner, the charge multiplying circuit can be specifically used for:

Feedback the multiplied current signal proportional to the output current signal of the differential capacitor-voltage conversion circuit 30 to the differential capacitor-voltage conversion circuit 30 , so as to increase the input current of the differential capacitor-voltage conversion circuit 30 to improve the differential capacitor-to-voltage conversion gain factor for circuit 30 .

In this embodiment, the charge multiplying circuit specifically amplifies the output current of the differential capacitor-voltage converting circuit 30 , and then feeds it back to the capacitor-voltage converting circuit 30 to improve the voltage gain of the capacitor-voltage converting circuit 30 .

The specific structure of the charge multiplying circuit can be set and adjusted as required. For example, in a specific embodiment of the present invention, the charge multiplying circuit can include: a sixth capacitor C6 and a seventh capacitor C7;

Referring to FIG. 6 , the first terminal of the sixth capacitor C6 is connected to the forward output terminal of the differential capacitor-voltage conversion circuit 30 , and the second terminal of the sixth capacitor C6 is connected to the second excitation detection terminal of the differential capacitor-voltage conversion circuit 30 . The second terminal of the seventh capacitor C7 is connected to the negative output terminal of the differential capacitor-voltage conversion circuit 30 , and the first terminal of the seventh capacitor C7 is connected to the first excitation and detection terminal of the differential capacitor-voltage conversion circuit 30 .

In practical applications, C6=C7 can be set. Through charge multiplication, the gain boost function BZ of the positive C/V conversion circuit and the negative C/V conversion circuit can be expressed as:

BZ=20log[CM/(CM-CBZ)], wherein, CM=C1=C2, which is the feedback capacitance from the output terminal of the fifth operational amplifier OP5 and the sixth operational amplifier OP6 to the negative input terminal, CBZ=C6=C7;

For example: CM=C1=C2=1000pF, CBZ=C6=C7=990pF,

Then BZ=20log[CM/(CM-CBZ)]=20log[1000p/(1000p-990p)]=40dB.

It can be seen that, in practical applications, by appropriately increasing the capacitance values of the sixth capacitor C6 and the seventh capacitor C7, it is beneficial to increase the gain, that is, to enhance the charge multiplication effect.

The amplifier circuit 40 can amplify the voltage signal, so that the post-stage circuit can determine the current value of the target quantity to be measured based on the output voltage of the amplifier circuit 40. Generally, the output voltage of the amplifier circuit 40 and the current value of the target quantity to be measured can be formed. proportional. The specific structure of the post-stage circuit can be set and adjusted according to actual needs, depending on the specific design of the sensor.

As described above, the amplifying circuit 40 may be specifically a differential amplifying circuit 40 .

In a specific embodiment of the present invention, referring to FIG. 7a, the differential amplifier circuit 40 may include: a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor Resistor R10, eleventh resistor R11, twelfth resistor R12, third operational amplifier OP3 and fourth operational amplifier OP4;

The first end of the fifth resistor R5 is used as the forward input end of the differential amplifier circuit 40, and the second end of the fifth resistor R5 is respectively connected to the second end of the sixth resistor R6 and the forward input end of the third operational amplifier OP3, The first end of the sixth resistor R6 is used to receive the second DC power output by the DC excitation generating circuit 20, and the negative input end of the third operational amplifier OP3 is respectively connected to the second end of the seventh resistor R7 and the first end of the eighth resistor R8. terminal is connected, the first terminal of the seventh resistor R7 is used as the negative input terminal of the differential amplifier circuit 40, the output terminal of the third operational amplifier OP3 is respectively connected to the second terminal of the eighth resistor R8 and the first terminal of the ninth resistor R9 ;

The second end of the ninth resistor R9 is respectively connected to the second end of the tenth resistor R10 and the forward input end of the fourth operational amplifier OP4, the first end of the tenth resistor R10 is connected to the reference voltage end, and the fourth operational amplifier OP4 The negative input terminal of the R11 is connected to the second terminal of the eleventh resistor R11 and the first terminal of the twelfth resistor R12 respectively, and the first terminal of the eleventh resistor R11 is used to receive the first DC power output by the DC excitation generating circuit 20. , the output terminal of the fourth operational amplifier OP4 is connected to the second terminal of the twelfth resistor R12 and the connection terminal is used as the output terminal of the differential amplifier circuit 40 .

In the embodiment of FIG. 7a, a two-stage differential amplifier circuit 40 is used, the output of the previous stage is UCF, and the output of the latter stage is UCFF. The differential amplifier circuit 40 of the previous stage includes a third operational amplifier OP3 and four resistors, and the resistance values of the fifth resistor R5, the sixth resistor R6, the seventh resistor R7, and the eighth resistor R8 can be equal.

In the traditional solution, the first end of the sixth resistor R6 is grounded to GND or to the reference voltage VREF. In this way, the DC level of the output terminal voltage UCF of the third operational amplifier OP3 is higher than the DC level of U01, This results in signal clipping or reduced dynamic range.

In this regard, in the solution of the present application, the first end of the sixth resistor R6 is connected to the negative excitation voltage UR2, that is, the first end of the sixth resistor R6 is used to receive the second DC power UR2 output by the DC excitation generating circuit 20, In this way, the DC level of the output terminal voltage UCF of the third operational amplifier OP3 can always be equal to the DC level of U01.

The differential amplifier circuit 40 of the latter stage includes a fourth operational amplifier OP4 and four resistors, and the resistance values of the ninth resistor R9, the tenth resistor R10, the eleventh resistor R11, and the twelfth resistor R12 can be equal.

In the traditional solution, the first end of the eleventh resistor R11 is grounded to GND or to the reference voltage VREF. In this way, the DC level of the output terminal voltage UCFF of the fourth operational amplifier OP4 will be too high, resulting in signal limitation. Amplitude or dynamic range is reduced.

In this regard, in the solution of the present application, the first end of the eleventh resistor R11 is connected to the positive excitation voltage UR1, that is, the first end of the eleventh resistor R11 is used to receive the first direct current output by the direct current excitation generating circuit 20. UR1, so that the DC level of the output terminal voltage UCFF of the fourth operational amplifier OP4 is always equal to the reference voltage VREF, so as to achieve the effect of automatically stabilizing the optimal operating point state.

In the above embodiment, when the resistance values of the fifth resistor R5 , the sixth resistor R6 , the seventh resistor R7 , and the eighth resistor R8 are all set to be equal, the dynamic amplification factor of the differential amplifier circuit 40 of the previous stage is 1. When R9=R11 and R10=R12 are set, the dynamic amplification factor of the differential amplifier circuit 40 in the latter stage is R10/R9=R12/R11.

In a specific embodiment of the present invention, referring to FIG. 7b, the differential amplifier circuit 40 may include: a twenty-ninth resistor R29, a thirtieth resistor R30, a thirty-first resistor R30, a thirty-second resistor R32, The thirty-third resistor R33, the thirty-fourth resistor R34 and the ninth operational amplifier OP9;

The first end of the twenty-ninth resistor R29 is used as the forward input end of the differential amplifier circuit 40, the second end of the twenty-ninth resistor R29 is respectively connected with the second end of the thirtieth resistor R30, and the The second end is connected to the forward input end of the ninth operational amplifier OP9, the first end of the thirtieth resistor R30 is used to receive the second direct current UR2 output by the direct current excitation generating circuit 20, and the first end of the thirty-first resistor R31 Connect to the reference voltage terminal VREF;

The negative input terminal of the ninth operational amplifier OP9 is respectively connected to the second terminal of the thirty-second resistor R32, the second terminal of the thirty-third resistor R33 and the first terminal of the thirty-fourth resistor R34, and the ninth operational amplifier The output terminal of OP9 is connected to the second terminal of the thirty-fourth resistor R34 and the connection terminal is used as the output terminal of the differential amplifier circuit 40 . The direct current UR1, the first end of the thirty-third resistor R33 is used as the negative input end of the differential amplifier circuit.

It can be seen from the circuit structure that in the embodiment of FIG. 7b, only one operational amplifier, namely the ninth operational amplifier OP9, is needed to realize the differential amplifier circuit 40 of the present application, and realize the input operating point shift and AC Signal amplification. Since only one op amp is required, the number of required op amps is saved compared to the embodiment of FIG. 7a.

In a specific embodiment of the present invention, it can also include:

It is connected to the differential capacitance-to-voltage conversion circuit 30 , and is a leakage suppression circuit for reducing the external leakage resistance of the differential capacitance-to-voltage conversion circuit 30 .

Referring to FIG. 8a, the external leakage resistances R05 and R06 of the differential capacitor-voltage conversion circuit 30 are shown. The external leakage resistance may cause the positive C/V conversion circuit and the negative C/V conversion circuit of the differential capacitor-voltage conversion circuit 30. , and the output UCFF operating point offset and limit of the differential amplifier circuit 40 . Therefore, in this embodiment, a leakage suppression circuit that can reduce the external leakage resistance of the differential capacitance-voltage conversion circuit 30 is provided.

The specific structure of the leakage suppression circuit can be set and adjusted as required. In a specific embodiment of the present invention, the leakage suppression circuit is composed of two identical comparative amplification feedback control circuits, and the leakage suppression circuit can be specifically used for:

When there is an external leakage resistance in the differential capacitor-voltage conversion circuit 30, the DC drift caused by the external leakage resistance is identified by means of comparison and amplification, and is fed back to the corresponding transmission line of the differential capacitor-voltage conversion circuit 30 through filtering to suppress external leakage. Resistor induced DC drift.

Specifically, the wire used to connect the first excitation detection end of the differential capacitance-to-voltage conversion circuit 40 and the first electrode end of the capacitance-sensitive part 10 is called the first transmission line, and correspondingly, the wire used to connect the differential capacitance-to-voltage conversion The wire between the second excitation detection end of the circuit 40 and the second electrode end of the capacitance sensitive part 40 is called the second transmission line. When the differential capacitance-to-voltage conversion circuit 30 has external leakage resistance, that is, when the first transmission line and the second transmission line pair have leakage resistances not equal to the potentials of UR1 and UR2, it means that the differential capacitance-to-voltage conversion circuit 30 has external leakage resistance When, for example, VREF, GND, VCC are not equal to the potential of UR1 and UR2. The leakage suppression circuit provided in the present application can identify the DC drift caused by the external leakage resistance through comparative amplification, and then feed back to the first transmission line and the second transmission line through filtering, thereby suppressing the DC drift caused by the external leakage resistance.

In addition, it should be noted that the use of a low-frequency bootstrap circuit in one of the above embodiments, that is, the design of the first RC circuit, is also beneficial to reduce the external leakage resistance of the differential capacitor-voltage conversion circuit 30 .

Referring to FIG. 8b, which is a schematic structural diagram of a leakage suppression circuit in a specific embodiment, the leakage suppression circuit includes: a twentieth resistor R20, a twenty-first resistor R21, a twenty-second resistor R22, and a twenty-third resistor R23, the twenty-fourth resistor R24, the twenty-fifth resistor R25, the twenty-sixth resistor R26, the twenty-seventh resistor R27, the seventh operational amplifier OP7, the eighth operational amplifier OP8 and the second RC circuit;

The first end of the twentieth resistor R20 is used as the first input end of the leakage suppression circuit, and the second end of the twentieth resistor R20 is respectively connected to the first end of the second RC circuit and the forward input end of the seventh operational amplifier OP7 , the negative input terminal of the seventh operational amplifier OP7 is respectively connected to the second terminal of the twenty-first resistor R21 and the first terminal of the twenty-second resistor R22, and the output terminal of the seventh operational amplifier OP7 is respectively connected to the twenty-second resistor R22. The second end of the resistor R22 is connected to the first end of the twenty-third resistor R23, the second end of the twenty-third resistor R23 is connected to the first excitation and detection end of the differential capacitor-voltage conversion circuit 30, and the twenty-first resistor The first end of R21 is used to receive the first direct current output from the direct current excitation generating circuit 20;

The first end of the twenty-sixth resistor R26 is used as the second input end of the leakage suppression circuit, and the second end of the twenty-sixth resistor R26 is respectively connected with the second end of the second RC circuit and the forward input of the eighth operational amplifier OP8 The negative input terminal of the eighth operational amplifier OP8 is respectively connected to the second terminal of the twenty-fifth resistor R25 and the first terminal of the twenty-fourth resistor R24, and the output terminal of the eighth operational amplifier OP8 is respectively connected to the second terminal of the second The second end of the fourteenth resistor R24 and the first end of the twenty-seventh resistor R27 are connected, and the second end of the twenty-seventh resistor R27 is connected to the second excitation and detection end of the differential capacitance-voltage conversion circuit 30. The first end of the five resistors R25 is used for receiving the second direct current output by the direct current excitation generating circuit 20;

The first input end of the leakage suppression circuit is respectively connected with the second end of the thirteenth resistor R13 and the first end of the fourteenth resistor R14, and the second input end of the leakage suppression circuit is respectively connected with the second end of the fifteenth resistor R15 and the first terminal of the sixteenth resistor R16 is connected.

In the embodiment shown in FIG. 8b, the leakage suppression circuit is composed of two identical comparative amplification feedback control circuits, the circuit reliability is high, and the leakage suppression effect is better.

In FIG. 8b, one of the comparative amplification feedback control circuits includes a twentieth resistor R20, a twenty-first resistor R21, a twenty-second resistor R22, a twenty-third resistor R23 and a seventh operational amplifier OP7. The first end of the twentieth resistor R20 is connected to the W1 end, that is, the connecting end of the thirteenth resistor R13 and the fourteenth resistor R14, that is, the first end of the first RC circuit. The output control voltage of the output terminal of the seventh operational amplifier OP7 is connected to the first excitation detection terminal I1 of the differential capacitor-voltage conversion circuit 30 through the twenty-third resistor R23, that is, the fifth operational amplifier OP5 of the positive C/V conversion circuit. of the negative input.

Another comparative amplification feedback control circuit includes a twenty-fourth resistor R24, a twenty-fifth resistor R25, a twenty-sixth resistor R26, a twenty-seventh resistor R27 and an eighth operational amplifier OP8. The first end of the twenty-sixth resistor R26 is connected to the W2 end, that is, the connecting end of the fifteenth resistor R15 and the sixteenth resistor R16, that is, the second end of the first RC circuit. The output control voltage of the output terminal of the eighth operational amplifier OP8 is connected to the second excitation detection terminal I2 of the differential capacitor-voltage conversion circuit 30 through the twenty-seventh resistor R27, that is, the sixth operational amplifier OP6 of the negative C/V conversion circuit. of the negative input.

A second RC circuit is connected between the forward input terminal of the seventh operational amplifier OP7 and the forward input terminal of the eighth operational amplifier OP8, that is, the eighth capacitor C8 and the twenty-eighth resistor R28 are connected in series in FIG. 8b. the AC bypass branch.

According to Faraday's theorem, when the voltage on the capacitor C is U, the charge Q obtained by the capacitor is: Q=U*C. Therefore, when the fixed voltage U acts on the alternating capacitor Cd, the alternating charge generated on the capacitor can be expressed as: QD=U*Cd, and the differential of the alternating charge is the alternating current, which can be measured by the capacitor-voltage conversion circuit 30 . Similarly, when the capacitance remains unchanged and the applied dynamic voltage changes, alternating charges will also be generated on the capacitor, and similarly, the capacitance-to-voltage conversion circuit 30 can be used to measure it. Since the alternating capacitor cannot be obtained during circuit simulation, to simulate the alternating charge or alternating current generated by the alternating capacitor under the action of a fixed voltage, it can be achieved by applying an alternating voltage UD to the fixed capacitor.

In the specific simulation, the signal generator UG can be set, and the UG can be converted into the equivalent UCD1 and UCD2, which act on the fixed values of CD1 and CD2 respectively, thereby generating an alternating current, which is equivalent to the fixed voltage UR1. , UR2 acts on the alternating current generated on the alternating capacitors CD1 and CD1.

Referring to FIG. 9a, it is a schematic diagram of the simulation waveform in the first case. In this case, set the common terminal to be floating, the excitation voltage amplitude is set to 2V, that is, UR1=2V, UR1=-2V, and the dynamic capacitance is 100fF. In this case, no shielded wire is provided, and there is a coupling capacitance of 1n between the transmission line and the machine ground, and there is 1V interference to the machine ground. And in this case, a common mode negative feedback circuit is provided. It can be seen from the simulation waveform diagram that the output U01 of the positive output terminal of the differential capacitor-voltage conversion circuit 30 and the output U02 of the negative output terminal have ground common mode interference with a peak-to-peak value of 1V, so that from U01 and U02 Alternating signals corresponding to UG, VCD1, VCD2 are not visible. However, since the differential amplifier circuit 40 eliminates the common mode interference, the corresponding UG signal can be extracted. In this case, the output sensitivity of the output UCFF of the differential amplifier circuit 40 is S2=1V/100fF=10V/1pF.

Referring to FIG. 9b, it is a schematic diagram of the simulation waveform in the second situation. In this case, the common terminal is left floating, the excitation voltage amplitude is set to 2V, and the dynamic capacitance is set to 100fF. In this case, no shielded wire is provided, and there is a 1nF coupling capacitance between the transmission line and the machine ground, and there is 1V interference from the machine ground. Also, in this case, no common mode negative feedback circuit is provided. It can be seen that the output U01 of the positive output terminal and the output U02 of the negative output terminal of the differential capacitor-voltage conversion circuit 30 have strong ground common mode interference, and the strong ground common mode interference reaches the peak-to-peak value of 6V, which is different from the setting. Compared with the first case of the common-mode negative feedback circuit, the ground-electrical common-mode interference has increased by about 6 times, and it is close to the limit and may even cause the detection signal to be distorted, so that the corresponding UG, VCD1 cannot be seen from U01 and U02. , VCD2 alternating signal. However, since the differential amplifier circuit 40 can eliminate common mode interference, the corresponding UG signal can be extracted. In this case, the output sensitivity of the output UCFF of the differential amplifier circuit 40 is S2=1V/100fF=10V/1pF.

Referring to FIG. 9c, it is a schematic diagram of the simulation waveform in the third occasion. In this case, the common terminal is left floating, the excitation voltage amplitude is set to 2V, and the dynamic capacitance is set to 100fF. In this case, the first and second shielded wires are provided, and the second end of the first shielded wire and the second end of the second shielded wire are connected to VREF, and the first end of the first shielded wire and the second shielded wire are connected to VREF. All connect 100nF capacitors to the machine ground, that is, the first shielding capacitor CC01 and the second shielding capacitor CC02 are set to suppress the interference of the machine ground. In this case, a common mode negative feedback circuit is set up. It can be seen from the schematic diagram of the simulation waveform that the reduction of the ground-electrical interference is not obvious. However, the output U01 of the positive output terminal and the output U02 of the negative output terminal of the differential capacitance-voltage conversion circuit 30 have almost no ground electric common mode interference, this is because the capacitance of the transmission line to the shielded line has been connected to the UR without the effect of coupling interference, so You can see the alternating signals corresponding to UG, VCD1, and VCD2. Further, the residual common mode interference is removed by the differential amplifier circuit 40, and the signal corresponding to UG is extracted. The output sensitivity of the UCFF of the differential amplifier circuit 40 is S2=1V/100fF=10V/1pF. It can be seen from the simulation in this situation that the first shielding capacitor CC01 and the second shielding capacitor CC02 are less effective in suppressing interference.

Referring to FIG. 9d, it is a schematic diagram of the simulation waveform in the fourth occasion. In this case, the common terminal is connected to the machine ground, the excitation voltage amplitude is set to 2V, the dynamic capacitance is set to 100fF, the second end of the first shielded wire and the second end of the second shielded wire are connected to VREF, and the first shielded wire is connected to VREF. The first end of the wire and the second shielded wire are connected to the machine ground with a 100nF capacitor, that is, the first shielding capacitor CC01 and the second shielding capacitor CC02 are set to suppress the interference of the machine ground. In this case, the common mode negative is set. feedback circuit. It can be seen from the schematic diagram of the simulation waveform that the ground electrical interference is not significantly reduced, and it appears at the common terminal, and the output U01 of the positive output terminal and the output U02 of the negative output terminal of the differential capacitor-voltage conversion circuit 30 also have ground electrical common mode. Interference, you can still see the alternating signals corresponding to UG, VCD1, VCD2, this is because although the capacitance of the transmission line to the shielded line has been connected to the UR and has no effect of coupling interference, the static capacitance is coupled to the common terminal of the machine ground. interference. After the signals of U01 and U02 containing ground common mode interference are transmitted to the differential amplifier circuit 40, the residual common mode interference can be removed by the differential amplifier circuit 40, and the signal corresponding to UG can be extracted. The output sensitivity of the UCFF of the differential amplifier circuit 40 is S2 =1V/100fF=10V/1pF.

Referring to FIG. 9e, it is a schematic diagram of the simulation waveform in the fifth occasion. In this case, the common terminal is set in the sensor housing connected to the machine ground, but there is a 100pF distributed capacitance CC0 between the sensor housing and the machine ground, and the machine ground is connected to the housing. The excitation voltage amplitude is set to 2V, and the dynamic capacitance is set to 100fF. The second end of the first shielded wire and the second end of the second shielded wire are both connected to VREF, and the first end of the first shielded wire and the first end of the second shielded wire are both connected to the machine ground with a 100Fn capacitor, that is, the first shielding capacitor is set. CC01 and the second shielding capacitor CC02, and the first shielding capacitor CC01 and the second shielding capacitor CC02 are both 100n, so as to suppress the interference of the machine ground. In this case, a common mode negative feedback circuit is set. It can be seen from the simulation waveform diagram that the ground interference of the common terminal is obviously reduced to less than 0.05%, so that the output U01 of the positive output terminal and the output U02 of the negative output terminal of the differential capacitor-voltage conversion circuit 30 have almost no ground electricity common mode interference. Furthermore, the residual common mode interference is removed by the differential amplifier circuit 40, and the signal corresponding to UG is extracted. The output sensitivity of the UCFF of the differential amplifier circuit 40 is S2=1V/100fF=10V/1pF. It can be seen from the simulation in this situation that the conductive layer is connected to the first end of the first shielded wire and the first end of the second shielded wire through the first shielding capacitor CC01 and the second shielding capacitor CC02. This measure has a great effect. High anti-interference effect. At the same time, the insulating ground is attached to the conductive layer in the sensor shell as the common terminal. Although there is inevitably a distributed capacitance CC0, it can effectively block the ground electrical interference of the machine and prevent the ground electrical interference from passing through the first shielding capacitor CC01 and the second shielding capacitor. CC02 is applied to the second ends of the first shielding capacitor CC01 and the second shielding capacitor CC02, that is, the damage of ground electrical interference to the VREF or UR1 and UR2 connected to the second ends of the first shielding capacitor CC01 and the second shielding capacitor CC02 is avoided. .

Please refer to FIG. 9f , which is a schematic diagram of the simulation waveform in the sixth occasion. In this case, the common terminal is open (only 46uV DC drift), the dynamic capacitance CD1=CD2=100fF is static, that is, VCD1=VCD2=0, and the excitation voltage UR1=2V. The second end of the first shielded wire is connected to VREF, the static capacitance CP1 of the first shielded wire to the first transmission line is 1nF, and there is also a vibration capacitance of 100fF, that is, CPD1 in FIG. 9f . At this time, interference of 1V peak-to-peak will be generated. It can be seen from the simulation in this situation that when the second end of the first shielded wire is connected to VREF instead of UR1, the tiny jitter capacitance of the first shielded wire will also cause a strong shielded wire to vibrate and interfere with the output.

Referring to FIG. 9g, it is a schematic diagram of the simulation waveform in the seventh situation. In this case, the common terminal is open (only 46uV DC drift), the dynamic capacitance CD1=CD2=100fF is static, that is, VCD1=VCD2=0, and the excitation voltage UR1=2V. The second end of the first shielded wire is connected to UR1=2V. Although the static capacitance CP1 of a shielded wire to the first transmission line is 1nF, and there is also a vibration capacitance of 100fF, the output end does not interfere. It can be seen from the simulation in this case that when the second end of the first shielded wire is not connected to VREF but to UR1, even if the first shielded wire has a large jitter capacitance CPD1, the shielded wire will not appear. Vibration interferes with the output.

In a specific simulation situation, when there is no external leakage current of the differential capacitor-voltage conversion circuit 30 being R05 and R06, the DC drift of the UCFF output by the differential amplifier circuit 40 is 1.09uV. When there are external leakage resistors R05 and R06 of the differential capacitor-voltage conversion circuit 30 and a leakage suppression circuit is provided, the DC drift of the UCFF output by the differential amplifier circuit 40 is 109mV. When there are external leakage resistors R05 and R06 of the differential capacitor voltage conversion circuit 30 and no leakage suppression circuit is provided, the DC drift of the UCFF output by the differential amplifier circuit 40 can reach 27V under the condition that the op amp power supply voltage is infinite.

It can be seen that the leakage suppression circuit can suppress the DC drift of the UCFF output by the differential amplifier circuit 40 to a very low level. That is to say, the leakage suppression circuit is very important in engineering applications, which can overcome the circuit drift caused by external leakage and ensure the reliability and stability in the engineering field.

Applying the technical solutions provided by the embodiments of the present invention, considering that although the traditional capacitance detection circuit based on AC carrier excitation has the advantage of being able to detect extremely slowly changing changing capacitance and its corresponding physical quantity, that is, it can measure static information, however, in In current engineering applications, a large number of detection requirements are aimed at dynamic information, such as the acceleration of machine vibration, the rotational speed of the rotating shaft, the relative dynamic distance between two machine parts, etc. That is to say, static information cannot be measured but dynamic information can be measured. The capacitive sensor can be used in most fields. In this regard, the solution of the present application considers that the present application does not need to set up a circuit for generating a high-frequency carrier excitation signal, but realizes capacitive detection based on DC carrier excitation, which can realize the measurement of dynamic information and at the same time make the capacitive sensor simple in structure , high reliability.

Specifically, in the solution of the present application, the capacitance sensitive part 10 can reflect the detected value of the target quantity to be measured through its own capacitance change, and the capacitance-voltage conversion circuit 30 of the present application can use the output of the DC excitation generating circuit 20 as a DC reference, and then perform capacitance-to-voltage conversion on the output of the capacitance-sensitive part 10, so as to output a voltage signal that reflects the current capacitance value of the capacitance-sensitive part 10. Therefore, after the amplifier circuit 40 amplifies the voltage signal, the subsequent circuit can be based on The output voltage of the amplifier circuit 40 determines the current value of the target quantity to be measured. It can be seen that the solution of the present application can realize the detection of dynamic information, that is, the numerical change of the target quantity to be measured will be reflected in the capacitance change of the capacitance sensitive part 10 . Moreover, because the solution of the present application does not need to generate a high-frequency carrier excitation signal as in the traditional solution, but uses the DC excitation generating circuit 20 to output the set DC current, that is, the present application adopts the DC carrier excitation to realize the capacitance detection, so the circuit structure is simple. , low cost and high reliability.

It should also be noted that in this document, relational terms such as first and second are used only to distinguish one entity or operation from another, and do not necessarily require or imply those entities or operations There is no such actual relationship or order between them. Moreover, the terms "comprising", "comprising" or any other variation thereof are intended to encompass a non-exclusive inclusion such that a process, method, article or device that includes a list of elements includes not only those elements, but also includes not explicitly listed or other elements inherent to such a process, method, article or apparatus. Without further limitation, an element qualified by the phrase "comprising a..." does not preclude the presence of additional identical elements in the process, method, article, or device that includes the element.

The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the various embodiments may be referred to each other. Professionals may further realize that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two, in order to clearly illustrate the possibilities of hardware and software. Interchangeability, the above description has generally described the components and steps of each example in terms of function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Skilled artisans may implement the described functionality using different methods for each particular application, but such implementations should not be considered beyond the scope of the present invention.

The principles and implementations of the present invention are described herein by using specific examples, and the descriptions of the above embodiments are only used to help understand the technical solutions and core ideas of the present invention. It should be pointed out that for those skilled in the art, without departing from the principle of the present invention, several improvements and modifications can also be made to the present invention, and these improvements and modifications also fall within the protection scope of the present invention.

Claims (23)

1. a capacitive sensor, is characterized in that, comprises: The capacitance sensitive part is used to reflect the detected value of the target quantity to be measured through its own capacitance change; The DC excitation generating circuit is used to output the set DC power; A capacitance-to-voltage conversion circuit connected to the capacitance-sensitive part and the DC excitation generation circuit respectively, is used for using the output of the DC excitation generation circuit as a DC reference, and performs capacitance-to-voltage conversion, so that the output is used to reflect the capacitance The voltage signal of the current capacitance value of the sensitive part; The amplifying circuit connected with the capacitance-voltage converting circuit is used for amplifying the voltage signal, so that the post-stage circuit determines the current value of the target quantity to be measured based on the output voltage of the amplifying circuit. 2 . The capacitive sensor according to claim 1 , wherein the capacitance-to-voltage conversion circuit is a differential capacitance-to-voltage conversion circuit, the amplifier circuit is a differential amplifier circuit, and the DC excitation generating circuit is specifically used for: The set first direct current and second direct current are output, and the voltage of the first direct current -VREF=VREF-the voltage of the second direct current, where VREF represents the voltage of the reference voltage terminal. 3 . The capacitive sensor according to claim 2 , wherein the amplitudes of the first direct current and the second direct current are equal. 4 . 4. The capacitive sensor according to claim 2, wherein the DC excitation generating circuit comprises: a first operational amplifier, a second operational amplifier, a first resistor, a second resistor, a third resistor and a fourth resistor ; The positive input terminal of the first operational amplifier is connected to the first terminal of the first resistor and the connection terminal is connected to the reference voltage terminal; the negative input terminal of the first operational amplifier is respectively connected to the third resistor. The first end is connected to the first end of the fourth resistor, the output end of the first operational amplifier is connected to the second end of the third resistor, and the connection end is used as the forward output end of the DC excitation generating circuit to output the set first direct current; The output terminal of the second operational amplifier is respectively connected with the second terminal of the fourth resistor and the negative input terminal of the second operational amplifier, and the connection terminal is used as the negative output terminal of the DC excitation generating circuit to The set second direct current is output, the forward input terminal of the second operational amplifier is respectively connected to the second terminal of the first resistor and the first terminal of the second resistor, and the The second terminal is grounded. 5 . The capacitive sensor according to claim 2 , wherein the capacitance sensitive part is a capacitance sensitive part adopting a bipolar differential capacitance structure, and when the target quantity to be measured changes, the differential capacitance of the capacitance sensitive part changes. 6 . The value changes accordingly to reflect the detected value of the target quantity to be measured. 6 . The capacitive sensor according to claim 5 , wherein the capacitance sensitive part comprises: a first dynamic capacitance, a second dynamic capacitance, a first static capacitance and a second static capacitance; 6 . The first end of the first dynamic capacitor is connected to the first end of the first static capacitor, and the connection end is used as the first electrode end of the capacitance sensitive part; the second end of the second dynamic capacitor is connected to the first electrode end of the capacitance sensitive part. The second end of the second static capacitor is connected, and the connection end is used as the second electrode end of the capacitance sensitive part; the second end of the first dynamic capacitor is respectively connected with the second end of the first static capacitor, so The first end of the second dynamic capacitor and the first end of the second static capacitor are connected. 7 . The capacitive sensor according to claim 6 , wherein the connection terminal of the first dynamic capacitor and the second dynamic capacitor is used as the common terminal of the capacitance sensitive part; 8 . Wherein, the common terminal is suspended, or the common terminal is grounded, or the common terminal is connected to the reference voltage terminal, or the common terminal is connected to the machine ground of the capacitive sensor. 8 . The capacitive sensor according to claim 6 , further comprising: a first shielded wire for the first transmission line and a second shielded wire for the second transmission line; 8 . The first transmission line is a wire used to connect the first excitation detection end of the differential capacitance-to-voltage conversion circuit and the first electrode end of the capacitance sensitive part, and the second transmission line is used to connect the differential capacitance-to-voltage conversion circuit. A wire between the second excitation detection end of the capacitance-to-voltage conversion circuit and the second electrode end of the capacitance sensitive part. 9 . The capacitive sensor according to claim 8 , wherein the first end of the first shielded wire is connected to the first shielded end of the capacitive sensor housing, and the first shielded wire has The first terminal is connected to the common terminal through the first shielding capacitor; The first end of the second shielding wire is connected to the second shielding end of the capacitive sensor housing, and the first end of the second shielding wire is connected to the common terminal through the second shielding capacitor; The second end of the first shielded wire and the second end of the second shielded wire are both connected to the reference voltage terminal or grounded. 10. The capacitive sensor according to claim 8, wherein the first end of the first shielded wire is connected to the first shielded end of the capacitive sensor housing, and the first shielded wire has a The first end is connected to the common end through a first shielding capacitor, and the second end of the first shielding wire is connected to the forward output end of the DC excitation generating circuit for outputting the first DC power; The first end of the second shielded wire is connected to the second shielded end of the capacitive sensor housing, and the first end of the second shielded wire is connected to the common end through a second shielding capacitor, and the second shielded wire is connected to the common end through a second shielding capacitor. the second end of the shielded wire is connected to the negative output end of the direct current excitation generating circuit for outputting the second direct current; The common terminal is a connection terminal of the first dynamic capacitor and the second dynamic capacitor. 11. The capacitive sensor according to claim 2, wherein the differential amplifier circuit comprises: a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, and a tenth resistor A resistor, a twelfth resistor, a third op amp and a fourth op amp; The first end of the fifth resistor is used as the positive input end of the differential amplifier circuit, and the second end of the fifth resistor is respectively connected with the second end of the sixth resistor and the positive end of the third operational amplifier. connected to the input end, the first end of the sixth resistor is used to receive the second direct current output from the direct current excitation generating circuit, and the negative input end of the third operational amplifier is respectively connected to the seventh resistor. The second end is connected to the first end of the eighth resistor, the first end of the seventh resistor is used as the negative input end of the differential amplifier circuit, and the output end of the third operational amplifier is respectively connected to the first end of the the second end of the eighth resistor is connected with the first end of the ninth resistor; The second end of the ninth resistor is respectively connected to the second end of the tenth resistor and the forward input end of the fourth operational amplifier, and the first end of the tenth resistor is connected to the reference voltage end, so the The negative input end of the fourth operational amplifier is respectively connected to the second end of the eleventh resistor and the first end of the twelfth resistor, and the first end of the eleventh resistor is used to receive the The DC excitation generates the first DC power output by the circuit, and the output terminal of the fourth operational amplifier is connected to the second terminal of the twelfth resistor, and the connection terminal is used as the output terminal of the differential amplifier circuit. 12. The capacitive sensor according to claim 2, wherein the differential amplifier circuit comprises: a twenty-ninth resistor, a thirtieth resistor, a thirty-first resistor, a thirty-second resistor, and a thirtieth resistor Three resistors, thirty-fourth resistor and ninth op amp; The first end of the twenty-ninth resistor is used as the forward input end of the differential amplifier circuit, the second end of the twenty-ninth resistor is respectively the second end of the thirtieth resistor, and the third The second end of the thirty-one resistor is connected to the forward input end of the ninth operational amplifier, and the first end of the thirty-first resistor is used to receive the second direct current output by the direct current excitation generating circuit, so The first end of the thirty-first resistor is connected to the reference voltage end; The negative input terminal of the ninth operational amplifier is respectively connected with the second terminal of the thirty-second resistor, the second terminal of the thirty-third resistor and the first terminal of the thirty-fourth resistor, The output terminal of the ninth operational amplifier is connected to the second terminal of the thirty-fourth resistor and the connection terminal is used as the output terminal of the differential amplifier circuit, and the first terminal of the thirty-second resistor is used to receive the The first direct current output from the direct current excitation generating circuit, the first end of the thirty-third resistor is used as the negative input end of the differential amplifier circuit. 13. The capacitive sensor according to claim 2, wherein the differential capacitance-to-voltage conversion circuit comprises: a fifth operational amplifier, a sixth operational amplifier, a first capacitor, a second capacitor, a thirteenth resistor, The fourteenth resistor, the fifteenth resistor and the sixteenth resistor; The negative input terminal of the fifth operational amplifier is respectively connected to the first terminal of the first capacitor and the first terminal of the thirteenth resistor, and the connection terminal is used as the first terminal of the differential capacitor-voltage conversion circuit. Excitation detection terminal; the forward input terminal of the fifth operational amplifier is used to receive the first direct current output from the direct current excitation generating circuit, and the second terminal of the thirteenth resistor is connected to the fourteenth resistor. the first end is connected, the output end of the fifth operational amplifier is respectively connected with the second end of the first capacitor and the second end of the fourteenth resistor, and the connection end is used as the differential capacitor-voltage conversion circuit The positive output terminal of ; The negative input terminal of the sixth operational amplifier is respectively connected to the first terminal of the second capacitor and the first terminal of the fifteenth resistor, and the connection terminal serves as the second terminal of the differential capacitor-voltage conversion circuit. Excitation detection terminal; the forward input terminal of the sixth operational amplifier is used to receive the second DC power output by the DC excitation generating circuit, and the second terminal of the fifteenth resistor is connected to the sixteenth resistor. the first terminal is connected, the output terminal of the sixth operational amplifier is respectively connected with the second terminal of the second capacitor and the second terminal of the sixteenth resistor, and the connection terminal is used as the differential capacitor-voltage conversion circuit the negative output terminal. 14. The capacitive sensor of claim 13, further comprising: a first RC circuit, the first end of the first RC circuit is respectively connected to the second end of the thirteenth resistor and the first end of the fourteenth resistor, and the second end of the first RC circuit are respectively connected to the second end of the fifteenth resistor and the first end of the sixteenth resistor. 15. The capacitive sensor according to claim 14, wherein the first RC circuit comprises: a third capacitor and a seventeenth resistor; The first end of the third capacitor is used as the first end of the first RC circuit, the second end of the third capacitor is connected to the first end of the seventeenth resistor, and the The second terminal serves as the second terminal of the first RC circuit. 16. The capacitive sensor of claim 13, further comprising: Connected to the differential capacitance-voltage conversion circuit, the common mode negative feedback circuit used for reducing the common mode input current through the output negative feedback current. 17. The capacitive sensor according to claim 16, wherein the common mode negative feedback circuit comprises: an eighteenth resistor, a nineteenth resistor, a fourth capacitor and a fifth capacitor; The first end of the eighteenth resistor is connected to the positive output end of the differential capacitor-voltage conversion circuit, and the second end of the eighteenth resistor is respectively connected to the first end of the nineteenth resistor, so The second end of the fourth capacitor is connected to the first end of the fifth capacitor, the second end of the nineteenth resistor is connected to the negative output end of the differential capacitor-voltage conversion circuit, and the fourth The first end of the capacitor is connected to the second excitation and detection end of the differential capacitance-voltage conversion circuit, and the second end of the fifth capacitor is connected to the first excitation and detection end of the differential capacitance-to-voltage conversion circuit. 18. The capacitive sensor of claim 13, further comprising: A charge multiplying circuit for increasing the gain of the differential capacitance-to-voltage conversion circuit is connected to the differential capacitance-to-voltage conversion circuit. 19. The capacitive sensor according to claim 18, wherein the charge multiplying circuit is specifically used for: Feeding back a multiplied current signal proportional to the output current signal of the differential capacitance-to-voltage conversion circuit to the differential capacitance-to-voltage conversion circuit, so as to increase the input current of the differential capacitance-to-voltage conversion circuit to improve the Gain factor for differential capacitance-to-voltage conversion circuits. 20. The capacitive sensor according to claim 19, wherein the charge multiplying circuit comprises: a sixth capacitor and a seventh capacitor; The first end of the sixth capacitor is connected to the forward output end of the differential capacitor-voltage conversion circuit, and the second end of the sixth capacitor is connected to the second excitation and detection end of the differential capacitor-voltage conversion circuit , the second end of the seventh capacitor is connected to the negative output end of the differential capacitor-voltage conversion circuit, and the first end of the seventh capacitor is connected to the first excitation detection end of the differential capacitor-voltage conversion circuit connect. 21. The capacitive sensor of claim 2, further comprising: A leakage suppression circuit for reducing the external leakage resistance of the differential capacitance-to-voltage conversion circuit, connected to the differential capacitance-to-voltage conversion circuit. 22. The capacitive sensor according to claim 21, wherein the leakage suppression circuit is composed of two identical comparative amplification feedback control circuits, and the leakage suppression circuit is specifically used for: When there is an external leakage resistance in the differential capacitance-to-voltage conversion circuit, the DC drift caused by the external leakage resistance is identified by means of comparison and amplification, and fed back to the corresponding transmission line of the differential capacitance-to-voltage conversion circuit through filtering, to suppress the DC drift caused by the external leakage resistance. 23 . The capacitive sensor according to claim 13 , further comprising: a leakage suppression circuit connected to the differential capacitance-to-voltage conversion circuit for reducing external leakage resistance of the differential capacitance-to-voltage conversion circuit. 24 . , and the leakage suppression circuit includes: the twentieth resistor, the twenty-first resistor, the twenty-second resistor, the twenty-third resistor, the twenty-fourth resistor, the twenty-fifth resistor, the twenty-sixth resistor, The twenty-seventh resistor, the seventh operational amplifier, the eighth operational amplifier and the second RC circuit; The first end of the twentieth resistor is used as the first input end of the leakage suppression circuit, and the second end of the twentieth resistor is respectively connected with the first end of the second RC circuit and the seventh circuit. The positive input terminal of the amplifier is connected to the negative input terminal of the seventh operational amplifier, and the negative input terminal of the seventh operational amplifier is respectively connected to the second terminal of the twenty-first resistor and the first terminal of the twenty-second resistor. The output terminal of the operational amplifier is respectively connected to the second terminal of the twenty-second resistor and the first terminal of the twenty-third resistor, and the second terminal of the twenty-third resistor is connected to the differential capacitor voltage The first excitation detection end of the conversion circuit is connected, and the first end of the twenty-first resistor is used for receiving the first direct current output from the direct current excitation generating circuit; The first end of the twenty-sixth resistor is used as the second input end of the leakage suppression circuit, and the second end of the twenty-sixth resistor is respectively connected with the second end of the second RC circuit and the second end of the second RC circuit. The positive input terminal of the eighth operational amplifier is connected, and the negative input terminal of the eighth operational amplifier is respectively connected to the second terminal of the twenty-fifth resistor and the first terminal of the twenty-fourth resistor, and the The output end of the eighth operational amplifier is respectively connected to the second end of the twenty-fourth resistor and the first end of the twenty-seventh resistor, and the second end of the twenty-seventh resistor is connected to the differential the second excitation detection end of the capacitance-voltage conversion circuit is connected, and the first end of the twenty-fifth resistor is used for receiving the second direct current output from the direct current excitation generating circuit; The first input end of the leakage suppression circuit is respectively connected to the second end of the thirteenth resistor and the first end of the fourteenth resistor, and the second input end of the leakage suppression circuit is respectively connected to the first end of the thirteenth resistor. The second end of the fifteenth resistor is connected with the first end of the sixteenth resistor.

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