CN115149822A - BiFRED control method and BiFRED converter - Google Patents

Abstract

The present application provides a BiFRED control method and a BiFRED converter, wherein the converter has a second resistor connected in series with the first switch tube of the converter, and a first resistor connected between the rectifier circuit and the first switch tube, sampling the first node signal to obtain the first sampling signal, the second node signal is sampled to obtain the second sampling signal, wherein the first node is the first resistor, the second resistor and the connection point of the energy storage device, the second node is the connection point between the first switch tube and the second resistor, and processes the feedback signal to obtain a control signal for the first switch tube. In the present application, the current on the primary winding side is used to control the on-time of the first switch tube, so that the output current ripple can be suppressed, and the resistance values of the first resistor and the second resistor can be fine-tuned, which can be achieved without affecting the output current. In this case, the use of smaller output electrolytic capacitors is more conducive to the stability of the system.

Description

BiFRED control method and BiFRED converter

technical field

The present application relates to electronic power technology, and more particularly, to a BiFRED control method and a BiFRED converter.

Background technique

In the process of rapid development of LED lighting technology, it is generally expected to provide lower cost LED drivers, for example, the cost reduction can be achieved by reducing the number of its components. However, as the LED power increases, the driver must meet the line current. Distortion-related more stringent requirements. While low line current distortion is feasible with a single-stage architecture, there is often a trade-off between load management and line management, line current distortion and output ripple (flicker), and corresponding buffer size and cost trade-offs. In the application of high power factor (PowerFactor, PF) and no flicker, the front and rear stages of the boost integrated flyback (BiFRED) converter share a switch tube, which is simple in control and low in system cost. Stage DC-DC circuit to achieve low ripple output.

The schematic diagram of an existing BiFRED converter is shown in Figure 1. The input voltage of the converter is obtained after the AC input is rectified by the rectifier circuit. The inductor L1 and the diode D1 are connected in series, and one end is connected to one of the output ends of the rectifier circuit, and the other end is connected to the switch tube Q1. The first end; the second end of the switch tube Q1 is connected to the other output end of the rectifier circuit. The inductor L2 is connected to the switch tube Q1 through the capacitor C1. The capacitor C2 is connected to the inductor L2 through the diode D2, and the LED load is connected in parallel with the output terminal of the converter. When the switch Q1 is turned on, the inductor L1 is charged; when the switch Q1 is turned off, the inductor L1 is discharged, the capacitor C1 is charged, and part of the current flows through the inductor L2 to supply power to the LED load. Existing converters often use peak current control or secondary side current closed-loop control, but the output current ripple is still large.

Therefore, it is necessary to provide an improved BiFRED converter to overcome the above-mentioned problems in the prior art.

SUMMARY OF THE INVENTION

This content is provided to introduce in a simplified form some concepts that are further described below in the Detailed Description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to limit the scope of the claimed subject matter.

The purpose of this application is to provide an improved BiFRED converter and control method to reduce output ripple and improve efficiency. The foregoing and other objects are achieved by the features of the independent claims. Further implementation forms are apparent from the dependent claims, the description and the drawings.

According to a first aspect of the present application, there is provided a boost integrated flyback (BiFRED) control method for a BiFRED converter, characterized by comprising: using a boost part of the converter to perform boost conversion, so that The boosting part includes a first inductive element connected between the input voltage and the first switch; the flyback conversion is performed using a flyback part of the converter, the flyback part includes a primary winding and a secondary winding, and An energy storage device connected in series with the primary winding; sampling a first node signal to obtain a first sampling signal, sampling a second node signal to obtain a second sampling signal, the first node being the first sampling element, the second sampling element and the the connection point of the energy storage device, the second node is the connection point of the first switch tube and the second sampling element; process the received first sampling signal and the second sampling signal to obtain A control signal for controlling the first switch tube.

Optionally, the method further includes: when the first switch tube is turned off, the first sampling signal represents the first current information of the boosting part; when the first switch tube is turned on, The difference between the second sampling signal and the product of the first sampling signal and the first coefficient represents second current information of the flyback part.

Optionally, the first sampling element includes a first resistor and is configured to be connected between the rectifier circuit and the first switch tube, so as to obtain the first sampling signal at the negative end of the energy storage device; the second The sampling element includes a second resistor and is configured to be connected in series with the first switch tube to obtain the second sampling signal of the second output end of the first switch tube when the first switch tube is turned on.

Optionally, the first coefficient is related to the ratio of the first resistance and the second resistance.

Optionally, the method further includes: the resistance value of the first resistor is equal to the resistance value of the second resistor, and the resistance value is a first value; or the resistance value of the first resistor is the same as that of the second resistor. The resistance value of the resistor is shifted up and down with respect to the first value, and the shift amount is between (0, 10%).

Optionally, the control signal is generated based on the first sampling signal, the second sampling signal and the reference signal to control the turn-on time of the first switch.

According to a second aspect of the present application, a BiFRED converter is provided, which is characterized by comprising: a boosting part, including a first inductance between the input voltage and the first switch; a flyback part, including a primary winding and The secondary winding has a first capacitor connected in series with the primary winding of the flyback part; a first resistor is configured to be connected between the rectifier circuit and the first switch tube to obtain the first capacitor of the first node a sampling signal; a second resistor configured to be connected in series with the first switch tube to obtain a second sampling signal of the second node when the first switch tube is turned on; wherein the first node is the first node a resistor, the connection point between the second resistor and the first capacitor, the second node is the connection point between the first switch tube and the second resistor; the controller includes a feedback circuit for according to The first sampling signal, the second sampling signal and the reference voltage obtain a compensation voltage, and the controller obtains a control signal of the first switch tube based on the compensation voltage and the reference signal.

Optionally, the controller includes: a logic circuit configured to receive the first sampling signal and the second sampling signal, and generate a first voltage signal and a second voltage signal through a logic operation; a feedback circuit, receiving the the first voltage signal, the second voltage signal and the reference voltage to generate the compensation voltage; the comparison circuit, the first input terminal receives the compensation voltage, the second input terminal receives the reference signal, according to the Compensating the voltage and the reference signal to generate the control signal to control the turn-on time of the first switch tube.

Optionally, the logic circuit includes: a multiplier, configured to receive the first sampled signal, and multiply the first sampled signal by a first coefficient to generate a third signal; a subtractor, configured to receiving the second sampling signal and the third signal, and subtracting the second sampling signal and the third signal to obtain the first voltage signal; the first switch is configured so that the input terminal receives the first voltage signal a voltage signal, the output end is connected to the first input end of the feedback circuit, the control end is controlled by the control signal of the first switch tube; the second switch is configured so that the input end receives the first sampling signal as the For the second voltage signal, the output end is connected to the second input end of the feedback circuit, and the control end is controlled by the inverted signal of the control signal of the first switch tube.

Optionally, the feedback circuit includes: a first current source configured to receive the reference voltage to generate a third current; a second current source configured to receive the first voltage signal to generate the first current a current, and outputs a first current when the first switch is turned off; a third current source is configured to receive the second voltage signal to generate a second current; a third capacitor is configured to receive the The third current is charged. When the first switch is turned off, the first current and the second current discharge the third capacitor, and the voltage of the first polarity terminal of the third capacitor is used as the compensation voltage output.

The BiFRED converter provided by the present application has a second resistor connected in series with the first switch tube of the converter, and a first resistor connected between the rectifier circuit and the first switch tube, and samples the first node signal to obtain the first sample signal, sample a second node signal to obtain a second sampled signal, wherein the first node is the connection point of the first resistor, the second resistor and the first capacitor, and the second node is the At the connection point between the first switch tube and the second resistor, the feedback current is processed to obtain a control signal for the first switch tube. In the present application, the current on the primary winding side is used to control the on-time of the first switch tube, so that the output current ripple can be suppressed, and the resistance values of the first resistor and the second resistor can be fine-tuned, which can be achieved without affecting the output current. In this case, the use of smaller output electrolytic capacitors is more conducive to the stability of the system.

Description of drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following will briefly introduce the accompanying drawings used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description These are some embodiments of the present application, and for those of ordinary skill in the art, other drawings can also be obtained from these drawings without any creative effort.

1 shows a schematic circuit diagram of a BiFRED converter in the prior art;

FIG. 2 shows a schematic circuit diagram of a BiFRED converter according to an embodiment of the present application;

3 shows a schematic circuit diagram of a controller in a BiFRED converter according to an embodiment of the present application;

Fig. 4 shows a circuit diagram of the feedback circuit in the controller according to Fig. 3,

In the following, the same reference numerals denote identical or at least functionally identical features.

Detailed ways

The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

For example, it should be understood that disclosure in connection with a described method also applies to a corresponding apparatus or system for performing the method, and vice versa. For example, if particular method steps are described, the corresponding apparatus may include means for performing the described method steps, even if such means are not described or shown in detail in the figures. On the other hand, for example, if a particular apparatus is described based on functional units, the corresponding method may include steps for performing the described functions, even if the steps are not explicitly described or illustrated in the drawings. Furthermore, it should be understood that features of the various example aspects described herein may be combined with each other unless specifically stated otherwise.

It should be understood that A and B are connected/coupled in the embodiments of the present application, indicating that A and B can be connected in series or in parallel, or A and B pass through other devices, which are not limited in the embodiments of the present application.

Figure 1 shows a schematic circuit diagram of a BiFRED converter in the prior art. As shown in Figure 1, the input voltage of the converter is obtained after the AC input is rectified by the rectifier circuit. The inductor L1 and the diode D1 are connected in series and one end is connected to one of the output ends of the rectifier circuit. The other end is connected to the first end of the switch tube Q1; the second end of the switch tube Q1 is connected to the other output end of the rectifier circuit. The inductor L2 is connected to the switch tube Q1 through the capacitor C1. The capacitor C2 is connected to the inductor L2 through the diode D2, and the LED load is connected in parallel with the output terminal of the converter. When the switch Q1 is turned on, the inductor L1 is charged, and the capacitor C1 is discharged through the inductor L2 through the switch Q1; when the switch Q1 is turned off, the inductor L1 is discharged, the capacitor C1 is charged, and part of the current flows through the inductor L2 and is stored in the inductor at the same time. The energy in L2 is used to charge the capacitor C2 to supply power to the LED load. Existing converters often use peak current control or secondary side current closed-loop control, but the output current ripple is still large.

FIG. 2 shows a schematic circuit diagram of a BiFRED converter according to an embodiment of the present application. As shown in FIG. 2, the circuit includes an AC input, a rectifier circuit, a converter, and a load, wherein the converter includes a first inductor L3, a first A diode D3, a first switch tube Q2, a first capacitor C3, a transformer T1, a first resistor R1, a second resistor R2, and a controller K. One end of the first inductor L3 and the first diode D2 connected in series is connected to one of the output ends of the rectifier circuit, and the other end is connected to the first end of the first switch tube Q2, and the second end of the first switch tube Q2 is connected to the first resistor R1. The second resistor R2 is connected in series to the other output end of the rectifier circuit. The primary winding of the transformer T1 is connected in series with the first capacitor C3 and then connected in parallel to the branch of the first switch tube Q2 and the second resistor R2. The connection point between the two resistors R2 and the first capacitor C3 forms the first node, and the connection point between the first switch transistor Q2 and the second resistor R2 forms the second node. When the first switch tube Q2 is turned on, the first inductor L3 is charged from the rectified commercial power through the first switch tube Q2, and the current of the first inductor L3 increases. When the first switch tube Q2 is turned off, the first inductor L3 The discharge charges the first capacitor C3, the current of the first inductor L3 decreases, the voltage across the first capacitor C3 increases, and the part of the charging current from L3 to C3 flows through the primary winding of the transformer T1, and supplies power to the load; When a switch Q2 is turned on, the first capacitor C3 is also discharged through the first switch Q2 and the primary winding of the transformer T1. During the period when the first switch Q2 is turned off, the energy stored in the primary winding of the transformer T1 will be used for to supply power to the load. The control terminal of the first switch tube Q2 is connected to the controller K, and the controller K receives the voltage VA of the second node and the voltage VB of the first node.

An example of the converter of the embodiment of the present application is described above, however, the embodiment of the present application is not limited thereto, and there may also be extensions and modifications in other manners.

For example, the resistors and capacitors provided in the embodiments of the present application may be capacitive elements and resistive elements with lumped parameters, or other equivalent elements with functions similar to capacitors and resistors. The equivalent structures described here are, for example, but not limited to, Microstrip lines, varactors, patterned conductor structures, etc. can provide structures that provide inductive and/or capacitive impedance.

VA-2VB表征了反激部分的充电电流信息，在第一开关管Q2关断时，VB表征了升压电路放电电流的信息，图3示出了本申请一实施例BiFRED转换器中控制器的电路示意图，如图3所示，控制器K接收电压VA以及电压VB，在第一开关管Q2开通期间，通过乘法器、减法器运算得到VA-2VB后经过开关作为电压V1发送到反馈电路，在第一开关管Q2关断期间，将电压VB经过开关作为V2发送到反馈电路，反馈电路接收一个基准信号VREF，经过处理之后输出补偿信号VCOMP至第一比较器的正相输入端，反相输入端接收一三角波，以输出控制第一开关管Q2的控制信号。所述基准信号VREF为表征输出电流大小的电压信号。通过控制第一开关管Q2的导通时间，以获得基本恒定的电流供给负载。Under normal circumstances, the resistance values of the first resistor R1 and the second resistor R2 are set to be equal. When the first switch tube Q2 is turned on, C3 discharges through the secondary winding of the transformer T1 to generate the flyback part of the current I2, the first inductor L3 is charged from the rectified commercial power through the first switch tube Q2 to generate a boost current Iboost. For the reference ground, the voltage of VB is I _boost ×R1, and the voltage of VA is I ₁ ×R2+VB, where I1 is the current flowing through the first switch tube Q2, that is, I ₁ =I ₂ +I _boost , when R1=R2=R, the current of the flyback part is

VA-2VB represents the charging current information of the flyback part. When the first switch Q2 is turned off, VB represents the discharging current information of the boost circuit. Figure 3 shows the controller in the BiFRED converter according to an embodiment of the present application. As shown in Figure 3, the controller K receives the voltage VA and the voltage VB. During the opening period of the first switch tube Q2, VA-2VB is obtained through the operation of the multiplier and the subtractor, and then sent to the feedback circuit as the voltage V1 through the switch. , during the off period of the first switch tube Q2, the voltage VB is sent to the feedback circuit through the switch as V2, the feedback circuit receives a reference signal VREF, and after processing, the compensation signal VCOMP is output to the non-inverting input of the first comparator, and the reverse The phase input terminal receives a triangular wave to output a control signal for controlling the first switch transistor Q2. The reference signal VREF is a voltage signal representing the magnitude of the output current. By controlling the on-time of the first switch transistor Q2, a substantially constant current is supplied to the load.

FIG. 4 shows a schematic circuit diagram of the feedback circuit in the controller according to FIG. 3. As shown in FIG. 4, the feedback circuit receives V1, V2 and VREF, and reacts into a current through the voltage-controlled current source to charge and discharge the capacitor C5. The positive terminal of C5 outputs the compensation signal VCOMP. Among them, in one switching cycle, VREF charges the capacitor C5. During the turn-on period of the first switch tube, the feedback circuit keeps V1 after receiving V1. During the turn-off period of the first switch tube, the sampling voltage V2 is pulled down through V1 and V2. VCOMP, the enable of the sampled V1 is controlled by the inverted signal of the control signal. Through the above feedback circuit and controller circuit structure, the indirect sampling of the output current is realized, so as to adjust and control the output current to be constant.

In the present application, the first resistor R1 and the second resistor R2 are set in the control loop of the BiFRED converter, and the current of the loop is obtained by sampling the node voltage in the circuit loop, and the sampled current and the calculated current value in the present application are both positive values, In the subsequent control circuit processing, the influence of negative current need not be considered, and the control is simpler.

The BiFRED converter provided by the present application has a second resistor connected in series with the first switch tube of the converter, and a first resistor connected between the rectifier circuit and the first switch tube, for detecting that the first switch tube is turned off The current of the booster part when it is off and the current of the flyback part when it is on are processed. The feedback current is processed to obtain information representing the output current to obtain the control signal for the first switch tube. This application uses the current on the primary winding side to control The on-time of the first switch tube can suppress the output current ripple.

Normally, within a power frequency cycle, the voltage of the first capacitor C3 is basically unchanged. In the vicinity of the zero-crossing of the mains grid, the discharge current of the boost part is zero, and the output current is all provided by the flyback part. At this time, the VCOMP voltage The highest, considering the output current ripple, the output current is lower than the set current at this time; at the peak of the grid, the discharge current of the booster part reaches the maximum value, at this time the VCOMP voltage is the lowest, and the output current is higher than the set current. The resistance values of the first resistor R1 and the second resistor R2 are set to be equal, for example, set to the resistance value of R. As an example, the present application can fine-tune the resistance values of the first resistor R1 and the second resistor R2 so that the first resistor R1 The resistance value of the second resistor R2 is slightly smaller than R, and the resistance value of the second resistor R2 is slightly larger than R, so that the current sampled by the feedback circuit of the flyback part is slightly smaller than the actual value, and the current sampled by the booster part is slightly larger than the actual value, under the same control bandwidth and the output capacitor, so at the bottom of the grid, the voltage of VCOMP is higher, at the peak of the grid, the voltage of VCOMP is lower, and the output current ripple is smaller; that is, under the same output current ripple condition, the solution of this application can Using smaller output electrolytic capacitors, or allowing lower system bandwidth, is beneficial to system stability. At the same time, since the resistance values of the first resistor R1 and the second resistor R2 are fine-tuned, and the directions of the resistance values of the first resistor R1 and the second resistor R2 are opposite to each other, the influences of the two on the current reference can cancel each other out. Does not affect the output current reference.

An example of the controller of the embodiment of the present application is described above, however, the embodiment of the present application is not limited thereto, and there may also be extensions and modifications in other manners.

For example, it should be understood that the reference ground potential in the foregoing embodiments may be replaced in alternative embodiments by other non-zero reference potentials (having positive or negative voltage magnitudes) or controlled varying reference signals.

The steps of the methods described herein may be performed in any suitable order, or concurrently, where appropriate. Furthermore, individual blocks may be deleted from any method without departing from the spirit and scope of the subject matter described herein. Aspects of any of the above-described embodiments may be combined with aspects of any of the other embodiments described to form further embodiments, without loss of the effect sought.

The terms "comprising", "comprising" or any other variation thereof are intended to encompass non-exclusive inclusion such that a process, method, article or device comprising a list of elements includes not only those elements, but also other not expressly listed elements, or also include elements inherent to such a process, method, article or apparatus. Without further limitation, an element qualified by the phrase "comprising a..." does not preclude the presence of additional identical elements in a process, method, article or apparatus that includes the element.

It should be understood that the above description is given by way of example only and that various modifications may be made by those skilled in the art. The above specification, examples and data provide a complete description of the structure and use of exemplary embodiments. Although various embodiments have been described above with a certain degree of particularity, or with reference to one or more individual embodiments, those skilled in the art can implement the disclosed implementations without departing from the spirit or scope of this specification. Various changes are made to the example.

Claims (10)

1. A Boost Integrated Flyback (BiFRED) control method for a BiFRED converter, comprising:

performing boost conversion using a boost portion of the converter, the boost portion including a first inductive element connected between an input voltage and a first switching tube;

flyback converting using a flyback portion of the converter, the flyback portion including a primary winding and a secondary winding, and an energy storage device in series with the primary winding;

sampling a first node signal to obtain a first sampling signal, sampling a second node signal to obtain a second sampling signal, wherein the first node is a connection point of a first sampling element, a second sampling element and the energy storage device, and the second node is a connection point of the first switching tube and the second sampling element;

and processing the received first sampling signal and the second sampling signal to obtain a control signal for controlling the first switching tube.

2. The control method according to claim 1, characterized by further comprising

When the first switch tube is turned off, the first sampling signal represents first current information of the boosting part;

when the first switch tube is conducted, the difference value of the second sampling signal and the product of the first sampling signal and the first coefficient represents second current information of the flyback part.

3. The control method of claim 2, wherein the first sampling element comprises a first resistor configured to be connected between a rectifying circuit and the first switching tube to obtain the first sampled signal at the negative terminal of the energy storage device;

the second sampling element comprises a second resistor which is configured to be connected with the first switch tube in series to obtain the second sampling signal of the second output end of the first switch tube when the first switch tube is conducted.

4. The control method of claim 3, wherein the first coefficient is related to a ratio of the first resistance and the second resistance.

5. The control method according to claim 3, characterized by further comprising:

the resistance value of the first resistor is equal to that of the second resistor, and the resistance value is a first numerical value; or

The resistance value of the first resistor and the resistance value of the second resistor are vertically offset relative to a first value, and the offset is (0, 10% ]).

6. The control method of claim 1, wherein the control signal is generated based on the first and second sampling signals and a reference signal to control an on-time of the first switching tube.

7. A BiFRED converter, comprising:

the boost part comprises a first inductor between an input voltage and a first switching tube;

a flyback section including a primary winding and a secondary winding having a first capacitance in series with the primary winding of the flyback section;

a first resistor configured to be connected between a rectifying circuit and the first switching tube to obtain a first sampling signal of a first node;

a second resistor configured to be connected in series with the first switch tube to obtain a second sampling signal of a second node when the first switch tube is turned on; the first node is a connection point of the first resistor, the second resistor and the first capacitor, and the second node is a connection point of the first switch tube and the second resistor;

and the controller comprises a feedback circuit and is used for obtaining a compensation voltage according to the first sampling signal, the second sampling signal and a reference voltage, and the controller obtains a control signal of the first switching tube based on the compensation voltage and the reference signal.

8. The BiFRED converter of claim 7, wherein the controller comprises:

a logic circuit configured to receive the first sampling signal and the second sampling signal, and generate a first voltage signal and a second voltage signal through a logic operation;

a feedback circuit receiving the first voltage signal, the second voltage signal and the reference voltage to generate the compensation voltage;

and the first input end of the comparison circuit receives the compensation voltage, the second input end of the comparison circuit receives the reference signal, the control signal is generated according to the compensation voltage and the reference signal, and the on-time of the first switching tube is controlled.

9. The BiFRED converter of claim 8, wherein the logic circuit comprises:

a multiplier configured to receive the first sampled signal and multiply the first sampled signal by a first coefficient to generate a third signal;

a subtractor configured to receive the second sampling signal and the third signal, and subtract the second sampling signal and the third signal to obtain the first voltage signal;

the input end of the first switch is used for receiving the first voltage signal, the output end of the first switch is connected with the first input end of the feedback circuit, and the control end of the first switch is controlled by the control signal of the first switch tube;

the second switch is configured to receive the first sampling signal as the second voltage signal at an input end, the output end is connected with the second input end of the feedback circuit, and a control end is controlled by an inverted signal of a control signal of the first switch tube.

10. The BiFRED converter of claim 9, wherein the feedback circuit comprises:

a first current source configured to receive the reference voltage to generate a third current;

a second current source configured to receive the first voltage signal to generate a first current and output the first current when the first switch tube is turned off;

a third current source configured to receive the second voltage signal to generate a second current;

and the third capacitor is configured to receive the third current for charging, when the first switch tube is turned off, the third capacitor is discharged by the first current and the second current, and the voltage of the first polarity end of the third capacitor is output as the compensation voltage.

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