CN115133890B - Bridge load class D power amplifier, audio amplifier circuit and related control method - Google Patents

Abstract

The present invention is a bridge load class D power amplifier, an audio amplifier circuit and a control method related thereto. The audio amplifier circuit integrates and modulates a first path error signal and a second path error signal to generate a first path comparator output and a second path comparator output respectively. The audio amplifier circuit generates a first path error signal according to a first analog differential input and a first path feedback signal. The audio amplifier circuit generates a second path error signal according to a second analog differential input and a second path feedback signal. The audio amplifier circuit generates a first path feedback signal and a second path feedback signal according to the first path comparator output and the second path comparator output respectively. In addition, the audio amplifier circuit selectively adjusts the phase of one of the first path comparator output and the second path comparator output.

Description

Bridge load class D power amplifier, audio amplifier circuit and related control method

Technical Field

The present invention relates to a bridge-loaded Class D power amplifier, an audio amplifier circuit and a control method thereof, and in particular to a bridge-loaded Class D power amplifier, an audio amplifier circuit and a control method thereof that can suppress popping sounds during startup and shutdown.

Background Art

Mobile devices with audio playback functions are becoming more and more popular. Class D amplifiers are often used in mobile devices with audio playback functions because of their high efficiency, power saving and small size. Class D amplifiers amplify the input audio signal and convert it into a pulse-width modulation (PWM) signal with higher power. Then, the speaker converts the current frequency of the pulse-width modulation signal into sound and plays it. With the development of technology, users have higher and higher requirements for the sound quality of speakers.

Summary of the invention

The present invention relates to a bridge load class D power amplifier, an audio amplifier circuit and a control method thereof. By setting a phase shift circuit, the bridge load class D power amplifier and the audio amplifier circuit can dynamically suppress the phenomenon of popping sound when starting and shutting down caused by the phase inconsistency between the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-).

According to a first aspect of the present invention, an audio amplifier circuit is provided. The audio amplifier circuit comprises: a modulation signal generating circuit, a first audio output circuit, and a second audio output circuit. The modulation signal generating circuit is electrically connected to the first audio output circuit and the second audio output circuit. The modulation signal generating circuit integrates and modulates the first path error signal to generate a first path comparator output, and integrates and modulates the second path error signal to generate a second path comparator output. The first audio output circuit comprises: a first path adder, a first phase shift circuit, and at least one first path loop. The first path adder is electrically connected to the modulation signal generating circuit. The first path adder generates a first path error signal after subtracting a first path feedback signal from a first analog differential input. The first phase shift circuit selectively adjusts the phase of the first path comparator output. At least one first path loop is electrically connected to the modulation signal generating circuit, the first path adder, and the first phase shift circuit. At least one first path loop generates a first path feedback signal according to the first path comparator output. The second audio output circuit comprises: a second path adder, a second phase shift circuit, and at least one second path loop. The second path adder is electrically connected to the modulation signal generating circuit. The second path adder generates a second path error signal after subtracting the second path feedback signal from the second analog differential input. The second phase shift circuit selectively adjusts the phase of the second path comparator output. At least one second path loop is electrically connected to the modulation signal generating circuit, the second path adder and the second phase shift circuit. At least one second path loop generates a second path feedback signal according to the second path comparator output.

According to a second aspect of the present invention, a control method for an audio amplifier circuit is proposed. The control method comprises the following steps. First, the audio amplifier circuit integrates and modulates the first path error signal and the second path error signal to generate a first path comparator output and a second path comparator output, respectively. Secondly, the audio amplifier circuit generates a first path error signal according to the first analog differential input and the first path feedback signal. Next, the audio amplifier circuit generates a second path error signal according to the second analog differential input and the second path feedback signal. Thereafter, the audio amplifier circuit generates a first path feedback signal and a second path feedback signal according to the first path comparator output and the second path comparator output, respectively. In addition, the audio amplifier circuit selectively adjusts the phase of one of the first path comparator output and the second path comparator output.

According to a third aspect of the present invention, a bridge-loaded class D power amplifier for driving a speaker is provided. The bridge-loaded class D power amplifier comprises: a first half-bridge; a second half-bridge and a first phase shift circuit. The first half-bridge drives the speaker in response to a first pulse width modulation signal and the second half-bridge drives the speaker in response to a second pulse width modulation signal. The first phase shift circuit is used to shift the phase of the first pulse width modulation signal. The phase error formed between the first pulse width modulation signal and the second pulse width modulation signal is related to the noise of the speaker.

The present invention is described in detail below with reference to the accompanying drawings and specific embodiments, but is not intended to limit the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram of an audio playback device.

FIG. 2 is a waveform diagram showing the popping sound phenomenon caused by the positive path PWM output (PWM+) slightly leading the negative path PWM output (PWM-) during the power on and off period of the speaker.

FIG. 3A is a schematic diagram showing that during a switching period, the phase of a positive path PWM output (PWM+) leads the phase of a negative path PWM output (PWM-).

FIG. 3B is a schematic diagram showing that after adjustment, the phase of the positive phase path PWM output (PWM+) is aligned with the phase of the negative phase path PWM output (PWM-) during switching and the noise is reduced.

FIG. 4 is a block diagram of an audio output module according to an embodiment of the present invention.

FIG5A is a waveform diagram showing the audio amplifier circuit of an embodiment of the present invention used to suppress the popping sound phenomenon generated by the speaker during the power on and off period when the phase of the positive phase path PWM output (PWM+) is slightly ahead of the phase of the negative phase path PWM output (PWM-).

FIG5B is a waveform diagram showing the audio amplifier circuit of an embodiment of the present invention used to suppress the popping sound phenomenon generated by the speaker during the power on and off period when the phase of the positive phase path PWM output (PWM+) lags slightly behind the phase of the negative phase path PWM output (PWM-).

FIG. 6A is a schematic diagram showing a phase shift circuit that is a variable capacitor.

FIG. 6B is a schematic diagram showing a phase shift circuit including a plurality of parallel capacitor paths.

FIG. 7 is a schematic diagram of an audio amplifier circuit according to the present invention.

FIG. 8A is a circuit diagram of an audio amplifier circuit according to an embodiment of the present invention, in which the main feedback path is disconnected and the slave feedback path is turned on.

FIG. 8B is a circuit diagram of an audio amplifier circuit according to an embodiment of the present invention, in which the main feedback path is turned on and the feedback path is turned off.

9A and 9B are flow charts showing the audio amplifier circuit according to the present invention, which dynamically selects a feedback path in response to the state of the audio output module.

Wherein, the reference numerals are:

1: Audio playback module

12: Audio control circuit

14: Digital-to-Analog Converter

Sd: digital audio signal

Sctl: control signal

Va+: Positive phase analog differential input

Va-: Negative phase analog differential input

13: Audio amplifier circuit

L-, L+: Inductance

PWM+: positive phase path PWM output

PWM-: Negative phase path PWM output

(PWM+)-(PWM-):PWM output voltage difference

15: Speaker

Ncmp+: Positive path comparator output endpoint

Ncmp-: Negative phase path comparator output endpoint

t1,t2: time point

Δt1, Δt2: Phase error

Ton_tr: startup transient period

Top: General playback period

Toff_tr: Shutdown transient period

Pd1, Pd2: PWM output voltage difference (PWM+) - (PWM-)

131: Modulation signal generating circuit

133: Negative phase audio output circuit

133a: Negative Phase Path Adder

133b: Negative phase shift circuit

133c: Negative phase path main circuit

133d: Negative phase path from loop

135: Positive phase audio output circuit

135a: Positive Phase Path Adder

135b: Positive phase shift circuit

135c: Positive phase path main circuit

135d: Positive phase path from loop

21: Phase shift circuit

Cv: variable capacitor

Gnd: Ground voltage

C1, C2, C3, C4, C5: capacitors

sw1,sw2,sw3,sw4,sw5,SWm+,SWm-,SWa1+,SWa2+,SWa1-,SWa2-: switch

Sf+: positive phase path feedback signal

Sf-: Negative phase path feedback signal

Serr+: positive phase path error signal

Serr-: Negative phase path error signal

Sfm+: positive phase path main feedback signal

Sfm-: Negative phase path main feedback signal

Sfa+: positive phase path from the feedback signal

Sfa-: Negative phase path from the feedback signal

Rm+: Main feedback resistor of the positive phase path

Rm-: Negative phase path main feedback resistor

Ra+: Positive phase path from feedback resistor

Ra-: Negative phase path from feedback resistor

INVm+: Normal phase path main driver

INVm-: Negative phase path main driver

INVa+: Normal phase path from driver

INVa-: Negative phase path from the driver

1311: Integrator

1313: Comparison circuit

1313a: Carrier generating circuit

AMP: Fully Differential Amplifier

OP+: Positive Phase Path Comparator

OP-: Negative Phase Path Comparator

S201, S203, S207, S207, S209, S211, S213, S215, S209a, S209b, S209c, S209d: Steps

DETAILED DESCRIPTION

The structural principle and working principle of the present invention are described in detail below in conjunction with the accompanying drawings:

Please refer to FIG1 , which is a schematic diagram of an audio playback device. The audio playback device includes an audio playback module 1 and an audio output module 10 .

The audio playback module 1 includes an audio control circuit 12 and a digital-to-analog converter 14 which are electrically connected to each other. The audio control circuit 12 can dynamically respond to the state of the audio output module 10 and send control signals Sctl of different types and purposes to the audio amplifier circuit 13. After receiving the digital audio signal Sd transmitted by the audio control circuit 12, the digital-to-analog converter 14 converts the digital audio signal Sd into a positive-phase analog differential input Va+ and a negative-phase analog differential input Va-.

The audio output module 10 includes an audio amplifier circuit 13, an inductor L+, L- and a speaker 15. The inductors L+, L- are electrically connected between the audio amplifier circuit 13 and the speaker 15. The audio amplifier circuit 13 is also electrically connected to the audio control circuit 12 and the digital-to-analog converter 14. The audio amplifier circuit 13 first amplifies the positive phase analog differential input Va+ and the negative phase analog differential input Va- and converts them into a positive phase path pulse width modulation signal (abbreviated as positive phase path PWM (pulse-width modulation) output PWM+) and a negative phase path pulse width modulation signal (abbreviated as negative phase path PWM output (PWM-)) to the inductors L+, L-. The audio is then played by the speaker 15. The sound effect heard by the user through the speaker 15 is at least determined by the PWM output voltage difference (PWM+)-(PWM-) between the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-).

When the audio output module 10 is powered on and in the normal operation mode, the audio playback module 1 transmits the positive phase analog differential input Va+ and the negative phase analog differential input Va- to the audio amplifier circuit 13. The audio amplifier circuit 13 generates the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-) accordingly. Generally speaking, there is at least an impedance mismatch problem between the path used to transmit the positive phase path PWM output (PWM+) and the path used to transmit the negative phase path PWM output (PWM-), which will cause the output positive phase path PWM output (PWM+) to be asynchronous with the negative phase path PWM output (PWM-). According to the impedance mismatch condition, the positive phase path PWM output (PWM+) may lead or lag behind the negative phase path PWM output (PWM-). For ease of explanation, in FIG. 2 , it is assumed that the positive phase path PWM output (PWM+) leads the negative phase path PWM output (PWM-).

Please refer to FIG. 2, which is a waveform diagram of the pop noise phenomenon caused by the positive phase path PWM output (PWM+) leading the negative phase path PWM output (PWM-) during the power on and off period of the speaker 15. In FIG. 2, the vertical axis is the waveform of the positive phase path PWM output (PWM+), the negative phase path PWM output (PWM-), and the PWM output voltage difference (PWM+)-(PWM-) from top to bottom. The horizontal axis is time, and the activation period of the audio output module 10 can include three periods, the power on transient period Ton_tr, the normal playback period Top, and the power off transient period Toff_tr.

The enlarged drawing in the upper left corner of FIG. 2 shows the changes of the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-) during the switching period between the power-on transient period Ton_tr and the general playback period Top. During the switching period, the voltage of the positive phase path PWM output (PWM+) rises at time point t1, while the voltage of the negative phase path PWM output (PWM-) rises at time point (t1+Δt1) after time point t1. That is, there is a phase error (Δt1) between the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-). Therefore, during the switching period between the power-on transient period Ton_tr and the general playback period Top, the waveform of the PWM output voltage difference (PWM+)-(PWM-) has a voltage pulse during the phase error (Δt1). In the present invention, for the PWM output voltage difference (PWM+)-(PWM-), the potential during the power-on transient period Ton_tr is used as the reference potential. When the potential of the voltage pulse is greater than the reference potential, the voltage pulse is regarded as a positive voltage pulse, and vice versa. As a result, a positive voltage pulse is generated during the phase error (Δt1).

The enlarged illustration in the upper right corner of FIG. 2 shows the changes in the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-) during the switching period between the normal playback period Top and the shutdown transient period Toff_tr. During the switching period, the voltage of the positive phase path PWM output (PWM+) drops at time point t2, and the voltage of the negative phase path PWM output (PWM-) drops at time point (t2+Δt2) after time point t2. That is, there is a phase error (Δt2) between the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-). Therefore, during the switching period between the normal playback period Top and the shutdown transient period Toff_tr, the waveform of the PWM output voltage difference (PWM+)-(PWM-) has a negative voltage pulse during the phase error (Δt2).

Whether it is a positive voltage pulse during the switching period from the power-on transient period Ton_tr to the normal playback period Top, or a negative voltage pulse during the switching period from the normal playback period Top to the power-off transient period Toff_tr, the user will hear a popping sound through the speaker 15, affecting the user's auditory experience.

Please refer to FIG. 3A, which is a schematic diagram showing that the phase of the positive path PWM output (PWM+) leads the phase of the negative path PWM output (PWM-) during switching. This figure is equivalent to the enlarged figure in the upper left corner of FIG. 2. When there is a phase error (Δt1) between the positive path PWM output (PWM+) and the negative path PWM output (PWM-), the magnitude of the PWM output voltage difference (PWM+)-(PWM-) is represented as Pd1.

Please refer to FIG. 3B , which is a schematic diagram of adjusting the phase of the positive path PWM output (PWM+) and the phase of the negative path PWM output (PWM-) to align during switching and reduce noise. This figure is equivalent to the figure in the upper left corner of FIG. 2 , in which the phase of the positive path PWM output (PWM+) is shifted backward (delayed); or the phase of the negative path PWM output (PWM-) is shifted forward (advanced). At this time, the phase error (Δt1) does not exist, and the size of the PWM output voltage difference (PWM+)-(PWM-) is expressed as Pd2.

When comparing the size (Pd1) of the PWM output voltage difference (PWM+)-(PWM-) of FIG. 3A with the size (Pd2) of the PWM output voltage difference (PWM+)-(PWM-) of FIG. 3B , it can be seen that Pd1>Pd2. That is, after the phase adjustment, the size of the PWM output voltage difference (PWM+)-(PWM-) is reduced. In conjunction, the noise of the speaker 15 can also be reduced and the user's auditory experience can be improved. To this end, the audio amplifier circuit 13 of the present invention provides a circuit architecture of a phase shift circuit (e.g., a delay circuit) to suppress the aforementioned popping phenomenon by adjusting the phase of the positive phase path PWM output (PWM+) or the negative phase path PWM output (PWM-).

Please refer to FIG. 4, which is a block diagram of an audio amplifier circuit according to an embodiment of the present invention. In this embodiment, the audio amplifier circuit 13 adopts a bridge-tied load class D power amplifier architecture. The audio amplifier circuit 13 includes: a modulation signal generating circuit 131, a positive phase audio output circuit 135, and a negative phase audio output circuit 133. The modulation signal generating circuit 131 is electrically connected to the positive phase audio output circuit 135 and the negative phase audio output circuit 133. The modulation signal generating circuit 131 can be a pulse width modulation signal generating circuit.

The positive phase audio output circuit 135 serves as one half bridge of the bridge load. The positive phase audio output circuit 135 comprises: a positive phase path adder 135a, a positive phase phase shift circuit 135b, a positive phase path main loop 135c and a positive phase path slave loop 135d. The positive phase phase shift circuit 135b, the positive phase path main loop 135c and the positive phase path slave loop 135d are all electrically connected to the modulation signal generating circuit 131 through the positive phase path comparator output terminal Ncmp+. The positive phase path main loop 135c and the positive phase path slave loop 135d are turned on in turn. The positive phase path adder 135a receives the positive phase path feedback signal Sf+, wherein the positive phase path feedback signal Sf+ is the output of one of the positive phase path main loop 135c and the positive phase path slave loop 135d. The positive phase path adder 135a generates a positive phase path error signal Serr+ after deducting the positive phase path feedback signal Sf+ from the positive phase analog differential input Va+, and transmits the positive phase path error signal Serr+ to the modulation signal generating circuit 131. The modulation signal generating circuit 131 outputs the positive phase path comparator output Scmp+ to the positive phase path comparator output terminal Ncmp+ according to the positive phase path error signal Serr+.

The negative phase audio output circuit 133 is another half bridge of the bridge load, and is combined with the positive phase audio output circuit 135 to form a full bridge driving the speaker 15. The negative phase audio output circuit 133 includes: a negative phase path adder 133a, a negative phase phase shift circuit 133b, a negative phase path main loop 133c and a negative phase path slave loop 133d. The negative phase phase shift circuit 133b, the negative phase path main loop 133c and the negative phase path slave loop 133d are all electrically connected to the modulation signal generating circuit 131 through the negative phase path comparator output terminal Ncmp-. The negative phase path main loop 133c and the negative phase path slave loop 133d are turned on in turn. The negative phase path adder 133a receives the negative phase path feedback signal Sf-, wherein the negative phase path feedback signal Sf- is the output of one of the negative phase path main loop 133c and the negative phase path slave loop 133d. The negative phase path adder 133a generates a negative phase path error signal Serr- after deducting the negative phase path feedback signal Sf- from the negative phase analog differential input Va-, and transmits the negative phase path error signal Serr- to the modulation signal generating circuit 131. The modulation signal generating circuit 131 outputs the negative phase path comparator output Scmp- to the negative phase path comparator output terminal Ncmp- according to the negative phase path error signal Serr-.

As shown in FIG. 2 , there may be a phase error in the generation of the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-), which may lead to the phenomenon of popping sound. In other words, solving the aforementioned phase error problem can at least alleviate the phenomenon of popping sound. To this end, the positive phase phase shift circuit 135b provided in the positive phase audio output circuit 135 can be used to shift the positive phase path comparator output Scmp+ at the positive phase path comparator output terminal Ncmp+ in timing, and the negative phase phase shift circuit 133b provided in the negative phase audio output circuit 133 can be used to shift the negative phase path comparator output Scmp- at the negative phase path comparator output terminal Ncmp- in timing.

In the present invention, there is symmetry in circuit structure between the positive phase audio output circuit 135 and the negative phase audio output circuit 133. Therefore, the phase error caused by the positive phase path main loop 135c to the positive phase path comparator output Scmp+ can be regarded as the same as the phase error caused by the negative phase path main loop 133c to the negative phase path comparator output Scmp-. In other words, the phase error between the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-) is positively correlated with the phase error between the positive phase path comparator output Scmp+ and the negative phase path comparator output Scmp-. Accordingly, the phase error between the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-) can be adjusted by adjusting the phase error between the positive phase path comparator output Scmp+ and the negative phase path comparator output Scmp-. Therefore, the manufacturer of the audio playback device can perform a calibration procedure on the audio output module 10 before shipping the product to reduce the popping phenomenon.

In the calibration procedure, if it is found that the popping sound phenomenon originates from the positive phase path PWM output (PWM+) leading the negative phase path PWM output (PWM-), the audio control circuit 12 uses the control signal Sctl to set the equivalent capacitor Ceq+ of the positive phase shift circuit 135b, so that the capacitance value of the equivalent capacitor Ceq+ increases, thereby delaying the generation time of the positive phase path PWM output (PWM+). Alternatively, the audio control circuit 12 uses the control signal Sctl to set the equivalent capacitor Ceq- of the negative phase shift circuit 133b, so that the capacitance value of the equivalent capacitor Ceq- decreases, thereby advancing the generation time of the negative phase path PWM output (PWM-).

On the contrary, if it is found that the popping sound phenomenon originates from the positive phase path PWM output (PWM+) lagging behind the negative phase path PWM output (PWM-), the control signal Sctl is used to set the equivalent capacitor Ceq- of the negative phase phase shift circuit 133b, so that the capacitance value of the equivalent capacitor Ceq- increases, thereby delaying the generation time point of the negative phase PWM path output (PWM-). Alternatively, the control signal Sctl is used to set the equivalent capacitor Ceq+ of the positive phase phase shift circuit 135b, so that the capacitance value of the equivalent capacitor Ceq+ decreases, thereby advancing the generation time point of the positive phase path PWM output (PWM+).

In the embodiment of FIG. 4 , the audio amplifier circuit 13 may be provided with a positive phase shift circuit 135b and a negative phase shift circuit 133b at the same time, but the present invention is not limited thereto. In some embodiments, only one of the positive phase shift circuit 135b and the negative phase shift circuit 133b is provided. For example, if it is known in advance which of the signal transmission path of the positive phase path main loop 135c and the signal transmission path of the negative phase path main loop 133c is longer according to the winding position of the circuit, etc., only one of the positive phase shift circuit 135b and the negative phase shift circuit 133b may be provided in the audio amplifier circuit 13. That is, whether the positive phase shift circuit 135b or the negative phase shift circuit 133b is provided or not may be considered according to the characteristics of the audio amplifier circuit 13, and no limitation is required.

Next, FIG. 5A and FIG. 5B illustrate how the present invention improves the popping phenomenon by adjusting the phase by using the positive phase shift circuit 135b and the negative phase phase shift circuit 133b. Please also note that in actual application, the positive phase phase shift circuit 135b and the negative phase phase shift circuit 133b can delay the generation time of one of the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-) by setting a capacitor and increasing the capacitance value; or, by reducing the capacitance value of the existing capacitor on the output path, the generation time of one of the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-) is advanced. The vertical axes of FIG. 5A and FIG. 5B are respectively the positive phase path PWM output (PWM+), the negative phase path PWM output (PWM-), and the PWM output voltage difference (PWM+)-(PWM-) under different conditions from top to bottom. The horizontal axis of FIG. 5A and FIG. 5B is time.

Please refer to FIG. 5A , which is a waveform diagram showing the audio amplifier circuit of an embodiment of the present invention being used to suppress the popping sound phenomenon generated by the speaker 15 during the power on and power off period when the phase of the positive phase path PWM output (PWM+) is slightly ahead of the phase of the negative phase path PWM output (PWM-).

When the positive path PWM output (PWM+) leads the negative path PWM output (PWM-) in phase, if the positive phase shift circuit 135b or the negative phase shift circuit 133b is not adjusted, the popping sound phenomenon is maintained (same as FIG. 2 ).

When the positive phase path PWM output (PWM+) leads the negative phase path PWM output (PWM-), if the capacitance value of the positive phase phase shift circuit 135b is increased, the timing of the positive phase path PWM output (PWM+) can be delayed, and the phase error between the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-) is reduced. Thus, the amplitude of the PWM output voltage difference (PWM+)-(PWM-) is reduced. Therefore, the degree of the popping sound generated by the speaker 15 is reduced.

On the other hand, assuming that the positive phase path PWM output (PWM+) leads the negative phase path PWM output (PWM-), if the capacitance value of the negative phase phase shift circuit 133b is increased, the time point of the negative phase path PWM output (PWM-) is further delayed, and the phase error between the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-) becomes larger. As a result, the amplitude of the PWM output voltage difference (PWM+)-(PWM-) becomes larger. Therefore, the degree of the popping sound generated by the speaker 15 becomes larger. It can be seen from FIG. 5A that when the positive phase path PWM output (PWM+) leads the negative phase path PWM output (PWM-), the popping sound phenomenon of the PWM output voltage difference (PWM+)-(PWM-) can be improved by increasing the capacitance value of the positive phase phase shift circuit 135b.

Please refer to FIG. 5B , which is a waveform diagram showing the audio amplifier circuit of an embodiment of the present invention being used to suppress the popping sound phenomenon generated during the power on and power off of the speaker 15 when the phase of the positive phase path PWM output (PWM+) lags slightly behind the phase of the negative phase path PWM output (PWM-).

When the positive path PWM output (PWM+) lags behind the negative path PWM output (PWM-), if the positive phase shift circuit 135b or the negative phase shift circuit 133b is not adjusted, the popping sound phenomenon will persist.

When the positive phase path PWM output (PWM+) lags behind the negative phase path PWM output (PWM-), if the capacitance value of the positive phase phase shift circuit 135b is increased, the timing of the positive phase path PWM output (PWM+) will be delayed, making the phase error between the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-) further increased. As a result, the amplitude of the PWM output voltage difference (PWM+)-(PWM-) increases. Therefore, the degree of the popping sound generated by the speaker 15 increases.

When the positive path PWM output (PWM+) lags behind the negative path PWM output (PWM-), if the capacitance value of the negative phase shift circuit 133b is increased, the time point of the negative path PWM output (PWM-) can be delayed, and the phase error between the positive path PWM output (PWM+) and the negative path PWM output (PWM-) becomes smaller. In addition, the amplitude of the PWM output voltage difference (PWM+)-(PWM-) becomes smaller. Therefore, the degree of the popping sound generated by the speaker 15 becomes smaller.

As can be seen from FIG. 5B , when the positive phase path PWM output (PWM+) lags behind the negative phase path PWM output (PWM-), the popping sound phenomenon of the PWM output voltage difference (PWM+)-(PWM-) can be improved by increasing the capacitance value of the negative phase shift circuit 133b.

According to the description of FIG. 5A and FIG. 5B , no matter the positive phase path PWM output (PWM+) leads the negative phase path PWM output (PWM-), or the positive phase path PWM output (PWM+) lags behind the negative phase path PWM output (PWM-), the audio amplifier circuit 13 conceived according to the present invention can reduce the popping sound phenomenon generated during the switching period between the power-on transient period Ton_tr and the normal playback period Top and during the switching period between the normal playback period Top and the power-off transient period Toff_tr.

When the positive path PWM output (PWM+) leads the negative path PWM output (PWM-), the audio control circuit 12 uses the control signal Sctl to increase the capacitance value of the positive phase shift circuit 135b; or, the audio control circuit 12 uses the control signal Sctl to reduce the capacitance value of the negative phase shift circuit 133b.

On the other hand, when the positive phase path PWM output (PWM+) lags behind the negative phase path PWM output (PWM-), the audio control circuit 12 uses the control signal Sctl to increase the capacitance value of the negative phase shift circuit 133b; or, the audio control circuit 12 uses the control signal Sctl to reduce the capacitance value of the positive phase shift circuit 135b.

Furthermore, if a popping sound phenomenon occurs, but it is not possible to determine whether it is caused by the positive phase path PWM output (PWM+) leading the negative phase path PWM output (PWM-), or the positive phase path PWM output (PWM+) lagging behind the negative phase path PWM output (PWM-), the capacitance value of the positive phase phase shift circuit 135b or the negative phase phase shift circuit 133b can also be adjusted according to the waveforms of Figures 5A and 5B. For example, after trying to increase the capacitance value of the positive phase phase shift circuit 135b, it is found that the volume of the popping sound is reduced, which means that the positive phase path PWM output (PWM+) before the phase adjustment is ahead of the negative phase path PWM output (PWM-) before the phase adjustment. Therefore, it is necessary to maintain the increase of the capacitance value of the positive phase phase shift circuit 135b (or reduce the capacitance value of the negative phase phase shift circuit 133b). On the contrary, if the volume of the popping sound increases after increasing the capacitance value of the positive phase shift circuit 135b, it means that the positive phase path PWM output (PWM+) before the phase adjustment lags behind the negative phase path PWM output (PWM-) before the phase adjustment. In this case, the capacitance value of the negative phase shift circuit 133b must be increased (or the capacitance value of the positive phase shift circuit 135b must be reduced).

Similarly, if you try to increase the capacitance value of the negative phase shift circuit 133b first, and find that the volume of the popping sound decreases, it means that the positive phase path PWM output (PWM+) before the phase adjustment lags behind the negative phase path PWM output (PWM-) before the phase adjustment. Therefore, it is necessary to continue to increase the capacitance value of the negative phase shift circuit 133b (or reduce the capacitance value of the positive phase shift circuit 135b). Conversely, if you increase the capacitance value of the negative phase shift circuit 133b and find that the volume of the popping sound increases, it means that the positive phase path PWM output (PWM+) before the phase adjustment leads the negative phase path PWM output (PWM-) before the phase adjustment. At this time, it is necessary to increase the capacitance value of the positive phase shift circuit 135b (or reduce the capacitance value of the negative phase shift circuit 133b).

In some embodiments, the positive phase shift circuit 135b and the negative phase shift circuit 133b can each use the delayed phase shift circuit 21 shown in FIG6A and FIG6B. However, in actual applications, the circuits of the positive phase shift circuit 135b and the negative phase shift circuit 133b are not limited thereto.

Please refer to FIG. 6A, which is a schematic diagram of a phase shift circuit 21 that is a variable capacitor. This figure uses a variable capacitor Cv as the phase shift circuit 21, and the phase shift circuit 21 is electrically connected to Ncmp (Ncmp+ and Ncmp- in FIG. 6A). The capacitance value of the variable capacitor Cv is controlled by the control signal Sctl, and the equivalent capacitance Ceq of the phase shift circuit 21 is equal to the capacitance value of the variable capacitor Cv.

Please refer to Fig. 6B, which is a schematic diagram of a phase shift circuit 23 including a plurality of parallel capacitor paths. This figure uses a plurality of parallel capacitor paths as the phase shift circuit 23, wherein each capacitor path includes a switch and a capacitor connected in series with each other. For identification, the switches and capacitors of each capacitor path are distinguished by different Roman numerals. For example, the switch of the first capacitor path is marked as sw1 and the capacitor is marked as C1, and the rest are deduced by analogy, and no further description is given. In this figure, it is assumed that capacitors C1, C2, C3, C4 and C5 have different capacitance values. Switches sw1, sw2, sw3, sw4 and sw5 are controlled by a control signal Sctrl. When at least one of switches sw1, sw2, sw3, sw4 and sw5 is turned on, the equivalent capacitance Ceq of the phase shift circuit 23 will change. For example, when only switch sw1 is turned on, the equivalent capacitance Ceq of the phase shift circuit 23 is equal to C1; and when switches sw1 and sw2 are turned on simultaneously, the equivalent capacitance Ceq of the phase shift circuit 23 is equal to the equivalent capacitance of capacitance C1 in parallel with capacitance C2.

FIG6B assumes that the capacitance values of capacitors C1, C2, C3, C4 and C5 are C, 2C, 4C, 8C and 16C respectively. Based on the configuration setting of such capacitance values, the audio control circuit 12 can generate the control signal Sctl corresponding to the switches sw1, sw2, sw3, sw4 and sw5 in a binary manner. By switching the switches sw1, sw2, sw3, sw4 and sw5, the audio control circuit 12 can determine the capacitance value of the equivalent capacitor Ceq. The switching of the switches sw1, sw2, sw3, sw4 and sw5 and the calculation of the capacitance value of the equivalent capacitor Ceq of the phase shift circuit 23 are not described in detail here. Moreover, the number of capacitance paths included in the phase shift circuit 23 is not limited to this figure.

Please refer to FIG. 7 , which is a schematic diagram of an audio amplifier circuit according to the present invention. As can be seen from this figure, the modulation signal generating circuit 131 includes an integrator 1311 and a comparison circuit 1313 .

The integrator 1311 includes a fully differential amplifier AMP, capacitors Cin+, Cin-, and input resistors Rin+, Rin-. The non-inverting input terminal (+) of the fully differential amplifier AMP is electrically connected to the resistor Rin+, which receives the positive phase path error signal Serr+ via the input resistor Rin+. The two ends of the capacitor Cin+ are electrically connected to the non-inverting input terminal (+) and the inverting output terminal (-) of the fully differential amplifier AMP, respectively. The inverting input terminal (-) of the fully differential amplifier AMP is electrically connected to the input resistor Rin-, which receives the negative phase path error signal Serr- via the input resistor Rin-. The two ends of the capacitor Cin- are electrically connected to the inverting input terminal (-) and the non-inverting output terminal (+) of the fully differential amplifier AMP, respectively.

The comparison circuit 1313 includes a positive phase path comparator OP+, a negative phase path comparator OP-, and a carrier generation circuit 1313a. The carrier generation circuit 1313a generates a carrier signal (e.g., a triangular wave SAW) to the non-inverting input terminal (+) of the positive phase path comparator OP+ and the inverting input terminal (-) of the negative phase path comparator OP-. The comparison circuit 1313 uses the triangular wave SAW to compare the positive phase path comparator OP+, the negative phase path comparator OP-, and the output signal of the integrator 1311 to generate a positive phase path comparator output Scmp+ and a negative phase path comparator output Scmp- in a square wave form at the positive phase path comparator output terminal Ncmp+ and the negative phase path comparator output terminal Ncmp-. The output frequency of the square wave-like positive phase path comparator output Scmp+ and the negative phase path comparator output Scmp- is the same as the frequency of the input triangle wave SAW, and the duty cycle of the positive phase path comparator output Scmp+ and the negative phase path comparator output Scmp- changes with the amplitude of the output signal (sine wave) of the integrator 1311.

As mentioned above, the positive phase audio output circuit 135 includes a positive phase path main loop 135c and a positive phase path slave loop 135d; the negative phase audio output circuit 133 includes a negative phase path main loop 133c and a negative phase path slave loop 133d. Next, the internal circuits of the positive phase path main loop 135c, the positive phase path slave loop 135d, the negative phase path main loop 133c, and the negative phase path slave loop 133d are described respectively.

The positive phase path main loop 135c includes: a switch SWm+, a positive phase path main driver INVm+ and a positive phase path main feedback resistor Rm+. The switch SWm+ is selectively turned on according to the control signal Sctl. When the switch SWm+ is turned on, the positive phase path main driver INVm+ generates a positive phase path PWM output (PWM+) based on the positive phase path comparator output Scmp+. Then, the positive phase path main feedback resistor Rm+ further converts the positive phase path PWM output (PWM+) into a positive phase path main feedback signal Sfm+.

The positive phase path slave loop 135d includes: switches SWa1+, SWa2+, a positive phase path slave driver INVa+ and a positive phase path slave feedback resistor Ra+. The switches SWa1+ and SWa2+ are selectively turned on or off synchronously according to the control signal Sctl. When the switches SWa1+ and SWa2+ are turned on at the same time, the positive phase path slave driver INVa+ drives the positive phase path comparator output Scmp+ to generate a positive phase drive signal (Sdrv+). Then, the positive phase path slave feedback resistor Ra+ further converts the positive phase drive signal (Sdrv+) into a positive phase path slave feedback signal Sfa+.

The negative phase path main loop 133c includes: a switch SWm-, a negative phase path main driver INVm- and a negative phase path main feedback resistor Rm-. The switch SWm- is selectively turned on according to the control signal Sctl. When the switch SWm- is turned on, the negative phase path main driver INVm- generates a negative phase path PWM output (PWM-) based on the negative phase path comparator output Scmp-. Then, the negative phase path main feedback resistor Rm- further converts the negative phase path PWM output (PWM-) into a negative phase path main feedback signal Sfm-.

The negative phase path slave loop 133d includes: switches SWa1-, SWa2-, negative phase path slave driver INVa- and negative phase path slave feedback resistor Ra-. Switches SWa1- and SWa2- are selectively turned on or off synchronously according to the control signal Sctl. When switches SWa1- and SWa2- are turned on at the same time, the negative phase path slave driver INVa- generates a negative phase drive signal (Sdrv-) based on the negative phase path comparator output Scmp-. Then, the negative phase path slave feedback resistor Ra- further converts the negative phase drive signal (Sdrv-) into a negative phase path slave feedback signal Sfa-.

According to the embodiment of the present invention, the positive phase path main loop 135c and the positive phase path slave loop 135d are not turned on at the same time; and the negative phase path main loop 133c and the negative phase path slave loop 133d are not turned on at the same time. In addition, the positive phase path main loop 135c and the negative phase path main loop 133c are turned on at the same time; and the positive phase path slave loop 135d and the negative phase path slave loop 133d are turned on at the same time. For ease of description, the conduction states of each switch are summarized as shown in Table 1.

Table 1

As can be seen from FIG. 4 , the internal circuits of the positive phase audio output circuit 135 and the negative phase audio output circuit 133 are similar and symmetrical to each other. According to the conception of the present invention, when the positive phase path main loop 135c and the negative phase path main loop 133c are turned on at the same time, the positive phase path slave loop 135d and the negative phase path slave loop 133d are turned off at the same time. Conversely, when the positive phase path main loop 135c and the negative phase path main loop 133c are turned off at the same time, the positive phase path slave loop 135d and the negative phase path slave loop 133d are turned on at the same time. For ease of understanding, FIG. 8A is used here to illustrate the equivalent circuit of the audio amplifier circuit 13 when the positive phase path main loop 135c and the negative phase path main loop 133c are turned off at the same time, and the positive phase path slave loop 135d and the negative phase path slave loop 133d are turned on at the same time. FIG. 8B shows an equivalent circuit of the audio amplifier circuit 13 when the positive phase path main loop 135 c and the negative phase path main loop 133 c are turned on at the same time, and the positive phase path slave loop 135 d and the negative phase path slave loop 133 d are turned off at the same time.

Please refer to FIG8A, which is a circuit diagram of an audio amplifier circuit according to an embodiment of the present invention, in which the main feedback path is disconnected and the slave feedback path is turned on. Since the positive phase path main loop 135c and the negative phase path main loop 133c are disconnected at the same time, the positive phase path main loop 135c and the negative phase path main loop 133c are not shown here. In FIG8A, only the positive phase slave loop circuit 135d and the negative phase path slave loop circuit 133d and the operation of the modulation signal generating circuit 131 are related.

In the positive phase path slave loop 135d, switches SWa1+ and SWa2+ are both turned on. The positive phase path slave driver INVa+ receives the positive phase path comparator output Scmp+ due to the conduction of switch SWa1+, and the positive phase path adder 135a receives the positive phase path slave feedback signal Sfa+ generated by the positive phase path slave loop 135d due to the conduction of switch Swa2+. At this time, the positive phase path feedback signal Sf+ is the positive phase path slave feedback signal Sfa+ (Sf+＝Sfa+). Furthermore, the positive phase path error signal Serr+ received by the modulation signal generating circuit 131 is the difference between the positive phase analog differential input Va+ and the positive phase path slave feedback signal Sfa+.

In the negative phase path slave loop 133d, switches SWa1- and SWa2- are both turned on. The negative phase path slave driver INVa- receives the negative phase path comparator output Scmp- due to the conduction of switch SWa1-, and the negative phase path adder 133a receives the negative phase path slave feedback signal Sfa- generated by the negative phase path slave loop 133d due to the conduction of switch Swa2-. At this time, the negative phase path feedback signal Sf- is the negative phase path slave feedback signal Sfa- (Sf- = Sfa-). Furthermore, the negative phase path error signal Serr- received by the modulation signal generating circuit 131 is the difference between the negative phase analog differential input Va- and the negative phase path slave feedback signal Sfa-.

Since the positive phase path slave loop 135d and the negative phase path slave loop 133d are not used to output the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-), but are directly connected and fed back to the positive phase path adder 135a and the negative phase path adder 133a. Therefore, if the switches SWm+, SWm-, SWa1+, SWa2+, SWa1-, and SWa2- of the audio amplifier circuit 13 are in the setting state shown in FIG. 8A, the speaker 15 will not receive the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-). Therefore, the speaker 15 will not make any sound.

Please refer to FIG8B, which is a circuit diagram of an audio amplifier circuit according to an embodiment of the present invention, in which the main feedback path is turned on and the feedback path is turned off. Since the positive phase path slave loop 135d and the negative phase path slave loop 133d are disconnected at the same time, the positive phase path slave loop 135d and the negative phase path slave loop 133d are not shown here. In FIG8B, only the positive phase main loop circuit 135c and the negative phase path main loop circuit 133c and the modulation signal generating circuit 131 are related to the operation.

In the positive phase path main loop 135c, the switch SWm+ is turned on. Due to the conduction of the switch SWm+, the positive phase path main driver INVm+ receives the positive phase path comparator output Scmp+ and generates a positive phase path PWM output (PWM+). The positive phase path adder 135a receives the positive phase path main feedback signal Sfm+ generated by the positive phase path main loop 135c. At this time, the positive phase path feedback signal Sf+ is the positive phase path main feedback signal Sfm+ (Sf+＝Sfm+). Furthermore, the positive phase path error signal Serr+ received by the modulation signal generating circuit 131 is the difference between the positive phase analog differential input Va+ and the positive phase path main feedback signal Sfm+.

In the negative phase path main loop 133c, the switch SWm- is turned on. The negative phase path main driver INVm- receives the negative phase path comparator output Scmp- due to the conduction of the switch SWm- and generates a negative phase path PWM output (PWM-). The negative phase path adder 133a receives the negative phase path main feedback signal Sfm- generated by the negative phase path main loop 135c. At this time, the negative phase path feedback signal Sf- is the negative phase path main feedback signal Sfm- (Sf- = Sfm-). Furthermore, the negative phase path error signal Serr- received by the modulation signal generating circuit 131 is the difference between the negative phase analog differential input Va- and the negative phase path main feedback signal Sfm-.

Since the positive phase path main loop 135c and the negative phase path main loop 133c are used to output the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-), if the audio amplifier circuit 13 is in the state shown in FIG. 8B , the speaker 15 will emit sound according to the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-).

Please refer to Figures 9A and 9B, which are flowcharts of dynamically selecting a feedback path according to the state of the audio output module according to the audio amplifier circuit of the present disclosure. Please also refer to Figures 5A, 5B, 8A, 8B, 9A and 9B.

First, in step S201, the audio output module 10 is enabled. Next, in step S203, when the audio output module 10 is in the power-on transient period Ton_tr, the audio control circuit 12 generates a control signal Sctr for switching the switch state to the audio amplifier circuit 13, so that the audio amplifier circuit 13 is in the state shown in FIG8A. During the power-on transient period Ton_tr, the modulation signal generating circuit 131 has not yet reached stability. At the same time, the audio amplifier circuit 13 can use the positive phase path from the loop 135d and the negative phase path from the loop 133d for feedback to avoid generating unexpected positive phase path PWM output (PWM+) and negative phase path PWM output (PWM-). That is, during the power-on transient period Ton_tr, the positive phase path from the loop 135d and the negative phase path from the loop 133d can be used to avoid popping sound.

Next, in step S205, the audio control circuit 12 determines whether the audio output module 10 is switched to the normal operation mode. If not, the step S203 is repeated. If the determination result of step S205 is positive, the process proceeds to step S207. In step S207, it is further determined whether to perform the pre-shipment calibration procedure. If the determination result of step S207 is positive, the process proceeds to step S209. Please also note that step S209 is performed by the manufacturer of the audio playback device before the audio playback device is shipped. When the user generally operates, the determination result of step S207 is preset to be negative.

Step S209 further includes the following steps. First, in step S209a, it is determined whether the speaker 15 emits a popping sound. If not, the calibration procedure ends. If the determination result of step S209a is positive, the procedure proceeds to step S209b. In step S209b, it is further determined whether the positive phase path PWM output (PWM+) leads the negative phase path PWM output (PWM-). If the determination result of step S209b is positive, the procedure proceeds to step S209c. In step S209c, the capacitance value of the positive phase shift circuit 135b is increased. If the determination result of step S209b is negative, the procedure proceeds to step S209d. In step S209d, the capacitance value of the negative phase shift circuit 133b is increased. In addition, in the calibration procedure, the capacitance value of the positive phase shift circuit 135b or the negative phase shift circuit 133b may be adjusted several times, so step S209 may be selectively repeated depending on the calibration process.

If the judgment result of step S207 is negative, it means that the audio amplifier circuit 13 is in the general playback period Top, and the process proceeds to step S211. At this time, in step S211, the audio control circuit 12 generates a control signal Sctrl for switching the switch state to the audio amplifier circuit 13, so that the audio amplifier circuit 13 is in the state shown in Figure 8B. Then, in step S213, the audio control circuit 12 determines whether the audio output module 10 is to be turned off. If the judgment result of step S213 is negative, the audio amplifier circuit 13 maintains the setting state of step S211.

If the result of the judgment in step S213 is positive, the process proceeds to step S215. In step S215, the audio control circuit 12 generates a control signal to the audio amplifier circuit 13 to turn off all switches. According to the concept of the present invention, the arrangement of the positive phase path from the loop 135d and the negative phase path from the loop 133d can avoid the popping sound phenomenon during the startup period due to the modulation signal generating circuit 131 not yet reaching stability. On the other hand, during the shutdown transient period Toff_tr, since the operation of the modulation signal generating circuit 131 is already quite stable, in step S215, the switches SWa1-, SWa2-, SWm-, SWa1+, SWa2+, and SWm+ in the audio amplifier circuit 13 can be all turned off.

According to the above description, the present invention can dynamically set the capacitance value of the positive phase shift circuit and the negative phase phase shift circuit in response to the leading and lagging conditions of the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-). Once the originally leading signal is delayed, the phenomenon of the PWM output voltage difference (PWM+)-(PWM-) causing the popping sound due to the phase inconsistency between the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-) can be suppressed. Alternatively, once the originally lagging signal is advanced, the phenomenon of the PWM output voltage difference (PWM+)-(PWM-) causing the popping sound due to the phase inconsistency between the positive phase path PWM output (PWM+) and the negative phase path PWM output (PWM-) can be suppressed. Based on the time difference derived from the impedance mismatch, the generation time of the originally leading signal can be delayed by adjusting the capacitance value, so as to achieve the effect of suppressing the popping sound at the moment of starting and shutting down. In addition, by setting the positive phase path slave loop and the negative phase path slave loop, the popping sound generated during the transition period of waiting for the voltage of the modulation signal generating circuit 131 to stabilize can be reduced during the startup transient period Ton_tr.

Of course, the present invention may have many other embodiments. Without departing from the spirit and essence of the present invention, those skilled in the art may make various corresponding changes and modifications based on the present invention, but these corresponding changes and modifications should all fall within the scope of protection of the claims attached to the present invention.

Claims (17)

1. An audio amplification circuit, comprising:

A modulation signal generating circuit for generating a first path comparator output after integrating and modulating a first path error signal, and generating a second path comparator output after integrating and modulating a second path error signal;

a first audio output circuit comprising:

A first path adder, electrically connected to the modulation signal generating circuit, for subtracting a first path feedback signal from a first analog differential input to generate the first path error signal;

a first phase shift circuit for selectively adjusting the phase of the output of the first path comparator; and

At least one first path loop electrically connected to the modulation signal generation circuit, the first path adder and the first phase shift circuit, and generating the first path feedback signal according to the output of the first path comparator; and

A second audio output circuit comprising:

a second path adder, electrically connected to the modulation signal generating circuit, for subtracting a second path feedback signal from a second analog differential input to generate the second path error signal;

a second phase shift circuit for selectively adjusting the phase of the output of the second path comparator; and

At least one second path loop electrically connected to the modulation signal generating circuit, the second path adder and the second phase shift circuit for generating the second path feedback signal according to the output of the second path comparator.

2. The audio amplifier circuit of claim 1, wherein the at least one first path loop comprises:

a first path main loop comprising:

A first path main loop switch electrically connected to the modulation signal generating circuit and the first phase shifting circuit, which is selectively turned on;

The first path main driver is electrically connected with the first path main loop switch and drives the first path comparator to output and generate a first path pulse width modulation signal when the first path main loop switch is turned on; and

And the first path main feedback resistor is electrically connected with the first path main driver and the first path adder and converts the first path pulse width modulation signal into the first path feedback signal.

3. The audio amplifier circuit of claim 2, wherein the at least one second path loop comprises:

a second path main loop comprising:

a second path main loop switch electrically connected to the modulation signal generating circuit and the second phase shift circuit, which is selectively turned on;

A second path main driver electrically connected to the second path main loop switch, for driving the second path comparator to output a second path pulse width modulation signal when the second path main loop switch is turned on; and

And the second path main feedback resistor is electrically connected with the second path main driver and the second path adder and converts the second path pulse width modulation signal into the second path feedback signal.

4. The audio amplifier circuit of claim 3, wherein the first path main loop switch is turned on simultaneously with the second path main loop switch.

5. The audio amplifier circuit of claim 3, wherein the first phase shift circuit is configured to delay the phase of the first path comparator output when the phase of the first path pwm signal leads the phase of the second path pwm signal.

6. The audio amplifier circuit of claim 3, wherein the second phase shifting circuit is configured to delay the phase of the second path comparator output when the phase of the first path pwm signal lags the phase of the second path pwm signal.

7. The audio amplifier circuit of claim 1, wherein the at least one first path loop comprises:

a first path slave loop, comprising:

a first path slave loop switch electrically connected to the first phase shift circuit, which is selectively turned on;

A first path slave driver electrically connected to the first path slave loop switch for driving the first path error signal to generate a first driving signal when the first path slave loop switch is turned on;

a second first path slave loop switch electrically connected to the first path slave loop resistor, which is selectively turned on; and

The first path slave loop resistor is electrically connected with the first path slave driver and the second first path slave loop switch, and converts the first driving signal into the first path feedback signal when the second first path slave loop switch is turned on.

8. The audio amplifier circuit of claim 7, wherein the at least one second path loop comprises:

A second path slave loop, comprising:

a first and second path slave loop switch electrically connected to the second phase shift circuit, which is selectively turned on;

a second path slave driver electrically connected to the first and second path slave loop switches for driving the second path error signal to generate a second driving signal when the first and second path slave loop switches are turned on;

A second path slave loop switch electrically connected to the second path slave loop resistor, which is selectively turned on; and

And the second path slave loop resistor is electrically connected with the second path slave driver and the second path slave loop switch and converts the second driving signal into the second path feedback signal when the second path slave loop switch is conducted.

9. The audio amplification circuit of claim 8, wherein the first path slave loop switch, the second first path slave loop switch, the first second path slave loop switch, and the second path slave loop switch are turned on simultaneously.

10. The audio amplifier circuit of claim 1, wherein the first phase shift circuit is a variable capacitor.

11. The audio amplifier circuit of claim 1, wherein the first phase shift circuit comprises:

A first capacitor path electrically connected to the modulation signal generating circuit and the at least one first path loop, and comprising a first capacitor and a first switch connected in series; and

And a second capacitor path electrically connected to the modulation signal generating circuit and the at least one first path loop, comprising a second capacitor and a second switch connected in series, wherein the first capacitor path and the second capacitor path are connected in parallel.

12. The audio amplifier circuit of claim 11, wherein the capacitance of the first capacitor is not equal to the capacitance of the second capacitor.

13. A control method for an audio amplifying circuit, comprising the steps of:

an audio amplifying circuit integrates and modulates a first path error signal and a second path error signal to generate a first path comparator output and a second path comparator output respectively;

the audio amplifying circuit generates the first path error signal according to a first analog differential input and a first path feedback signal;

The audio amplifying circuit generates the second path error signal according to a second analog differential input and a second path feedback signal;

the audio amplifying circuit generates the first path feedback signal and the second path feedback signal according to the output of the first path comparator and the output of the second path comparator respectively; and

The audio amplifying circuit selectively adjusts a phase of one of the first path comparator output and the second path comparator output.

14. A bridge-tied load (BTL) class D power amplifier for driving a speaker, the bridge-class D power amplifier comprising:

A first half bridge comprising:

a first path adder for subtracting a first path feedback signal from a first analog differential input to generate a first path error signal, wherein the first path error signal is integrated and modulated to generate a first path comparator output;

a first phase shift circuit for selectively adjusting the phase of the output of the first path comparator; and

At least one first path loop for generating a first pwm signal and the first path feedback signal according to the output of the first path comparator; and

A second half-bridge, wherein the first half-bridge and the second half-bridge jointly drive the speaker in response to the first PWM signal and the second PWM signal, respectively

A phase error formed between the first PWM signal and the second PWM signal is related to noise of the speaker.

15. The bridge load class D power amplifier of claim 14, wherein the second half-bridge comprises:

a second phase shift circuit for shifting the phase of the second PWM signal.

16. The bridge load class D power amplifier of claim 15, wherein the first phase shift circuit and the second phase shift circuit are each configured to provide a plurality of capacitance values.

17. The bridge load class D power amplifier of claim 16, further comprising:

a modulation signal generating circuit for providing the first PWM signal and the second PWM signal,

The first phase shift circuit is electrically connected to a first output end of the modulation signal generating circuit, and the second phase shift circuit is electrically connected to a second output end of the modulation signal generating circuit.