CN115118346A - Communication method and device - Google Patents

Abstract

The application provides a communication method and a communication device, the method is suitable for a data center interconnection scene, and the method comprises the following steps: the second device receives a second signal from the first device, wherein the second signal is obtained by modulating the first carrier signal by the first device by using the first signal; the second equipment carries out frequency mixing on the second signal and the second carrier signal to obtain a third signal, the second carrier signal and the first carrier signal meet a first frequency difference value, the first frequency difference value enables a third component of the third signal to pass through a DC blocking circuit of the second equipment, the third component corresponds to a first component of the second signal, and the first component and the first carrier signal have the same frequency. By the method, the influence of a blocking circuit of the second equipment on the level demodulation of the baseband signal can be avoided, and the unipolar characteristic of the level of the baseband signal can be kept end to end, so that low-complexity coherent reception is realized.

Description

Communication method and device

technical field

The present application relates to the field of communication, and more particularly to a communication method and apparatus.

Background technique

In the scenario of data center interconnection, high-speed data signals need to be transmitted between different boards and cabinets. By utilizing a terahertz active cable (TAC) and a terahertz transceiver module with a standard package size, high-capacity and low-cost data transmission can be realized between data ports in different locations.

In this terahertz interconnection system, the terahertz transmission module receives the high-speed serializer/deserializer (serializer/deserializer, Ser/Des) signal input from the external port, modulates it to the terahertz frequency band, and then modulates the The resulting terahertz signal is transmitted to the remote receiving module through the terahertz transmission line; the terahertz receiving module extracts the baseband signal from the terahertz modulated signal by down-conversion and other methods, and then retimes and reshapes the baseband signal. The output port output of the receiving module.

To support high-speed data transmission, interconnected devices need to use large-bandwidth baseband signals, such as 12.5GHz and 25GHz. In terahertz receiving equipment, in order to realize the amplification of large bandwidth baseband signals, AC coupling is adopted between multi-stage cascaded baseband amplifier circuits to reduce the difficulty of signal matching between cascaded amplifiers. This AC-coupled signal transmission method is equivalent to adding a DC-blocking filter with high-pass characteristics to the receiving channel.

The DC blocking filter will filter out the DC and some low-frequency components in the baseband signal, and change the polarity characteristics of the level distribution of the baseband signal.

Therefore, how to avoid the influence of the DC blocking circuit on the demodulation of the baseband signal level without increasing the complexity of the communication system is an urgent problem to be solved at present.

SUMMARY OF THE INVENTION

The present application provides a communication method and device, which can avoid the influence of the DC blocking circuit on the demodulation of the baseband signal level, and ensure that the unipolar characteristics of the baseband signal level are preserved end-to-end, thereby realizing low-complexity coherent reception. .

In a first aspect, a communication method is provided, comprising: a second device receiving a second signal from a first device, where the second signal is obtained by the first device using the first signal to modulate a first carrier signal; The second signal is mixed with the second carrier signal to obtain a third signal. The first carrier signal and the second carrier signal satisfy a first frequency difference, and the first frequency difference enables the third component of the third signal to pass through the second signal. The DC blocking circuit of the device, wherein the third component maintains a corresponding relationship with the first component of the second signal, and the first component maintains the same frequency as the first carrier signal.

The second device receives the second signal and mixes it with the second carrier signal to obtain the third signal. Since the first carrier signal and the second carrier signal satisfy the first frequency difference, the first frequency difference enables the third component of the third signal to pass through the DC blocking circuit of the second device, so that the third component can fall within the first frequency difference. In addition to the DC blocking bandwidth of the DC blocking circuit of the second device, the filtering of the third component by the DC blocking circuit of the second device is avoided, thereby ensuring that the unipolar characteristics of the baseband signal level value are preserved end-to-end, and without increasing the complexity of the system.

Through the above technical solutions, the present application realizes the end-to-end retention of the unipolarity of the level in the baseband signal, and can realize the demodulation decision of the signal under the condition of ignoring the phase difference of the transceiving carrier. This method can not only obtain high sensitivity of coherent demodulation, but also avoid the high complexity cost of carrier synchronization.

其中，B是隔直电路的隔直带宽，f₁是第一载波信号的频率的偏移量，f₂是第二载波信号的频率的偏移量，S是第一信号的带宽，ΔF是第一频率差值。With reference to the first aspect, in some implementations of the first aspect, the first frequency difference ΔF satisfies:

Among them, B is the DC blocking bandwidth of the DC blocking circuit, f ₁ is the frequency offset of the first carrier signal, f ₂ is the frequency offset of the second carrier signal, S is the bandwidth of the first signal, ΔF is first frequency difference.

By artificially offsetting the frequency difference between the first carrier signal and the second carrier signal, the third component can be located outside the DC blocking bandwidth of the DC blocking circuit, and by reasonably adjusting the frequency difference between the first carrier signal and the second carrier signal On the one hand, the filtering of the third component by the DC blocking circuit can be avoided, and it can also ensure that the third signal does not deviate from the bandwidth range of the received signal.

With reference to the first aspect, in some implementations of the first aspect, the level distribution of the first baseband signal corresponding to the second signal is unipolar.

By ensuring that the phase of the level distribution of the received signal and the transmitted signal is the same, the corresponding relationship between the received signal and the transmitted signal can be determined, thereby facilitating the second device to correctly demodulate the received signal and obtain the transmitted signal.

其中，

是第二信号，S_[t]是第二信号对应的第一基带信号，D是直流分量，X_[t]是第一信号的交流分量，

是第一分量，

是第二分量，该第二分量是第一设备使用第一信号的交流分量对第一载波信号进行调制得到，D·exp^jtΔF是第三分量，ΔF等于F₁-F₂，F₁是第一载波信号的频率，F₂是第二载波信号的频率。In conjunction with the first aspect, in some implementations of the first aspect, the third signal R _[t] satisfies:

in,

is the second signal, S _[t] is the first baseband signal corresponding to the second signal, D is the DC component, X _[t] is the AC component of the first signal,

is the first component,

is the second component, which is obtained by the first device using the AC component of the first signal to modulate the first carrier signal, D·exp ^jtΔF is the third component, ΔF is equal to F ₁ -F ₂ , and F ₁ is the first The frequency of one carrier signal, F2 is the frequency of the _second carrier signal.

With reference to the first aspect, in some implementations of the first aspect, the method further includes: the second device uses a DC blocking circuit to perform DC blocking processing on the third signal to obtain a fourth signal; the second device performs amplitude detection and demodulation Fourth signal.

In the above technical solution, the second device demodulates the fourth signal through an amplitude detection method that is insensitive to phase changes, which can ensure that the first signal is recovered and demodulated from the amplitude of the fourth signal.

With reference to the first aspect, in some implementations of the first aspect, the method further includes: the second device uses a DC blocking circuit to perform DC blocking processing on the third signal to obtain a fourth signal; the second device performs DC blocking on the fourth signal forward equalization processing to obtain a fifth signal; the second device demodulates the fifth signal through amplitude detection to obtain a sixth signal; or, the second device performs continuous time linear equalization processing on the fourth signal to obtain a fifth signal; the second The device demodulates the fifth signal through amplitude detection to obtain the sixth signal.

When the terahertz modulated signal is damaged due to the band-limiting effect, frequency selective fading and chromatic dispersion of the transmission channel, forward equalization or continuous time linear equalization can effectively compensate for the intersymbol interference generated by the transmission impairment. Restore the original waveform of the transmitted signal.

With reference to the first aspect, in some implementations of the first aspect, after the second device demodulates the fifth signal through amplitude detection, the second device further includes: the second device performs clock data recovery processing on the sixth signal.

The clock data restorer can recover the clock information of the transmitted signal from the received signal waveform, and use the clock information to sample and reconstruct the degraded or distorted signal waveform, regenerate a high-quality standard signal eye diagram, and eliminate the terahertz channel. The influence of the transmission effect on the quality of the external output signal of the receiving module.

With reference to the first aspect, in some implementations of the first aspect, the method further includes: the second device uses a DC blocking circuit to perform DC blocking processing on the third signal to obtain a fourth signal; the second device performs DC blocking on the fourth signal Analog-to-digital conversion is performed to obtain the seventh signal; the second device performs self-adaptive equalization processing on the seventh signal to obtain the eighth signal; the second device demodulates the eighth signal through amplitude detection to obtain the ninth signal.

In the above technical solution, the adaptive equalizer can well compensate the uneven amplitude-frequency response and nonlinear phase-frequency response in the TAC and terahertz circuits, and minimize problems such as inter-symbol string codes in the output signal.

With reference to the first aspect, in some implementations of the first aspect, after the second device demodulates the eighth signal through amplitude detection, the method further includes: the second device performs clock data recovery processing on the ninth signal.

In the above technical solution, by performing clock data recovery processing on the demodulated first signal, the level and clock edge of the baseband signal can be recovered and reconstructed, and the high-quality standard signal eye diagram can be regenerated to eliminate the terahertz channel. The influence of the transmission effect on the quality of the external output signal of the receiving module.

满足：

其中，H_[t]是隔直电路的时域冲击响应，

为卷积运算符号。In conjunction with the first aspect, in some implementations of the first aspect, the fourth signal

Satisfy:

where H _[t] is the time domain impulse response of the DC blocking circuit,

is the convolution operation symbol.

With reference to the first aspect, in some implementations of the first aspect, the second signal is obtained by modulating the first carrier signal with the first signal according to a first modulation method, and the first modulation method includes: using an AC component to modulate the first carrier signal. A carrier signal is modulated to obtain a second component; a fourth component is coupled to the second component through carrier leakage to obtain a second signal.

Through the above modulation method, the present application can construct a carrier component with a specific amplitude and phase in the modulated second signal when the DC component is missing in the input first signal, so that the modulation effect is equivalent to a The effect of modulating the first carrier by the first signal of the DC component, and the equivalent first signal including the DC component also has a unipolar level distribution, thus satisfying the conditions for the characteristics of the transmitted signal in this application, that is, The level distribution of the first baseband signal has a unipolar characteristic.

In a second aspect, a communication method is provided, including: a first device modulates a first carrier signal with a first signal to obtain a second signal; the first device sends a second signal to a second device, wherein the first The device modulates the first carrier signal with the first signal according to the first modulation mode to obtain the second signal, and the first modulation mode includes: using the AC component of the first signal to modulate the first carrier signal to obtain the second component; The fourth component is coupled to the second component through carrier leakage to obtain a second signal, and the frequencies of the fourth component and the carrier in the second component are the same frequency and in phase or the same frequency and opposite phase.

Through the above modulation method, the present application can construct a carrier component with a specific amplitude and phase in the modulated second signal when the DC component is missing in the input first signal, so that the modulation effect is equivalent to a The effect of modulating the first carrier by the first signal of the DC component, and the equivalent first signal including the DC component also has a unipolar level distribution, thus satisfying the conditions for the characteristics of the transmitted signal in this application, that is, The level distribution of the first baseband signal has a unipolar characteristic.

In a third aspect, a communication device is provided, comprising: a transceiver unit for receiving a second signal from a first device, where the second signal is obtained by the first device using the first signal to modulate a first carrier signal; a processing unit , used to mix the second signal and the second carrier signal to obtain a third signal, the second carrier signal and the first carrier signal satisfy the first frequency difference, and the first frequency difference makes the third component of the third signal Through the DC blocking circuit of the second device, the third component maintains a corresponding relationship with the first component of the second signal, and the first component maintains the same frequency as the first carrier signal.

其中，B是隔直电路的隔直带宽，f₁是第一载波信号的频率的偏移量，f₂是第二载波信号的频率的偏移量，S是第一信号的带宽，ΔF是第一频率差值。With reference to the third aspect, in some implementations of the third aspect, the first frequency difference ΔF satisfies:

Among them, B is the DC blocking bandwidth of the DC blocking circuit, f ₁ is the frequency offset of the first carrier signal, f ₂ is the frequency offset of the second carrier signal, S is the bandwidth of the first signal, ΔF is first frequency difference.

With reference to the third aspect, in some implementations of the third aspect, the level distribution of the first baseband signal corresponding to the second signal is unipolar.

其中，

是第二信号，S_[t]是第二信号对应的第一基带信号，D是直流分量，X_[t]是第一信号的交流分量，

是第一分量，

是第二分量，第二分量是第一设备使用第一信号的交流分量对第一载波信号进行调制得到，D·exp^jtΔF是第三分量，ΔF等于F₁-F₂，F₁是第一载波信号的频率，F₂是第二载波信号的频率。In conjunction with the third aspect, in some implementations of the third aspect, the third signal R _[t] satisfies:

in,

is the second signal, S _[t] is the first baseband signal corresponding to the second signal, D is the DC component, X _[t] is the AC component of the first signal,

is the first component,

is the second component, the second component is obtained by modulating the first carrier signal by the first device using the AC component of the first signal, D·exp ^jtΔF is the third component, ΔF is equal to F ₁ -F ₂ , and F ₁ is the first The frequency of the carrier signal, F2 is the frequency of the _second carrier signal.

With reference to the third aspect, in some implementations of the third aspect, the device further includes: a DC blocking circuit, configured to perform DC blocking processing on the third signal to obtain a fourth signal; a signal processor, configured to detect the amplitude The fourth signal is demodulated, the DC blocking circuit is connected with the signal processor, and the DC blocking circuit is connected with the processing unit.

With reference to the third aspect, in some implementations of the third aspect, the device further includes: a DC blocking circuit, configured to perform DC blocking processing on the third signal to obtain a fourth signal; a filter, configured to The fourth signal is subjected to forward equalization processing to obtain the fifth signal; or, used for performing continuous time linear equalization processing on the fourth signal to obtain the fifth signal; the signal processor is used to demodulate the fifth signal through amplitude detection to obtain the fifth signal. Six signals; the filter is connected with the DC blocking circuit, and the filter is connected with the signal processor.

With reference to the third aspect, in some implementations of the third aspect, the apparatus further includes: a clock data recovery device CDR, configured to perform clock data recovery processing on the sixth signal, and the CDR is connected to the signal processor.

With reference to the third aspect, in some implementations of the third aspect, the device further includes: a DC blocking circuit, configured to perform DC blocking processing on the third signal to obtain a fourth signal; an analog-to-digital converter ADC, configured to The fourth signal is subjected to analog-to-digital conversion processing to obtain the seventh signal; the adaptive equalizer is used to perform adaptive equalization processing on the seventh signal to obtain the eighth signal; the signal processor is used to demodulate the eighth signal through amplitude detection , the ninth signal is obtained; the ADC is connected with the DC blocking circuit, the adaptive equalizer is connected with the ADC, and the adaptive equalizer is connected with the signal processor.

With reference to the third aspect, in some implementations of the third aspect, the apparatus further includes: a clock data recovery device CDR, configured to perform clock data recovery processing on the ninth signal, the CDR is connected to the signal processor, the CDR Connect with this ADC.

满足：

其中，H_[t]是隔直电路的时域冲击响应，

为卷积运算。In conjunction with the third aspect, in some implementations of the third aspect, the fourth signal

Satisfy:

where H _[t] is the time domain impulse response of the DC blocking circuit,

is a convolution operation.

With reference to the third aspect, in some implementations of the third aspect, the second signal is obtained by modulating the first carrier signal with the first signal according to a first modulation method, and the first modulation method includes: using an AC component to modulate the The first carrier signal is modulated to obtain the second component; the fourth component is coupled to the second carrier component through carrier leakage to obtain the second signal, and the fourth component and the carrier frequency in the second component are the same frequency and phase or the same frequency inversion.

In a fourth aspect, a communication device is provided, including: a processing unit configured to modulate a first carrier signal with a first signal to obtain a second signal; and configured to use the first signal to modulate the first carrier signal according to a first modulation method The signal is modulated to obtain the second signal, and the first modulation method includes: using the AC component in the first signal to modulate the first carrier signal to obtain the second component; and coupling the fourth component to the second component through carrier leakage to obtain the first signal. For the second signal, the carrier frequencies in the fourth component and the second component are the same frequency and in phase or the same frequency and opposite phase; the transceiver unit is also used for sending the second signal to the second device.

In a fifth aspect, a communication system is provided, comprising: a first device and a second device, and the first device executes the first aspect and the method in any possible implementation manner of the first aspect, and the second device The method described in the second aspect is performed.

In a sixth aspect, a communication device is provided, comprising a processor and a memory, the processor is coupled to the memory, the memory is used to store a computer program or instructions, and the processor is used to execute the computer program in the memory or The instruction causes the method described in the first aspect and any one of the possible implementation manners of the first aspect to be performed.

A seventh aspect provides a communication device, characterized by comprising a processor and a memory, wherein the processor is coupled to the memory, the memory is used for storing computer programs or instructions, and the processor is used for executing all the operations in the memory. the computer program or instructions, so that the method described in the second aspect is performed.

In an eighth aspect, a chip system is provided, including: a processor and a communication interface for calling and running a computer program from a memory, so that a communication device installed with the chip system executes any one of the first aspect and the first aspect A method of any of the possible implementations.

In a ninth aspect, a chip system is provided, comprising: a processor and a communication interface for calling and running a computer program from a memory, so that a communication device installed with the chip system executes the method in the second aspect.

Description of drawings

FIG. 1 is a schematic diagram of a communication scenario provided by the present application.

FIG. 2 is a schematic diagram of a communication method provided by the present application.

FIG. 3 is a schematic diagram of a spectrum shifting provided by the present application.

FIG. 4 is a schematic diagram of a communication method provided by the present application.

FIG. 5 is a schematic diagram of a communication method provided by the present application.

FIG. 6 is a schematic block diagram of a communication apparatus provided by the present application.

FIG. 7 is a schematic block diagram of a communication apparatus provided by the present application.

FIG. 8 is a schematic block diagram of a communication apparatus provided by the present application.

FIG. 9 is a schematic block diagram of a communication apparatus provided by the present application.

FIG. 10 is a schematic block diagram of a communication apparatus provided by the present application.

FIG. 11 is a schematic block diagram of a communication device provided by the present application.

FIG. 12 is a schematic block diagram of a communication device provided by the present application

Detailed ways

The technical solutions in the present application will be described below with reference to the accompanying drawings.

FIG. 1 shows a schematic diagram of a communication scenario provided by this application.

In the data center interconnection scenario shown in Figure 1, high-speed data signals need to be transmitted between different boards and cabinets. This can be achieved by using TAC and terahertz modules with standard package sizes to achieve data at different locations. High-capacity and low-cost data transmission between ports.

However, in this terahertz interconnection system, the transmitter can directly modulate the input signal to the terahertz frequency band, and then transmit the modulated terahertz signal to the receiver through the terahertz transmission line. Correspondingly, the receiving end demodulates it by frequency mixing or envelope detection, but this demodulation method will deteriorate the signal-to-noise ratio of the received signal, and will lose the information of the quadrature component in the channel response, resulting in the sensitivity of the receiver. and channel equalization is incomplete, which in turn will shorten the transmission distance that the terahertz interconnect module can support.

In view of the above problems, the present application provides a new coherent transceiving method for a terahertz interconnection module, which can avoid the influence of the DC blocking circuit at the receiving end on the demodulation of the baseband signal level, and can ensure that the baseband signal is retained end-to-end. Medium-level unipolar characteristics, and can achieve low-complexity coherent reception.

A communication method provided by the present application will be described below with reference to the accompanying drawings.

FIG. 2 shows a schematic flow chart of a communication method provided by the present application. The execution subjects of the communication method are a first device and a second device.

The first device and the second device may be devices, devices, or modules in a terahertz interconnection system, such as an upgraded version of a gigabit interface converter (gigabit interface converter, GBIC), that is, a small form factor pluggable (small form factor) pluggables, SFP) type GBIC, it can also be a four-channel SFP interface (quad smallform factor pluggable) type converter, it can also be a pluggable network interface module of various specifications, etc., or it can be other devices with similar functions. Or an apparatus or a module, which is not limited in this application.

For convenience of description, this application refers to one of the interface modules as the first device, and the other interface module as the second device.

The specific flow of the communication method is shown in Figure 2:

S210, the first device modulates the first carrier signal by using the first signal to obtain the second signal.

S220, the first device sends a second signal to the second device.

S230, the second device mixes the second signal and the second carrier signal to obtain a third signal, and the second carrier signal and the first carrier signal satisfy a first frequency difference, and the first frequency difference makes the third signal The third component passes through the DC blocking circuit of the second device, and the third component corresponds to the first component of the second signal, and the first component has the same frequency as the first carrier signal.

It should be understood that the second device mixes the second signal and the second carrier signal to obtain the third signal, and the specific process is as follows: the second device mixes the first component of the second signal and the second carrier signal to obtain the first component of the second signal. For the third component in the three signals, the second device mixes the second component of the second signal with the second carrier signal to obtain the fourth component in the third signal, and the third component is in a corresponding relationship with the first component.

The first device modulates the first carrier signal with the first signal to obtain the second signal. The second signal is a modulated signal and is a high-frequency signal, and the first signal is an external input signal received by the first device, that is, a signal to be transmitted, that is, a baseband signal.

It should be understood that the distribution of the level value of the first baseband signal corresponding to the second signal obtained by modulation has a unipolar characteristic, and the first baseband signal corresponding to the second signal and the first signal may be the same or different.

Through the above technical solution, the present application can avoid the influence of the DC blocking circuit of the second device on the demodulation of the baseband signal level, and can ensure that the unipolar characteristic of the baseband signal level is preserved end-to-end. is positive or negative, and can achieve low-complexity coherent reception.

For the convenience of description, the embodiment of the present application uses an externally input Ser/Des signal as the first signal as an example for description, but this description method does not have a limiting effect.

It should be understood that the externally input Ser/Des signal may include a DC component and an AC component, and the distribution of its level values may have bipolar characteristics or unipolar characteristics, which are not limited in this application. For ease of description, the present application uses the first signal having a DC component, an AC component, and a unipolar level distribution feature as an example to describe the technical solution of the present application, but the description method is not limiting.

On the one hand, in the aforementioned step S210, the first device modulates the first carrier signal by using the first signal, wherein the first device may use the first signal to modulate the first carrier signal in a direct modulation manner, and the direct modulation The modulation mode can retain the DC component in the first signal, and the specific process is as follows: the first device modulates the first carrier signal simultaneously by using the DC component and the AC component of the first signal, and obtains the first component and the first carrier signal in the second signal respectively. Two components, and the first component and the first carrier signal keep the same frequency. It should be understood that, for example, the direct modulation manner can be applied to the case where the first signal has a DC component.

On the other hand, in the foregoing step S210, the first device may use the first signal to modulate the first carrier signal according to the first modulation mode, and the process of the modulation mode is as follows:

a) using the AC component in the first signal to modulate the locally generated first terahertz carrier signal to obtain the terahertz modulation signal P1, that is, the second component;

b) The second signal is obtained by coupling and superimposing the fourth component into the second component, and the fourth component and the carrier frequency in the second component are kept in the same frequency and phase or the same frequency and opposite phase.

Optionally, the first device may amplify the first signal first, and then enter the modulator of the first device.

It should be understood that in the case where the first signal does not have a DC component, in order to ensure that the output signal has a unipolar level distribution feature, the present application can use the first modulation method to achieve the situation where the input first signal lacks a DC component Next, construct a carrier component of a specific amplitude and phase in the modulated second signal, so that the modulation effect is equivalent to the effect of modulating the first carrier signal by a first signal containing a DC component, and this contains a DC component. The equivalent first signal of the component also has a unipolar level distribution, so as to satisfy the condition of the transmission signal characteristic of the present application, that is, it has a unipolar level distribution characteristic. It should be understood that, by way of example, the first modulation manner may be applicable to the case where the first signal does not have a DC component.

It should be understood that whether the first device uses the first signal to modulate the first carrier signal according to the direct modulation method, or the first device uses the first signal to modulate the first carrier signal according to the first modulation method, through the above two methods. The level distributions of the first baseband signals corresponding to the obtained second signals all have unipolar characteristics.

It should be understood that the first baseband signal corresponding to the second signal obtained by the first device through the direct modulation method is the same as the first signal. For example, through the direct modulation method, the first device can retain the DC component of the first signal, but in the When the first signal has no DC component, the first baseband signal corresponding to the second signal obtained by the first device through the first modulation method is different from the first signal. A carrier component with a specific amplitude and phase is constructed in the latter second signal, so that the modulation method is equivalent to the effect of modulating the first carrier signal by a first signal including a DC component. The level distribution of the first baseband signal corresponding to the second signal obtained by the above two methods has a unipolar characteristic.

It should be understood that the second signal obtained by the above two modulation methods will include a first component and a second component, wherein the second component is that the first device modulates the first carrier signal by using the AC component in the first signal Then, the first component may be obtained by the first device modulating the first carrier signal by using the DC component in the first signal, or it may be obtained by the first device modulating the first carrier signal according to the first signal when the first signal has no DC component. When the first signal is used to modulate the first carrier signal, the fourth component is coupled and superimposed on the obtained second signal, that is, the carrier component is obtained, and the carrier component and the frequency of the carrier signal in the second signal are kept at the same frequency. , in this case, the first component is equivalent to the carrier component, that is, the first component obtained by the direct modulation method is equivalent to the fourth component obtained by the first modulation method.

The first component obtained by the above two methods and the first carrier signal maintain the same frequency, which may be the same frequency and same phase or the same frequency and opposite phase, which is not limited in this application.

The frequency of the first carrier signal may be predefined, or the frequency of the first carrier signal may be specifically set in an artificial manner, which is not limited in this application.

For the convenience of description, the frequency value of the first carrier signal can be referred to as F ₁ , the first carrier signal is generated by the adjustable phase-locked loop of the first device, and can be obtained by adjusting the frequency division ratio of the adjustable phase-locked loop from the outside. The frequency of the first carrier signal is changed to flexibly meet different frequency requirements.

The frequency of the first carrier signal can be changed by pre-setting and adjusting the frequency division ratio of the adjustable phase-locked loop, or can be adjusted at any time according to specific transmission needs, which is not limited in this application.

It should be understood that, in the aforementioned step S210, the process of modulating the first carrier signal by the first device using the first signal can be completed by a carrier-band modulator, wherein the carrier-band modulator has a reserved DC component, or is coupled to superimpose a high frequency component function.

Specifically, the modulation process can be in the following form:

#A: The carrier-band modulator may be a terahertz switching circuit or device, and the terahertz switching circuit or device will be controlled by the first signal, and then the modulator uses the first signal to phase-lock the adjustable phase locked by the first device The loop generates the first carrier signal with frequency F ₁ , that is, amplitude modulation is performed on the carrier signal with frequency F ₁ . The second signal obtained after the amplitude modulation has only the amplitude change without the phase change. Therefore, the level value distribution of the second signal has a unipolar characteristic. At the same time, the voltage level of the first baseband signal corresponding to the second signal The phase of the flat value is exactly the same as the phase of the level value of the first signal.

Exemplarily, when the input first signal is a bi-level non-return to zero (NRZ) signal, that is, the logic level of the first signal is 0 and 1, then the modulation process is performed. The first baseband signal S _[t] corresponding to the second signal obtained later has two physical level values: 0.5 and 1.5, that is, S _[t] ∈ {0.5, 1.5}. At this time, the first baseband signal contains a DC component D with an amplitude of 1, then S _[t] can be further decomposed into S _[t] =X _[t] +D, X _[t] ∈ {-0.5, 0.5 }. After modulation, the DC component with an amplitude of 1 in the first signal is moved to the frequency point F1 where the _first carrier signal is located in the frequency spectrum, that is, the first component in the second signal is obtained, and the first component is the same as this The first carrier signal maintains the same frequency. At this time, the first baseband signal corresponding to the second signal is the same as the first signal, that is, both have a unipolar characteristic of level distribution.

This type of modulation can make the phase of the level value of the first baseband signal corresponding to the second signal exactly the same as the phase of the level value of the first signal, and also retain the DC component in the first signal.

It should be understood that the DC component in the first signal is a low-frequency signal, but the first component in the second signal is a high-frequency signal and maintains the same frequency as the carrier frequency of the first carrier signal, but the first component in the second signal is a high-frequency signal. A component is obtained by the first device using the DC component D in the first signal to modulate the first carrier signal, and it maintains the same frequency as the first carrier signal.

#B: The carrier modulator can be a mixer modulator with adjustable carrier leakage. At this time, the first signal input from the input port of the first device enters the mixer after being amplified, and is mixed with the locally generated first carrier signal to obtain the second signal. It should be understood that the first signal input from the input port of the first device has no DC component, so the level distribution of the first signal entering the mixer has bipolar characteristics, that is, has balanced positive and negative levels.

Optionally, the first signal may first pass through a high pass filter (high pass filter, HPF) of the first device.

Exemplarily, when the input first signal is a four-level pulse amplitude modulation (4-level pulse amplitude modulation, PAM4) signal, the level value of the first signal at the input of the mixer belongs to the set {-1.5, -0.5, 0.5, 1.5}, the first baseband signal corresponding to the second signal output by the mixing frequency has only two level envelopes of 0.5 and 1.5, and the positive and negative level polarities in the first signal are mapped In the phase change of the terahertz modulated signal, and the first baseband signal corresponding to the second signal does not meet the requirement that all levels have the same phase.

In order to make the level value of the first baseband signal corresponding to the second signal have the unipolar characteristic of the same phase, after mixing, the second signal can be coupled and superimposed by means of carrier leakage to the second signal. The frequency of the carrier signal maintains the same-frequency and in-phase or the same-frequency and opposite-phase carrier components.

Wherein, the carrier component is obtained directly from the first carrier signal output by the adjustable phase-locked loop configured inside the first device after being amplified or attenuated. The coupling and superposition of the carrier component is equivalent to adding a DC component to the first baseband signal corresponding to the second signal after the HPF. By adjusting the gain of the carrier component, the first baseband signal corresponding to the second signal can be All levels take the same phase. For example, if the gain of the first carrier component is adjusted to 1.5, the four level amplitudes in the first baseband signal corresponding to the second signal become positive levels {0, 1, 2, 3}.

With this modulation method, the phase of the level value of the first baseband signal corresponding to the second signal can be made exactly the same as the phase of the level value of the first signal, so the second signal also has the first component.

In the aforementioned step S220, the first device transmits the second signal to the second device through the TAC.

In the foregoing step S230, the second device acquires the second signal through the TAC.

In the aforementioned step S230, the second device mixes the second signal with the second carrier signal, wherein the frequency value of the second carrier signal may be predefined or determined according to the frequency of the first carrier signal , the frequency value of the second carrier signal may also be set in an artificial manner, which is not limited in this application. The frequency value of the second carrier signal may be referred to as F ₂ .

The second carrier signal can be generated by an adjustable phase-locked loop of the second device, and the frequency of the second carrier signal can be changed by adjusting the frequency division ratio of the adjustable phase-locked loop from the outside, thereby flexibly meeting different frequency requirements.

It should be understood that there is a frequency difference between the frequency value of the second carrier signal and the frequency value of the first carrier signal, and the frequency difference can make the third component of the third signal, through the DC blocking circuit of the second device, It may pass through the DC blocking circuit of the second device without damage, or pass the DC blocking circuit with partial damage, which is not limited in this application.

The specific principle is as follows:

The second device mixes the second signal and the second carrier signal to obtain a third signal, and the third signal, that is, the baseband IQ signal, satisfies:

Among them, ΔF refers to the frequency difference between the first carrier signal and the second carrier signal, that is, ΔF=F ₁ -F ₂ . By adjusting the frequency difference between the first carrier signal and the second carrier signal, The third component in the third signal can pass through the DC blocking circuit of the second device.

是第二信号，S_[t]是第二信号对应的第一基带信号， D是直流分量，X_[t]是第一信号的交流分量，

是第一分量，

是第二分量，第二分量是第一设备使用第一信号的交流分量对第一载波信号进行调制得到， D·exp^jtΔF是第三信号的第三分量。where R _[t] is the third signal,

is the second signal, S _[t] is the first baseband signal corresponding to the second signal, D is the DC component, X _[t] is the AC component of the first signal,

is the first component,

is the second component, the second component is obtained by modulating the first carrier signal by the first device using the AC component of the first signal, and D·exp ^jtΔF is the third component of the third signal.

It should be understood that when the first device modulates the first carrier signal by using the first signal in a direct modulation manner, the first component in the second signal is that the first device modulates the first carrier signal by using the direct current component of the first signal. and get. When the first device uses the first signal to modulate the first carrier signal through the first modulation method, the superimposed carrier component is coupled to the second signal output after mixing to output the second signal, and the superimposed carrier wave is coupled. The component may correspond to the first component in the second signal.

It should be understood that the baseband IQ signal refers to a baseband signal corresponding to a pair of modulated signals that are orthogonal in the carrier phase.

In the above formula, by setting the first frequency difference, the third component of the third signal can be located outside the DC blocking range of the DC blocking circuit of the second device, that is, outside the DC blocking bandwidth, so that the isolation can be avoided. Filtering suppression of the third component by the direct circuit.

FIG. 3 shows a schematic diagram of spectrum shifting provided by the present application. As shown in FIG. 3 , the second device mixes the second signal with the second carrier signal, and the second carrier signal and the first carrier signal have a first frequency difference, and the first frequency difference makes the third component Through the DC blocking circuit of the second device, the third component falls outside the DC blocking bandwidth of the DC blocking circuit of the second device.

In addition, the frequency difference ΔF between the first carrier signal and the second carrier signal needs to satisfy the following relationship:

Among them, f ₁ refers to the offset of the frequency of the first carrier signal, that is, when the actual system is working, the frequency of the terahertz carrier at the transmitting end varies within the range of F ₁ ±f ₁ , and f ₂ refers to the frequency of the second carrier signal. The frequency offset, that is, when the actual system is working, the frequency of the terahertz carrier at the receiving end varies within the range of F ₂ ±f ₂ , B refers to the DC blocking bandwidth of the DC blocking circuit, and S is the bandwidth of the first signal.

At the same time, since the bandwidth of the receiving channel generally matches the bandwidth of the first signal, when ΔF is configured to save the third component, the bandwidth of the overall signal will also be shifted to one side. When the bandwidth of a signal is S, the configuration of ΔF also needs to satisfy |ΔF|<S/2.

When the frequency difference between the first carrier signal and the second carrier signal satisfies the above relationship, the third component in the third signal can pass through the DC blocking circuit of the second device.

In the above manner, the second device mixes the second signal with the second carrier signal to obtain the third signal.

Through the above method, the present application can avoid the influence of the DC blocking circuit of the second device on the demodulation of the baseband signal level, and can ensure the end-to-end unipolar characteristics of the reserved baseband signal level, thereby realizing low-complexity coherence. take over.

Fig. 4 shows another communication method provided by the present application, and the specific flow of the communication method is shown in Fig. 2:

S410-S430 are the same as the aforementioned steps S210-S230, and are not repeated here.

S440, the second device uses a DC blocking circuit to perform DC blocking processing on the third signal to obtain a fourth signal.

S450, the second device demodulates the fourth signal.

In the foregoing step S440, the third signal needs to pass through the DC blocking circuit of the second device, that is, the second device needs to perform DC blocking processing on the received third signal.

In the second device, the multi-stage cascaded baseband amplifier circuits need to be AC-coupled to reduce the difficulty of signal matching between the cascaded amplifiers. This AC-coupled signal transmission method is equivalent to adding a DC blocking filter with high-pass characteristics to the receiving channel. Therefore, the multi-stage cascaded baseband amplifier circuit can be understood as an independent DC blocking circuit. Functionally similar. For ease of description, a DC blocking circuit can be used to replace the baseband amplifier circuit.

In the aforementioned step S450, the level value distribution of the fourth signal after passing through the DC blocking circuit has the same unipolar characteristics as the level value distribution of the input first signal, so the second device can use The sensitive demodulation method, that is, the amplitude detection method, is used for demodulation, and the transmitted first signal is recovered and demodulated from the amplitude of the fourth signal.

Amplitude detection is a method of judging the correspondence of R _[t] by comparing the amplitude value |R _[t] | of the received signal, or the square of the amplitude value |R _[t] | ² , and several preset threshold values. A way of detecting what value the original sent signal was.

The following sections describe how to preserve the unipolar character of baseband signal levels end-to-end.

Assuming that the time domain impulse response of the DC blocking circuit is H _[t] , the IQ signal after DC blocking, that is, the fourth signal, can be expressed as:

表示卷积运算，由于ΔF的配置使得第三分量可以无损地通过隔直电路，因此，上式中第二个等号右侧的D·exp^(jtΔF)分量并不受H_[t]卷积的影响，因此其与R_[t]中的对应分量完全相同。对R_b[t]提取幅度可以得到

in

Represents the convolution operation. Due to the configuration of ΔF, the third component can pass through the DC blocking circuit without loss. Therefore, the D exp ^(jtΔF) component on the right side of the second equal sign in the above formula is not subject to H _[t] convolution , so it is exactly the same as the corresponding component in R _[t] . Extracting the magnitude of R _b[t] can get

In a broadband data transmission system, the bandwidth of the DC blocking circuit is much smaller than the signal bandwidth, and the influence of the DC blocking filter on the signal can be basically ignored. Therefore, C _[t] in the above formula can be approximately equal to the amplitude of the first signal S _[t] . . It can be seen from the description of the aforementioned sender that since S _[t] ∈ {0.5, 1.5} takes the value and is completely a unipolar positive value, after the amplitude is extracted, the corresponding relationship between |S _[t] | and S _[t] With complete certainty, there is no polarity ambiguity of the signal symbols, and there is no need to recover and track changes in carrier phase as in conventional coherent demodulation systems.

It can be seen from the above technical solutions that the present application avoids the influence of the DC blocking circuit on the demodulation of the baseband signal level by artificially offsetting the frequency points of the first carrier signal and the second carrier signal, and ensures that the baseband signal is retained end-to-end. Medium-level unipolar characteristics, and achieve low-complexity coherent reception.

It should be understood that the above technical solution is designed for a situation where the bandwidth of the receiving channel is consistent with the bandwidth of the input first signal.

FIG. 5 shows another communication method provided by the present application, which can solve the problem that when the bandwidth of the receiving channel is smaller than the bandwidth of the input first signal, the first signal obtained by the second device after demodulating the fourth signal is due to the transmission bandwidth. The problem of inter-symbol interference (ISI) arises due to the limitation.

S510-S540 are the same as the aforementioned steps S310-S340, and are not repeated here.

S550, the second device performs forward equalization or continuous time linear equalization processing on the fourth signal to obtain a fifth signal.

By performing a feed forward equalization (FEE) or continuous time linear equalization (CTLE) processing operation on the fourth signal, the problem of intersymbol interference caused by the limited transmission bandwidth can be compensated, and the problem of inter-symbol crosstalk can be improved. Eye quality of the baseband signal.

When the terahertz modulated signal is damaged due to the band-limiting effect, frequency selective fading and chromatic dispersion of the transmission channel, forward equalization or continuous time equalization can effectively compensate for the intersymbol interference generated by the transmission impairment, and recover it in the receiver. The original waveform of the transmitted signal.

S560, the second device demodulates the fifth signal by means of amplitude detection to obtain the sixth signal.

In step S560, the second device recovers the unipolar baseband signal by extracting the amplitude of the fifth signal.

S570, the second device performs clock data recovery processing on the sixth signal obtained by demodulation.

In step S570, the second device recovers and reconstructs the level and clock edge of the baseband signal through a clock data recovery (CDR) process and outputs the data to a data board outside the receiving device. Through this step, it can be achieved that the timing of the demodulated signal output by the second device is normal.

Clock data recovery can recover the clock information of the transmitted signal from the received signal waveform, and use the clock information to sample and reconstruct the degraded or distorted signal waveform, regenerate a high-quality standard signal eye diagram, and eliminate the transmission of terahertz channels The effect of the effect on the quality of the external output signal of the receiving module.

The following is another optional technical solution:

S550a, the second device may convert the fourth signal into a digital signal through an analog to digital converter (analog to digital converter, ADC), that is, obtain a seventh signal.

S560a, the second device performs adaptive equalization processing on the seventh signal to obtain the eighth signal.

The adaptive equalizer can well compensate for the uneven amplitude-frequency response and nonlinear phase-frequency response in TAC and terahertz circuits, thereby minimizing ISI in the output signal.

S570a, the second device demodulates the eighth signal to obtain the ninth signal.

In step S570a, after the second device uses the adaptive equalizer to compensate the undesired factor of the end-to-end transmission channel for the fourth signal, the unipolar baseband signal is recovered by amplitude extraction. The second device recovers the unipolar baseband signal by extracting the amplitude of the fourth signal, which can be directly connected to the output port of the receiving device and output to the data board connected to the device.

Optionally, the second device can subsequently input the ninth signal into a CDR and recover the data clock. The recovered clock is used to control the sampling phase of the ADC, and synchronously sample the DC-blocked analog baseband signal to ensure demodulation. The timing of the signals is normal.

The above method can solve the problem that when the bandwidth of the receiving channel is smaller than the bandwidth of the input Ser/Des signal, the first signal obtained after demodulating the fourth signal by the second device will generate ISI due to limited transmission bandwidth.

The communication device provided by the present application will be described below with reference to FIG. 6 to FIG. 12 .

FIG. 6 is a schematic structural diagram of a communication device provided according to the present application. The communication apparatus may be the first device, or may be a component (eg, a chip or a circuit) usable in the first device. As shown in FIG. 6, the communication apparatus 600 may include a carrier wave modulator and an adjustable phase locked loop.

The carrier-band modulator is used to modulate the first carrier signal with the first signal, thereby obtaining the second signal.

It should be understood that the process or manner of performing modulation by the carrier-band modulator may refer to the description of the foregoing method, and the corresponding beneficial effects may also be referred to the description of the foregoing method, which will not be repeated here.

It should be understood that the adjustable phase-locked loop is used to perform the frequency multiplication locking function on the local oscillator signal, thereby generating a terahertz carrier signal that can be used for modulation.

It should be understood that the local oscillator signal can be generated by a crystal oscillator device configured inside the device, or input from an external port, that is, one or more local oscillator signals are generated by an external crystal oscillator module or device, and the generated local oscillator Part or all of the signal is input into the input port of the adjustable phase-locked loop of the device, and the present application does not limit the generation of the local oscillator signal.

Exemplarily, the adjustable phase-locked loop may be implemented by an analog phase-locked loop circuit or a digital phase-locked loop circuit.

7 to 8 are schematic structural diagrams of the first device provided by the present application, and are specifically shown in FIGS. 7 to 8 .

The carrier-band modulator is used to complete the process of modulating the first signal by the first device in the foregoing method-side embodiment, and it may be a terahertz switch circuit or device, or may be a terahertz switch circuit or device in the structure shown in FIG. 8 . The modulator with the carrier leakage function may also be other devices or equipment with similar functions, which is not limited in this application.

Exemplarily, the first device shown in FIG. 8 may include components such as a mixer, a signal combiner, an adjustable phase-locked loop, and the like, wherein the mixer is used to perform mixing of the first carrier signal using the first signal. Frequency processing, the signal combiner is used to inject the carrier component into the signal output after mixing processing, so as to obtain the second signal, the adjustable phase-locked loop is used to complete the frequency multiplication locking function of the local oscillator signal, thereby generating a usable _A terahertz carrier signal with a modulated frequency F1.

Optionally, the first device may further include an HPF, which is configured to perform functions such as amplifying the input signal and filtering out low-frequency signals or DC components.

Exemplarily, when the first signal enters the mixer from the receiving port of the first device, or the mixer can also receive the first signal, the mixer is configured to perform an adjustable phase lock using the first signal pair. The local terahertz carrier signal generated by the ring component is modulated to obtain an output signal, but the signal output by the mixer does not meet the unipolar characteristics of the same phase of the level distribution. The level of the signal has the unipolar characteristic of the same phase. After mixing, the carrier component of the same frequency and phase as the output signal can be coupled and superimposed into the output signal by means of carrier leakage. The carrier component can be adjusted directly. The terahertz carrier output from the phase-locked loop is amplified or attenuated to obtain the final second signal through a signal combiner. For the specific process, reference may be made to the description on the foregoing method side, which will not be repeated here.

It should be understood that the first device may be provided with a signal transmitter or receiver for receiving externally inputted signals and for transmitting modulated signals. The signal transmitter or receiver may be an input port or The form of the output port may also be presented in other forms, which is not limited in this application.

It should be understood that the reception or transmission of the signal may be completed by the carrier-band modulator, which is not limited in this application.

It should be understood that the above-listed devices can be used to perform the actions in the foregoing method, and the specific functions and beneficial effects thereof can refer to the description of the foregoing method, which will not be repeated here.

It should be understood that the above content is only used as an exemplary description and does not have a limiting effect.

In a possible embodiment, a communication apparatus is also provided, and the communication apparatus may be the first device, or may be a component (for example, a chip or a circuit, etc.) for the first device. The communication device may include a processor, optionally a memory, and optionally a transceiver. The transceiver may be used to implement the corresponding functions and operations corresponding to the above-mentioned transceiver unit, and the processor may be used to implement the corresponding functions and operations of the above-mentioned processing unit. The memory can be used to store execution instructions or application code, and the execution is controlled by the processor to implement the communication method provided by the above embodiments of the present application; and/or, it can also be used to temporarily store some data and instruction information. The memory may exist independently of the processor, and in this case, the memory may be connected to the processor through a communication line. In another possible design, the memory may also be integrated with the processor, which is not limited in this embodiment of the present application.

9 to 11 are schematic structural diagrams of the second device provided by the present application, and are specifically shown in FIGS. 9 to 11 .

In the schematic structural diagram shown in FIG. 9 , the second device may include components such as a mixer, a DC blocking circuit, a signal processor, an adjustable phase-locked loop, etc., wherein the mixer is used to perform a comparison between the second signal and the second The mixing process of the carrier signal, for example, the mixer may be an IQ mixer. Illustratively, the mixer may be used to receive the second signal.

Exemplarily, the DC blocking circuit is used for performing DC blocking processing on the third signal.

Exemplarily, the signal processor is used to perform demodulation of the fourth signal. Exemplarily, the signal processor may be an arithmetic circuit or an arithmetic unit, or a digital signal processor (DSP), or a A field programmable gate array (filed programmable gate array, FGPA) circuit, which is not limited in this application.

Exemplarily, for the function of the adjustable phase-locked loop component, reference may be made to the foregoing description, which will not be repeated here.

It should be understood that the DC blocking circuit is connected to the signal processor, the DC blocking circuit is connected to the processing unit, that is, to the mixer, and the signal processor is connected to the transceiver unit.

It should be understood that the above-described devices are all used to perform the corresponding actions or functions in the foregoing method side, and the corresponding effective effects may refer to the description of the foregoing method side, which will not be repeated here.

It should be understood that the second device may also be provided with a signal receiver or transmitter for receiving externally input signals and for transmitting demodulated signals. The signal transceiver or receiver may be a It can be presented in the form of an input port or an output port, and can also be presented in other forms, which is not limited in this application.

It should be understood that the above content is only used as an exemplary description and does not have a limiting effect.

In the schematic structural diagram shown in FIG. 10 , in addition to the device described in FIG. 9 , the second device may further include a filter, for example, the filter may include an analog filter or a finite impulse response. , FIR) filter, it is respectively used for realizing forward equalization processing or continuous time linear equalization processing; This second device may also comprise the clock data recovery device CDR, it is used for performing the signal waveform that can be recovered from the received transmission signal and use the clock information to sample and reconstruct the degraded or distorted signal waveform, regenerate a high-quality standard signal eye diagram, and eliminate the influence of the transmission effect of the terahertz channel on the quality of the external output signal of the receiving module.

It should be understood that the forward equalization processing or the continuous-time linear equalization processing may be selected in a manner of choosing one of two, which is not limited in this application.

It should be understood that the mixer is connected with a DC blocking circuit, the DC blocking circuit is connected with the analog filter or FIR filter, the analog filter or FIR filter is connected with the signal processor, and the signal processor is connected with the CDR connected, the CDR is connected with the transceiver unit.

It should be understood that the above-described devices are all used to perform the corresponding actions or functions in the foregoing method side, and the corresponding effective effects may refer to the description of the foregoing method side, which will not be repeated here.

It should be understood that the second device may also be provided with a signal receiver or transmitter for receiving externally inputted signals and for transmitting demodulated signals. The signal transmitter or receiver may be a It can be presented in the form of an input port or an output port, and can also be presented in other forms, which is not limited in this application.

It should be understood that the above content is only used as an exemplary description and does not have a limiting effect.

In the schematic structural diagram shown in FIG. 11 , in addition to the device described in FIG. 9 , the second device may also include an analog-to-digital converter ADC, which is used to perform digital signal conversion on the signal obtained after the DC blocking process. conversion; may also include an adaptive equalizer, which performs compensation for uneven amplitude-frequency response and nonlinear phase-frequency response in TAC and terahertz circuits to minimize ISI in the output signal; may also include CDR, For its specific functions, refer to the foregoing description of the CDR device, which will not be repeated here.

It should be understood that the mixer is connected with the DC blocking circuit, the DC blocking circuit is connected with the ADC, the ADC is connected with the adaptive equalizer, the adaptive equalizer is connected with the signal processor, and the signal processor can be connected with the CDR , the CDR can be connected to the ADC.

It should be understood that the above-described devices are all used to perform the corresponding actions or functions in the foregoing method side, and the corresponding effective effects may refer to the description of the foregoing method side, which will not be repeated here.

It should be understood that the second device may also be provided with a signal receiver or transmitter for receiving externally inputted signals and for transmitting demodulated signals. The signal transmitter or receiver may be a It can be presented in the form of an input port or an output port, and can also be presented in other forms, which is not limited in this application.

It should be understood that the above content is only used as an exemplary description and does not have a limiting effect.

In a possible embodiment, a communication apparatus is also provided, and the communication apparatus may be the second device, or may be a component (for example, a chip or a circuit, etc.) for the second device. The communication device may include a processor, optionally a transceiver, and optionally a memory. The transceiver may be used to implement the corresponding functions and operations corresponding to the above-mentioned reception and transmission, and the processor may be used to implement the corresponding functions and operations of the above-mentioned processing unit. The memory can be used to store execution instructions or application code, and the execution is controlled by the processor to implement the communication method provided by the above embodiments of the present application; and/or, it can also be used to temporarily store some data and instruction information. The memory may exist independently of the processor, and in this case, the memory may be connected to the processor through a communication line. In another possible design, the memory may also be integrated with the processor, which is not limited in this embodiment of the present application.

FIG. 12 is a structural block diagram of a communication apparatus provided according to an embodiment of the present application. The communication apparatus may be the first device. As shown in FIG. 12, the first device includes a processor 1201, a memory 1202, a radio frequency circuit, an antenna, and an input and output device. The processor 1201 may be used to process communication protocols and communication data, control terminal devices, execute software programs, process data of software programs, and the like. The memory 1202 is primarily used to store software programs and data. The radio frequency circuit is mainly used for the conversion of the baseband signal and the radio frequency signal and the processing of the radio frequency signal. Antennas are mainly used to send and receive radio frequency signals in the form of electromagnetic waves. Input and output devices, such as touch screens, display screens, and keyboards, are mainly used to receive data input by users and output data to users. It should be noted that some types of terminal equipment may not have input and output devices.

When data needs to be sent, the processor 1201 performs baseband processing on the data to be sent, and outputs a baseband signal to a radio frequency circuit. The radio frequency circuit performs radio frequency processing on the baseband signal and sends the radio frequency signal through an antenna in the form of electromagnetic waves. When data is sent to the terminal device, the radio frequency circuit receives the radio frequency signal through the antenna, converts the radio frequency signal into a baseband signal, and outputs the baseband signal to the processor, which converts the baseband signal into data and processes the data. For ease of illustration, only one memory and processor are shown in FIG. 12 . In an actual end device product, there may be one or more processors and one or more memories. The memory may also be referred to as a storage medium or a storage device or the like. The memory may be set independently of the processor, or may be integrated with the processor, which is not limited in this embodiment of the present application.

In the embodiments of the present application, the antenna and radio frequency circuit with a transceiver function may be regarded as a transceiver of the terminal device, and the processor with a processing function may be regarded as a processing unit of the terminal device. A transceiver may also be referred to as a transceiver unit, a transceiver, a transceiver, or the like. The processing unit may also be referred to as a processor, a processing single board, a processing unit, a processing device, and the like. Optionally, the device for implementing the receiving function in the transceiver may be regarded as a receiving unit, and the device for implementing the transmitting function in the transceiver may be regarded as a transmitting unit, that is, the transceiver includes a receiving unit and a transmitting unit. The receiving unit may also sometimes be referred to as a receiver, receiver, or receiving circuit, or the like. The transmitting unit may also sometimes be referred to as a transmitter, a transmitter, or a transmitting circuit, or the like.

The processor 1201, the memory 1202 and the transceiver communicate with each other through an internal connection path to transmit control and/or data signals.

The methods disclosed in the above embodiments of the present application may be applied to the processor 1201 or implemented by the processor 1201 . The processor 1201 may be an integrated circuit chip with signal processing capability. In the implementation process, each step of the above-mentioned method may be completed by an integrated logic circuit of hardware in the processor 1201 or an instruction in the form of software.

Optionally, in some embodiments, the memory 1202 may store instructions for performing the method performed by the first device among the methods shown in FIGS. 2 and 4 to 5 . The processor 1201 can execute the instructions stored in the memory 1202 in combination with other hardware (such as a transceiver) to complete the steps performed by the first device in the methods shown in FIG. 2 and FIG. 4 to FIG. , the description in the embodiment shown in FIG. 4 to FIG. 5 .

It should be understood that the communication device may be the second device. As shown in FIG. 12, the second device includes a processor 1201, a memory 1202, a radio frequency circuit, an antenna, and an input and output device. The processor 1201 may be used to process communication protocols and communication data, control network devices, execute software programs, process data of software programs, and the like. The memory 1202 is primarily used to store software programs and data. The radio frequency circuit is mainly used for the conversion of the baseband signal and the radio frequency signal and the processing of the radio frequency signal. Antennas are mainly used to send and receive radio frequency signals in the form of electromagnetic waves. Input and output devices, such as touch screens, display screens, and keyboards, are mainly used to receive data input by users and output data to users. It should be noted that some types of network devices may not have input and output devices.

When data needs to be sent, the processor 1201 performs baseband processing on the data to be sent, and outputs a baseband signal to a radio frequency circuit. The radio frequency circuit performs radio frequency processing on the baseband signal and sends the radio frequency signal through an antenna in the form of electromagnetic waves. When data is sent to the network device, the radio frequency circuit receives the radio frequency signal through the antenna, converts the radio frequency signal into a baseband signal, and outputs the baseband signal to the processor, which converts the baseband signal into data and processes the data. For ease of illustration, only one memory and processor are shown in FIG. 12 . In an actual network device product, there may be one or more processors and one or more memories. The memory may also be referred to as a storage medium or a storage device or the like. The memory may be set independently of the processor, or may be integrated with the processor, which is not limited in this embodiment of the present application.

In this embodiment of the present application, the antenna and the radio frequency circuit with a transceiving function can be regarded as a transceiver of the second device, and the processor with a processing function can be regarded as a processing unit of the network device. A transceiver may also be referred to as a transceiver unit, a transceiver, a transceiver, or the like. The processing unit may also be referred to as a processor, a processing single board, a processing unit, a processing device, and the like. Optionally, the device for implementing the receiving function in the transceiver may be regarded as a receiving unit, and the device for implementing the transmitting function in the transceiver may be regarded as a transmitting unit, that is, the transceiver includes a receiving unit and a transmitting unit. The receiving unit may also sometimes be referred to as a receiver, receiver, or receiving circuit, or the like. The transmitting unit may also sometimes be referred to as a transmitter, a transmitter, or a transmitting circuit, or the like.

The processor 1201, the memory 1202, and the transceiver communicate with each other through an internal connection path to transmit control and/or data signals.

The methods disclosed in the above embodiments of the present application may be applied to the processor 1201 or implemented by the processor 1201 . The processor 1201 may be an integrated circuit chip with signal processing capability. In the implementation process, each step of the above-mentioned method may be completed by an integrated logic circuit of hardware in the processor 1201 or an instruction in the form of software.

Optionally, in some embodiments, the memory 1202 may store instructions for performing the method performed by the network device in the methods shown in FIGS. 2 and 4 to 5 . The processor 1201 can execute the instructions stored in the memory 1302 in combination with other hardware (such as a transceiver) to complete the steps performed by the second device in the methods shown in FIG. 2 and FIG. 4 to FIG. , the description in the embodiment shown in FIG. 4 to FIG. 5 .

The processors described in the embodiments of the present application may be general-purpose processors, DSPs, application specific integrated circuits (ASICs), FPGAs or other programmable logic devices, discrete gate or transistor logic devices, and discrete hardware components. The methods, steps, and logic block diagrams disclosed in the embodiments of this application can be implemented or executed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in conjunction with the embodiments of the present application may be directly embodied as executed by a hardware decoding processor, or executed by a combination of hardware and software units in the decoding processor. The software unit can be located in random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory or electrically erasable programmable memory, registers, etc. in the storage medium. The storage medium is located in the memory, and the processor reads the instructions in the memory, and completes the steps of the above method in combination with its hardware.

Embodiments of the present application further provide a chip, where the chip includes a transceiver unit and a processing unit. The transceiver unit may be an input/output circuit or a communication interface; the processing unit may be a processor, a microprocessor or an integrated circuit integrated on the chip. The chip can execute the method on the first device side in the above method embodiments.

Embodiments of the present application further provide a chip, where the chip includes a transceiver unit and a processing unit. The transceiver unit may be an input/output circuit or a communication interface; the processing unit may be a processor, a microprocessor or an integrated circuit integrated on the chip. The chip can execute the method on the second device side in the above method embodiments.

Embodiments of the present application further provide a computer-readable storage medium, on which an instruction is stored, and when the instruction is executed, executes the method on the first device side in the foregoing method embodiment.

Embodiments of the present application further provide a computer-readable storage medium, on which an instruction is stored, and when the instruction is executed, executes the method on the second device side in the foregoing method embodiment.

The embodiment of the present application further provides a computer program product including an instruction, when the instruction is executed, the method on the first device side in the foregoing method embodiment is executed.

The embodiment of the present application further provides a computer program product including an instruction, when the instruction is executed, the method on the second device side in the above method embodiment is executed.

An embodiment of the present application further provides a communication system, including a first device and a second device, wherein the first device executes a method corresponding to the first device in the foregoing method, and the second device executes a method corresponding to the second device in the foregoing method. method.

Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Skilled artisans may implement the described functionality using different methods for each particular application, but such implementations should not be considered beyond the scope of this application.

Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the above-described systems, devices and units may refer to the corresponding processes in the foregoing method embodiments, which will not be repeated here.

In the several embodiments provided in this application, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the apparatus embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not implemented. On the other hand, the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of devices or units, and may be in electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, and components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.

In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit.

The functions, if implemented in the form of software functional units and sold or used as independent products, may be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be embodied in the form of a software product in essence, or the part that contributes to the prior art or the part of the technical solution. The computer software product is stored in a storage medium, including Several instructions are used to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: U disk, removable hard disk, read-only memory (ROM), random access memory (RAM), magnetic disk or optical disk and other media that can store program codes .

The above are only specific embodiments of the present application, but the protection scope of the present application is not limited to this. should be covered within the scope of protection of this application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims (26)

1. a communication method, is characterized in that, comprises: The second device receives a second signal from the first device, where the second signal is obtained by the first device using the first signal to modulate the first carrier signal; The second device mixes the second signal and the second carrier signal to obtain a third signal, the second carrier signal and the first carrier signal satisfy a first frequency difference, and the first frequency The difference allows a third component of the third signal to pass through the DC blocking circuit of the second device, the third component corresponding to the first component of the second signal, and the first component and the first component The carrier signal has the same frequency. 2. The method according to claim 1, wherein the first frequency difference ΔF satisfies:

Wherein, the B is the DC blocking bandwidth of the DC blocking circuit, the f ₁ is the frequency offset of the first carrier signal, and the f ₂ is the frequency offset of the second carrier signal The S is the bandwidth of the first signal. 3. The method according to claim 1 or 2, characterized in that, The level distribution of the first baseband signal corresponding to the second signal is unipolar. 4. The method according to any one of claims 1 to 3, wherein the third signal R _[t] satisfies:

where the D is the DC component, the X _[t] is the AC component of the first signal, the

is the first component, the

is the second component of the second signal, the second component is obtained by the first device using the AC component to modulate the first carrier signal, the

is the third component, the ΔF is the difference between the F1 and the F2, the F1 is the frequency _of the _first carrier signal, and the _F2 is the frequency of the _second carrier signal frequency. 5. The method according to claim 4, wherein the method further comprises: The second device uses the DC blocking circuit to perform DC blocking processing on the third signal to obtain a fourth signal; The second device demodulates the fourth signal by amplitude detection. 6. The method according to claim 4, wherein the method further comprises: The second device uses the DC blocking circuit to perform DC blocking processing on the third signal to obtain a fourth signal; The second device performs forward equalization processing on the fourth signal to obtain a fifth signal; The second device demodulates the fifth signal through amplitude detection to obtain a sixth signal; or, The second device performs continuous time linear equalization processing on the fourth signal to obtain a fifth signal; The second device demodulates the fifth signal through amplitude detection to obtain a sixth signal. 7. The method according to claim 6, wherein after the second device demodulates the fifth signal through amplitude detection, the method further comprises: The second device performs clock data recovery processing on the sixth signal. 8. The method according to claim 4, wherein the method further comprises: The second device uses the DC blocking circuit to perform DC blocking processing on the third signal to obtain a fourth signal; The second device performs analog-to-digital conversion on the fourth signal to obtain a seventh signal; The second device performs self-adaptive equalization processing on the seventh signal to obtain an eighth signal; The second device demodulates the eighth signal through amplitude detection to obtain a ninth signal. 9. The method according to claim 8, wherein after the second device demodulates the eighth signal through amplitude detection, the method further comprises: The second device performs clock data recovery processing on the ninth signal. 10. The method according to any one of claims 5 to 9, wherein the fourth signal R _b[t] satisfies:

where the H _[t] is the time domain impulse response of the DC blocking circuit, the

is the convolution operation symbol. 11. The method according to any one of claims 1 to 10, characterized in that, The second signal is obtained by modulating the first carrier signal with the first signal according to a first modulation method, and the first modulation method includes: using the AC component to modulate the first carrier signal to obtain the second component; The fourth component is coupled to the second component through carrier leakage to obtain the second signal, where the fourth component and the carrier frequency in the second component are co-frequency and in-phase or co-frequency and anti-phase. 12. A communication device, comprising: a transceiver unit, configured to receive a second signal from a first device, where the second signal is obtained by the first device using the first signal to modulate a first carrier signal; a processing unit, configured to mix the second signal and the second carrier signal to obtain a third signal, the second carrier signal and the first carrier signal satisfy a first frequency difference, and the first frequency The difference makes the third component of the third signal pass through the DC blocking circuit of the second device, the third component corresponds to the first component of the second signal, and the first component corresponds to the first carrier signal Same frequency. 13. The device according to claim 12, wherein the first frequency difference ΔF satisfies:

Wherein, the B is the DC blocking bandwidth of the DC blocking circuit, the f ₁ is the frequency offset of the first carrier signal, and the f ₂ is the frequency offset of the second carrier signal The S is the bandwidth of the first signal. 14. The device according to claim 12 or 13, characterized in that, The level distribution of the first baseband signal corresponding to the second signal is unipolar. 15. The apparatus according to any one of claims 12 to 14, wherein the third signal R _b[t] satisfies:

where the D is the DC component, the X _[t] is the AC component of the first signal, the

is the first component, the

is the second component of the second signal, the second component is obtained by the first device using the AC component to modulate the first carrier signal, the

is the third component, the ΔF is the difference between the F1 and the F2, the F1 is the frequency _of the _first carrier signal, and the _F2 is the frequency of the _second carrier signal frequency. 16. The apparatus of claim 15, wherein the apparatus further comprises: a DC blocking circuit for performing DC blocking processing on the third signal to obtain a fourth signal; a signal processor for demodulating the fourth signal through amplitude detection; The DC blocking circuit is connected to the signal processor, and the DC blocking circuit is connected to the processing unit. 17. The apparatus of claim 15, wherein the apparatus further comprises: a DC blocking circuit for performing DC blocking processing on the third signal to obtain a fourth signal; a filter, configured to perform forward equalization processing on the fourth signal to obtain a fifth signal; or, configured to perform continuous time linear equalization processing on the fourth signal to obtain a fifth signal; a signal processor, configured to demodulate the fifth signal through amplitude detection to obtain a sixth signal; The filter is connected to the DC blocking circuit, and the filter is connected to the signal processor. 18. The apparatus of claim 17, wherein the apparatus further comprises: a clock data restorer CDR, configured to perform clock data recovery processing on the sixth signal; The CDR is connected to the signal processor. 19. The apparatus of claim 15, wherein the apparatus further comprises: a DC blocking circuit for performing DC blocking processing on the third signal to obtain a fourth signal; an analog-to-digital converter ADC, configured to perform analog-to-digital conversion processing on the fourth signal to obtain a seventh signal; an adaptive equalizer, configured to perform adaptive equalization processing on the seventh signal to obtain an eighth signal; a signal processor, configured to demodulate the eighth signal through amplitude detection to obtain a ninth signal; The ADC is connected to the DC blocking circuit, the adaptive equalizer is connected to the ADC, and the adaptive equalizer is connected to the signal processor. 20. The apparatus of claim 19, wherein the apparatus further comprises: a clock data restorer CDR for performing clock data recovery processing on the ninth signal; The CDR is connected to the signal processor, and the CDR is connected to the ADC. 21. The apparatus according to any one of claims 15 to 20, wherein the fourth signal R _b[t] satisfies:

where the H _[t] is the time domain impulse response of the DC blocking circuit, the

is the convolution operation symbol. 22. The device of any one of claims 12 to 21, wherein The second signal is obtained by modulating the first carrier signal with the first signal according to a first modulation method, and the first modulation method includes: using the AC component to modulate the first carrier signal to obtain the second component; The fourth component is coupled to the second carrier component through carrier leakage to obtain the second signal, and the fourth component and the carrier frequency in the second component are co-frequency and in-phase or co-frequency and anti-phase. 23. A communication device, characterized in that it comprises a processor and a memory, wherein the processor is coupled to the memory, the memory is used for storing computer programs or instructions, and the processor is used for executing the computer program or instructions in the memory. instruction to make The method of any of claims 1 to 11 is performed. 24. A chip system, characterized in that it comprises: a processor and a communication interface for calling and running a computer program from a memory, causing the communication device on which the chip system is installed to execute The method of any one of claims 1 to 11. 25. A communication system, characterized by comprising: a first device and a second device, The first device modulates the first carrier signal by using the first signal to obtain a second signal; the first device sends the second signal to the second device; The second device receives the second signal, and mixes the second signal and the second carrier signal to obtain a third signal, and the second carrier signal and the first carrier signal satisfy the first frequency difference, the first frequency difference makes the third component of the third signal pass through the DC blocking circuit of the second device, the third component corresponds to the first component of the second signal, the The first component is at the same frequency as the first carrier signal. 26. The communication system of claim 25, further comprising: The second device is further configured to perform the method of any one of claims 2 to 11.

Images