CN115102543B - High-performance 4FSK modulation circuit and implementation method - Google Patents
High-performance 4FSK modulation circuit and implementation method Download PDFInfo
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- CN115102543B CN115102543B CN202211028951.0A CN202211028951A CN115102543B CN 115102543 B CN115102543 B CN 115102543B CN 202211028951 A CN202211028951 A CN 202211028951A CN 115102543 B CN115102543 B CN 115102543B
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- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
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Abstract
The invention relates to a high-performance 4FSK modulation circuit and a realization method thereof, wherein a carrier signal locked at a working frequency is generated in a frequency setting process, a modulation signal I and a modulation signal II after amplitude-frequency characteristic compensation and phase compensation are modulated onto the carrier signal, a radio frequency signal carrying 4FSK modulation information is further generated, 4FSK modulation is completed, and the modulated radio frequency signal is amplified by a buffer amplifier and then is output to circuits for transmitting a radio frequency excitation signal, such as a drive amplifier, a power amplifier and the like of a digital intercom device for further processing. The invention avoids the influence of the performance of the crystal oscillator element with the tuning temperature compensation on the modulation performance in the existing two-point modulation scheme, and improves the performance of the 4FSK modulation index.
Description
Technical Field
The invention relates to the technical field of communication, in particular to a high-performance 4FSK modulation circuit and an implementation method.
Background
At present, the wireless interphone comprehensively adopts the digitization technology, and compared with the traditional analog wireless interphone, the digital wireless interphone has the advantages of high frequency spectrum resource utilization rate, high conversation quality, strong noise immunity, richer data transmission services and the like. The above advantages of digital walkie-talkie over analog walkie-talkie are mainly due to the more advanced modulation and demodulation scheme. The analog interphone adopts FM (frequency modulation) analog modulation mode, while the digital interphone adopts digital modulation modes such as 4FSK (4 phase shift frequency keying), pi/4 DQPSK (quadrature phase shift keying) and the like.
The 4FSK is a modulation mode specified by European standard DMR (digital mobile radio), dPMR (digital private mobile radio) and national standard GB/T32659-2016 technical requirements and test methods for special digital intercom equipment.
The 4FSK modulation and demodulation technology is a core technology for realizing the related standard products, wherein the 4FSK modulation generally adopts an orthogonal modulation mode or a two-point modulation mode, and the two-point modulation mode is widely applied to digital intercom terminal equipment due to the characteristics of simple circuit form and low cost. The two-point modulation scheme widely used at present is to modulate a VCO (voltage controlled oscillator) and a VCTCXO (voltage controlled temperature compensated oscillator), and implement a 4FSK modulation characteristic by two-point modulation of the VCO and the VCTCXO. The modulation performance of the scheme is greatly influenced and limited by parameters of a tuning port of a VCTCXO device, the difference of the tuning performance of VCTCXO of different batches and different manufacturers of the same manufacturer is large, so that the 4FSK modulation performance is greatly different, and although the 4FSK main modulation performance index 4FSK Kerror can meet the technical requirement of being less than or equal to 5%, the actual measurement typical value of batch realization is between 2% and 3%, but the actual measurement performance is not less than 1.5%; therefore, the transmission modulation performance of the digital talkback terminal equipment realized by the scheme is general and the batch consistency is poor, and the digital talkback terminal equipment based on the scheme is difficult to realize to high-performance equipment.
Disclosure of Invention
In view of the problems of performance limitation and poor modulation performance index of a pressurized temperature-controlled supplementary oscillator element in the prior art, the invention provides a high-performance 4FSK modulation circuit and an implementation method thereof, which are used for implementing 4FSK emission modulation of digital talkback terminal equipment, can effectively avoid the influence of parameter difference of a tuning port of a VCTCXO element, improve the consistency of batch production performance, and simultaneously realize the high performance that the 4FSK modulation performance index 4FSK Kerror is less than 1.5 percent and the typical value of batch production is 1 percent.
The invention adopts the following technical scheme for realizing the purpose: a high-performance 4FSK modulation circuit comprises a digital signal processor, a digital-to-analog converter, a frequency synthesizer, a voltage-controlled temperature compensation oscillator, a voltage-controlled oscillator, a loop filter and a buffer amplifier; the digital signal processor is respectively connected with a digital-to-analog converter and a frequency synthesizer in a two-way mode through an SPI interface I and an SPI interface II, the digital-to-analog converter is respectively connected with a voltage-controlled oscillator and a voltage-controlled temperature compensation oscillator in a one-way mode through two analog outputs, the frequency synthesizer is respectively connected with the voltage-controlled temperature compensation oscillator, a loop filter and a buffer amplifier in a one-way mode, and the voltage-controlled oscillator is respectively connected with the loop filter and the buffer amplifier in a one-way mode; the digital signal processor and the digital-to-analog converter form a modulation control circuit, the voltage-controlled oscillator, the voltage-controlled temperature compensation oscillator, the frequency synthesizer, the loop filter and the buffer amplifier form a phase-locked loop circuit, the modulation control circuit adopts a two-point modulation mode to perform 4FSK modulation on the phase-locked loop circuit, the modulation control circuit outputs frequency control data and a direct current bias level to realize phase-locked loop working frequency setting and frequency error adjustment, the phase-locked loop circuit realizes locking output of working frequency, and the locked working frequency transmits a radio frequency excitation signal to be used for amplification processing of a post-stage power amplification circuit of the digital intercom device.
The two-point modulation mode is adopted, wherein the first point modulation is the analog frequency modulation of a voltage-controlled oscillator by a modulation signal I output by a digital signal processor through an SPI (serial peripheral interface) I; the second point modulation is data modulation of the frequency synthesizer by a modulation signal II output by the digital signal processor through the SPI interface II.
The working frequency setting is realized by outputting frequency control data to the frequency synthesizer through the SPI interface II by the digital signal processor, and the frequency error adjustment is realized by adjusting the frequency of the voltage-controlled temperature compensation oscillator by controlling the digital-to-analog converter to output a direct-current bias level through the SPI interface I by the digital signal processor.
A method for realizing a high-performance 4FSK modulation circuit comprises the following steps: setting frequency; the digital signal processor outputs frequency control data through an SPI interface II, and is used for setting the working frequency of the frequency synthesizer so as to obtain a carrier signal locked at the working frequency, and controls a digital-to-analog converter to output direct current bias to adjust the reference clock frequency of the voltage-controlled temperature compensation oscillator through the SPI interface I, so that the locking frequency of a phase-locked loop circuit consisting of the frequency synthesizer, a voltage-controlled oscillator, a loop filter and a buffer amplifier is adjusted, and the calibration of the frequency error value of the output transmission radio frequency excitation signal is completed; compensating amplitude-frequency characteristics of the modulation signals; after the frequency setting is finished, amplitude-frequency characteristic compensation is realized for amplitude adjustment of the two-point modulation signal, and amplitude parameters of a modulation signal I and a modulation signal II meeting the requirement of the amplitude-frequency characteristic are stored;
compensating the phase of the modulation signal; after the amplitude-frequency characteristic compensation of the modulation signal is completed, the phase compensation is carried out on the two-point modulation signal, the phase compensation of the two-point modulation signal is realized by adjusting the phase output starting time of the modulation signal II, and the output delay parameter of the modulation signal II meeting the phase characteristic is stored;
generating a modulation signal I; after the phase compensation of the modulation signal is completed, the digital signal processor controls the digital-to-analog converter to generate a modulation signal I through the SPI interface I, the modulation signal I is a 4FSK baseband signal represented by an analog signal, the amplitude of the modulation signal I is an amplitude value stored in the amplitude-frequency characteristic compensation process, and the modulation signal I realizes the first point modulation on the voltage-controlled oscillator;
generating a modulation signal II; when the modulation signal I is generated, the digital signal processor outputs modulation data carrying the modulation signal II through the SPI interface II, the modulation signal II is a 4FSK baseband signal represented by high-speed data, the amplitude of the modulation signal II is a stored value in an amplitude-frequency characteristic compensation process, the phase output delay parameter of the modulation signal II is a stored value in a delay parameter in a phase compensation process, and the modulation signal II carries out second-point modulation on the frequency synthesizer;
and generating a carrier signal locked at a working frequency through the frequency setting process, modulating the modulation signal I and the modulation signal II which are subjected to amplitude-frequency characteristic compensation and phase compensation onto the carrier signal, and further generating a radio frequency signal carrying 4FSK modulation information to finish 4FSK modulation.
And setting the working frequency of the frequency synthesizer to be the working frequency of 400MHz to 430MHz in a UHF frequency band in the frequency setting, wherein the minimum step frequency is 12.5kHz.
Firstly, setting the amplitude of a modulation signal I to be 0, generating a modulation signal II of a single tone with the frequency of 100Hz by a digital signal processor for modulation, adjusting the amplitude of the modulation signal II, testing the modulation frequency offset of the transmitted radio frequency excitation signal with the frequency of 100Hz by a signal analyzer until the frequency offset value reaches 1944Hz +/-10%, and setting the relative value of the frequency offset at the moment to be 0dB; and then the digital signal processor generates a single-tone signal with the frequency of 3kHz and outputs the single-tone signal to a modulation signal I, the amplitude of the modulation signal I is adjusted, the modulation frequency deviation of the transmitted radio frequency excitation signal at 3kHz is tested by a signal analyzer until the relative value difference value of the modulation frequency deviation at 3kHz relative to the modulation frequency deviation at 100Hz is less than 1dB, and amplitude parameter values of the modulation signal I and the modulation signal II are respectively stored after amplitude-frequency compensation meets requirements and are used for calling during 4FSK two-point modulation.
The method for realizing the high-performance 4FSK modulation circuit is characterized in that the method for compensating the phase of the two-point modulation signal in the phase compensation of the modulation signal comprises the following steps: the digital signal processing circuit generates a modulation signal I, the phase output starting time T0 of the modulation signal I is kept unchanged, the digital signal processing circuit generates a modulation signal II, the phase output starting time of the modulation signal II is set to be T0, the time delay parameter T is adjusted in an increasing and decreasing mode by taking T0 as a reference and taking Delta T as a step, the formula is T = T0 +/-n 10005DeltaT, wherein n is a positive integer and DeltaT is a time delay adjustment step increment, the phase compensation of the two paths of modulation signals is realized through the formula, and in the phase compensation process, a 4FSK comprehensive tester is used for observing a 4 KeFSrror test value to obtain a compensation result; the initial time of phase output after the compensation of the modulation signal II is t0+ t, and the time delay parameter of the modulation signal II is saved after the phase compensation meets the requirement and is used for calling in the process of 4FSK two-point modulation.
The beneficial effects of the invention are: the invention avoids the influence of the performance of the voltage-controlled temperature compensation oscillator element on the modulation performance in the existing two-point modulation scheme, improves the performance of the 4FSK modulation index, and compared with the existing 4FSK Kerr, the key index 4FSK Kerr has the performance which is more than 2 percent and can reach the high performance of less than 1.5 percent and the typical value of mass production of 1 percent, and improves the consistency of the mass production performance.
Drawings
FIG. 1 is a schematic block diagram of the circuit of the present invention;
FIG. 2 is a software workflow diagram of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described below with reference to the drawings in the embodiments of the present invention.
FIG. 1 shows a functional block diagram of a high performance 4FSK modulation circuit including a digital signal processor, a digital-to-analog converter, a frequency synthesizer, a voltage controlled temperature compensated oscillator, a voltage controlled oscillator, a loop filter and a buffer amplifier; the digital signal processor is respectively connected with the digital-to-analog converter and the frequency synthesizer in a bidirectional mode through an SPI interface I and an SPI interface II, and controls the digital-to-analog converter to generate a modulation signal I and direct current offset and generate a modulation signal II; the digital-to-analog converter is respectively connected with the voltage-controlled oscillator and the voltage-controlled temperature compensation oscillator in a one-way mode, the digital-to-analog converter performs 4FSK modulation on the voltage-controlled oscillator through the generated modulation signal I, and the digital-to-analog converter adjusts the oscillation frequency of the voltage-controlled temperature compensation oscillator through outputting direct current bias so as to reduce the frequency error value; the frequency synthesizer is connected with the digital signal processor in a bidirectional way, the digital signal processor sets the working frequency of the frequency synthesizer through outputting frequency control data, and the digital signal processor generates a modulation signal II to carry out 4FSK modulation on the frequency synthesizer; the frequency synthesizer is respectively connected with the loop filter and the buffer amplifier in a unidirectional way, the frequency synthesizer outputs tuning voltage to the loop filter and then carries out frequency tuning on the voltage-controlled oscillator, the radio-frequency signal output by the buffer amplifier is fed back to the frequency synthesizer to carry out phase discrimination comparison, the loop filter is realized by a passive filter consisting of resistance capacitors, the embodiment is not limited, the buffer amplifier is used for amplifying the radio-frequency signal generated by the voltage-controlled oscillator, then the amplified signal is fed back to the frequency synthesizer and a transmitting radio-frequency excitation signal is output, the buffer amplifier can be a radio-frequency transistor or a Monolithic Microwave Integrated Circuit (MMIC) or other circuit schemes, and the embodiment is not limited; the voltage controlled oscillator is respectively connected with the loop filter and the buffer amplifier in a one-way mode, the Voltage Controlled Oscillator (VCO) is a radio frequency oscillation source and is used for generating radio frequency signals, the voltage controlled oscillator is realized by adopting discrete components, and the embodiment of a specific circuit is not limited; the voltage-controlled temperature compensation oscillator is connected with the frequency synthesizer in a one-way mode and serves as a reference clock of the frequency synthesizer.
In the embodiment, the digital-to-analog converter adopts a D/A chip TLV5614, the digital signal processor adopts an ARM and DSP dual-core system-on-chip OMAPL138, the voltage-controlled temperature compensation oscillator adopts SSB5001A-19.2MHz, and the working frequency of the voltage-controlled temperature compensation oscillator is 19.2MHz.
Example 1, as shown in fig. 2; 4, starting to work after the FSK modulation circuit is powered on, initializing a digital-to-analog converter by the digital signal processor, and setting an initial direct current offset value 1.6Vdc output by the digital-to-analog converter; initializing a frequency synthesizer by the digital signal processor, and setting the working frequency of the frequency synthesizer to be 403.0125MHz through frequency control data; the digital signal processor initializes parameters, namely setting the amplitude parameter of a modulation signal I to be 110 (amplitude parameter range from 0 to 255), the amplitude parameter of a modulation signal II to be 80 (amplitude parameter range from 0 to 255) and the output initial value t0 of the modulation signal II to be 0; if the transmission modulation is judged to be yes, the digital signal processor reads the amplitude parameter of the modulation signal I, reads the amplitude parameter of the modulation signal II and reads the output delay parameter of the modulation signal II, then controls the digital-to-analog converter to generate the modulation signal I to perform first point modulation on the voltage-controlled oscillator, and generates the modulation signal II to perform second point modulation on the frequency synthesizer; and stopping outputting the modulation signal I and the modulation signal II after the transmission modulation is finished, and returning to the initialization completion position, otherwise, continuously generating the modulation signal I and the modulation signal II. And if the transmission modulation start judgment is negative, the phase compensation start judgment is carried out, if the transmission modulation start judgment is positive, the phase compensation start judgment is carried out, the output time of the modulation signal II is adjusted according to a formula T = T0 +/-n 10005DeltaT, wherein n is a positive integer, and DeltaT =8.3us, when the phase meets the modulation performance requirement, the current value of the output delay parameter T of the modulation signal II is stored, then the initialization completion position is returned, and if the phase does not meet the modulation performance requirement, the output time of the modulation signal II is repeatedly adjusted. And if the phase compensation starting judgment is no, carrying out amplitude-frequency compensation starting judgment, if so, firstly outputting 0 to the amplitude I of the modulation signal to generate a 100Hz single-tone modulation signal II, then adjusting the amplitude of the modulation signal II to generate a 3kHz single-tone modulation signal I, adjusting the amplitude of the modulation signal I, if the frequency modulation frequency deviation meets the requirement, saving the amplitude parameters of the modulation signal I and the modulation signal II and returning to the initialization completion position, otherwise, repeatedly adjusting the amplitude of the modulation signal II, generating the 3kHz single-tone modulation signal I and adjusting the amplitude of the modulation signal I.
Through the control flow, the setting and calibration of working frequency are realized, the amplitude-frequency characteristic and the phase compensation of a modulation signal are realized, the two-point modulation of 4FSK is completed, and the modulated radio frequency signal is amplified by a buffer amplifier and then is output to circuits of digital talkback equipment for driving amplification, power amplification and the like as a transmission radio frequency excitation signal for further processing.
Claims (7)
1. A high performance 4FSK modulation circuit, characterized by: the system comprises a digital signal processor, a digital-to-analog converter, a frequency synthesizer, a voltage-controlled temperature compensation oscillator, a voltage-controlled oscillator, a loop filter and a buffer amplifier; the digital signal processor is respectively connected with a digital-to-analog converter and a frequency synthesizer in a two-way mode through an SPI interface I and an SPI interface II, the digital-to-analog converter is respectively connected with a voltage-controlled oscillator and a voltage-controlled temperature compensation oscillator in a one-way mode through two analog outputs, the frequency synthesizer is respectively connected with the voltage-controlled temperature compensation oscillator, a loop filter and a buffer amplifier in a one-way mode, and the voltage-controlled oscillator is respectively connected with the loop filter and the buffer amplifier in a one-way mode; the digital signal processor and the digital-to-analog converter form a modulation control circuit, the voltage-controlled oscillator, the voltage-controlled temperature compensation oscillator, the frequency synthesizer, the loop filter and the buffer amplifier form a phase-locked loop circuit, the modulation control circuit adopts a two-point modulation mode to perform 4FSK modulation on the phase-locked loop circuit, the modulation control circuit outputs frequency control data and a direct current bias level to realize phase-locked loop working frequency setting and frequency error adjustment, the phase-locked loop circuit realizes locking output of working frequency, and the locked working frequency transmits a radio frequency excitation signal to be used for amplification processing of a post-stage power amplification circuit of the digital intercom device.
2. The high-performance 4FSK modulation circuit of claim 1, wherein: the two-point modulation mode is adopted, wherein the first point modulation is the analog frequency modulation of a voltage-controlled oscillator by a modulation signal I output by a digital signal processor through an SPI (serial peripheral interface) I; the second point modulation is data modulation of the frequency synthesizer by a modulation signal II output by the digital signal processor through the SPI interface II.
3. The high-performance 4FSK modulation circuit of claim 1, wherein: the working frequency setting is realized by outputting frequency control data to the frequency synthesizer through the SPI interface II by the digital signal processor, and the frequency error adjustment is realized by adjusting the frequency of the voltage-controlled temperature compensation oscillator by controlling the digital-to-analog converter to output a direct-current bias level through the SPI interface I by the digital signal processor.
4. A method for implementing a high-performance 4FSK modulation circuit according to claim 1, comprising the steps of: frequency setting: the digital signal processor outputs frequency control data through an SPI interface II, and is used for setting the working frequency of the frequency synthesizer so as to obtain a carrier signal locked at the working frequency, and controls a digital-to-analog converter to output direct current bias to adjust the reference clock frequency of the voltage-controlled temperature compensation oscillator through the SPI interface I, so that the locking frequency of a phase-locked loop circuit consisting of the frequency synthesizer, a voltage-controlled oscillator, a loop filter and a buffer amplifier is adjusted, and the calibration of the frequency error value of the output transmission radio frequency excitation signal is completed;
and (3) compensating amplitude-frequency characteristics of the modulation signal: after the frequency setting is finished, amplitude-frequency characteristic compensation is realized for amplitude adjustment of the two-point modulation signal, and amplitude parameters of a modulation signal I and a modulation signal II meeting the requirement of the amplitude-frequency characteristic are stored;
modulation signal phase compensation: after the amplitude-frequency characteristic compensation of the modulation signals is completed, phase compensation is carried out on the two-point modulation signals, the phase compensation of the two-point modulation signals is realized by adjusting the phase output starting time of the modulation signal II, and the output time delay parameters of the modulation signal II meeting the phase characteristic are stored;
generation of the modulated signal I: after the phase compensation of the modulation signal is completed, the digital signal processor controls the digital-to-analog converter to generate a modulation signal I through the SPI (serial peripheral interface) I, the modulation signal I is a 4FSK (frequency Shift keying) baseband signal represented by an analog signal, the amplitude of the modulation signal I is an amplitude value stored in the amplitude-frequency characteristic compensation process, and the modulation signal I realizes first point modulation on the voltage-controlled oscillator;
generation of the modulation signal II: when the modulation signal I is generated, the digital signal processor outputs modulation data carrying the modulation signal II through the SPI interface II, the modulation signal II is a 4FSK baseband signal represented by high-speed data, the amplitude of the modulation signal II is a stored value in an amplitude-frequency characteristic compensation process, the phase output delay parameter of the modulation signal II is a stored value in a delay parameter in a phase compensation process, and the modulation signal II carries out second-point modulation on the frequency synthesizer;
and generating a carrier signal locked at a working frequency through the frequency setting process, modulating the modulation signal I and the modulation signal II which are subjected to amplitude-frequency characteristic compensation and phase compensation onto the carrier signal, and further generating a radio frequency signal carrying 4FSK modulation information to complete 4FSK modulation.
5. The method as claimed in claim 4, wherein the frequency setting sets the operating frequency of the frequency synthesizer to be 400MHz to 430MHz operating frequency in UHF band, and the minimum step of the frequency is 12.5kHz.
6. The method for realizing the high-performance 4FSK modulation circuit is characterized in that the amplitude-frequency characteristic compensation method in the amplitude-frequency characteristic compensation of the modulation signal is that firstly, the amplitude of the modulation signal I is set to 0, the digital signal processor generates a modulation signal II of a single tone with the frequency of 100Hz for modulation, the amplitude of the modulation signal II is adjusted, the modulation frequency deviation of the transmission radio frequency excitation signal with the frequency of 100Hz is tested by a signal analyzer until the frequency deviation value reaches 1944Hz +/-10%, and the relative value of the frequency deviation is set to 0dB; and then the digital signal processor generates a single-tone signal with the frequency of 3kHz and outputs the single-tone signal to a modulation signal I, the amplitude of the modulation signal I is adjusted, the modulation frequency deviation of the transmitted radio frequency excitation signal at 3kHz is tested by a signal analyzer until the relative value difference value of the modulation frequency deviation at 3kHz relative to the modulation frequency deviation at 100Hz is less than 1dB, and amplitude parameter values of the modulation signal I and the modulation signal II are respectively stored after amplitude-frequency compensation meets requirements and are used for calling during 4FSK two-point modulation.
7. The method of claim 4, wherein the method for compensating the phase of the two-point modulation signal in the phase compensation of the modulation signal comprises: the digital signal processing circuit generates a modulation signal I, the phase output starting time T0 of the modulation signal I is kept unchanged, the digital signal processing circuit generates a modulation signal II, the phase output starting time of the modulation signal II is set to be T0, the time delay parameter T is adjusted in an increasing and decreasing mode by taking T0 as a reference and taking Delta T as a step, the formula is T = T0 +/-n 10005DeltaT, wherein n is a positive integer and DeltaT is a time delay adjustment step increment, the phase compensation of the two paths of modulation signals is realized through the formula, and in the phase compensation process, a 4FSK comprehensive tester is used for observing a 4 KeFSrror test value to obtain a compensation result; the initial time of phase output after the compensation of the modulation signal II is t0+ t, and the time delay parameter of the modulation signal II is saved after the phase compensation meets the requirement and is used for calling in the process of 4FSK two-point modulation.
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| CN206164761U (en) * | 2016-09-14 | 2017-05-10 | 成都旋极星源信息技术有限公司 | General digital walkie -Talkie radio frequency SOC chip |
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| DE10330822A1 (en) * | 2003-07-08 | 2005-02-10 | Infineon Technologies Ag | Two-point modulator for high frequency (HF) transceiver, e.g. in mobile radio, with phase control loop (PLL) operable at different reference frequencies, with digital signal processor provides modulation signal |
| US7714666B2 (en) * | 2006-06-15 | 2010-05-11 | Mediatek Inc. | Phase locked loop frequency synthesizer and method for modulating the same |
| KR20080027975A (en) * | 2006-09-25 | 2008-03-31 | 삼성전자주식회사 | Two-point Modulation Apparatus and Method |
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| CN103348644A (en) * | 2011-02-08 | 2013-10-09 | 高通股份有限公司 | Two point modulation digital phase locked loop |
| CN105141560A (en) * | 2015-07-16 | 2015-12-09 | 中国电子科技集团公司第四十一研究所 | Multisystem signal simulation device and method |
| CN206164761U (en) * | 2016-09-14 | 2017-05-10 | 成都旋极星源信息技术有限公司 | General digital walkie -Talkie radio frequency SOC chip |
| CN109391266A (en) * | 2018-12-28 | 2019-02-26 | 陕西烽火电子股份有限公司 | A kind of hybrid frequency synthesizer based on orthogonal modulation |
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