CN115021215B - Method for reducing overshoot phenomenon of input voltage of power circuit - Google Patents
Method for reducing overshoot phenomenon of input voltage of power circuit Download PDFInfo
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- CN115021215B CN115021215B CN202210935651.4A CN202210935651A CN115021215B CN 115021215 B CN115021215 B CN 115021215B CN 202210935651 A CN202210935651 A CN 202210935651A CN 115021215 B CN115021215 B CN 115021215B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
- H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
- H02H7/1213—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for DC-DC converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/02—Details
- H02H3/06—Details with automatic reconnection
- H02H3/066—Reconnection being a consequence of eliminating the fault which caused disconnection
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
The invention discloses a method for reducing overshoot phenomenon of input voltage of a power circuit, which is caused by the fact that output short-circuit protection is removed, and comprises the following steps: step 1, detecting the duration time of the inductor current reaching the inductor current quasi-position when the output of the power supply circuit is at a low level; step 2, when the duration reaches a preset time t1, controlling to slowly reduce the inductive current from the inductive current quasi-position to be close to or equal to zero within a preset time t3, and closing the switch tube when the inductive current is close to or equal to zero; step 3, after the time t2 elapses after the switching tube is closed, the driving circuit normally operates again and conducts the switching tube to judge whether the output short circuit is removed; and 4, if the short circuit phenomenon still exists, repeating the step 2 and the step 3 until the short circuit is removed.
Description
Technical Field
The invention relates to the field of short-circuit protection, in particular to a method for reducing overshoot phenomenon of input voltage of a power circuit.
Background
The power circuit has been widely used in various electronic devices, and generally includes an inductor and a switching tube, particularly in, for example, a pulse-type switching power supply, and the switching power supply can be divided into a step-up type and a step-down type, or the switching circuit has a step-up and step-down function at the same time, and can operate in a step-up mode or a step-down mode; common faults in a power circuit include an output short circuit, in order to protect the power supply, a short circuit protection inside the power supply is usually triggered when the output short circuit occurs, and the power supply is usually required to be self-started after the short circuit occurs, so that in the prior art, the power supply is self-started after a preset time after the short circuit protection is triggered, but when a switching tube is turned on or turned off each time, an inductive current rapidly rises or suddenly drops to zero, an undershoot (undershoot) of an input voltage is caused, and if an input end does not have sufficient current leakage capacity, an overshoot (overshoot) of the power circuit may be caused. Whether it is undershoot or overshoot, it is a challenge for the power supply circuit.
Disclosure of Invention
The present invention is directed to a method for reducing undershoot or overshoot of an input voltage, so as to solve the above problems.
In order to achieve the purpose, the invention provides the following technical scheme:
a method for reducing overshoot of input voltage of a power circuit, wherein the overshoot of the input voltage of the power circuit is caused by the release of output short-circuit protection, the power supply at least comprises a driving circuit, a switching tube and an inductor, the driving circuit can cut off and conduct current of a loop where the inductor is located through the switching tube, and the method comprises the following steps:
step 1: detecting the duration of time when the inductor current reaches the inductor current level when the output of the power supply circuit is at a low level;
step 2: when the duration reaches the preset time t1, controlling to slowly reduce the inductive current from the inductive current quasi-position to be close to or equal to zero within the preset time t3, and closing the switch tube when the inductive current is close to or equal to zero;
and step 3: after the time t2 elapses after the switching tube is turned off, the driving circuit normally operates again and turns on the switching tube to determine whether the output short circuit is released;
and 4, if the short circuit phenomenon still exists, repeating the step 2 and the step 3 until the short circuit is removed.
Further, the time t3 ranges from 10 microseconds to 900 microseconds.
Further, the power circuit is a pulse width modulation circuit PWM, and the time t3 value ranges from 1 to 10 PWM operation periods.
Further, the power supply circuit includes a boost mode and/or a buck mode.
Further, power supply circuit includes step-down circuit, the switch tube includes power MOS pipe Q1 and Q2, step-down circuit still includes control unit, drive circuit, output capacitance, control unit passes through drive circuit and connects power MOS pipe Q1 and Q2 respectively, MOS pipe Q1's source electrode is connected and draws forth node SW with MOS pipe Q2's drain electrode, the inductance both ends are connected node SW with output capacitance's one end, output capacitance's the other end ground connection.
Further, the power supply circuit comprises a boost circuit, and the switch tube comprises a power MOS pipe Q1 and Q2, boost circuit still includes control unit, drive circuit, output capacitance, control unit passes through drive circuit and connects power MOS pipe Q1 and Q2 respectively, MOS pipe Q1 ' S drain electrode is connected and draws forth node SW with MOS pipe Q2 ' S drain electrode, MOS pipe Q1 ' S source ground connection, input voltage V is connected at the inductance both ends IN And one end of the output capacitor is connected with the source electrode of the MOS tube Q2, and the other end of the output capacitor is grounded.
Further, t3 is less than t1 and less than t2.
Further, in step 2: after the time t1, the inductor current drops to a current value less than 0.01mA from the inductor current level within the time t3, and then the MOS transistors Q1 and Q2 are turned off.
Further, the input terminal of the inductor comprises a capacitor.
Further, the power supply circuit comprises a PWM feedback loop, and the feedback loop carries out feedback regulation on the output voltage of the power supply circuit based on the detection current detected from the source electrode or the drain electrode of the switching tube.
Compared with the prior art, the invention has the beneficial effects that: in the invention, the current of the inductor is slowly reduced to zero or close to zero within the preset time t1 after the occurrence of the short circuit, so that the current of the inductor is suddenly reduced when the switching tube is operated to switch the state, the overshoot and the undershoot caused by the output short circuit can be effectively reduced, meanwhile, the power supply is automatically started after the subsequent time t2 is matched, and the fault is automatically eliminated while the short circuit caused by the instantaneous fault is avoided.
Drawings
FIG. 1 is a schematic diagram of a buck mode operating circuit;
FIG. 2 is a schematic diagram of a boost mode operating circuit;
FIG. 3 is a schematic diagram of voltage and time after a conventional short-circuit protection is triggered;
FIG. 4 is a voltage-time diagram illustrating the reduction of overshoot of the input voltage according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, rather than all embodiments, and all other embodiments obtained by a person skilled in the art without making creative efforts based on the embodiments of the present invention belong to the protection scope of the present invention.
Referring to fig. 1-4, a method for reducing overshoot of an input voltage caused by the release of output short-circuit protection in a power circuit, the power circuit at least includes a driving circuit, a switching tube and an inductor, the driving circuit can cut off and conduct a current of a loop where the inductor is located through the switching tube, the method includes the following steps:
step 1: detecting the duration of time for which the inductor current reaches the inductor current level when the output of the power supply circuit is at a low level;
and 2, step: when the duration reaches the preset time t1, controlling to slowly reduce the inductive current from the inductive current quasi-position to be close to or equal to zero within the preset time t3, and closing the switch tube when the inductive current is close to or equal to zero;
and step 3: after the time t2 elapses after the switching tube is closed, the driving circuit normally operates again and turns on the switching tube to determine whether the output short circuit is removed;
and 4, if the short circuit phenomenon still exists, repeating the step 2 and the step 3 until the short circuit is removed.
Specifically, in order to ensure that the inductor current can be effectively reduced, and meanwhile, the normal time sequence of the circuit is not hindered, the value of the time t3 is set to be 10 microseconds to 900 microseconds.
Specifically, the power supply circuit is a pulse width modulation circuit PWM, and the time t3 value range is several PWM operation periods, specifically 1-10 PWM operation periods, so that the drop of the inductor current can follow the multiple of the PWM period, and the normal operation and the short-circuit self-restart of the power supply circuit can not be hindered at high frequency.
Specifically, the power supply circuit comprises a voltage boosting mode and/or a voltage reducing mode, and when the power supply circuit comprises the voltage reducing circuit, the switching tube comprises power MOS tubes Q1 and Q2The voltage reduction circuit further comprises a control unit, a driving circuit and an output capacitor, wherein the control unit is respectively connected with power MOS tubes Q1 and Q2 through the driving circuit, the source electrode of the MOS tube Q1 is connected with the drain electrode of the MOS tube Q2, a node SW is led out, two ends of an inductor are connected with the node SW and one end of the output capacitor, the other end of the output capacitor is grounded, and the voltage reduction mode operation comprises the following steps: when the MOS transistor Q1 is switched on and the MOS transistor Q2 is switched off, the current I is input IN Equal to the inductor current I L And the inductance current I L Charging the output, and inputting current I when MOS transistor Q1 is turned off and MOS transistor Q2 is turned on IN Is zero and the inductor current I L The output is charged.
When power supply circuit includes boost circuit, the switch tube includes power MOS pipe Q1 and Q2, boost circuit still includes control unit, drive circuit, output capacitance, control unit passes through drive circuit and connects power MOS pipe Q1 and Q2 respectively, MOS pipe Q1's drain electrode is connected and draws forth node SW with MOS pipe Q2's drain electrode, MOS pipe Q1's source ground connection, input voltage V is connected at the inductance both ends IN With node SW, output capacitance one end is connected MOS pipe Q2's source electrode and other end ground connection, and the step-down mode operation includes: when the MOS transistor Q1 is switched on and the MOS transistor Q2 is switched off, the current I is input IN Equal to the inductor current I L And the inductance current I L Charging the output, and inputting current I when MOS transistor Q1 is turned off and MOS transistor Q2 is turned on IN Is zero and the inductor current I L The output is charged.
Specifically, t3 is less than t1 and less than t2, the time length of t1/t2/t3 in fig. 4 is a schematic diagram, and in actual application, the time lengths of t2 and t1 far exceed t3.
Specifically, in step 2: after the time t1, within the time t3, the inductor current is reduced to a current value smaller than 0.01mA from the inductor current quasi position, and then the MOS transistors Q1 and Q2 are closed, so that the induction voltage at two ends of the inductor can be small enough when the switching tube is in a switching state, and overshoot and undershoot are reduced to the maximum extent.
Specifically, the input end of the inductor comprises a capacitor, and the input end capacitor can ensure that the voltage is released gently and effectively.
Specifically, the power supply circuit comprises a PWM feedback loop, and the feedback loop carries out feedback regulation on the output voltage of the power supply circuit based on the detection current detected from the source electrode or the drain electrode of the switching tube so as to realize stable regulation on the output voltage.
In this embodiment: referring to fig. 1, the mos transistors Q1 and Q2 are NMOS transistors.
The MOS transistors Q1 and Q2 receive the control of the driving circuit, so that the MOS transistors are conducted in turn when the output is short-circuited.
The invention detects the output current I through the PWM feedback loop L The output short circuit is judged by the short circuit comparator, the over-current comparator judges that the inductive current reaches the inductive current limit level, the current of the parasitic inductor is induced by current induction, and the input current I IN When the output short circuit is detected, the MOS transistors Q1 and Q2 are controlled to be switched on or off by controlling the logic control driving circuit. When the output short circuit is judged to occur and the inductive current exceeds the inductive current limit level for the time t1, the current of the inductor is slowly reduced within the time t3, a specific mode can be that a current bleeder circuit such as a resistor is connected in parallel with the inductor, after the short circuit is judged, a switch in the bleeder circuit is controlled by a control unit to realize current bleeder, or the conduction frequency of an MOS (metal oxide semiconductor) tube Q1 is changed by control logic and a driving circuit within the time t3, so that the current (namely the input current I) of the parasitic inductor LPCB is enabled IN ) And (3) descending, discharging electric energy, closing the MOS tubes Q1 and Q2, controlling the on or off of the MOS tubes Q1 and Q2 by controlling the logic control driving circuit after time t2, and detecting whether the output is short-circuited again.
Referring to fig. 2, similar to fig. 1, when an output short circuit is detected, the driving circuit is controlled by the control logic to control the MOS transistors Q1, Q2 to be turned on or off. When it is determined that an output short circuit occurs and the current of the inductor exceeds the inductor current limit level for a time t1, the current of the inductor is slowly reduced within a time t3, specifically, a current bleeding circuit such as a resistor may be connected in parallel to the inductor, and after the short circuit is determined, a switch in the bleeding circuit is controlled by a control unit to achieve current bleeding, or within the time t3The conduction frequency of the MOS tube Q1 is changed through a control logic and a driving circuit, so that the current (namely the input current I) of the parasitic inductor LPCB IN ) And (3) descending, discharging electric energy, closing the MOS tubes Q1 and Q2, controlling the on or off of the MOS tubes Q1 and Q2 by controlling the logic control driving circuit after time t2, and detecting whether the output is short-circuited again.
In summary, as shown in fig. 4, in the present invention, the inductor current is slowly reduced to zero or close to zero within the preset time t1 after the short circuit occurs, so that when the switching tube is operated to switch states, the inductor current suddenly decreases, overshoot and undershoot caused by the output short circuit can be effectively reduced, and the power supply is automatically started after the subsequent time t2, thereby avoiding the short circuit caused by the transient fault and automatically removing the fault.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.
Claims (7)
1. A method for reducing overshoot of input voltage of a power circuit, the overshoot of the input voltage of the power circuit is caused by the fact that output short-circuit protection is removed, the power circuit at least comprises a driving circuit, a switching tube and an inductor, the driving circuit can cut off and conduct current of a loop where the inductor is located through the switching tube, the power circuit further comprises a voltage reduction circuit, the switching tube comprises power MOS tubes Q1 and Q2, the voltage reduction circuit further comprises a control unit and an output capacitor, the control unit is respectively connected with grids of the power MOS tubes Q1 and Q2 through the driving circuit, a source electrode of the MOS tube Q1 is connected with a drain electrode of the MOS tube Q2 and leads out a node SW, two ends of the inductor are connected with the node SW and one end of the output capacitor, and the other end of the output capacitor is grounded, and the method is characterized by comprising the following steps:
step 1: detecting the duration of time for which the inductor current reaches the inductor current level when the output of the power supply circuit is at a low level;
step 2: when the duration reaches the preset time t1, the conduction frequency of the MOS tube Q1 is controlled to be changed through the control logic and the driving circuit within the preset time t3, so that the input current of the parasitic inductor LPCB is the input current I IN When the inductance current is close to or equal to zero, the switching tube is closed, namely the MOS tubes Q1 and Q2 are closed;
and 3, step 3: after the MOS tubes Q1 and Q2 are closed for t2 time, the driving circuit normally acts again and conducts the switch tube to judge whether the output short circuit is removed;
step 4, if the short circuit phenomenon still exists, repeating the step 2 and the step 3 until the short circuit is removed;
wherein, the power supply circuit is a pulse width modulation circuit PWM, and the time t3 value range in the step 2 is 1-10 PWM operation periods.
2. The method as claimed in claim 1, wherein the time t3 is in a range of 10 μ sec to 900 μ sec.
3. The method of claim 1, wherein a controlled current bleeder circuit is connected in parallel to the inductor in the power supply circuit.
4. The method as claimed in claim 1, wherein t3 is less than t1 and less than t2.
5. The method for reducing overshoot of an input voltage of a power supply circuit as claimed in claim 1, wherein in step 2: after the time t1, the inductor current drops to a current value less than 0.01mA from the inductor current level within the time t3, and then the MOS transistors Q1 and Q2 are turned off.
6. The method of claim 1, wherein the input terminal of the inductor comprises a capacitor.
7. The method for reducing overshoot of the input voltage of the power supply circuit according to claim 1, wherein the power supply circuit comprises a PWM feedback loop for feedback-adjusting the output voltage of the power supply circuit based on the detected current detected from the source or the drain of the MOS transistor Q1.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210935651.4A CN115021215B (en) | 2022-08-05 | 2022-08-05 | Method for reducing overshoot phenomenon of input voltage of power circuit |
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| CN202210935651.4A CN115021215B (en) | 2022-08-05 | 2022-08-05 | Method for reducing overshoot phenomenon of input voltage of power circuit |
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| CN115021215B true CN115021215B (en) | 2022-11-15 |
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Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107425744A (en) * | 2017-07-10 | 2017-12-01 | 南京航空航天大学 | The output waveform of inverter improves and the control method of low-loss short circuit operation |
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| CN101594048B (en) * | 2009-03-19 | 2011-01-19 | 深圳市联德合微电子有限公司 | PWM buck convertor with overcurrent protection function |
| CN106712515B (en) * | 2017-01-22 | 2019-12-03 | 上海新进半导体制造有限公司 | Buck circuit quickly descends method, Buck circuit and the Buck/Boost circuit of electricity |
| CN109756116B (en) * | 2019-01-30 | 2024-03-01 | 上海艾为电子技术股份有限公司 | Boost chip and short-circuit protection circuit thereof |
| CN112333883B (en) * | 2020-11-02 | 2023-08-08 | 无锡职业技术学院 | PWM dimming LED lighting system to avoid inductor current overshoot |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107425744A (en) * | 2017-07-10 | 2017-12-01 | 南京航空航天大学 | The output waveform of inverter improves and the control method of low-loss short circuit operation |
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