Disclosure of Invention
In order to reduce hardware cost, the application provides a tetragonal voting circuit, a fault diagnosis method and a storage medium for an SIS safety system.
In a first aspect, the present application provides a tetragonal voting circuit for an SIS security system, which adopts the following technical scheme:
The square voting circuit comprises a switch circuit, a detection circuit, a driving circuit and a processing circuit, wherein three driving circuits are respectively defined as a first driving circuit, a second driving circuit and a third driving circuit;
The switch circuit and the detection circuit are connected in series on the power supply circuit of the load,
The switching circuit comprises a first branch and a second branch which are connected in parallel, wherein the first branch comprises a first switch and a third switch which are connected in series, and the second branch comprises a second switch and a fourth switch which are connected in series;
the detection circuit is used for detecting whether a power supply loop of a load is conducted or not and outputting a corresponding detection signal;
the processing circuit is respectively connected with the detection circuit, the first driving circuit, the second driving circuit and the third driving circuit;
the processing circuit is used for receiving the detection signal transmitted by the detection circuit, judging whether the driving circuit fails according to the detection signal, sending out alarm information if the driving circuit fails, and transmitting control signals to the first driving circuit, the second driving circuit and the third driving circuit respectively if the driving circuit does not fail;
The first driving circuit is connected with the control end of the first switch and is used for receiving a control signal and responding to the control signal to control the on-off of the first switch;
The second driving circuit is connected with the control end of the second switch and is used for receiving the control signal and responding to the control signal to control the on-off of the second switch;
The third driving circuit is connected with the control end of the third switch and is used for receiving the control signal and responding to the control signal to control the on-off of the third switch;
the first driving circuit and the third driving circuit are respectively connected to two input ends of the OR gate, and the output end of the OR gate is connected to the control end of the fourth switch.
Through the technical scheme, through the application of the OR gate, the two driving circuits can jointly control one switch on the basis of independently controlling the corresponding switches, so that the on-off state on the load circuit can generate richer changes by changing the control signal, and the fault diagnosis of the driving circuits can be realized by only adopting one detection circuit.
Optionally, the processing circuit includes a read-back circuit and three processors;
the read-back circuit is respectively connected with the input ends of the detection circuit and the three processors, the output ends of the three processors are respectively connected with the first driving circuit, the second driving circuit and the third driving circuit,
The read-back circuit is used for acquiring the detection signals transmitted by the detection circuit, expanding the detection signals into three same read-back signals and then synchronously transmitting the three read-back signals to the three processors;
The processor is used for receiving the readback signal and judging whether the driving circuit fails according to the readback signal, and if the driving circuit fails, the processor gives an alarm; if no driving circuit fails, the processor generates a control signal according to the readback signal and transmits the control signal to the connected driving circuit.
Optionally, the processing circuit includes a read-back circuit and three processors;
The read-back circuit is respectively connected with the detection circuit and the three processors, the output ends of the three processors are respectively connected with the first driving circuit, the second driving circuit and the third driving circuit,
The readback circuit is used for receiving the detection signal and judging whether the driving circuit fails according to the detection signal, and if the driving circuit fails, the readback circuit gives an alarm; if no driving circuit fails, the readback circuit generates three readback signals according to the detection signals and synchronously transmits the readback signals to the three processors respectively, and the processors are used for generating corresponding control signals according to the received readback signals and transmitting the control signals to the connected driving circuits.
Optionally, the processing circuit includes a read-back circuit;
The read-back circuit is respectively connected with the detection circuit, the first driving circuit, the second driving circuit and the third driving circuit;
The readback circuit is used for receiving the detection signal output by the detection circuit and judging whether the driving circuit fails according to the detection signal, and if the driving circuit fails, the readback circuit sends out alarm information; if no driving circuit fails, the readback circuit generates three control signals and transmits the three control signals to the first driving circuit, the second driving circuit and the third driving circuit respectively.
In a second aspect, the present application provides a fault diagnosis method for a tetragonal voting circuit of an SIS safety system, which adopts the following technical scheme:
A method of fault diagnosis for a tetragonal voting circuit of an SIS safety system, comprising the steps of:
Obtaining a detection signal, storing detection results represented by the detection signal, judging whether the number of the stored detection results reaches a preset number,
If the number of the stored detection results does not reach the preset number, sending a corresponding control signal according to the number of the currently stored detection results;
if the number of the stored detection results reaches the preset number, arranging the detection results according to the storage sequence to form a result set;
matching corresponding equipment states from a pre-stored prediction set according to the result set; wherein the prediction set stores all the result sets in the arrangement sequence and the equipment states corresponding to the result sets one by one,
Judging whether the matched equipment state belongs to a normal state or not;
If the matched equipment state belongs to a normal state, the stored detection result is emptied, and a preset control signal is sent;
if the matched equipment state does not belong to the normal state, generating alarm information according to the matched equipment state, and sending the alarm information.
According to the technical scheme, in order to match with the square voting circuit, whether the driving circuit fault exists or not and further which driving circuit fault is judged can not be directly and accurately judged by the single detection result, so that the precondition for judging the driving circuit fault is met firstly by storing the detection result, and different control signals are sent out according to the number of the stored detection results so as to generate diversified detection results.
Optionally, a preset control signal is sent according to the number of currently stored detection results, including the following steps: and matching corresponding control signals from a preset sequence number table according to the number of the currently stored detection results, and sending the control signals, wherein a plurality of numerical values for representing the number of the detection results and control signals corresponding to the numerical values one by one are stored in the sequence number table.
Optionally, the stored detection result is emptied and a preset control signal is sent, including the following steps:
And clearing the stored detection results, replacing the prediction set for result set matching and the corresponding sequence number table according to a preset replacement sequence, matching corresponding preset control signals from the new sequence number table according to the number of the currently stored detection results, and sending the matched control information numbers.
Optionally, the number of the prediction sets is two, the two prediction sets correspond to two situations of load power-on and load power-off respectively, the number of the sequence number tables is two, the two sequence number tables correspond to the two prediction sets one by one, and the preset replacement sequence is to circularly replace the two prediction sets and the corresponding sequence number tables.
In a third aspect, the present application provides a computer readable storage medium storing a computer program capable of being loaded by a processor and executing the above-described fault diagnosis method for a four-way voting circuit of an SIS safety system.
In summary, the simplified circuit is designed to reduce hardware cost, and a special fault diagnosis method is matched, so that the circuit can still realize the detection of whether each driving circuit has faults or not so as to meet the application in an SIS safety system.
Detailed Description
The present application is described in further detail below with reference to fig. 2 to 6.
Example 1:
the application provides a tetragonal voting circuit for an SIS safety system, which comprises a switch circuit 1, a detection circuit 2, a driving circuit and a processing circuit 3, and is shown in figure 2.
The switch circuit 1 and the detection circuit 2 are both connected in series on the power supply circuit of the load. The switching circuit 1 comprises a first branch and a second branch connected in parallel, the first branch comprising a first switch and a third switch connected in series, and the second branch comprising a second switch and a fourth switch connected in series. The first switch, the second switch, the third switch and the fourth switch are switch components such as mos tubes or triodes and the like, which have the functions of receiving signals and switching on and off according to the signals. The detection circuit 2 is used for detecting whether a power supply loop of a load is conducted or not and outputting a corresponding detection signal. In this embodiment, the switch elements are NPN transistors, the detection circuit 2 is a voltage detection circuit 2, and the detection signal is a voltage signal.
Specifically, as long as any one of the first branch and the second branch is connected, the power supply loop of the load is turned on, and the detection signal output by the detection circuit 2 is at a high level. And as long as the first branch and the second branch are both turned off, the power supply loop of the load is broken, and the detection signal output by the detection circuit 2 is at a low level.
The three driving circuits are defined as the first driving circuit, the second driving circuit and the third driving circuit for convenience of description below, but it should be noted that the three driving circuits are identical in structure. The three driving circuits respectively control the on-off of the four switches: the output end of the first driving circuit is connected with the control end of the first switch, the output end of the second driving circuit is connected with the control end of the second switch, and the output end of the third driving circuit is connected with the controller of the third switch. The fourth switch is controlled by the first driving circuit and the third driving circuit at the same time. Specifically, the square voting circuit further comprises an OR gate, the output end of the OR gate is connected to the control end of the fourth switch, and the two input ends of the OR gate are respectively connected with the first driving circuit and the third driving circuit. The control ends are all bases of corresponding triodes.
The processing circuit 3 is connected to the detection circuit 2, the first driving circuit, the second driving circuit, and the third driving circuit, respectively.
The processing circuit 3 is used for receiving the detection signal transmitted by the detection circuit 2, judging whether the driving circuit fails according to the detection signal, and if the driving circuit fails, the processing circuit 3 sends out alarm information; if the driving circuit does not fail, the processing circuit 3 transmits control signals to the first driving circuit, the second driving circuit, and the third driving circuit, respectively.
The first driving circuit, the second driving circuit and the third driving circuit output corresponding driving signals according to the control signals. When the driving signal output by the first driving circuit is at a high level, the first switch is turned on; when the driving signal output by the second driving circuit is at a high level, the second switch is turned on; when the driving signal output by the third driving circuit is at a high level, the third switch is turned on. When the driving signal output from any one of the first driving circuit and the third driving circuit is at a high level, the fourth switch is turned on.
Referring to fig. 3, the processing circuit 3 includes a read-back circuit and three processors.
The read-back circuit is respectively connected with the input ends of the detection circuit 2 and the three processors, the output ends of the three processors are respectively connected with the first driving circuit, the second driving circuit and the third driving circuit, wherein the processor connected with the first driving circuit is defined as a processor A, the processor connected with the second driving circuit is defined as a processor B, and the processor connected with the third driving circuit is defined as a processor C. In this embodiment, the read-back circuit is an MCU.
The read-back circuit is used for acquiring the detection signals transmitted by the detection circuit 2, expanding the detection signals into three same read-back signals and then synchronously transmitting the three read-back signals to the three processors.
The processor is used for receiving the readback signal and judging whether the driving circuit fails according to the readback signal, and if the driving circuit fails, the processor gives an alarm; if no driving circuit fails, the processor generates a control signal according to the readback signal and transmits the control signal to the connected driving circuit.
The read-back signal output by the read-back circuit is the same as the detection signal received by the read-back circuit, and the read-back circuit only copies one detection signal into three read-back signals. And by synchronous transmission of the read-back circuit, three processors can simultaneously receive the read-back signals and respond to the read-back signals. Because the programs used for judging whether the driving circuit is faulty in the three processors are the same, the time consumed by the program operation is short and similar and can be basically ignored, when the driving circuit does not have a fault, the three processors can synchronously transmit control signals to the connected driving circuits after synchronously receiving the readback signals.
In addition, the three processors are provided with a program for judging whether the driving circuit is faulty or not and a program for generating a control signal, and alarm information can be sent out as long as any one processor judges that the driving circuit is faulty, so that the situation that the driving circuit is damaged when programs in a certain processor or even two processors are faulty is avoided.
The procedure for determining whether the driving circuit is defective or not and how the procedure for generating the control signal is operated will be described in detail in the following failure diagnosis method, and only a brief description will be given here.
Example 2:
the difference from embodiment 1 is that the processing circuit includes a read-back circuit and three processors.
The read-back circuit is respectively connected with the detection circuit and the three processors, and the output ends of the three processors are respectively connected with the first driving circuit, the second driving circuit and the third driving circuit.
The readback circuit is used for receiving the detection signal and judging whether the driving circuit fails according to the detection signal, and if the driving circuit fails, the readback circuit gives an alarm. If no driving circuit has faults, the readback circuit generates three readback signals according to the detection signals and synchronously transmits the readback signals to three processors respectively, and the processors are used for generating corresponding control signals according to the received readback signals and transmitting the control signals to the connected driving circuit.
In comparison with embodiment 1, in this embodiment, the program for judging whether or not there is a failure of the drive circuit is not provided in the processor but is installed in the read-back circuit. Although the whole circuit cannot normally judge whether the driving circuit has faults or not due to the fact that the faults occur in the program once the program in the read-back circuit occur, the frequency of program recording can be effectively reduced, and then the production steps and time of the whole circuit are shortened.
Example 3:
The difference from embodiment 2 is that the processing circuit in this embodiment includes a read-back circuit. And the read-back circuit is respectively connected with the detection circuit, the first driving circuit, the second driving circuit and the third driving circuit.
The read-back circuit is used for receiving the detection signal output by the detection circuit and judging whether the driving circuit fails according to the detection signal, and if the driving circuit fails, the read-back circuit sends out alarm information; if no driving circuit fails, the readback circuit generates three control signals and transmits the three control signals to the first driving circuit, the second driving circuit and the third driving circuit respectively.
Compared with the embodiment 2, the program for judging the fault and the program for generating the control signal are arranged in the read-back circuit, so that the arrangement of a processor is reduced, the composition structure of the processing circuit is further optimized, and the circuit size is reduced. Correspondingly, of course, if the read-back circuit fails, the cost required for replacement is greater.
The application also provides a fault diagnosis method for the square voting circuit of the SIS safety system, which comprises the following steps of:
s100, obtaining detection signals, storing detection results represented by the detection signals, and judging whether the number of the stored detection results reaches a preset number.
The detection signal is provided by the detection circuit, and when the detection signal is in a high level, the stored detection result is 1; when the detection signal is low level, the stored detection result is 0.
In the above embodiments 1 to 3, the overall architecture of the tetragonal voting circuit is the same, but only the processing circuit for information processing is different in internal structure. The principle of the fault diagnosis method will be further described herein by taking only the structure of the square voting circuit disclosed in embodiment 1 as an example.
In combination with the square voting circuit disclosed in embodiment 1, the relation between the driving circuit state and the load power-on can be expressed by three control signals and detection signal quality tests, namely, the load power-on (detection result) =a & b+a & c+b & C, wherein a is a state value represented by the control signal output by the processor a, B is a state value represented by the control signal output by the processor B, and C is a state value represented by the control signal output by the processor C.
The probability of the simultaneous occurrence of faults of two or more driving circuits is extremely low, so that the situation that the simultaneous occurrence of faults of two or more driving circuits is not needed to be considered, and according to the formula, when one driving circuit is in fault, as long as driving signals provided by the other two driving circuits are in high level, a load can still be electrified, and the stability of power supply of the load is ensured. And one driving circuit is controlled to output low level in turn, so that whether the driving circuit has faults or not can be judged according to the detection result, and once the driving circuit has faults, the specific driving circuit which has faults can be obtained by combining multiple detection results.
The reason for setting the preset number is that the single detection result may determine whether there is a faulty driving circuit, but it cannot accurately determine which driving circuit is faulty, so it is necessary to record a certain number of detection results and then perform the determination. In this embodiment, the preset number is 3 by combining the features of the above formula.
And S200, if the number of the stored detection results does not reach the preset number, sending a corresponding control signal according to the number of the currently stored detection results.
And if the number of the stored detection results does not reach the preset number, executing a program for generating the control signals, and transmitting the corresponding control signals according to the number of the currently stored detection results when the program runs.
The corresponding control signals are sent according to the number of the currently stored detection results, namely, one control signal is actually selected in turn to be different from the other two control signals, for example, when the number of the currently stored detection results is 0, A is 0, B and C is 1; when the number of the currently stored detection results is 1, A, B is 1, and C is 0; when the number of currently stored detection results is 2, A, C is 1, and b is 0.
The specific implementation method is that corresponding control signals are matched from a preset sequence number table according to the number of the currently stored detection results and are sent.
The serial number table stores a plurality of numerical values for representing the number of the detection results and control signals corresponding to the numerical values one by one.
In addition, since the failure of the driving circuit can be further subdivided into the failure to output the high level signal and the failure to output the low level signal, the state of alternately selecting one control signal and the other two control signals is different, and the failure can be further divided into whether two identical control signals are set to 1 or 0.
While avoiding the mutual influence, the judgment of two faults needs to be separated and carried out alternately. Namely, two serial number tables are provided, and the two serial number tables respectively correspond to whether the detection driving circuit can output a high-level signal or not and whether the detection driving circuit can output a low-level signal or not. The specific sequence number table can be seen in fig. 5, wherein table 1 is a sequence number table used for detecting whether the driving circuit can output a high level signal; table 2 is a sequence number table used for detecting whether the driving circuit can output a low level signal.
And S300, if the number of the stored detection results reaches the preset number, arranging the detection results according to the storage sequence to form a result set.
The result set is a digital segment formed by sequentially arranging three detection results according to a storage sequence, for example, the sequentially stored detection results are respectively 1, 1 and 0, and the corresponding formed result set is 110. Together there may be from 000 to 111 of these 8 result sets in this way.
S400, matching the corresponding equipment state from a pre-stored prediction set according to the result set.
The prediction set stores all result sets in the arrangement sequence and equipment states corresponding to the result sets one by one.
The device states include a normal state and a fault state, and the fault state may be further subdivided into a first drive fault, a second drive fault, and a third drive fault.
As with the sequence number table, two prediction sets are established due to the difference in the two kinds of fault decisions of detecting the drive circuit and whether the drive circuit can output a high level signal. In practical use, one prediction set can be selected according to detection requirements, or two prediction sets can be recycled so as to achieve the purpose of comprehensive detection. Of course, in practical application, there is no overlap between the result sets of the two detections, so the two prediction sets can be pooled together.
A specific set of predictions can be seen in fig. 6.
As can be seen from fig. 5 and 6, it is possible to detect whether the driving circuit can output a high level signal by sequentially generating the control signal and the prediction set corresponding to table 3 by using the sequence number table corresponding to table 1 to detect the result set. Accordingly, the sequence number table corresponding to table 2 is adopted to sequentially generate the control signal and the prediction set corresponding to table 4 to detect the result set, so that whether the driving circuit can output the low-level signal can be detected.
S500, judging whether the matched equipment state belongs to a normal state.
And S600, if the matched equipment state belongs to a normal state, clearing the stored detection result and sending a preset control signal.
If only the driving circuit is detected to be able to output a high level signal or only the driving circuit is detected to be able to output a low level signal, after the matched equipment state is in a normal state, the stored detection result is cleared, and the next round of detection can be restarted according to step S200.
In one embodiment, the stored detection result is emptied and a preset control signal is sent, comprising the steps of:
And clearing the stored detection results, replacing the prediction set for result set matching and the corresponding sequence number table according to a preset replacement sequence, matching corresponding preset control signals from the new sequence number table according to the number of the currently stored detection results, and sending the matched control information numbers.
The preset replacement sequence is cyclic replacement.
If it is desired to alternately detect whether the driving circuit can output a high level signal and detect whether the driving circuit can output a low level signal, after the stored detection result is emptied, the matching sequence number table and the prediction set need to be replaced first, and then the next round of detection is performed according to step S200.
And S700, if the matched equipment state does not belong to the normal state, generating alarm information according to the matched equipment state, and sending out the alarm information.
The purpose of subdividing the fault state is to enable maintenance personnel to intuitively know which driving circuit has faults through alarm information, so that the repair speed is improved.
Further, the detected purpose can be determined according to the current use place prediction set, and the detected purpose is added to the alarm information, so that a maintenance person can further know the fault reason of the driving circuit.
Embodiments of the present application also provide a computer-readable storage medium storing a computer program capable of being loaded by a processor and executing any one of the above fault diagnosis methods for a quad voting circuit of an SIS safety system.
The above embodiments are not intended to limit the scope of the present application, so: all equivalent changes in structure, shape and principle of the application should be covered in the scope of protection of the application.