CN114978100A - A filter chip based on parallel stacking of SAW and BAW and its manufacturing process - Google Patents

Abstract

The invention is applicable to the technical field of MEMS chip manufacturing, and provides a filter chip based on parallel stacking of SAW and BAW and a manufacturing process thereof. A filter chip based on parallel stacking of SAW and BAW comprises a substrate, a SAW resonance layer, a BAW resonance layer and a high-impedance sheet; the substrate is connected with the high-resistance sheet through a support pillar, and the SAW resonance layer and the BAW resonance layer are arranged between the support pillar and the high-resistance sheet; the SAW resonance layer and the BAW resonance layer are connected through a first lead, and the BAW resonance layer is arranged on the groove body or the cavity; and pins are arranged on the substrate or on the high-resistance sheet and are respectively connected with the SAW resonance layer and the BAW resonance layer through second wires. Through setting up the mixed structure filter chip that contains SAW resonance layer and BAW resonance layer for the mixed filter chip can not only handle the sound wave of different frequency channels, can also reduce process design's the degree of difficulty.

Description

A filter chip based on parallel stacking of SAW and BAW and its manufacturing process

technical field

The invention belongs to the technical field of MEMS chip manufacturing, and in particular relates to a filter chip based on the parallel stacking of SAW and BAW and a manufacturing process thereof.

Background technique

With the rapid development of today's integrated circuits, large-scale integrated circuits have gradually appeared in people's field of vision. At the same time, with the advancement of the technological era, electronic technology equipment such as mobile phones and automatic vehicles have also appeared one by one, and 5G signals have also been designed accordingly. come out. The advantage of its 5G signal over the original 4G signal is that its frequency band will be larger and wider, the signal transmission will run faster, and the out-of-band frequency band will have a stronger suppression capability.

At present, the classification of filter chips can be divided into SAW type and BAW type. SAW, that is, surface acoustic resonator (Surface Acoustic Wave), a passive device that uses surface acoustic waves to process and propagate signals; BAW, that is, thin-film bulk acoustic resonator (Bulk Acoustic Wave), in the form of longitudinal or transverse waves transmitted inside a solid to process acoustic signals.

SAW and BAW filter chips are adapted to different low, medium and high frequency bands respectively, and only have advantages in the corresponding frequency bands, and the more floors of the chip are built, the more difficult the process is. Therefore, the prior art does not provide a comprehensive solution between processing sound waves of different frequency bands and the difficulty of chip technology.

SUMMARY OF THE INVENTION

The purpose of the embodiments of the present invention is to provide a filter chip based on the parallel stacking of SAW and BAW, which aims to simultaneously enable the filter chip to process multi-band sound waves and reduce the difficulty of the process.

The embodiments of the present invention are implemented as follows: a filter chip based on the parallel stacking of SAW and BAW, the filter chip based on the parallel stacking of SAW and BAW includes a substrate, a SAW resonant layer, a BAW resonant layer and a high resistance piece;

A cavity or a groove is arranged on the substrate, the substrate is connected to the high-resistance sheet through a support column, and the SAW resonant layer and the high-resistance sheet are arranged between the support column and the high-resistance sheet. BAW resonant layer;

The SAW resonant layer and the BAW resonant layer are connected through a first wire, and the BAW resonant layer is arranged on the slot body or the cavity;

Pins are provided on the substrate or on the high-resistance sheet, and the pins are respectively connected to the SAW resonant layer and the BAW resonant layer through second wires.

Another object of the embodiments of the present invention is a filter chip manufacturing process based on the parallel stacking of SAW and BAW, and the filter chip manufacturing process based on the parallel stacking of SAW and BAW includes:

A sacrificial layer is arranged between the substrate and the BAW resonant layer;

disposing a SAW resonant layer on the substrate, and connecting the BAW resonant layer and the SAW resonant layer through a first wire;

A support column is arranged on the substrate, and a high-resistance sheet is arranged on the support column;

Use a thinning process to reduce the thickness of the substrate and the high-resistance sheet, and make the sacrificial layer on the substrate become a cavity or a groove;

Pins are arranged on the substrate or the high-resistance sheet, and the pins are respectively connected to the SAW resonant layer and the BAW resonant layer through second wires.

An embodiment of the present invention provides a filter chip based on the parallel stacking of SAW and BAW. A hybrid structure filter chip including a SAW resonant layer and a BAW resonant layer is provided, and the SAW resonant layer and the BAW resonant layer are arranged side by side. On the substrate, the height of the chip on the floor is reduced, so that the hybrid filter chip can not only deal with sound waves in different frequency bands, but also reduce the difficulty of process design.

Description of drawings

Fig. 1 is a kind of filter chip based on SAW and BAW stacked side by side provided in one embodiment;

2 is another filter chip based on SAW and BAW stacked side by side provided in one embodiment;

3 is a flowchart of a filter chip manufacturing process based on the parallel stacking of SAW and BAW provided in one embodiment;

4 is a structural diagram of a BAW resonant layer provided in one embodiment;

5 is a structural diagram of a SAW resonant layer provided in one embodiment;

FIG. 6 is a structural diagram of setting a support column provided in one embodiment;

7 is a structural diagram of a high-resistance sheet provided in one embodiment;

Fig. 8 is a kind of structure diagram of reducing high-resistance sheet and substrate provided in one embodiment;

FIG. 9 is another structural diagram of reducing high-resistance sheets and substrates provided in one embodiment;

Reference number:

1. Substrate; 2. SAW resonance layer; 3. BAW resonance layer; 4. High-resistance sheet; 5. Cavity; 6. Support column; 7. First wire; 8. Second wire; 9. Pin; 10, the first electrode layer; 11, the dielectric layer; 12, the second electrode layer; 13, the electrode layer sub-block; 14, the tank body.

Detailed ways

In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, but not to limit the present invention.

It will be understood that the terms "first", "second" and the like used in this application may be used herein to describe various elements, but these elements are not limited by these terms unless otherwise specified. These terms are only used to distinguish a first element from another element. For example, a first xx script could be referred to as a second xx script, and similarly, a second xx script could be referred to as a first xx script, without departing from the scope of this application.

As shown in FIG. 1 or FIG. 2, in one embodiment, a filter chip based on SAW and BAW stacked side by side is provided, and the filter chip based on SAW and BAW stacked side by side includes a substrate 1, a SAW resonance Layer 2, BAW resonance layer 3 and high resistance sheet 4;

The substrate 1 is provided with a cavity 5 or a groove body 14 , the substrate 1 is connected to the high-resistance sheet 4 through a support column 6 , and a space between the support column 6 and the high-resistance sheet 4 is arranged. the SAW resonance layer 2 and the BAW resonance layer 3;

The SAW resonance layer 2 and the BAW resonance layer 3 are connected by a first wire 7, and the BAW resonance layer 2 is arranged on the cavity 5 or the groove body 14;

Pins 9 are provided on the substrate 1 or the high-resistance sheet 4 , and the pins 9 are respectively connected to the SAW resonant layer 2 and the BAW resonant layer 3 through second wires 8 .

Specifically, the substrate 1 is generally a silicon substrate or a glass plate, which is used as the base of the filter chip. The SAW resonant layer 2 is a functional part in a surface acoustic resonator (SAW, Surface Acoustic Wave), is disposed above the substrate 1, is in the shape of a tuning fork, and is used for surface acoustic wave processing. The BAW resonant layer 3 is a functional part of a thin-film bulk acoustic resonator (Bulk Acoustic Wave), which is a multi-layer structure composed of multi-layer metals and dielectrics, and processes acoustic wave signals in the form of longitudinal waves or transverse waves transmitted inside the solid. The high-resistance sheet 4 is made of silicon.

Both the SAW resonant layer 2 and the BAW resonant layer 3 are disposed on the surface of the substrate 1 , and a cavity 5 or a groove 14 is disposed below the SAW resonant layer 2 , that is, on the substrate. For the setting of the cavity 5 or the slot 14 and the pin 9, this embodiment provides 4 optional solutions:

The first type is that a closed cavity is arranged on the substrate, and pins are arranged on the substrate;

The second type, as shown in FIG. 1 , the substrate 1 is provided with a closed cavity 5, and the high-resistance sheet 4 is provided with pins 9; the cavity 5 on the substrate 1 is an inner cavity in a closed state, and the overall The structure has strong pressure resistance and is more stable;

The third type is that the substrate is provided with an open groove body, and the high-resistance chip is provided with pins;

Fourth, as shown in FIG. 2 , the substrate 1 is provided with an open groove 14 , and the substrate 1 is provided with pins 9 ; the groove 14 on the substrate 1 opens downward and is in an open state. Generally speaking, arranging the groove body 14 at the bottom of the substrate 1 has two sides: the advantage is that the longitudinal dimension will be relatively reduced and become thinner, but the external environment will have the risk of shortening the life of the working area of the BAW, such as the influence of water vapor . The advantage of the fourth structure is that by reducing the thickness of the Si substrate 1, the device size can be reduced without shortening the service life of the device, because the pins 9 and the bottom of the substrate 1 are located on the same side. In the back-end packaging process, the PCB substrate is welded to the bottom of the substrate, and the surface of the substrate can be used as a protective layer of the device to isolate water vapor, thereby ensuring the life of the chip.

This embodiment provides four kinds of chips with different structures. In actual production, different chips can be selected according to different needs, which improves the freedom of selection in chip production and package integration.

In this embodiment, the BAW resonance layer 3 includes a first electrode layer 10, a dielectric layer 11 and a second electrode layer 12;

The first electrode layer 10 is disposed on the cavity 5 or the groove body 14 , the dielectric layer 11 is disposed on the first electrode layer 10 , and the second electrode layer 12 is disposed on the dielectric on layer 11;

The first electrode layer 10 is provided with electrode layer sub-blocks 13;

The first electrode layer 10 is connected to the pin 9 through the second wire 8 , and the first wire 7 connects the second electrode layer 12 , the dielectric layer 11 , and the electrode layer sub-blocks 13 . and the SAW resonant layer 2 in series.

Specifically, the working area of BAW mainly relies on the "sandwich"-shaped BAW resonant layer (metal-dielectric-metal), that is, a three-layer structure composed of a first electrode layer 10, a dielectric layer 11 and a second electrode layer 12. . The "sandwich"-shaped film layer structure is only an example, and the specific film layers that can be provided are not limited to three layers, but can be multiple layers. The material used for the first electrode layer 10 and the second electrode layer 12 is Mo (molybdenum), the dielectric layer 11 is aluminum nitride (AlN) or scandium-doped aluminum nitride (ScAlN), and the formed “sandwich” film layer is Mo -AlN-Mo or Mo-ScAlN-Mo. In addition, the electrode layer sub-blocks 13 separated from the first electrode layer 10 by the etching process can prevent the device from causing a short circuit during operation, and improve the operation stability of the filter chip.

In this embodiment, the SAW resonant layer 2 and the BAW resonant layer 3 are arranged in a closed space formed by the substrate 1 , the high-resistance sheet 4 and the support column 6 , wherein the SAW resonant layer The resonant layer 2 and the BAW resonant layer 3 are separated by the support pillars 6 .

As we all know, the more layers of the chip are built, the more difficult the process is. The four structures provided in this embodiment can all be regarded as single-story structures, which are less technically difficult and significantly reduce the longitudinal height of the chip size. In addition, the chip of this embodiment includes SAW and BAW, forming a Hybrid filter (hybrid structure filter) laminated module structure, which can not only adapt to the requirements of sound wave filtering in different frequency bands, but also has a high Q value design. While meeting the performance requirements of the terminal product, it can also have a higher degree of adaptation to the high integration and small size requirements of the terminal product.

As shown in FIG. 3, in one embodiment, a filter chip manufacturing process based on the parallel stacking of SAW and BAW is provided, including steps S202-S210:

Step S202 , a sacrificial layer is arranged between the substrate 1 and the BAW resonance layer 3 .

In this embodiment, step S202 specifically includes steps S302 to S314:

Step S302, using a photolithography etching process to set grooves on the substrate 1;

Step S304, filling the groove with a sacrificial layer material;

Step S306, using a CMP polishing process to polish the surface of the substrate 1;

Step S308, disposing the first electrode layer 10 on the groove, and separating the electrode layer sub-blocks 13 from the first electrode layer 10 by using a photolithography etching process;

Step S310, disposing a dielectric layer 11 on the first electrode layer 10;

Step S312, disposing the second electrode layer 12 on the dielectric layer 11;

Step S314 , using a wet etching process to remove the sacrificial layer material in the groove to obtain the sacrificial layer.

The structure of the intermediate product obtained in steps S302 to S314 is shown in FIG. 4 , and the first electrode layer 10 is disposed on the substrate 1 . On the substrate 1 , a sacrificial layer is provided under the first electrode layer 10 , and the sacrificial layer is used for the subsequent processing of the cavity 5 or the groove body 14 . When the first electrode layer 10 and the second electrode layer 12 are provided, a layer of metal film Mo is provided. When the dielectric layer 11 is provided, a layer of ScALN/ALN dielectric film is provided. area, keep the work area.

Step S204 , disposing a SAW resonant layer 2 on the substrate 1 , and connecting the BAW resonant layer 3 and the SAW resonant layer 2 through a first wire 7 .

In this embodiment, step S204 specifically includes steps S402-S404:

Step S402, using a PVD process to form a seed layer on the substrate 1;

Step S404 , forming a first wire 7 and the SAW resonance layer 2 on the seed layer through an electroplating process, and connecting the SAW resonance layer 2 and the BAW resonance layer 3 .

The structure of the intermediate product obtained in steps S402 to S404 is shown in FIG. 5 , the SAW resonant layer 2 and the BAW resonant layer 3 are spaced apart and arranged on the substrate 1 in parallel, and the two can be separated later.

In step S206 , a support column 6 is arranged on the substrate 1 , and a high-resistance sheet 4 is arranged on the support column 6 .

In this embodiment, step S206 specifically includes steps S502-S508:

Step S502, setting an insulating layer on the substrate 1;

Step S504, using a dry process and a wet process to remove the material in the middle part of the insulating layer, so that the SAW resonant layer 2 and the BAW resonant layer 3 are exposed, and the support column 6 is obtained;

Step S506, using a CMP polishing process to polish the support column 6;

Step S508 , the high-resistance sheet 4 is arranged on the support column 6 by a bonding process, so that a closed space is formed between the substrate 1 and the high-resistance sheet 4 .

The structure of the intermediate product obtained from steps S502 to S508 is shown in Figures 6 and 7. The support column 6 separates the SAW resonance layer 2 from the BAW resonance layer 3, and the high-resistance sheet 4 seals the chip at the top, so that the SAW resonance layer 2 and the BAW resonance layer 3 are each provided in a closed space.

In step S208 , the thicknesses of the substrate 1 and the high-resistance sheet 4 are reduced by a thinning process, and the sacrificial layer on the substrate 1 becomes the cavity 5 or the groove 14 .

The structure of the intermediate product obtained in step S208 is shown in FIG. 8 or FIG. 9 . The difference between FIG. 8 and FIG. 9 is that the thickness of the substrate 1 is reduced, the thickness of the groove body 14 is large, and the thickness of the cavity 5 is reduced. Small.

Step S210, set pins 9 on the substrate 1 or the high-resistance sheet 4, and connect the pins 9 with the SAW resonant layer 2 and the BAW resonant layer 3 through the second wire 8 respectively .

In this embodiment, step S210 specifically includes steps S602-S608:

Step S602, using a TSV process to open through holes on the substrate 1 or the high-resistance sheet 4;

Step S604, using a PVD process to set a seed layer on the through hole;

Step S606, forming the second wire 8 in the through hole by using a copper electroplating process;

Step S608, using a high temperature reflow process to set the pins 9 on the substrate 1 or the high-resistance sheet 4, so that the pins 9 are respectively connected to the SAW resonant layer 2 and the The BAW resonance layer 3 is described.

The structure obtained from steps S602 to S608 is shown in FIG. 1 or FIG. 2 . After the process of step S208 and step 210 , four kinds of hybrid filter chips can be obtained in this implementation. The four filter chips based on the parallel stacking of SAW and BAW have been described in detail above, and will not be repeated here.

In addition, pin 9 includes copper posts and tin-silver spheres. The copper pillars are arranged on the high-resistance sheet 4 or the substrate by an electroplating process, so that the copper pillars are connected to the second wires 8, and then a tin-silver layer is arranged on the copper pillars, and the tin-silver layer is removed by a high-temperature reflow process. Reflow into spheres to obtain the tin-silver spheres; setting the pins facilitates subsequent PCB board welding.

The single-floor filter chip structure based on the parallel stacking of SAW and BAW provided by this embodiment constitutes a hybrid structure filter stack module structure, which is less difficult in process technology and significantly reduces the vertical height of the chip size, which can not only adapt to different frequency bands It also has a high Q value design.

The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity, all possible combinations of the technical features in the above-described embodiments are not described. However, as long as there is no contradiction between the combinations of these technical features, All should be regarded as the scope described in this specification.

The above-mentioned embodiments only represent several embodiments of the present invention, and the descriptions thereof are specific and detailed, but should not be construed as a limitation on the scope of the patent of the present invention. It should be pointed out that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can also be made, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention should be subject to the appended claims.

The above descriptions are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention shall be included in the protection of the present invention. within the range.

Claims (8)

1. a filter chip based on SAW and BAW stacked side by side, it is characterized in that, the described filter chip based on SAW and BAW stacked side by side comprises substrate, SAW resonance layer, BAW resonance layer and high resistance sheet; A cavity or a groove is arranged on the substrate, the substrate is connected to the high-resistance sheet through a support column, and the SAW resonant layer and the high-resistance sheet are arranged between the support column and the high-resistance sheet. BAW resonant layer; The SAW resonance layer and the BAW resonance layer are connected through a first wire, and the BAW resonance layer is arranged on the cavity or the slot body; Pins are provided on the substrate or on the high-resistance sheet, and the pins are respectively connected to the SAW resonant layer and the BAW resonant layer through second wires. 2. The filter chip based on the parallel stacking of SAW and BAW according to claim 1, wherein the BAW resonance layer comprises a first electrode layer, a dielectric layer and a second electrode layer; The first electrode layer is arranged on the cavity or the groove body, the medium layer is arranged on the first electrode layer, and the second electrode layer is arranged on the medium layer; electrode layer sub-blocks are arranged on the first electrode layer; The first electrode layer is connected to the pin through the second wire, and the first wire connects the second electrode layer, the dielectric layer, the electrode layer sub-block and the SAW resonance layer in series stand up. 3. The filter chip based on the parallel stacking of SAW and BAW according to claim 1, characterized in that, the SAW resonant layer and the BAW resonant layer are arranged on the substrate, the high-resistance sheet and the BAW resonant layer. In the closed space formed by the support column, the SAW resonance layer and the BAW resonance layer are separated by the support column. 4. A filter chip manufacturing process based on SAW and BAW side-by-side stacking, it is characterized in that, the filter chip manufacturing process based on SAW and BAW side-by-side stacking comprises: A sacrificial layer is arranged between the substrate and the BAW resonant layer; disposing a SAW resonant layer on the substrate, and connecting the BAW resonant layer and the SAW resonant layer through a first wire; A support column is arranged on the substrate, and a high-resistance sheet is arranged on the support column; Use a thinning process to reduce the thickness of the substrate and the high-resistance sheet, and make the sacrificial layer on the substrate become a cavity or a groove; Pins are arranged on the substrate or the high-resistance sheet, and the pins are respectively connected to the SAW resonant layer and the BAW resonant layer through second wires. 5. The filter chip manufacturing process based on the parallel stacking of SAW and BAW according to claim 4, wherein the sacrificial layer is provided between the substrate and the BAW resonance layer, comprising the following steps: A groove is provided on the substrate by a photolithography etching process; filling the groove with a sacrificial layer material; The surface of the substrate is polished by a CMP polishing process; A first electrode layer is arranged on the groove, and an electrode layer sub-block is separated from the first electrode layer by a photolithography etching process; Disposing a dielectric layer on the first electrode layer; Disposing a second electrode layer on the dielectric layer; The sacrificial layer material in the groove is removed by a wet etching process to obtain the sacrificial layer. 6 . The filter chip manufacturing process based on the parallel stacking of SAW and BAW according to claim 4 , wherein the SAW resonance layer is provided on the substrate, and the BAW resonance is connected through a first wire. 7 . layer and the SAW resonant layer, comprising the following steps: forming a seed layer on the substrate using a PVD process; A first wire and the SAW resonant layer are formed on the seed layer through an electroplating process, and the SAW resonant layer is connected to the BAW resonant layer. 7 . The filter chip manufacturing process based on the parallel stacking of SAW and BAW according to claim 4 , wherein, the support column is arranged on the substrate, and a high resistance sheet is arranged on the support column, 8 . Include the following steps: disposing an insulating layer on the substrate; Remove the material in the middle part of the insulating layer by using a dry process and a wet process, so that the SAW resonant layer and the BAW resonant layer are exposed, and the support column is obtained; Utilize CMP polishing process to carry out polishing treatment to the support column; The high-resistance sheet is arranged on the support column by a bonding process, so that a closed space is formed between the substrate and the high-resistance sheet. 8. The filter chip manufacturing process based on the parallel stacking of SAW and BAW according to claim 4, characterized in that, the pins are arranged on the substrate or the high-resistance sheet, and the second wire is used to connect the The pins are respectively connected with the SAW resonance layer and the BAW resonance layer, including the following steps: A through hole is formed on the substrate or the high-resistance sheet by using a TSV process; The seed layer is arranged on the through hole by PVD process; forming the second wire in the through hole by using an electroplating copper process; The pins are arranged on the substrate or the high-resistance sheet by using a high temperature reflow process, so that the pins are respectively connected to the SAW resonant layer and the BAW resonant layer through second wires.

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