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CN114826491B - Chip, replaceable article, image forming apparatus, and data transmission method - Google Patents

Chip, replaceable article, image forming apparatus, and data transmission method Download PDF

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Publication number
CN114826491B
CN114826491B CN202210669570.4A CN202210669570A CN114826491B CN 114826491 B CN114826491 B CN 114826491B CN 202210669570 A CN202210669570 A CN 202210669570A CN 114826491 B CN114826491 B CN 114826491B
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China
Prior art keywords
data
chip
host device
preset data
controlled switch
Prior art date
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Active
Application number
CN202210669570.4A
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Chinese (zh)
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CN114826491A (en
Inventor
刘卫臣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jihai Microelectronics Co ltd
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Jihai Microelectronics Co ltd
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Application filed by Jihai Microelectronics Co ltd filed Critical Jihai Microelectronics Co ltd
Priority to CN202410939510.9A priority Critical patent/CN118842555A/en
Publication of CN114826491A publication Critical patent/CN114826491A/en
Application granted granted Critical
Publication of CN114826491B publication Critical patent/CN114826491B/en
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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0061Error detection codes
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/17Ink jet characterised by ink handling
    • B41J2/175Ink supply systems ; Circuit parts therefor
    • B41J2/17503Ink cartridges
    • B41J2/17543Cartridge presence detection or type identification
    • B41J2/17546Cartridge presence detection or type identification electronically
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J29/00Details of, or accessories for, typewriters or selective printing mechanisms not otherwise provided for
    • B41J29/38Drives, motors, controls or automatic cut-off devices for the entire printing mechanism
    • B41J29/393Devices for controlling or analysing the entire machine ; Controlling or analysing mechanical parameters involving printing of test patterns
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/02Details
    • H04L12/12Arrangements for remote connection or disconnection of substations or of equipment thereof
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/22Parsing or analysis of headers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J29/00Details of, or accessories for, typewriters or selective printing mechanisms not otherwise provided for
    • B41J29/38Drives, motors, controls or automatic cut-off devices for the entire printing mechanism
    • B41J29/393Devices for controlling or analysing the entire machine ; Controlling or analysing mechanical parameters involving printing of test patterns
    • B41J2029/3937Wireless communication between the printer and the cartridge, carriage or printhead

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Security & Cryptography (AREA)
  • Communication Control (AREA)

Abstract

The embodiment of the invention provides a chip, a replaceable article, an image forming device and a data transmission method. The chip is applied to a replaceable article, the replaceable article is detachably arranged on the host equipment, and the chip comprises a control circuit and an interface module; the interface module is used for communicating with the host device; the control circuit is used for controlling the interface module to stop receiving preset data from the host equipment when judging that the host equipment starts to transmit the preset data. The embodiment of the invention ensures that the chip does not need to execute the preset data, avoids the chip abnormality or the chip power consumption increase or the running speed slowing caused by executing the preset data, and ensures the normal operation of the chip.

Description

Chip, replaceable article, image forming apparatus, and data transmission method
[ Field of technology ]
The embodiment of the invention relates to the technical field of image formation, in particular to a chip, a replaceable article, image forming equipment and a data transmission method.
[ Background Art ]
With the development of image forming technology, image forming apparatuses like laser printers and inkjet printers have been widely used. In the image forming process, the image forming apparatus requires assistance of the image forming auxiliary information provided by the consumable cartridge to complete the image forming process. Imaging assistance information of the image forming apparatus is recorded on a chip in addition to the image forming apparatus. The chip can be attached to the consumable box, the chip is usually stuck or clamped on the consumable box, the consumable box can be an ink box filled with ink or a selenium drum filled with carbon powder, and the chip is used for controlling authentication and data matching between the consumable box and the image forming device and providing imaging auxiliary information in the subsequent imaging process. The chip can record the initial information of consumable cartridges such as the type, color, capacity of recording materials (such as ink and carbon powder), production date, manufacturer code and the like of the consumable cartridges, and can also record imaging auxiliary information such as data representing the residual quantity/consumption of the recording materials obtained in the subsequent printing process. Therefore, the chip mainly plays a role in identifying and providing the use condition of the recording material.
The chip and the image forming device can exchange data through a communication circuit in the chip. In some communication processes, the image forming apparatus may send data to be operated or logically processed to the chip or send an upgrade instruction to the consumable chip, and when the chip cannot operate, logically process the data or complete upgrade according to the upgrade instruction, the chip is abnormal, thereby affecting the normal operation of the chip. In other communication processes, the image forming apparatus transmits data which the chip does not want to execute to the chip, and when the chip receives the data which the chip does not want to execute, the power consumption of the chip may be increased and the operation speed may be slowed, thereby affecting the normal operation of the chip.
[ Invention ]
In view of the above, the embodiments of the present invention provide a chip, a replaceable article, an image forming apparatus, and a data transmission method for ensuring normal operation of the chip.
In one aspect, an embodiment of the present invention provides a chip applied to a replaceable item detachably mounted on a host device, the chip including a control circuit and an interface module;
The interface module is used for communicating with the host device;
The control circuit is used for controlling the interface module to stop receiving preset data from the host equipment when judging that the host equipment starts to transmit the preset data.
Optionally, the interface module includes a controlled switch and at least one first communication port, the controlled switch being connected between the control circuit and a designated first communication port, each first communication port being for communication connection with a corresponding second communication port in the host device;
The control circuit is used for controlling the controlled switch to be switched off when the host equipment starts to transmit preset data.
Optionally, a control terminal of the controlled switch is connected to a signal output terminal of the control circuit, an output terminal of the controlled switch is connected to a signal input terminal of the control circuit, and an input terminal of the controlled switch is connected to the designated first communication port;
The control circuit is used for outputting a first control signal to the control end of the controlled switch through the signal output end so as to control the controlled switch to be disconnected.
Optionally, the capacity size of the preset data includes a plurality of capacity units;
the control circuit is used for receiving preset data of a part of capacity units or not receiving preset data of any one capacity unit before outputting a first control signal to the controlled switch through the signal output end.
Optionally, the control circuit is further configured to output a second control signal to the control terminal of the controlled switch through the signal output terminal to control the controlled switch to be turned on when the reception of the preset data from the host device is stopped, and resume data transmission with the host device through the turned-on controlled switch to return a response bit to the host device.
Optionally, the first communication port comprises a contact communication port, and the contact communication port comprises a contact pin, a contact or a spring.
Optionally, the first communication port comprises a contactless communication port comprising a coil or an antenna.
In another aspect, an embodiment of the present invention provides a replaceable item, including the chip described above.
In another aspect, an embodiment of the present invention provides an image forming apparatus including a host apparatus and a replaceable item detachably mounted on the host apparatus, the replaceable item including a chip for communicating with the host apparatus;
The chip is used for stopping receiving the preset data from the host equipment when judging that the host equipment starts to transmit the preset data.
In another aspect, an embodiment of the present invention provides a data transmission method implemented based on an image forming apparatus including a host apparatus and a replaceable item detachably mounted on the host apparatus, the replaceable item including a chip for communicating with the host apparatus;
The method comprises the following steps:
And when the chip judges that the host equipment starts to transmit preset data, stopping receiving the preset data from the host equipment.
In the technical scheme provided by the embodiment of the invention, the replaceable article is detachably arranged on the host equipment, the replaceable article comprises the chip communicated with the host equipment, and the chip can be used for stopping receiving the preset data from the host equipment when judging that the host equipment starts to transmit the preset data, so that the chip does not need to execute the preset data, and the chip abnormality or the chip power consumption increase and the running speed slowing caused by executing the preset data are avoided, thereby ensuring the normal work of the chip.
[ Description of the drawings ]
Fig. 1 is a schematic view of an image forming apparatus according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of an instruction format according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of another instruction format according to an embodiment of the present invention;
fig. 4 is an application schematic diagram of a chip according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a chip according to an embodiment of the present invention.
[ Detailed description ] of the invention
For a better understanding of the technical solution of the present invention, the following detailed description of the embodiments of the present invention refers to the accompanying drawings.
It should be understood that the described embodiments are merely some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in this application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be understood that the term "and/or" as used herein is merely one way of describing an association of associated objects, meaning that there may be three relationships, e.g., a and/or b, which may represent: the first and second cases exist separately, and the first and second cases exist separately. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.
Fig. 1 is a schematic structural view of an image forming apparatus according to an embodiment of the present invention, and as shown in fig. 1, the image forming apparatus includes a host apparatus 10 and a replaceable item 20, the replaceable item 20 is detachably mounted on the host apparatus 10, the replaceable item 20 includes a chip 200, and the chip 200 is used for communication with the host apparatus 10. The chip 200 is configured to stop receiving preset data from the host device 10 when it is determined that the host device 10 starts transmitting the preset data.
In the field of print imaging, the host apparatus 10 may be an image forming device, examples of which include: inkjet printers, laser printers, light Emitting Diode (LED) printers, copiers, scanners or multifunctional all-in-one fax machines, and multifunctional peripherals (MFPs) that perform the above functions in a single device. The image forming apparatus includes an image forming control unit for controlling the entire image forming apparatus, and an image forming unit for forming an image on a conveyed sheet under the control of the image forming control unit based on image forming data and a developer such as toner stored in a consumable cartridge.
In the field of print imaging, the replaceable item may be a consumable cartridge for containing developer. For example, the consumable cartridge is an ink cartridge, and the developer is ink, and the ink cartridge is used for containing the ink; the consumable box is a selenium drum, and the developer is carbon powder, so that the selenium drum is used for containing the carbon powder; the consumable box is a powder box or a powder cylinder, and the developer is carbon powder, so that the powder box is used for containing the carbon powder, and the powder cylinder is used for containing the carbon powder. The consumable cartridge is detachably mounted on the image forming apparatus.
The chip 200 may receive data transmitted by the host device while communicating with the host device 10. The instruction sent by the host device may be various instructions, such as a read instruction, a write instruction, an authentication instruction, or a control instruction of a specific operation, or the like.
In an embodiment of the present invention, the host device 10 may serially transmit instructions to the chip 200. As an alternative, the preset data may include an instruction check value or an instruction identifier.
Fig. 2 shows an instruction format of an instruction transmitted in serial, and fig. 2 is a schematic diagram of an instruction format provided in an embodiment of the present invention, where the instruction may include an instruction header, instruction data, an instruction check value 1, and an instruction check value 2 in sequence as shown in fig. 2. In some embodiments, an instruction header is used to represent the type, access address, and length of the instruction; the instruction data is used to represent information to be transmitted to the chip 200 by the host device 10; the instruction check value 1 is used for representing a check result obtained by calculating the instruction header and the instruction data by adopting a certain algorithm, wherein the check result is a check result related to the instruction header and the instruction data and used for checking whether the data is abnormal in transmission, for example, the algorithm can be a cyclic redundancy code check (Cyclic Redundancy Check, CRC), and then the instruction check value 1 can be a CRC code of the instruction header and the instruction data; the instruction check value 2 is used to represent a check result obtained by calculating the instruction header, the instruction data and the instruction check value 1 by using an algorithm, for example, the algorithm may be CRC, and the instruction check value 2 may be a CRC code of the instruction header, the instruction data and the instruction check value 1. In practical applications, the algorithm may also employ other verification algorithms.
FIG. 3 illustrates another instruction format of a serially transmitted instruction, FIG. 3 is a schematic diagram of another instruction format provided by an embodiment of the present invention, as shown in FIG. 3, which may include, in order, an instruction header, instruction data, an instruction identifier, and an instruction check value, the instruction header being used to represent, in some embodiments, the type, access address, and length of the instruction; the instruction data is used to represent information to be transmitted to the chip 200 by the host device 10; the instruction identifier is used to indicate the type or order of the instruction, for example, when the instruction is an authentication instruction, the instruction identifier is used to inform the chip 200 of what number of transmission the instruction is, and the instruction identifier may also indicate the location or interpretation mode of the instruction check value; the instruction check value is used to represent a result of a check calculated on the instruction header, the instruction data and the instruction identifier using an algorithm, which may be, for example, a CRC, and may be a CRC code of the instruction header, the instruction data and the instruction identifier. In practical applications, the algorithm may also employ other verification algorithms.
In the embodiment of the present invention, after the chip 200 receives the instruction sent by the host device 10, the data of each part of the instruction can be identified, the instruction is executed according to the requirement of the instruction to obtain the execution result, and the execution result is fed back to the host device 10. To avoid affecting the operation of the chip 200, the user may set all or part of one type of data of the instruction as data that the chip 200 does not execute, i.e., all or part of one type of data in the instruction as preset data. As an alternative, as shown in fig. 2, the user may set all or part of one type of data of the instruction data, the instruction check value 1, and the instruction check value 2 as preset data, for example, set the instruction check value 2 as preset data, and determine that the host device 10 starts to transmit the preset data instruction check value 2 after the chip 200 determines that the host device 10 has transmitted the instruction header, the instruction data, and the instruction check value 1, thereby stopping receiving the instruction check value 2 from the host device 10, and at this time, the chip 200 does not need to execute the instruction check value 2 any more, thereby avoiding affecting the normal operation of the chip 200 when executing the instruction check value 2. Alternatively, as shown in fig. 3, the user may set all or part of one type of data of the instruction data, the instruction identifier, and the instruction check value as preset data, for example, set the instruction identifier as preset data, and determine that the host device 10 starts to transmit the instruction identifier of the preset data after the chip 200 determines that the host device 10 has transmitted the instruction header and the instruction data, thereby stopping receiving the instruction identifier from the host device 10, at this time, the chip 200 does not need to execute the instruction identifier any more, thereby avoiding affecting the normal operation of the chip 200 when executing the instruction identifier.
In the embodiment of the present invention, the chip 200 may determine that the host device 10 starts to transmit the preset data by determining the data of the predetermined capacity size transmitted by the host device 10, the content of the data transmitted by the host device 10, the format of the data transmitted by the host device 10, or the transmission time period of the data transmitted by the host device 10.
Alternatively, the chip 200 is configured to determine that the host device 10 starts transmitting the preset data when it is determined that the data of a predetermined capacity size is received, where the predetermined capacity size may include a predetermined bit or a predetermined byte. The data of each part of the data transmitted from the host device 10 to the chip 200 has a fixed length, that is, a fixed capacity. The chip 200 determines whether the host device 10 has transmitted the data of the predetermined capacity size to the chip 200 by counting the capacity size of the received data, and determines that the host device 10 starts transmitting the preset data if it is determined that the host device 10 has transmitted the data of the predetermined capacity size to the chip 200. Taking fig. 2 as an example, as shown in fig. 2, the instruction header, the instruction data, the instruction check value 1 and the instruction check value 2 all have fixed capacity sizes, for example, the capacity size of the instruction header is 8 bytes (Byte), the capacity size of the instruction data is 32 bytes, the capacity size of the instruction check value 1 is 2 bytes, the capacity size of the instruction check value 2 is 8 bytes, the predetermined capacity size is the sum of the capacity size of the instruction data, the capacity size of the instruction data and the capacity size of the instruction check value 1, that is, the predetermined capacity size is 42 bytes, after the chip 200 receives the data of 42 bytes from the host device 10, it is determined that the host device 10 starts to transmit the preset data instruction check value 2, and at this time, the chip 200 stops receiving the instruction check value 2 from the host device 10.
Alternatively, the chip 200 is configured to determine that the host device 10 starts transmitting the preset data according to the content of the received data. Taking fig. 2 as an example, as shown in fig. 2, the preset data is an instruction check value 2, and after the host device 10 transmits the instruction check value 1 to the chip 200, the chip 200 determines that the host device 10 has transmitted the data check value 1 according to the content of the received instruction check value 1, and further determines that the host device 10 starts to transmit the preset data instruction check value 1, at this time, the chip 200 stops receiving the instruction check value 2 from the host device 10.
Alternatively, the chip 200 is configured to determine that the host device 10 starts transmitting the preset data according to the format of the received data. Taking fig. 3 as an example, as shown in fig. 3, the preset data is an instruction identifier, the host device 10 transmits the instruction identifier to the chip 200 after transmitting the instruction data to the chip 200, and then the chip 200 determines that the host device 10 has transmitted the instruction data according to the format of the received instruction data, and further determines that the host device 10 starts transmitting the preset data instruction identifier, at this time, the chip 200 stops receiving the instruction identifier from the host device 10.
Alternatively, the chip 200 is configured to determine that the host device 10 starts transmitting the preset data when it is determined that the transmission duration of the received data reaches the preset duration. The chip 200 may start timing to obtain a transmission time length of the data when receiving the data transmitted from the host device 10, and determine that the host device 10 starts transmitting the preset data when the transmission time length of the data obtained by timing reaches the preset time length. Taking fig. 2 as an example, as shown in fig. 2, the transmission duration of the instruction header, the instruction data and the instruction check value 1 transmitted by the host device 10 is 30ms, then the preset duration is 30ms, the chip 200 starts timing when receiving the data transmitted by the host device 10, when the data transmission duration obtained by timing reaches 30ms, it is judged that the instruction header, the instruction data and the instruction check value 1 transmitted by the host device 10 have been received, at this time, the chip 200 can determine that the host device 10 starts to transmit the preset data instruction check value 2, and then the chip 200 stops receiving the instruction check value 2 from the host device 10.
In the embodiment of the invention, the capacity of the preset data comprises a plurality of capacity units; the chip 200 is for receiving the preset data of the partial capacity unit before stopping the reception of the preset data from the host device 10 and before resuming the data transmission. In other words, the capacity size of the preset data received by the chip 200 from the host device 10 lacks a partial capacity unit, which may include lacking one capacity unit or lacking a plurality of capacity units. Wherein the capacity unit may include 1 bit or 1 byte. For example, the capacity size of the preset data includes a plurality of bits, and the chip 200 stops receiving the 8 th bit of the preset data from the host device 10 after receiving the 7 th bit of the preset data, thereby realizing that the 7 th bit of the preset data is received before stopping receiving the preset data from the host device 10 and resuming the data transmission. For another example, the size of the capacity of the preset data includes a plurality of bytes, and the chip 200 stops receiving the data of the 4 th byte of the preset data from the host device 10 after receiving the data of the 3 rd byte of the preset data, thereby realizing that the preset data of 3 bytes is received before stopping receiving the preset data from the host device 10 and resuming the data transmission. In this case, although the chip 200 receives a part of the preset data, since all the preset data is not received, the received preset data is different from the complete preset data, and the chip 200 cannot perform the part of the preset data, thereby avoiding affecting the normal operation of the chip 200 when the preset data is performed.
In the embodiment of the invention, the capacity of the preset data comprises a plurality of capacity units; the chip 200 is for not receiving preset data of any one capacity unit before stopping receiving the preset data from the host device 10 and before resuming data transmission. For example, the chip 200 does not receive the preset data of any one byte before stopping the reception of the preset data from the host device 10 and before resuming the data transmission, in other words, the chip 200 stops the reception of the preset data from the host device 10 when the preset data of any one byte is not received. In this case, since the chip 200 does not receive the preset data, the chip 200 does not need to perform the preset data, thereby avoiding the influence on the normal operation of the chip 200 when performing the preset data.
In the embodiment of the present invention, the chip 200 is further used to resume data transmission with the host device 10 to return a response bit (ACK) to the host device 10 when the reception of the preset data from the host device 10 is stopped. Taking an integrated circuit bus (Inter-INTEGRATED CIRCUIT, abbreviated as IIC) communication protocol for example, in which the host device 10 transmits 8 bits of data to the chip 200, the chip 200 is required to reply a response bit to the host device 10 to notify the host device 10 that 8 bits of data conforming to the standard protocol are received. For example, the chip 200 stops receiving the data of the 4 th bit of the preset data from the host device 10 after receiving the data of the 3 rd bit of the preset data transmitted by the host device 10; when the host device 10 has transmitted the 8 th bit of the preset data, the chip 200 resumes data transmission with the host device 10 to return a response bit to the host device 10, avoiding that the host device 10 considers the chip 200 to be abnormal; further, the chip 200 may continue to perform stopping of receiving preset data from the host device 10 after returning the response bit to the host device 10. For example, the chip 200 may determine that the host device 10 has transmitted the 8 th bit of the preset data by determining the predetermined capacity size of data transmitted by the host device 10 or the transmission time period of data transmitted by the host device 10.
In the embodiment of the present invention, the chip 200 is further configured to start receiving data from the host device 10 when it is determined that the host device 10 transmits the full preset data or the partial preset data, so that other data transmitted by the host device 10 can be continuously received.
In the embodiment of the present invention, the preset data may be data or an upgrade instruction that the chip 200 cannot perform operation and logic processing; or the preset data may be data that the chip 200 does not wish to perform.
In the technical scheme of the image forming device provided by the embodiment of the invention, the replaceable article is detachably arranged on the host device, the replaceable article comprises the chip communicated with the host device, and the chip can be used for stopping receiving the preset data from the host device when judging that the host device starts to transmit the preset data, so that the chip does not need to execute the preset data, and abnormal chip consumption or increased chip power consumption and slower running speed caused by executing the preset data are avoided, thereby ensuring the normal work of the chip.
To implement the functionality of the chip 200 shown in fig. 1, an embodiment of the present invention provides a chip. Fig. 4 is a schematic diagram of an application of a chip according to an embodiment of the present invention, as shown in fig. 4, the chip 200 is applied to a replaceable article, the replaceable article is detachably mounted on the host device 10, and the chip 200 includes a control circuit 210 and an interface module. The interface module is used for communicating with the host device 10; the control circuit 210 is configured to control the interface module to stop receiving the preset data from the host device 10 when it is determined that the host device 10 starts transmitting the preset data. Wherein the exchangeable object is not specifically shown in fig. 4.
The interface module comprises a controlled switch T1 and at least one first communication port 201. The controlled switch T1 is connected between the control circuit 210 and the designated first communication ports 201, each first communication port 201 being for communication connection with a corresponding second communication port 101 in the host device. The control circuit 201 is configured to control the controlled switch T1 to be turned off to disconnect the control circuit 201 from the specified first communication port 201 when it is determined that the host device 10 starts transmitting the preset data, thereby controlling the specified first communication port 201 in the interface module to stop receiving the preset data from the host device 10.
As shown in fig. 3, the interface module may include a plurality of first communication ports 201, and accordingly, the host device 10 may include a plurality of second communication ports 101, and a communication link may be established between each first communication port 201 and the corresponding second communication port 101. The communication link may conform to a standard communication protocol, for example, standard communication protocols including, but not limited to, IIC communication protocols. When the communication links conform to the IIC standard communication protocol, the power supply signal VCC, the clock signal SCL, the data signal SDA and the ground signal GND are respectively transmitted on the four communication links; in practical applications, when the communication link conforms to other communication protocols, a detection signal, a reset signal, a chip selection signal, or the like may also be transmitted on the communication link, which is not specifically shown. As an alternative, the interface module may comprise a first communication port 201 and accordingly the host device 10 may comprise a second communication port 101, in which case the communication link between the first communication port 201 and the second communication port 101 may follow a single bus communication protocol, the data signal SDA and the other signals being transmitted in common with the communication link. Embodiments of the present invention are not limited in the communication protocol that the communication link follows or in the type of signal transmitted over the communication link.
Alternatively, the host device 10 and the chip 200 may communicate by a contact communication method, which is a wired communication method. The first communication port 201 comprises a contact communication port and, correspondingly, the second communication port 101 comprises a contact communication port, the first communication port 201 being in physical contact with a corresponding second communication port 101 to establish a communication link, the contact communication port may comprise an electrical contact point, for example, the electrical contact point comprises a stylus, a contact point or a dome. As shown in fig. 4, the four first communication ports 201 include a VCC port transmitting a power supply signal, an SCL port transmitting a clock signal, an SDA single port transmitting a data signal, and a GND port transmitting a ground signal; accordingly, the four second communication ports 101 include a VCC port transmitting a power supply signal, an SCL port transmitting a clock signal, an SDA port transmitting a data signal, and a GND port transmitting a ground signal.
Alternatively, the host device 10 and the chip 200 may communicate with each other by a contactless communication method, which is a wireless communication method. The first communication port 201 comprises a contactless communication port and, correspondingly, the second communication port 101 comprises a contact communication port, the first communication port 201 being wirelessly connected with the corresponding second communication port 101 to establish a communication link, the contactless communication port may comprise a coil or an antenna. When the first communication port 201 is a coil, the second communication port 101 is also a coil; when the first communication port 201 is an antenna, the second communication port 101 is also an antenna.
As shown in fig. 4, the control terminal of the controlled switch T1 is connected to the signal output terminal P1 of the control circuit, the output terminal of the controlled switch T1 is connected to the signal input terminal P2 of the control circuit 210, and the input terminal of the controlled switch T1 is connected to the designated first communication port 201. As shown in fig. 3, for example, the designated first communication port 201 is an SDA port that transmits a data signal. The control circuit 210 is configured to output a first control signal to the control terminal of the controlled switch T1 through the signal output terminal P1 to control the controlled switch T1 to be turned off, so as to disconnect signal transmission between the input terminal and the output terminal of the controlled switch T1. Accordingly, when the controlled switch T1 needs to be closed, the control circuit 210 is configured to output a second control signal to the control terminal of the controlled switch T1 through the signal output terminal P1 to control the controlled switch T1 to be turned on, so that signal transmission can be performed between the input terminal and the output terminal of the controlled switch T1. In the embodiment of the present invention, the controlled switch T1 is a circuit element that can function as a switch, and as an alternative, the controlled switch T1 may be a transistor, and the transistor may be a triode or a field effect transistor. The first control signal and the second control signal are signals with opposite functions, the first control signal is used for opening the controlled switch T1, and the second control signal is used for conducting the controlled switch T1. According to different types of the controlled switch T1, when the first control signal is a high-level signal or a low-level signal, the second control signal is a low-level signal; conversely, when the first control signal is a low level signal, the second control signal may be a high level signal. The high level signal and the low level signal are definitions of high and low levels in the digital circuit, for example, the high level signal may be a voltage between 2.5V and 5V, and the low level signal may be a voltage between 0V and 1.5V.
As an alternative, as shown in fig. 4, a first signal node N is disposed on a connection line between an input terminal of the controlled switch T1 and the first communication port 201, where the first signal node N is used to detect and identify data received by the first communication port 201; a second signal node M is provided on a connection line between the output of the controlled switch T1 and the signal input P2 of the control circuit 210, the second signal node M being for detecting and identifying received data.
As shown in fig. 4, the control circuit 210 is configured to send a first control signal to the controlled switch T1 through the signal output terminal P1 when it is determined that the host device 10 starts transmitting the preset data, so that the controlled switch T1 is turned off, thereby disconnecting the electrical connection between the first communication port 201 and the control circuit 210, thereby implementing that the control interface module stops receiving the preset data from the host device 10, and further implementing that the control circuit 210 stops receiving the preset data from the host device 10.
In the embodiment of the present invention, the control circuit 210 may determine that the host device 10 starts to transmit the preset data by determining the data of the predetermined capacity size transmitted by the host device 10, the content of the data transmitted by the host device 10, the format of the data transmitted by the host device 10, or the transmission time period of the data transmitted by the host device 10. At this time, the controlled switch T1 is in a conductive state, the host device 10 transmits data to the control circuit 210 through the conductive controlled switch T1, and the control circuit 210 is configured to receive data through the conductive controlled switch T1.
Alternatively, the control circuit 210 is configured to determine that the host device 10 starts transmitting the preset data when it is determined that the data of the predetermined capacity is received, and further control the interface module to stop receiving the preset data from the host device 10. Alternatively, the control circuit 210 is configured to determine, according to the content of the received data, that the host device 10 starts transmitting the preset data, and further control the interface module to stop receiving the preset data from the host device 10. Alternatively, the control circuit 210 is configured to determine, according to the format of the received data, that the host device 10 starts transmitting the preset data, and further control the interface module to stop receiving the preset data from the host device 10. As another alternative, the control circuit 210 is configured to determine that the host device 10 starts transmitting the preset data when it is determined that the transmission duration of the received data reaches the preset duration, and further control the interface module to stop receiving the preset data from the host device 10.
In the embodiment of the invention, the capacity of the preset data comprises a plurality of capacity units; the control circuit 210 is configured to receive preset data of a partial capacity unit before outputting a first control signal to the controlled switch T1 through the signal output terminal P1. In other words, the capacity size of the preset data received from the host device 10 by the control circuit 210 lacks a partial capacity unit, which may include lacking one capacity unit or lacking a plurality of capacity units. Wherein the capacity unit may include 1 bit or 1 byte. For example, the capacity size of the preset data includes a plurality of bits, and the control circuit 210 outputs the first control signal to the controlled circuit T1 through the signal output terminal P1 after receiving the data of the 7 th bit of the preset data through the turned-on controlled switch T1 to turn off the controlled circuit T1, thereby controlling the interface module to stop receiving the data of the 8 th bit of the preset data from the host device 10, and further realizing that the preset data of the 7 th bit is received before stopping receiving the preset data from the host device 10 and resuming the data transmission. For another example, the size of the preset data includes a plurality of bytes, and the control circuit 210 outputs the first control signal to the controlled circuit T1 through the signal output terminal P1 after receiving the 3 rd byte of the preset data through the turned-on controlled switch T1 to turn off the controlled circuit T1, so that the control interface module stops receiving the 4 th byte of the preset data from the host device 10, thereby realizing that the 3 th byte of the preset data is received before stopping receiving the preset data from the host device 10 and resuming the data transmission.
In the embodiment of the invention, the capacity of the preset data comprises a plurality of capacity units; the control circuit 210 is configured to not receive preset data of any one capacity unit until the first control signal is output to the controlled switch T1 through the signal output terminal. For example, the capacity of the preset data includes a plurality of bits, and the control circuit 210 does not receive any one bit of preset data before outputting the first control signal to the controlled switch through the signal output terminal, in other words, when the control circuit 210 does not receive any one bit of preset data, that is, outputs the first control signal to the controlled switch T1 through the signal output terminal to control the controlled switch T1 to be turned off, thereby stopping receiving the preset data from the host device 10, and further realizing that any one bit of preset data is not received before stopping receiving the preset data from the host device 10 and resuming the data transmission.
In the embodiment of the present invention, the control circuit 210 is further configured to output, when the reception of the preset data from the host device 10 is stopped, a second control signal to the control terminal of the controlled switch T1 through the signal output terminal P1 to control the controlled switch T1 to be turned on, and resume the data transmission with the host device 10 through the turned-on controlled switch T1 to return the response bit to the host device 10. For example, the control circuit 210 stops receiving the data of the 4 th bit of the preset data from the host device 10 after receiving the data of the 3 rd bit of the preset data transmitted by the host device 10; when the host device 10 finishes transmitting the 8 th bit of the preset data, the control circuit 210 outputs a second control signal to the control terminal of the controlled switch T1 through the signal output terminal P1 to control the controlled switch T1 to be turned on, and at this time, the control circuit 210 resumes the data transmission with the host device 10 through the turned-on controlled switch T1, and the control circuit 210 can return a response bit to the host device 10 through the turned-on controlled switch T1, thereby avoiding that the host device 10 considers the chip 200 to be abnormal. For example, the control circuit 210 may determine that the host device 10 has transmitted the 8 th bit of the preset data by determining the transmission time period of the data of the predetermined capacity size transmitted by the host device 10 or the data transmitted by the host device 10.
In the embodiment of the present invention, the control circuit 210 is further configured to, when it is determined that the host device 10 transmits the full preset data or the partial preset data, output a second control signal to the control terminal of the controlled switch T1 through the signal output terminal P1 to control the controlled switch T1 to be turned on, so that the control circuit 210 can continuously receive other data sent by the host device 10 through the turned-on controlled switch T1.
In the embodiment of the present invention, the control circuit 210 stores, in advance, the set output timing and output duration of the control signal, for example, the output timing is used to indicate the timing of outputting the control signal to the controlled switch T1 in the duration of transmitting the preset data, and the output duration is used to indicate the duration of outputting the control signal to the controlled switch T1 in the duration of transmitting the preset data. Specifically, the control circuit 210 is configured to start outputting the first control signal to the controlled switch T1 according to the output timing of the first control signal during a duration of transmission of the preset data by the host device 10, and to continue outputting the first control signal to the controlled switch T1 for an output period of the first control signal until the output of the first control signal to the controlled switch T1 is stopped and the second control signal to the controlled switch T1 is output when the output period of the first control signal is reached. For example, the transmission timing of the first control signal is the timing of receiving the data of the 3 rd bit of the preset data transmitted by the host device 10, the transmission period of the first control signal is the period from the start of outputting the control signal to the controlled switch T1 to the stop of outputting the control signal to the controlled switch T1 in the duration of transmitting the preset data, and the control circuit 210 outputs the first control signal to the controlled switch T1 through the signal output terminal P1 to control the controlled switch T1 to be turned off after receiving the data of the 3 rd bit of the preset data transmitted by the host device 10 according to the transmission timing of the first control signal, thereby cutting off the transmission path in the transmission period of the preset data to stop receiving the data of the 4 th bit of the preset data from the host device 10; the control circuit 210 stops outputting the first control signal to the controlled switch T1 and outputs the second control signal to the controlled switch T1 to control the controlled switch T1 to be turned on according to the transmission time period of the first control signal before the last 1 bits of the preset data are transmitted, thereby resuming the data transmission with the host device 10.
In the embodiment of the present invention, as shown in fig. 4, the controlled switch T1 is disposed between the SDA port transmitting the data signal and the control circuit 210, so the scheme of fig. 4 stops receiving the preset data transmitted by the host device 10 in such a way that the transmission of the data signal is disconnected, but the scheme of the embodiment of the present invention is not limited thereto. Since the chip 200 cannot normally receive data when it does not receive the clock signal, the power signal or the ground signal, in the embodiment of the present invention, the controlled switch T1 may be further disposed between the SCL port for transmitting the clock signal and the control circuit 210, between the VCC port for transmitting the power signal and the control circuit 210, or between the GND port for transmitting the ground signal and the control circuit 210, and the chip cannot receive the preset data of the host device 10 if any of the controlled switches T1 is turned off.
The specific structure of the chip 200 is described in detail below in conjunction with fig. 5. Fig. 5 is a schematic structural diagram of a chip according to an embodiment of the present invention, as shown in fig. 5, the chip 200 may include a control circuit 210 and an interface module 211, wherein the control circuit 210 may include a control module 212 and a memory module 213, and the interface module 211 and the memory module 213 are electrically connected to the control module 212.
The interface module 211 is used for communication of input data and output data with an external device. When the replaceable item is mounted in the host device 10, the chip 200 of the replaceable item is also mounted in the host device 10, at which time the interface module 211 of the chip 200 may be electrically connected to the communication port of the host device 10, the interface module 211 being used to receive data transmitted by the host device 10 and transmit data to the host device 10. The interface module 211 may include a contactless port and/or a contact port, and the interface module 211 may be communicatively connected with the host device 10 by way of a wired connection or by way of a wireless connection. Wherein, contact communication port includes contact pin, contact or shell fragment, and non-contact port includes coil or antenna.
The memory module 213 is used for storing information related to the chip 200, such as a date of manufacture of the chip 200, a manufacturer, a color of a recording material, a capacity of the recording material, a remaining or consumed amount of the recording material, a printable number of pages, a printed number of pages, and the like, which may be rewritable information or read-only information, wherein the recording material may include ink or carbon powder. In the embodiment of the present invention, the storage module 213 is further configured to store a data characteristic before or after the host device 10 transmits the preset data, for example, a predetermined capacity size of the data transmitted before the host device 10 transmits the preset data, so that the control circuit 210 may control the controlled switch T1 to be turned off to disconnect the electrical connection between the control circuit 210 and the interface module 211 when the host device 10 transmits the data of the predetermined capacity size to the control circuit 210 during the process of receiving the data. The storage module 213 may employ a common non-volatile memory, such as: erasable programmable read-Only Memory (Erasable Programmable Read-Only Memory, EPROM), charged erasable programmable read-Only Memory (ELECTRICALLY ERASABLE PROGRAMMABLE READ ONLY MEMORY, EEPROM), FLASH Memory (FLASH), ferroelectric Memory, phase change Memory, etc.; the Memory module 213 may also employ a scheme of adding a power supply to a volatile Memory, such as Static Random-Access Memory (SRAM) +battery or capacitor, or dynamic Random-Access Memory (Dynamic Random Access Memory, DRAM) +battery or capacitor.
A number of configuration fields may be stored in the storage module 213, where the configuration fields may be used to store a predetermined capacity size or a predetermined duration, so that the chip 200 determines that the host device 10 starts transmitting the preset data through the predetermined capacity size or the predetermined duration stored in the configuration fields. The configuration field may also store an output opportunity and an output duration of a control signal, wherein the control signal includes a first control signal and a second control signal. In the later maintenance, the content of the configuration fields such as the output time and the output time of the control signal can be adjusted by modifying the configuration fields and adjusting the preset capacity size or the preset time length.
The control module 212 may be a micro control unit (Microcontroller Unit, MCU), a microcontroller, a field programmable gate array (Field Programmable GATE ARRAY, FPGA), an Application SPECIFIC INTEGRATED Circuit (ASIC), or the like. The control module 212 is used for controlling communication between the chip 200 and the host device 10, reading data from the storage module 213 and storing data in the storage module 213, and can adjust the output timing and the output duration of the first control signal or the second control signal according to the configuration field stored in the storage module 213.
The chip 200 may further include a circuit board for carrying the control module 212, the interface module 211, and the memory module 213. As an alternative, the control module 212, the interface module 211 and the memory module 213 are integrally arranged in the same circuit, which may be designed as an ASIC embodied in the form of a wafer, and the chip 200 may include the wafer and a circuit board carrying the wafer.
In the technical scheme of the chip provided by the embodiment of the invention, the chip comprises the control circuit and the interface module, the interface module is used for communicating with the host equipment, and the control circuit is used for controlling the interface module to stop receiving the preset data from the host equipment when judging that the host equipment starts to transmit the preset data, so that the control circuit of the chip does not need to execute the preset data, and the abnormal chip or the increased chip power consumption and the slower running speed caused by executing the preset data are avoided, thereby ensuring the normal work of the chip.
The embodiment of the invention provides a replaceable article, which comprises the chip provided by the embodiment.
The embodiment of the invention also provides a data transmission method, which is realized based on the image forming device, and the description of the image forming device can refer to the embodiment shown in fig. 1, and the description is omitted herein. The method comprises the following steps: the chip stops receiving the preset data from the host device when judging that the host device starts to transmit the preset data.
In the embodiment of the present invention, the chip determines that the host device starts to transmit the preset data, which may specifically include: when the chip judges that the data with the preset capacity is received, determining that the host equipment starts to transmit preset data; or the chip determines that the host equipment starts to transmit preset data according to the content of the received data; or the chip determines that the host equipment starts to transmit preset data according to the format of the received data; or when the chip judges that the sending time of the received data reaches the preset time, determining that the host equipment starts to transmit the preset data.
In the embodiment of the present invention, if the preset data size includes a plurality of capacity units, the method further includes: the chip receives the preset data of a partial capacity unit or does not receive the preset data of any one capacity unit before stopping receiving the preset data from the host device and before resuming the data transmission.
In the embodiment of the invention, the method further comprises the following steps: when the chip stops receiving the preset data from the host device, the chip resumes data transmission with the host device to return a response bit to the host device.
According to the technical scheme of the data transmission method provided by the embodiment of the invention, when the chip judges that the host equipment starts to transmit the preset data, the chip stops receiving the preset data from the host equipment, so that the chip does not need to execute the preset data, the chip abnormality or the chip power consumption increase and the running speed slowing caused by executing the preset data are avoided, and the normal operation of the chip is ensured.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather to enable any modification, equivalent replacement, improvement or the like to be made within the spirit and principles of the invention.

Claims (9)

1. A chip for application to a replaceable item removably mounted on a host device, the chip comprising a control circuit and an interface module, the interface module comprising a controlled switch and at least one first communication port, the controlled switch being connected between the control circuit and a designated first communication port;
The interface module is used for communicating with the host device;
The control circuit is used for controlling the controlled switch to be switched off to control the interface module to stop receiving preset data from the host equipment when judging that the host equipment starts to transmit the preset data;
The control circuit is used for determining that the host equipment starts to transmit preset data by judging the data with the preset capacity transmitted by the host equipment, the content of the data transmitted by the host equipment, the format of the data transmitted by the host equipment or the transmission time length of the data transmitted by the host equipment.
2. The chip of claim 1, wherein a control terminal of the controlled switch is connected to a signal output terminal of the control circuit, an output terminal of the controlled switch is connected to a signal input terminal of the control circuit, and an input terminal of the controlled switch is connected to the designated first communication port;
The control circuit is used for outputting a first control signal to the control end of the controlled switch through the signal output end so as to control the controlled switch to be disconnected.
3. The chip of claim 2, wherein the capacity size of the preset data comprises a plurality of capacity units;
the control circuit is used for receiving preset data of a part of capacity units or not receiving preset data of any one capacity unit before outputting a first control signal to the controlled switch through the signal output end.
4. The chip of claim 1, wherein the control circuit is further configured to output a second control signal to the control terminal of the controlled switch through the signal output terminal to control the controlled switch to be turned on when the reception of the preset data from the host device is stopped, and resume data transmission with the host device through the turned-on controlled switch to return a response bit to the host device.
5. The chip of any one of claims 1 to 4, wherein the first communication port comprises a contact communication port comprising a stylus, a contact, or a dome.
6. The chip of any one of claims 1 to 4, wherein the first communication port comprises a contactless communication port comprising a coil or an antenna.
7. A replaceable item comprising a chip as claimed in any one of claims 1 to 6.
8. An image forming apparatus comprising a host device and a replaceable item removably mounted on the host device, the replaceable item comprising a chip comprising a control circuit and an interface module, the interface module comprising a controlled switch and at least one first communication port, the controlled switch being connected between the control circuit and a designated first communication port;
The interface module is used for communicating with the host device;
The control circuit is used for controlling the controlled switch to be switched off to control the interface module to stop receiving preset data from the host equipment when judging that the host equipment starts to transmit the preset data;
The control circuit is used for determining that the host equipment starts to transmit preset data by judging the data with the preset capacity transmitted by the host equipment, the content of the data transmitted by the host equipment, the format of the data transmitted by the host equipment or the transmission time length of the data transmitted by the host equipment.
9. A data transmission method, characterized in that the method is implemented based on an image forming apparatus comprising a host apparatus and a replaceable item, the replaceable item being detachably mounted on the host apparatus, the replaceable item comprising a chip comprising a control circuit and an interface module, the interface module comprising a controlled switch and at least one first communication port, the controlled switch being connected between the control circuit and a designated first communication port, the interface module being for communication with the host apparatus;
The method comprises the following steps:
The control circuit controls the controlled switch to be switched off to control the interface module to stop receiving preset data from the host device when judging that the host device starts to transmit the preset data;
wherein the control circuit judges that the host device starts to transmit preset data, comprising:
The control circuit determines that the host device starts to transmit preset data by judging the data with the preset capacity transmitted by the host device, the content of the data transmitted by the host device, the format of the data transmitted by the host device or the transmission time of the data transmitted by the host device.
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