CN114785151A - A high-gain boost converter for photovoltaic power generation - Google Patents

Abstract

The invention discloses a high-gain boost converter for photovoltaic power generation, which relates to the field of photovoltaic technology. The input circuit of the high-gain boost converter for photovoltaic power generation forms a staggered parallel structure, which can better adapt to low-voltage high-current input and high-voltage output It has excellent natural current sharing capability, and the input circuit is provided with a first clamp circuit and a second clamp circuit to provide a loop for the release of the leakage inductance energy of the coupled inductor, so as to reduce the voltage spike of the switch tube, and can Suppress the reverse recovery current of semiconductor devices and improve the efficiency of the converter, so that the boost converter has the characteristics of high voltage gain, low device stress, small switching loss, continuous input current, and low current ripple. applications in the field of photovoltaics.

Description

A high-gain boost converter for photovoltaic power generation

technical field

The invention relates to the field of photovoltaic technology, in particular to a high-gain boost converter for photovoltaic power generation.

Background technique

In recent years, the fossil energy crisis and the increasing global environmental pollution have made photovoltaic power generation one of the research hotspots. More and more photovoltaic distributed generation is connected to the low-voltage distribution network through inverters. However, the output DC voltage of the photovoltaic array is lower than The input DC voltage of the grid-connected inverter, so high-efficiency and high-gain DC/DC converters are indispensable in photovoltaic power generation systems.

The Boost converter is a commonly used DC/DC converter, but the traditional Boost converter has the following problems: the voltage gain is limited by parasitic parameters such as capacitance, inductance, and switching devices, and with the increase of the duty cycle, the current of the device increases. And the input current ripple stress increases accordingly, the diode reverse recovery loss becomes more prominent, resulting in low converter efficiency.

SUMMARY OF THE INVENTION

In view of the above problems and technical requirements, the present inventor proposes a high-gain boost converter for photovoltaic power generation. The technical solution of the present invention is as follows:

A high-gain boost converter for photovoltaic power generation, the high-gain boost converter for photovoltaic power generation includes an input circuit and an output circuit, a coupled inductor primary winding L _1a and a coupled inductor secondary winding L _1b form a set of coupled inductors, and the coupled inductor The primary winding L _2a and the coupled inductor secondary winding L _2b form another set of coupled inductors. The coupled inductor primary winding L _1a and the coupled inductor primary winding L _2a are arranged in the input circuit, and the coupled inductor secondary winding L _1b and the coupled inductor The inductor secondary winding L _2b is arranged in the output circuit;

In the input circuit, the positive pole of the input power V _in is connected to the first end of the primary winding _L1a of the coupled inductor and the first end of the primary winding _L2a of the coupled inductor, and the second end of the primary winding _L1a of the coupled inductor is connected to the first end of the primary winding L1a of the coupled inductor _The drain of the switch S1, the second end of the coupled inductor primary winding _L2a is connected to the drain of the _second switch S2, and the source of the _first switch S1 is connected to the source of the _second switch S2 and connected to the negative pole of the input power supply V _in ; both ends of the _first switch tube S1 are connected across an anti-parallel diode and a switched capacitor C _S1 , and both ends of the second switch tube S ₂ are connected across an anti-parallel diode and a switch capacitor C _S2 ;

The duty ratios of the _first switch S1 and the _second switch S2 are equal and differ by 180° and are staggered. A first clamping circuit is connected across the two ends of the primary winding _L1a of the coupled inductor, and the primary winding L of the coupled inductor A second clamping circuit is connected across both ends of _2a .

A further technical solution is that the first clamp circuit includes a clamp switch S _C1 and a clamp capacitor C _C1 , the source of the clamp switch S _C1 is connected to the drain of the first switch S ₁ , and the clamp switch S C1 The drain of S _C1 is connected to the positive pole of the input power supply V _in through the clamping capacitor C _C1 ; the second clamping circuit includes a clamping switch S _C2 and a clamping capacitor C _C2 , and the source of the clamping switch S _C2 is connected to the second _The drain of the switch tube S2, the drain of the clamp switch S _C2 is connected to the positive pole of the input power V _in through the clamp capacitor C _C2 ; the two ends of the clamp switch tube S _C1 are connected with an anti-parallel diode, and the clamp switch Both ends of the tube S _C2 are connected with an anti-parallel diode, and the clamp switch tube S _C1 and the clamp switch tube S _C2 are alternately conducted.

Its further technical solution is, in the process that the _first switch tube S1 is turned on and the _second switch tube S2 is turned off, the clamp switch tube S _C2 is turned on; when the _second switch tube S2 is turned on, the first switch tube S2 is turned on. When the switch tube S1 is turned off, the clamp switch tube S _{C1 is} turned on.

A further technical solution is that the on-time of the clamp switch S _C2 is shorter than the off-time of the second switch S ₂ , and the on-time of the clamp switch S _C1 is shorter than the off-time of the first switch S ₁ . and the on-time of the clamp switch S _C1 is equal to the on-time of the clamp switch S _C2 .

Its further technical solution is that in one working cycle of the high-gain Boost converter for photovoltaic power generation, the _first switch S1 is turned on, the _second switch S2 is turned on, and the two clamp switches are turned on within t ₀ to t ₁ . The tubes S _C1 and S _C2 are both turned off, the first switch tube S ₁ is turned on, the second switch tube S ₂ is turned off, and the two clamp switches S _C1 and S _C2 are turned off in t ₁ to t ₄ , t _{From 4} to t5, the _first switch tube S1 is turned _on , the _second switch tube S2 is turned off, the clamp switch tube S _C2 is turned _on , and the clamp switch tube S _C1 is turned off, and the first switch tube is turned off in t ₅ to t7. The tube S1 is turned on, the second switch tube S2 is turned off, the _two clamp switch tubes S _C1 and S _C2 are both turned off, and the first switch tube S ₁ is turned on and the second switch tube S is turned off _during t ₇ to t _{8 2} is turned on, and the two clamp switches S _C1 and S _C2 are both turned off;

From _t8 to _t9 , the first switch S1 is turned on, the _second switch S2 is turned on, and the two clamp switches S _C1 and S _C2 are both turned off. From _t9 to _t12 , the first switch S is turned _on . ₁ is turned off, the _second switch S2 is turned on, the two clamp switches S _C1 and S _C2 are both turned off, and the _first switch S1 is turned off and the _second switch S2 is turned on in t ₁₂ to t ₁₃ . On, the clamp switch S _C1 is turned on, the clamp switch S _C2 is turned off, the first switch S ₁ is turned off, the second switch S ₂ is turned on, and the two clamp switches are turned off from t ₁₃ to t ₁₅ Both S _C1 and S _C2 are turned off. During t ₁₅ to t ₁₆ , the _first switch S1 is turned on, the _second switch S2 is turned on, and the two clamp switches S _C1 and S _C2 are turned off.

A further technical solution is that, in the time range of t ₃ to t ₄ , the anti-parallel diodes at both ends of the clamp switch S _C2 are in a conducting state, and the voltage across the clamp switch S _C2 is zero, and the voltage at both ends of the clamp switch S C2 is zero _. In the time range of ₅ , the clamping switch S _C2 is turned on at zero voltage; in the time range of t ₄ ~ t ₅ , the clamping capacitor C _C2 and the leakage inductance L _K2 of the primary winding L _2a of the coupling inductor resonate to absorb the energy of the leakage inductance L _K2 , under the action of resonance, the current I _L2 of the leakage inductance L _K2 reverses, and the clamp switch S _C2 is turned off when the current I _L2 reverses at time t ₅ , and under the action of the clamp capacitor C _C2 , the clamp switch S C2 is turned off. The bit switch tube S _C2 realizes zero-voltage turn-off.

A further technical solution is that, in the time range from t ₁₁ to t ₁₂ , the anti-parallel diodes at both ends of the clamp switch S _C1 are in a conducting state, and the voltage across the clamp switch S _C1 is zero, and the voltage at both ends of the clamp switch S C1 is zero at t ₁₂ to t. In the time range of ₁₃ , drive the clamping switch S _C1 to turn on at zero voltage; in the time range of t ₁₂ to t ₁₃ , the clamping capacitor C _C1 and the leakage inductance L _K1 of the primary winding L _1a of the coupling inductor resonate to absorb the energy of the leakage inductance L _K1 , under the action of resonance, the current I _L1 of the leakage inductance L _K1 reverses, and when the current I _L1 reverses at time t ₁₃ , the clamp switch S _C1 is turned off, and under the action of the clamp capacitor C _C1 , the clamp switch S C1 is turned off. The bit switch tube S _C1 realizes zero-voltage turn-off.

Its further technical solution is that, under the effect of resonance between the leakage inductance L _K2 of the primary winding L _2a of the coupled inductor and the switch capacitor C _S2 , the second switch tube S ₂ realizes zero-voltage turn-on and zero-voltage turn-off; Under the action of resonance between the leakage inductance L _K1 of the primary winding L _1a and the switch capacitor C _S1 , the first switch tube S ₁ realizes zero-voltage turn-on and zero-voltage turn-off.

A further technical solution is that, in the output circuit, the first end of the coupled inductor secondary winding L _1b is connected to the first end of the coupled inductor secondary winding L _2b , and the second end of the coupled inductor secondary winding L _1b is respectively connected to the capacitor. The first terminal of _C1 and the first terminal of capacitor _C2 , the _second terminal of capacitor _C1 is connected to the cathode _of freewheeling diode D1 and the anode of freewheeling diode D2, and the anode _of freewheeling diode D1 is connected to capacitor _C01 The first end of the capacitor C o1 and one end of the load R, the second end of the capacitor C _o1 is connected to the cathode of the freewheeling diode D2, the _second end of the coupled inductor secondary winding _L2b , the anode of the freewheeling diode _D3 and the capacitor C _{o2 The} first end, the _second end of the capacitor C2 is connected to the cathode of the freewheeling diode _D3 and the anode of the freewheeling diode D4, the cathode of the _{freewheeling diode D4 is connected to the second end of the capacitor C02 and} the other end of the load R.

A further technical solution is that under the action of parasitic parameters of devices in the high-gain boost converter for photovoltaic power generation, the voltage difference between the capacitor C _o1 and the capacitor C _o2 is zero.

The beneficial technical effects of the present invention are:

The present application discloses a high-gain boost converter for photovoltaic power generation. The input circuit forms a staggered parallel structure, which can better adapt to the occasions of low-voltage and high-current input and high-voltage output, and has excellent natural current sharing capability. A first clamping circuit and a second clamping circuit are arranged in the circuit to provide a loop for the release of the leakage inductance energy of the coupled inductor, so as to reduce the voltage spike of the switch tube, and can suppress the reverse recovery current of the semiconductor device, and improve the efficiency of the converter. As a result, the boost converter has the characteristics of high voltage gain, low device stress, small switching loss, continuous input current, low current ripple, excellent performance, and can meet the application needs in the photovoltaic field.

Further, the high-gain Boost converter for photovoltaic power generation adopts soft switching technology, and the switching capacitor and leakage inductance are designed to resonate, realizing zero-voltage turn-on and zero-voltage turn-off of the switch tube, reducing switching loss, making the Boost converter. It also has the characteristics of small switching loss, which further improves the converter efficiency.

The output circuit adopts an isolated three-level converter circuit structure, and the isolation structure is used to further improve the safety of the converter; using the three-level converter structure, the voltage balance between the two output capacitors C _o1 and C _o2 is completely Free from the influence of the parasitic parameters of the output power supply, coupled inductor and diode, the voltage of the two output capacitors of the three-level converter has a strong self-balancing ability, which reduces the ripple of the output voltage. In addition, the magnetic flux density of the magnetic core is designed to work in one or three quadrants, which improves the utilization rate of the magnetic core and reduces the volume of the coupled inductor magnetic core. In addition, the output capacitors C _o1 and C _o2 can use CBB capacitors instead of electrolytic capacitors, which effectively improves the service life of the system and improves the performance of the converter.

Description of drawings

FIG. 1 is a circuit structure diagram of a high-gain boost converter for photovoltaic power generation in one embodiment.

FIG. 2 is a working waveform diagram of the high-gain boost converter for photovoltaic power generation shown in FIG. 1 in one working cycle.

FIG. 3 is a simplified equivalent circuit diagram of the circuit configuration diagram shown in FIG. 1 .

FIG. 4 is a schematic circuit modal diagram of the high-gain boost converter for photovoltaic power generation based on the structure of FIG. 3 in the first mode.

FIG. 5 is a schematic diagram of the circuit mode of the high-gain boost converter for photovoltaic power generation based on the structure of FIG. 3 in the second mode.

6 is a schematic diagram of a circuit mode of the high-gain boost converter for photovoltaic power generation based on the structure of FIG. 3 in a third mode.

FIG. 7 is a schematic diagram of the circuit mode of the high-gain boost converter for photovoltaic power generation based on the structure of FIG. 3 in the fourth mode.

FIG. 8 is a schematic diagram of the circuit mode of the high-gain boost converter for photovoltaic power generation based on the structure of FIG. 3 in the fifth mode.

FIG. 9 is a schematic circuit modal diagram of the high-gain boost converter for photovoltaic power generation based on the structure of FIG. 3 in the sixth mode.

FIG. 10 is a schematic diagram of the circuit mode of the high-gain boost converter for photovoltaic power generation based on the structure of FIG. 3 in the seventh mode.

FIG. 11 is a schematic diagram of the circuit mode of the high-gain boost converter for photovoltaic power generation based on the structure of FIG. 3 in the eighth mode.

Detailed ways

The specific embodiments of the present invention will be further described below with reference to the accompanying drawings.

The present application discloses a high-gain boost converter for photovoltaic power generation. Please refer to FIG. 1 . The high-gain boost converter for photovoltaic power generation includes an input circuit and an output circuit. The input circuit is connected to an input power source V _in , and the output circuit is connected to a load R. The boost converter includes a set of coupled inductors composed of a coupled inductor primary winding L _1a and a coupled inductor secondary winding L _1b , and another set of coupled inductors composed of a coupled inductor primary winding L _2a and a coupled inductor secondary winding L _2b inductance. Among them, the coupled inductor primary winding L _1a and the coupled inductor primary winding L _2a are arranged in the input circuit, and the coupled inductor secondary winding L _1b and the coupled inductor secondary winding L _2b are arranged in the output circuit. In this application, the coupling The turns ratio of the primary winding _{L1a of the inductor and the secondary winding L1b of} the coupled inductor, and the turns ratio of the primary winding _L2a of the coupled inductor and the secondary winding _L2b of the coupled inductor are equal to N. The coupling coefficient between the primary winding L _1a of the coupled inductor and the secondary winding L _1b of the coupled inductor, and the coupling coefficient between the primary winding L _2a of the coupled inductor and the secondary winding L _2b of the coupled inductor are equal to K.

In the input circuit, the positive pole of the input power V _in is connected to the first end of the primary winding _L1a of the coupled inductor and the first end of the primary winding _L2a of the coupled inductor, and the second end of the primary winding _L1a of the coupled inductor is connected to the first end of the primary winding L1a of the coupled inductor _The drain of the switch S1 and the second end of the primary winding _L2a of the coupled inductor are connected to the drain of the _second switch S2. The source of the _first switch S1 is connected to the source of the _second switch S2 and is connected to the negative pole of the input power supply V _in . Two ends of the first switch tube S ₁ are connected across an anti-parallel diode and a switch capacitor C _S1 , and two ends of the second switch tube S ₂ are connected across an anti-parallel diode and a switch capacitor C _S2 . The duty ratios of the _first switch S1 and the _second switch S2 are equal to D, that is, the on-time duration of the _first switch S1 accounts for D in one working cycle of the Boost converter. The on-time duration of the two switches S ₂ accounts for D in one duty cycle of the Boost converter. The control waveforms of the _first switch S1 and the _second switch S2 differ by 180° and are staggered. The input circuit in the present application forms an interleaved parallel boost structure, which can better adapt to the occasion of low-voltage high-current input and high-voltage output, and has excellent natural current sharing capability.

Both ends of the primary winding _L1a of the coupled inductor are connected across a first clamping circuit, and both ends of the primary winding _L2a of the coupled inductor are connected across a second clamping circuit. The first clamping circuit is used to provide a loop for the energy release of the leakage inductance L _K1 of the primary winding L _1a of the coupled inductor, so as to reduce the voltage peak of the first switching transistor S ₁ . The second clamping circuit is used to provide a loop for the energy release of the leakage inductance L _K2 of the primary winding L _2a of the coupled inductor, so as to reduce the voltage peak of the second switch tube S ₂ .

Referring to FIG. 1 , the first clamp circuit includes a clamp switch S _C1 and a clamp capacitor C _C1 . The two ends of the clamp switch S _C1 are connected across an anti-parallel diode and the source of the clamp switch S _C1 is connected to the first The drain of a switch S1, the drain of the clamp switch S _C1 is connected to the positive pole of the input power V _in through the clamp capacitor _{C C1 .} The second clamp circuit includes a clamp switch tube S _C2 and a clamp capacitor C _C2 , an anti-parallel diode is connected across the two ends of the clamp switch tube S _C2 , and the source of the clamp switch tube S _C2 is connected to the second switch tube S ₂ , the drain of the clamp switch tube S _C2 is connected to the positive pole of the input power supply V _in through the clamp capacitor C _C2 .

In one embodiment, the first switch transistor S ₁ , the second switch transistor S ₂ , the clamp switch transistor S _C1 and the clamp switch transistor S _C2 are MOS transistors or IGBT transistors. Capacitors C _o1 and C _o2 can be implemented by using CBB capacitors.

The clamp switch tube S _C1 and the clamp switch tube S _C2 are alternately turned on. Specifically, in the process that the _first switch S1 is turned on and the _second switch S2 is turned off, the clamp switch S _C2 is turned on. During the process that the _second switch S2 is turned on and the first switch S1 is turned off, the clamp switch S _{C1 is} turned on. In addition, the on-time of the clamp switch S _C2 is shorter than the off-time of the second switch S ₂ , and the on-time of the clamp switch S _C1 is shorter than the off-time of the first switch S ₁ . The on-time duration of the clamp switch S _C1 is equal to the on-time of the clamp switch S _C2 .

Please refer to the waveform diagram of the high-gain boost converter for photovoltaic power generation in one working cycle as shown in FIG. 2. During t ₀ to t ₁ , the _first switch S1 is turned on, the _second switch S2 is turned on, and the two The clamp switch tubes S _C1 and S _C2 are both turned off. From t ₁ to t ₄ , the _first switch S1 is turned on, the _second switch S2 is turned off, and the two clamp switches S _C1 and S _C2 are both turned off. From t ₄ to t ₅ , the _first switch S1 is turned on, the _second switch S2 is turned off, the clamp switch S _C2 is turned on, and the clamp switch S _C1 is turned off. During t ₅ to t ₇ , the _first switch S1 is turned on, the _second switch S2 is turned off, and the two clamp switches S _C1 and S _C2 are both turned off. From _t7 to _t8 , the _first switch S1 is turned on, the _second switch S2 is turned on, and the two clamp switches S _C1 and S _C2 are both turned off. During t ₈ to t ₉ , the _first switch S1 is turned on, the _second switch S2 is turned on, and the two clamp switches S _C1 and S _C2 are both turned off. From t ₉ to t ₁₂ , the _first switch S1 is turned off, the _second switch S2 is turned on, and the two clamp switches S _C1 and S _C2 are both turned off. From t ₁₂ to t ₁₃ , the _first switch S1 is turned off, the _second switch S2 is turned on, the clamp switch S _C1 is turned on, and the clamp switch S _C2 is turned off. From t ₁₃ to t ₁₅ , the _first switch S1 is turned off, the _second switch S2 is turned on, and the two clamp switches S _C1 and S _C2 are both turned off. From t ₁₅ to t ₁₆ , the _first switch S1 is turned on, the _second switch S2 is turned on, and the two clamp switches S _C1 and S _C2 are turned off.

In one embodiment, in the output circuit, the first end of the coupled inductor secondary winding L _1b is connected to the first end of the coupled inductor secondary winding L _2b , and the second ends of the coupled inductor secondary winding L _1b are respectively connected to the capacitor C The first terminal of ₁ and the first terminal of capacitor C ₂ , the _second terminal of capacitor C ₁ is connected to the cathode _of freewheeling diode D1 and the anode of freewheeling diode D2, and the anode _of freewheeling diode D1 is connected to the anode of capacitor C _o1 . The first end and one end of the load R, the second end of the capacitor C _o1 is connected to the cathode of the freewheeling diode D2, the _second end of the coupled inductor secondary winding _L2b , the anode of the freewheeling diode _D3 and the first end of the capacitor _C02 . One end, the _second end of the capacitor C2 is connected to the cathode of the freewheeling diode _D3 and the anode of the _freewheeling diode D4, the cathode of the _{freewheeling diode D4 is connected to the second end of the capacitor C02 and} the other end of the load R.

The high-gain boost converter for photovoltaic power generation will be affected by the parasitic parameters of each device during operation. Please refer to the simplified equivalent circuit diagram of the high-gain boost converter for photovoltaic power generation shown in Figure 3. Figure 3 Only the influence of the parasitic parameters of the coupled inductor primary winding L _1a and the coupled inductor primary winding L _2a is shown in , that is, the coupled inductor primary winding L _1a can be equivalent to the coupled inductor primary winding L _1a and its excitation inductance The series structure with the leakage inductance L _K1 after parallel connection, and the coupled inductor primary winding L _2a can be equivalent to the series structure of the coupled inductor primary winding L _2a and its excitation inductance connected in parallel with the leakage inductance L _K2 . The equivalent circuit structures of other devices under the influence of parasitic parameters are not shown in detail.

Based on the simplified equivalent circuit diagram shown in FIG. 3 , combined with the working waveform diagram shown in FIG. 2 , the working process of the high-gain boost converter for photovoltaic power generation is introduced as follows. One working cycle of the high-gain Boost converter for photovoltaic power generation includes the first half cycle in the duration of t ₀ to t ₈ and the second half cycle in the duration of t ₈ to t ₁₆ . The working process of the half cycle is similar. specific:

(1) In the time range from t ₀ to t ₁ , the first mode: the first switch S1 and the _second switch S2 are both kept on, and the two clamp switches S _C1 and S _{C2 are} turned off state. The polarities of the secondary windings of the two coupled inductors are opposite, the freewheeling diodes D ₁ , D ₂ , D ₃ , D ₄ are all in the off state, and the input power V _in charges the primary windings L _1a and L _2a of the two coupled inductors, Capacitors C _o1 and C _o2 supply power to the load R. The schematic diagram of the circuit mode based on FIG. 3 is shown in FIG. 4 , and the dotted line represents the current flow.

(2) In the time range from t ₁ to t ₂ , the second mode: after the second switch tube S ₂ is turned off at time t ₁ , the voltage of the switch capacitor C _S2 across the second switch tube S ₂ rises, and the second switch tube S The voltage V _S2 at both ends of ₂ rises linearly from zero and realizes zero-voltage turn-off. The freewheeling diodes D ₁ , D ₂ , D ₃ , and D ₄ are all kept in the cut-off state, and the capacitors C _o1 and C _o2 supply power to the load R. The schematic diagram of the circuit mode based on FIG. 3 is shown in FIG. 5 , and the dotted line indicates the current flow.

(3) In the time range from t ₂ to t ₃ , the third mode: when the voltage across the _second switch S2 exceeds the voltage of the clamp capacitor C _C2 , the anti-parallel diode across the clamp switch S _C2 is turned on , the voltage across the second switch tube S ₂ is clamped by the second clamp circuit, the freewheeling diodes D ₁ , D ₂ , D ₃ , and D ₄ are kept off, and the capacitors C _o1 and C _o2 supply power to the load R. The schematic diagram of the circuit mode based on FIG. 3 is shown in FIG. 6 , and the dotted line represents the current flow.

(4) In the time range from t ₃ to t ₄ , the fourth mode: at time t ₃ , the leakage inductance L _K2 of the primary winding L _2a of the coupled inductor resonates with the clamping capacitor C _C2 , and the voltage of the primary winding L _2a of the coupled inductor resonates Reverse and start to transfer energy to the secondary winding, the coupled inductor primary winding L _1a continues to charge. At the same time, the freewheeling diodes D1 and _D3 start to conduct, the freewheeling diodes _D2 and _D4 remain in the off state, and the current _I D1 of the freewheeling diode _D1 and the current _{I D3} of the freewheeling diode _D3 start to rise. _The two coupled inductor secondary _windings L _1b and L _2b are _connected in series to charge the capacitors C ₂ and C _{o1 .} The current I _L2 flowing through the primary winding L _2a of the coupled inductor and the leakage inductance L _K2 begins to decrease linearly, and the current I _L1 flowing through the primary winding L _1a of the coupled inductor and the leakage inductance L _K1 begins to increase linearly. The schematic diagram of the circuit mode based on FIG. 3 is shown in FIG. 7 , and the dotted line represents the current flow.

(5) In the time range from t ₄ to t ₅ , the fifth mode: the clamping switch S _C2 is turned on at time t ₄ , due to resonance, the current I _L2 flowing through the leakage inductance L _K2 and the current direction of the clamping capacitor C _C2 The reverse will occur, so that the energy in the clamping capacitor C _C2 is transferred to the secondary side, and the clamping switch tube S _C2 is turned on at zero voltage. The schematic diagram of the circuit mode based on FIG. 3 is shown in FIG. 8 , and the dotted line indicates the current flow.

( ₆ ) _In the time range from t5 to t6, the sixth mode: at time _t5 , the clamp switch S _C2 is turned off, the resonance of the leakage inductance L _K2 and the clamp capacitor C _C2 is forcibly stopped, and the clamp switch S _C2 achieves zero-voltage shutdown. At the same time, the leakage inductance L _K2 begins to resonate with the switched capacitor C _S2 , the energy stored in the switched capacitor C _S2 begins to transfer, and the voltage V _S2 across the second switch tube S ₂ begins to drop. The current I _L2 flowing through the coupled inductor primary winding L _2a and the leakage inductance L _K2 begins to increase linearly. The current _I D1 of the freewheeling diode _D1 and the current I _D3 of the freewheeling diode _D3 start to decrease. At the same time, due to the existence of leakage inductance of the secondary winding, the rate of decrease of the current _I D1 of the freewheeling diode _D1 and the current I _D3 of the freewheeling diode _D3 is less than a predetermined rate threshold, which is the corresponding continuous rate in the conventional Boost converter. The rate of decrease of the current of the freewheeling diode, thereby effectively suppressing the reverse recovery current of the freewheeling diode. The schematic diagram of the circuit mode based on FIG. 3 is shown in FIG. 9 , and the dotted line indicates the current flow.

( ₇ ) _In the time range from t6 to t7, the _seventh mode: at time t6, the discharge of the switch capacitor C _S2 is completed and the voltage drops to zero, and the voltage V _S2 across the _second switch tube S2 is also zero to achieve zero voltage conduction. The anti-parallel diode of the _second switch S2 starts to conduct, and the current I _L2 flowing through the primary winding _L2a of the coupled inductor and the leakage inductance _LK2 continues to increase linearly. The schematic diagram of the circuit mode based on FIG. 3 is shown in FIG. 10 , and the dotted line represents the current flow.

( ₈ ) In the time range from _t7 to t8, the eighth mode: because the anti-parallel diode of the _second switch S2 is turned on, the voltage V S2 across the _second switch _S2 drops to zero, so at _t7 The zero-voltage turn-on of the _second switch S2 can be realized by driving the signal to the _second switch S2 within the time range of ~ _t8 . The current _I D1 of the freewheeling diode _D1 and the current I _D3 of the freewheeling diode _D3 reduce to zero under the action of the leakage inductance L _K2 and then turn off, and the capacitors C _o1 and C _o2 begin to supply power to the load R. The schematic diagram of the circuit mode based on FIG. 3 is shown in FIG. 11 , and the dotted line represents the current flow.

( ₉ ) In the time range from _t8 to _{t9, the ninth mode: the first switch S1 and the second switch S2 are both kept on, and the two clamp switches S C1 and S C2 are turned off} state. The polarities of the secondary windings of the two coupled inductors are opposite, the freewheeling diodes D ₁ , D ₂ , D ₃ , D ₄ are all in the off state, and the input power V _in charges the primary windings L _1a and L _2a of the two coupled inductors, Capacitors C _o1 and C _o2 supply power to the load R.

( ₁₀ ) _In the time range from t9 to t10, the _tenth mode: after the _first switch S1 is turned off at time t9, the voltage of the switch capacitor C _S1 at both ends of the _first switch S1 rises, and the first switch S1 The voltage V _S1 at both ends of ₁ rises linearly from zero and realizes zero-voltage turn-off. The freewheeling diodes D ₁ , D ₂ , D ₃ , and D ₄ are all kept in the cut-off state, and the capacitors C _o1 and C _o2 supply power to the load R.

(11) In the time range from t ₁₀ to t ₁₁ , the eleventh mode: when the voltage V _S1 across the _first switch S1 exceeds the voltage of the clamp capacitor C _C1 , the anti-parallel connection between the two ends of the clamp switch S _C1 The diode is turned on, and the voltage V _S1 across the _first switch tube S1 is clamped by the first clamp circuit. The freewheeling diodes D ₁ , D ₂ , D ₃ , and D ₄ are all kept in an off state, and the capacitors C _o1 and C _o2 supply power to the load R.

(12) In the time range from t ₁₁ to t ₁₂ , the twelfth mode: at time t ₁₁ , the leakage inductance L _K1 of the primary winding L _1a of the coupled inductor resonates with the clamping capacitor C _C1 , and the primary winding L _1a of the coupled inductor resonates. The voltage reverses and begins to transfer energy to the secondary winding, and the coupled inductor primary winding L _2a continues to charge. At the same time, the freewheeling diodes _D2 and _D4 start to conduct, the freewheeling diodes D1 and _D3 remain in the off state, and the current _{ID2 of} the freewheeling diode _D2 and the current _ID4 of the freewheeling diode _D4 start to rise. The _two coupled inductor secondary _windings L _1b and L _2b are _connected in series to charge the capacitors C ₁ and C _{o2 .} The current IL1 flowing through the primary winding _L1a of the coupled inductor and the leakage inductance _{L K1} begins to decrease linearly, and the current _IL2 flowing through the primary winding _L2a of the coupled inductor and the leakage inductance _L2a begins to increase linearly.

(13) In the time range from t ₁₂ to t ₁₃ , the thirteenth mode: the clamp switch S _C1 is turned on at time t _12. Due to resonance, the current I _L1 flowing through the leakage inductance L _K1 and the current in the clamping capacitor C _C1 The direction will be reversed, so that the energy in the clamping capacitor C _C1 is transferred to the secondary side, and the clamping switch tube S _C1 is turned on at zero voltage.

(14) In the time range from t ₁₃ to t ₁₄ , the fourteenth mode: at time t ₁₃ , the clamp switch S _C1 is turned off, and the resonance between the leakage inductance L _K1 and the clamp capacitor C _C1 is forcibly stopped, and the clamp switch is turned off. S _C1 achieves zero-voltage shutdown. At the same time, the leakage inductance L _K1 and the switch capacitor C _S1 begin to resonate, the energy stored in the switch capacitor C _S1 begins to transfer, and the voltage V _S1 across the first switch tube S ₁ begins to drop. _The current ID2 of the freewheeling diode _D2 and the current _ID4 of the freewheeling diode _D4 begin to drop.

(15) In the time range from t ₁₄ to t ₁₅ , the fifteenth mode: at time t ₁₄ , the discharge of the switch capacitor C _S1 is completed and the voltage drops to zero, and the voltage V _S1 across the _first switch tube S1 is also zero to achieve zero voltage When it is turned on, the anti-parallel diode of the _first switch S1 starts to conduct, and the current I _L1 flowing through the primary winding _L1a of the coupled inductor and the leakage inductance L _K1 starts to increase linearly. At the same time, due to the existence of leakage inductance of the secondary winding, the rate of decrease of the current I D2 of the _freewheeling diode _D2 and the current I _D4 of the freewheeling diode D4 is less _than a predetermined threshold, which is the corresponding freewheeling current in the conventional Boost converter. The decreasing rate of the diode current effectively suppresses the reverse recovery current of the freewheeling diode.

(16) In the time range from t ₁₅ to t ₁₆ , the sixteenth mode: because the anti-parallel diode of the _first switch S1 is turned on, the voltage V S1 across the _first switch _S1 drops to zero, so at t The zero-voltage turn-on of the _first switch transistor S1 can be realized by supplying _a driving signal to the first switch transistor S1 within the time range from ₁₅ to _t16 . _The current I D2 of the _freewheeling diode _D2 and the current I _D4 of the freewheeling diode D4 reduce to zero under the action of the leakage inductance L _K1 and then turn off, and the capacitors C _o1 and C _o2 begin to supply power to the load R.

Since the ninth mode to the sixteenth mode in the second half cycle correspond to the first mode to the eighth mode in the first half cycle, and the working process is similar, the ninth mode to the tenth mode will not be shown separately in this application. Schematic diagram of the circuit modes of the six modes.

It can be seen from the above modal analysis that the circuit structure of the present application adopts the soft switching technology, and the resonance between the leakage inductance L _K2 and the switching capacitor C _S2 and the leakage inductance L _K2 and the clamping capacitor C _C2 are realized in the first half cycle, and the second half cycle is realized. The resonance between the leakage inductance L _K1 and the switched capacitor C _S1 and the leakage inductance L _K1 and the clamping capacitor C _C1 . Therefore, in the time range of t ₃ to t ₄ , the anti-parallel diodes at both ends of the clamp switch S _C2 are in a conducting state, and the voltage across the clamp switch S _C2 is zero, and in the time range of t ₄ to t ₅ Drive the clamping switch tube S _C2 to be turned on at zero voltage. In the time range from t ₄ to t ₅ , the clamping capacitor C _C2 resonates with the leakage inductance L _K2 of the coupled inductor primary winding L _2a to absorb the energy of the leakage inductance L _K2 . Under the action of resonance, the current I _L2 of the leakage inductance L _K2 generates In the reverse direction, when the current _{IL2 reverses} at time t5, the clamp switch S _C2 is turned off, and under the action of the clamp capacitor C _C2 , the clamp switch S _C2 realizes zero-voltage turn-off. During the time range from t ₁₁ to t ₁₂ , the anti-parallel diodes at both ends of the clamp switch S _C1 are in a conducting state, the voltage across the clamp switch S _C1 is zero, and the clamp is driven within the time range from t ₁₂ to t ₁₃ . The switch tube S _C1 is turned on at zero voltage; in the time range from t ₁₂ to t ₁₃ , the clamping capacitor C _C1 and the leakage inductance L _K1 of the primary winding L _1a of the coupled inductor resonate to absorb the energy of the leakage inductance L _K1 . The current I _L1 of the sense L _K1 reverses. When the current I _L1 reverses at time t ₁₃ , the clamp switch S _C1 is turned off, and under the action of the clamp capacitor C _C1 , the clamp switch S _C1 achieves zero voltage off. In addition, under the action of the resonance of the leakage inductance L _K2 of the primary winding L _2a of the coupled inductor and the switched capacitor C _S2 , the second switching tube S _{2 realizes} zero-voltage turn-on and zero-voltage turn-off; Under the effect of resonance between the leakage inductance L _K1 of the switch capacitor C _S1 and the switch capacitor C S1 , the first switch tube S ₁ realizes zero-voltage turn-on and zero-voltage turn-off.

That is, the first switch tube S ₁ , the second switch tube S ₂ , the clamp switch tube S _C1 and the clamp switch tube S _C2 can all realize zero-voltage turn-on and zero-voltage turn-off, thereby reducing switching loss and improving converter efficiency.

Considering only the first mode, the fourth mode and the fifth mode of the high-gain boost converter for photovoltaic power generation, we can obtain:

是第一模态中耦合电感原边绕组L_2a的漏感L_K2的电压，

是第四模态和第五模态中耦合电感原边绕组L_2a的漏感L_K2的电压。

是第一模态中耦合电感原边绕组L_2a的励磁电感的电压，

是第四模态和第五模态中耦合电感原边绕组L_2a的励磁电感的电压。

is the voltage of the leakage inductance L _K2 of the primary winding L _2a of the coupled inductor in the first mode,

is the voltage of the leakage inductance L _K2 of the coupled inductor primary winding L _2a in the fourth and fifth modes.

is the voltage of the excitation inductance of the primary winding L _2a of the coupled inductor in the first mode,

is the voltage of the magnetizing inductance of the coupled inductor primary winding L _2a in the fourth and fifth modes.

According to the modal analysis, the voltage stress of the clamp capacitor C _C1 , the clamp capacitor C _C2 , the capacitor C ₁ , the capacitor C ₂ , the capacitor C _o1 , the capacitor C _o2 , the first switch S ₁ , and the second switch S ₂ can be obtained and the voltage gain of the converter is:

是钳位电容C_C1的电压，

是钳位电容C_C2的电压。V_C1是电容C₁的电压，V_C2是电容C₂的电压，V_out是负载R两端的输出电压，V_Co1是电容C_o1的电压，V_Co2是电容C_o2的电压，V_D1是续流二极管D₁的电压，V_D2是续流二极管D₂的电压，V_D3是续流二极管D₃的电压，V_D4是续流二极管D₄的电压。M_CCM表示变换器的电压增益。in,

is the voltage across the clamping capacitor C _C1 ,

is the voltage across the clamping capacitor C _C2 . V _C1 is the voltage of capacitor C ₁ , V _C2 is the voltage of capacitor C ₂ , V _out is the output voltage across the load R, V _Co1 is the voltage of capacitor C _o1 , V _Co2 is the voltage of capacitor C _o2 , V _D1 is the continuation V _D2 is the voltage _of freewheeling diode D1, _VD2 is the voltage of freewheeling diode D2, _VD3 is the voltage of freewheeling diode _D3 , and _VD4 is the voltage of freewheeling diode _D4 . M _CCM represents the voltage gain of the converter.

L_LK1是漏感L_K1的感值，L_LK2是漏感L_K2的感值，f_S是直流变换器的谐振频率且

The function of the clamping capacitors C _C1 and C _C2 is to completely absorb the energy stored in the leakage inductances of the primary windings of the two coupled inductors, so as to prevent the _first switch S1 and the _second switch S2 from being affected by voltage spikes. A larger value of the clamping capacitor will not affect the clamping effect, but will increase the volume of the entire DC converter. In order to achieve a balance between the better clamping effect and volume, the half of the resonance period of the leakage inductance and the clamping capacitor is greater than the turn-off time of the main switch to ensure that the leakage inductance energy is transferred to the clamping capacitor, that is,

L _LK1 is the inductance value of the leakage inductance L _K1 , L _LK2 is the inductance value of the leakage inductance L _K2 , f _S is the resonant frequency of the DC converter and

In the case of considering the effect of parasitic parameters of the device in the circuit, the expressions of the voltages of the capacitors C _o1 and C _o2 can be obtained as:

依次是耦合电感原边绕组L_1a、漏感L_K1、耦合电感原边绕组L_2a和漏感L_K2在第一模态下的电压。

依次是耦合电感原边绕组L_1a、漏感L_K1、耦合电感原边绕组L_2a和漏感L_K2在第四模态以及第五模态两个模态下的电压。

分别是耦合电感原边绕组L_1a和耦合电感原边绕组L_2a在第一模态下的电压。

是耦合电感原边绕组L_1a在第四模态以及第五模态两个模态下的电压。

分别是耦合电感原边绕组L_1a和耦合电感原边绕组L_2a的等效内阻。V_d、R_d分别是各个续流二极管的电压降以及导通内阻。It can be seen from this that the voltage difference between the capacitor C _o1 and the capacitor C _o2 is 0 under the action of the parasitic parameters of the device in the high-gain boost converter for photovoltaic power generation. in,

The sequence is the voltage of the coupled inductor primary winding L _1a , the leakage inductance L _K1 , the coupled inductor primary winding L _2a and the leakage inductance L _K2 in the first mode.

The sequence is the voltage of the coupled inductor primary winding L _1a , the leakage inductance L _K1 , the coupled inductor primary winding L _2a and the leakage inductance L _K2 in the fourth mode and the fifth mode.

are the voltages of the primary winding _L1a of the coupled inductor and the primary winding _L2a of the coupled inductor in the first mode, respectively.

is the voltage of the primary winding _L1a of the coupled inductor in the fourth mode and the fifth mode.

are the equivalent internal resistances of the primary winding _L1a of the coupled inductor and the primary winding _L2a of the coupled inductor, respectively. V _d and R _d are the voltage drop and on-resistance of each freewheeling diode, respectively.

The above are only preferred embodiments of the present application, and the present invention is not limited to the above embodiments. It can be understood that other improvements and changes directly derived or thought of by those skilled in the art without departing from the spirit and concept of the present invention should be considered to be included within the protection scope of the present invention.

Claims (10)

1. A high-gain boost converter for photovoltaic power generation, characterized in that the high-gain boost converter for photovoltaic power generation comprises an input circuit and an output circuit, and a coupled inductor primary winding L _1a and a coupled inductor secondary winding L _{1b are} formed. A set of coupled inductors, the primary winding L _2a of the coupled inductor and the secondary winding L _2b of the coupled inductor form another set of coupled inductors, the primary winding L _1a of the coupled inductor and the primary winding L _2a of the coupled inductor are arranged in the input circuit, and the coupled inductor The secondary winding L _1b and the coupled inductor secondary winding L _2b are arranged in the output circuit; In the input circuit, the positive pole of the input power supply V _in is connected to the first end of the coupled inductor primary winding L _1a and the first end of the coupled inductor primary winding L _2a , and the coupled inductor primary winding L The second end of _1a is connected to the drain of the _first switch S1, the second end of the coupled inductor primary winding L _2a is connected to the drain of the _second switch S2, and the source of the _first switch S1 The pole is connected to the source of the _second switch tube S2 and is connected to the negative pole of the input power supply V _in ; the two ends of the _first switch tube S1 are connected across an anti-parallel diode and a switched capacitor C _S1 , and the second switch tube _Both ends of S2 are connected with an anti-parallel diode and a switched capacitor C _S2 ; The duty ratios of the _first switch S1 and the _second switch S2 are equal and differ by 180° and are staggered, and a first clamping circuit is connected across the two ends of the primary winding _L1a of the coupled inductor, A second clamping circuit is connected across both ends of the primary winding _L2a of the coupled inductor. 2 . The high-gain boost converter for photovoltaic power generation according to claim 1 , wherein the first clamp circuit comprises a clamp switch S _C1 and a clamp capacitor C _C1 , and the clamp switch S The source of _C1 is connected to the drain of the first switch S1, and the drain of the clamp switch S _C1 is connected to the positive pole of the input power V _in through the clamp capacitor _{C C1 ;} the second clamp The circuit includes a clamp switch S _C2 and a clamp capacitor C _C2 , the source of the clamp switch S _C2 is connected to the drain of the second switch S ₂ , and the drain of the clamp switch S _C2 The positive pole of the input power supply V _in is connected through the clamping capacitor C _C2 ; the two ends of the clamp switch S _C1 are connected with an anti-parallel diode, and the two ends of the clamp switch S _C2 are connected with an anti-parallel diode. diode, the clamp switch S _C1 and the clamp switch S _C2 are alternately turned on. 3 . The high-gain boost converter for photovoltaic power generation according to claim 2 , wherein in the process that the _first switch S1 is turned on and the _second switch S2 is turned off, the The clamp switch tube S _C2 is turned on; in the process that the second switch tube S ₂ is turned on and the first switch tube S ₁ is turned off, the clamp switch tube S _C1 is turned on. 4 . The high-gain boost converter for photovoltaic power generation according to claim 3 , wherein the on-time of the clamp switch S _C2 is shorter than the off-time of the second switch S ₂ . The on-time of the clamp switch S _C1 is shorter than the off-time of the first switch S ₁ , and the on-time of the clamp switch S _C1 is the same as the turn-on of the clamp switch S _C2 The duration of the pass is equal. 5 . The high-gain boost converter for photovoltaic power generation according to claim 2 , wherein in one working cycle of the high-gain boost converter for photovoltaic power generation, the first switching transistor S ₁ in t ₀ to t ₁ is turned on, the _second switch S2 is turned on, the two clamp switches S _C1 and S _C2 are both turned off, and the _first switch S1 is turned on and the _second switch S2 is turned off during t ₁ to t ₄ , the two clamp switch tubes S _C1 and S _C2 are both turned off, the first switch tube S ₁ is turned on, the second switch tube S ₂ is turned off, the clamp switch tube S _C2 is turned on, and the clamp switch tube S C2 is turned on during t ₄ to t ₅ The position switch S _C1 is turned off, the first switch S ₁ is turned _on , the second switch S ₂ is turned off, and the two clamp switches S _C1 and S _C2 are both turned off in t ₅ to t ₇ . In _t8 , the _first switch S1 is turned on, the _second switch S2 is turned on, and the two clamp switches S _C1 and S _C2 are both turned off; From _t8 to _t9 , the first switch S1 is turned on, the _second switch S2 is turned on, and the two clamp switches S _C1 and S _C2 are both turned off. From _t9 to _t12 , the first switch S is turned _on . ₁ is turned off, the _second switch S2 is turned on, the two clamp switches S _C1 and S _C2 are both turned off, and the _first switch S1 is turned off and the _second switch S2 is turned on in t ₁₂ to t ₁₃ . On, the clamp switch S _C1 is turned on, the clamp switch S _C2 is turned off, the first switch S ₁ is turned off, the second switch S ₂ is turned on, and the two clamp switches are turned off from t ₁₃ to t ₁₅ Both S _C1 and S _C2 are turned off. During t ₁₅ to t ₁₆ , the _first switch S1 is turned on, the _second switch S2 is turned on, and the two clamp switches S _C1 and S _C2 are turned off. 6 . The high-gain boost converter for photovoltaic power generation according to claim 5 , wherein in the time range from t ₃ to t ₄ , the anti-parallel diodes at both ends of the clamp switch S _C2 are in a conducting state, and the clamp The voltage at both ends of the switch tube S _C2 is zero, and the clamping switch tube S _C2 is driven to turn on at zero voltage within the time range of t ₄ to t ₅ ; the clamping capacitor C _C2 and the coupling inductor are turned on within the time range of t ₄ to t ₅ . The leakage inductance L _K2 of the side winding L _2a resonates to absorb the energy of the leakage inductance L _K2 . Under the action of resonance, the current I _L2 of the leakage inductance L _K2 reverses, and the switch tube is clamped when the current I _L2 reverses at time t ₅ S _C2 is turned off, and under the action of the clamping capacitor C _C2 , the clamping switch tube S _C2 realizes zero-voltage turn-off. 7 . The high-gain boost converter for photovoltaic power generation according to claim 5 , wherein in the time range from t ₁₁ to t ₁₂ , the anti-parallel diodes at both ends of the clamp switch S _C1 are in a conducting state, and the clamp The voltage across the switch tube S _C1 is zero, and the clamping switch S _C1 is driven to turn on at zero voltage within the time range of t ₁₂ to t ₁₃ ; the clamp capacitor C _C1 and the coupling inductor are turned on within the time range of t ₁₂ to t ₁₃ . The leakage inductance L _K1 of the side winding L _1a resonates to absorb the energy of the leakage inductance L _K1 . Under the action of resonance, the current I _L1 of the leakage inductance L _K1 reverses, and when the current I _L1 reverses at time t ₁₃ , the switch tube is clamped S _C1 is turned off, and under the action of the clamping capacitor C _C1 , the clamping switch tube S _C1 realizes zero-voltage turn-off. 8. The high-gain boost converter for photovoltaic power generation according to claim 5, characterized in that, under the effect of resonance between the leakage inductance L _K2 of the primary winding L _2a of the coupled inductor and the switched capacitor C _S2 , the second switch tube S ₂ Realize zero-voltage turn-on and zero-voltage turn-off; under the effect of resonance between the leakage inductance L _K1 of the primary winding _L1a of the coupled inductor and the switch capacitor C _S1 , the _first switch tube S1 realizes zero-voltage turn-on and zero-voltage turn-off; break. 9 . The high-gain boost converter for photovoltaic power generation according to claim 1 , wherein, in the output circuit, the first end of the coupled inductor secondary winding L _1b is connected to the second end of the coupled inductor secondary winding L _2b . 10 . One end, the second end of the coupled inductor secondary winding _L1b is connected to the first end of the capacitor _C1 and the first end of the capacitor C2 respectively, the _second end of the capacitor _C1 is connected to the cathode _of the freewheeling diode D1 and the _The anode of the freewheeling diode D2, the anode of the freewheeling diode D1 is connected to the _first end of the capacitor C _o1 and one end of the load R, the _second end of the capacitor C _o1 is connected to the cathode of the freewheeling diode D2 , the second end of the secondary winding _L2b of the coupling inductor, the anode of the freewheeling diode _D3 and the first end of the capacitor _C2 , the _second end of the capacitor C2 is connected to the cathode of the freewheeling diode _D3 and the continuous _The anode of the freewheeling diode _D4 , the cathode of the freewheeling diode D4 is connected to the second end of the capacitor C _o2 and the other end of the load R. 10 . The high-gain boost converter for photovoltaic power generation according to claim 9 , wherein, under the action of parasitic parameters of devices in the high-gain boost converter for photovoltaic power generation, the capacitor C _o1 and the capacitor C _o2 The voltage difference is 0.

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