CN114784087A - Floating buffer layer groove collector reverse conducting type insulated gate bipolar transistor - Google Patents

Abstract

The invention discloses a reverse conducting insulated gate bipolar transistor of a floating buffer layer groove collector, which comprises a collector contact layer (1), a heavily doped second conduction type collector region (10), a heavily doped first conduction type collector region (11), a collector groove heavily doped second conduction type gate region (12), a first conduction type floating buffer layer (21), a lightly doped first conduction type drift layer (22), a second conduction type base region (30), a heavily doped second conduction type emitting region (31), a heavily doped first conduction type emitting region (32), a heavily doped first conduction type gate region (33), a collector groove insulating medium layer (35), an emitter contact layer (2) and a gate contact layer (3); the device structure has the advantages of improved breakdown voltage, simplified implementation process and further reduced turn-off loss.

Description

A floating buffer layer trench collector reverse conduction insulated gate bipolar transistor

technical field

The invention relates to the technical field of power semiconductor power electronic devices, in particular to a floating buffer layer trench collector reverse conduction insulated gate bipolar transistor.

Background technique

Reverse Conducting Insulated Gate Bipolar Transistor (RC-IGBT) is a device that integrates an IGBT and an anti-parallel diode into one chip. Reverse-conducting insulated gate bipolar transistors (RC-IGBTs) can improve integration, reduce parasitic inductance, and reduce packaging costs. However, the common RC-IGBT will have the phenomenon that the current changes with the voltage Snapback, which will adversely affect the power consumption and reliability of the device. The existing P-type polysilicon trench-collector RC-IGBT structure, as shown in Figure 1 and Figure 2, can effectively suppress the Snapback phenomenon and reduce the turn-off loss, but it still suffers from reduced breakdown voltage, complex implementation process, and turn-off. Loss is still a big problem. In view of the above problems, the present invention proposes a new structure RC-IGBT device based on the existing P-type polysilicon trench collector RC-IGBT structure, the breakdown voltage is improved, the realization process is simplified, and the turn-off loss is further reduced .

SUMMARY OF THE INVENTION

The purpose of the present invention is to provide a floating buffer layer trench collector reverse conduction type insulated gate bipolar transistor, comprising a collector contact layer, a heavily doped second conductivity type collector region, and a heavily doped first conductivity type Collector region, collector trench heavily doped second conductivity type gate region, first conductivity type floating buffer layer, lightly doped first conductivity type drift layer, second conductivity type base region, heavily doped second conductivity type Conductive type emitter region, heavily doped first conductivity type emitter region, heavily doped first conductivity type gate region, collector trench insulating dielectric layer, emitter contact layer, gate contact layer.

The collector trench is heavily doped with the second conductivity type gate region and the collector trench insulating medium layer constitutes a collector second conductivity type trench structure. The collector second conductivity type trench structure is composed of a plurality of repeating units. The collector second conductivity type trench structure is located above the partial region of the collector contact layer.

The heavily doped second conductive type collector region and the heavily doped first conductive type collector region cover the partial region of the collector metal layer. The heavily doped second conductivity type collector region and the heavily doped first conductivity type collector region are respectively located between two repeating units of the collector second conductivity type trench structure.

The first conductive type floating buffer layer is located on the collector trench insulating dielectric layer and floats in the lightly doped first conductive type drift layer.

The second conductive type base region is located above the partial region of the lightly doped first conductive type drift layer.

The heavily doped second conductive type emitter region is located above the lightly doped second conductive type base region part region.

The heavily doped second conductive type base region is located above the lightly doped second conductive type base region part region.

The emitter contact layer is located on the heavily doped second conductivity type emitter region. The emitter contact layer is also located on the heavily doped second conductive type base portion region.

Preferably, the lightly doped first conductivity type drift layer is located on the heavily doped second conductivity type collector region, the collector trench insulating dielectric layer and the heavily doped first conductivity type collector region.

Preferably, a first conductive type buffer layer is also included.

The first conductive type buffer layer covers the heavily doped second conductive type collector region.

The lightly doped first conductive type drift layer is located on the first conductive type buffer layer, the collector trench insulating medium layer and the heavily doped first conductive type collector region.

Preferably, a first conductive type buffer layer is also included.

The first conductive type buffer layer covers the heavily doped second conductive type collector region and the heavily doped first conductive type collector region.

The lightly doped first conductive type drift layer is located on the first conductive type buffer layer and the collector trench insulating medium layer.

Preferably, the collector contact layer, heavily doped second conductivity type collector region, heavily doped first conductivity type collector region, collector trench heavily doped second conductivity type gate region, collector trench The trench insulating medium layer, the floating buffer layer of the first conductivity type and the partially lightly doped drift layer of the first conductivity type constitute the collector structure of the trench collector reverse-conducting insulated gate bipolar transistor of the floating buffer layer.

Preferably, the collector contact layer, heavily doped second conductivity type collector region, heavily doped first conductivity type collector region, collector trench heavily doped second conductivity type gate region, collector trench The trench insulating dielectric layer, the first conductive type buffer layer, the first conductive type floating buffer layer and the partially lightly doped first conductive type drift layer constitute the floating buffer layer trench collector reverse conduction type insulated gate bipolar transistor. collector structure.

Preferably, the gate contact layer is located on a portion of the heavily doped first conductive type gate region.

The heavily doped first conductive type gate region is located inside the gate insulating dielectric layer.

Preferably, a gate insulating dielectric layer is also included.

The gate contact layer, the heavily doped first conductive type gate region and the gate insulating dielectric layer constitute the gate structure of the floating buffer layer trench collector reverse conduction insulated gate bipolar transistor.

The gate structure is located above the partial region of the lightly doped first conductive type drift layer. The gate structure is composed of a plurality of repeating units.

The second conductive type base region is located between two repeating units of the gate structure.

Preferably, an emitter insulating dielectric layer is also included.

The emitter insulating dielectric layer is located between the emitter contact layer and the gate electrode contact layer, and plays the role of electrical isolation.

Preferably, the second conductivity type base region, the heavily doped second conductivity type emitter region, the heavily doped first conductivity type emitter region, the heavily doped first conductivity type gate region, the gate insulating dielectric layer, the emitter region The polar insulating dielectric layer, the emitter contact layer and the gate contact layer constitute the front MOS structure of the floating buffer layer trench collector reverse conduction insulated gate bipolar transistor.

The technical effect of the present invention is unquestionable, the breakdown voltage of the RC-IGBT device of the present invention is improved, the realization process is simplified, the turn-off loss is further reduced, and the overall performance of the device is improved.

Description of drawings

1 is a schematic cross-sectional structure diagram of an existing P-type polysilicon trench collector RC-IGBT device 1;

2 is a schematic cross-sectional structure diagram of an existing P-type polysilicon trench collector RC-IGBT device 2;

3 is a schematic diagram of a cross-sectional structure of a device according to Embodiment 3 of the present invention;

4 is a schematic diagram of a cross-sectional structure of a device according to Embodiment 4 of the present invention;

5 is a schematic diagram of a cross-sectional structure of a device according to Embodiment 5 of the present invention;

Figure 6 is a comparison chart of breakdown characteristics;

Figure 7 is a comparison diagram of the off-voltage and current waveforms;

The figure includes: collector contact layer 1, heavily doped second conductivity type collector region 10, heavily doped first conductivity type collector region 11, collector trench heavily doped second conductivity type gate region 12, First conductivity type buffer layer 20 , first conductivity type floating buffer layer 21 , lightly doped first conductivity type drift layer 22 , second conductivity type collector floating region 23 , first conductivity type collector floating region 24 , second conductivity type base region 30, heavily doped second conductivity type emitter region 31, heavily doped first conductivity type emitter region 32, heavily doped first conductivity type gate region 33, gate insulating dielectric layer 34, The collector trench insulating dielectric layer 35 , the emitter insulating dielectric layer 36 , the emitter contact layer 2 , and the gate contact layer 3 .

Detailed ways

The present invention will be further described below in conjunction with the examples, but it should not be understood that the scope of the above-mentioned subject matter of the present invention is limited to the following examples. Without departing from the above-mentioned technical idea of the present invention, various substitutions and changes can be made according to common technical knowledge and conventional means in the field, which shall be included in the protection scope of the present invention.

Example 1:

A floating buffer layer trench collector reverse conduction insulated gate bipolar transistor, comprising a collector contact layer 1 , a heavily doped second conductivity type collector region 10 , and a heavily doped first conductivity type collector region 11 , collector trench heavily doped second conductivity type gate region 12, first conductivity type floating buffer layer 21, lightly doped first conductivity type drift layer 22, second conductivity type base region 30, heavily doped first conductivity type Two conductivity type emitter region 31 , heavily doped first conductivity type emitter region 32 , heavily doped first conductivity type gate region 33 , collector trench insulating dielectric layer 35 , emitter contact layer 2 , gate contact layer 3 .

The collector trench heavily doped second conductivity type gate region 12 and the collector trench insulating dielectric layer 35 constitute a collector second conductivity type trench structure. The collector second conductivity type trench structure is composed of a plurality of repeating units. The collector second conductivity type trench structure is located above the partial area of the collector contact layer 1 .

The heavily doped second conductivity type collector region 10 and the heavily doped first conductivity type collector region 11 cover a portion of the collector metal layer 1 . The heavily doped second conductivity type collector region 10 and the heavily doped first conductivity type collector region 11 are respectively located between two repeating units of the collector second conductivity type trench structure.

The first conductive type floating buffer layer 21 is located on the collector trench insulating dielectric layer 35 and floats in the lightly doped first conductive type drift layer 22 .

The second conductive type base region 30 is located above a portion of the lightly doped first conductive type drift layer 22 .

The heavily doped second conductive type emitter region 31 is located above the partial region of the lightly doped second conductive type base region 30 .

The heavily doped second conductive type base region 32 is located above a partial region of the lightly doped second conductive type base region 30 .

The emitter contact layer 2 is located on the heavily doped second conductivity type emitter region 31 . The emitter contact layer 2 is also located on a partial region of the heavily doped second conductive type base region 32 .

The lightly doped first conductivity type drift layer 22 is located on the heavily doped second conductivity type collector region 10 , the collector trench insulating dielectric layer 35 and the heavily doped first conductivity type collector region 11 .

The transistor also includes a first conductivity type buffer layer 20 .

The first conductive type buffer layer 20 covers the heavily doped second conductive type collector region 10 .

The lightly doped first conductivity type drift layer 22 is located on the first conductivity type buffer layer 20 , the collector trench insulating dielectric layer 35 and the heavily doped first conductivity type collector region 11 .

The collector contact layer 1, heavily doped second conductivity type collector region 10, heavily doped first conductivity type collector region 11, collector trench heavily doped second conductivity type gate region 12, collector The trench insulating dielectric layer 35, the floating buffer layer 21 of the first conductivity type and the partially lightly doped drift layer 22 of the first conductivity type constitute the collector structure of the floating buffer layer trench collector reverse-conducting insulated gate bipolar transistor .

The collector contact layer 1, heavily doped second conductivity type collector region 10, heavily doped first conductivity type collector region 11, collector trench heavily doped second conductivity type gate region 12, collector The trench insulating dielectric layer 35 , the first conductivity type buffer layer 20 , the first conductivity type floating buffer layer 21 and the partially lightly doped first conductivity type drift layer 22 constitute the floating buffer layer trench collector reverse conduction type insulating gate Collector structure of a bipolar transistor.

The gate contact layer 3 is located on a portion of the heavily doped first conductive type gate region 33 .

The heavily doped first conductive type gate region 33 is located inside the gate insulating dielectric layer 34 .

The transistor also includes a gate insulating dielectric layer 34 .

The gate contact layer 3 , the heavily doped first conductive type gate region 33 and the gate insulating dielectric layer 34 constitute the gate structure of the floating buffer layer trench collector reverse conducting insulated gate bipolar transistor.

The gate structure is located on a partial region of the lightly doped first conductivity type drift layer 22 . The gate structure is composed of a plurality of repeating units.

The second conductive type base region 30 is located between two repeating units of the gate structure.

The transistor also includes an emitter insulating dielectric layer 36 .

The emitter insulating dielectric layer 36 is located between the emitter contact layer 2 and the gate electrode contact layer 3, and plays an electrical isolation function.

The second conductivity type base region 30 , the heavily doped second conductivity type emitter region 31 , the heavily doped first conductivity type emitter region 32 , the heavily doped first conductivity type gate region 33 , and the gate insulating dielectric layer 34 , the emitter insulating dielectric layer 36 , the emitter contact layer 2 and the gate contact layer 3 constitute the front MOS structure of the floating buffer layer trench collector reverse conducting insulated gate bipolar transistor.

Example 2:

A floating buffer layer trench collector reverse conduction insulated gate bipolar transistor, comprising a collector contact layer 1 , a heavily doped second conductivity type collector region 10 , and a heavily doped first conductivity type collector region 11 , collector trench heavily doped second conductivity type gate region 12, first conductivity type floating buffer layer 21, lightly doped first conductivity type drift layer 22, second conductivity type base region 30, heavily doped first conductivity type Two conductivity type emitter region 31 , heavily doped first conductivity type emitter region 32 , heavily doped first conductivity type gate region 33 , collector trench insulating dielectric layer 35 , emitter contact layer 2 , gate contact layer 3 .

The collector trench heavily doped second conductivity type gate region 12 and the collector trench insulating dielectric layer 35 constitute a collector second conductivity type trench structure. The collector second conductivity type trench structure is composed of a plurality of repeating units. The collector second conductivity type trench structure is located above the partial area of the collector contact layer 1 .

The heavily doped second conductivity type collector region 10 and the heavily doped first conductivity type collector region 11 cover a portion of the collector metal layer 1 . The heavily doped second conductivity type collector region 10 and the heavily doped first conductivity type collector region 11 are respectively located between two repeating units of the collector second conductivity type trench structure.

The first conductive type floating buffer layer 21 is located on the collector trench insulating dielectric layer 35 and floats in the lightly doped first conductive type drift layer 22 .

The second conductive type base region 30 is located above a portion of the lightly doped first conductive type drift layer 22 .

The heavily doped second conductive type emitter region 31 is located above the partial region of the lightly doped second conductive type base region 30 .

The heavily doped second conductive type base region 32 is located above a partial region of the lightly doped second conductive type base region 30 .

The emitter contact layer 2 is located on the heavily doped second conductivity type emitter region 31 . The emitter contact layer 2 is also located on a partial region of the heavily doped second conductive type base region 32 .

The lightly doped first conductivity type drift layer 22 is located on the heavily doped second conductivity type collector region 10 , the collector trench insulating dielectric layer 35 and the heavily doped first conductivity type collector region 11 .

The transistor also includes a first conductivity type buffer layer 20 .

The first conductive type buffer layer 20 covers the heavily doped second conductive type collector region 10 and the heavily doped first conductive type collector region 11 .

The lightly doped first conductivity type drift layer 22 is located on the first conductivity type buffer layer 20 and the collector trench insulating dielectric layer 35 .

The collector contact layer 1, heavily doped second conductivity type collector region 10, heavily doped first conductivity type collector region 11, collector trench heavily doped second conductivity type gate region 12, collector The trench insulating dielectric layer 35, the floating buffer layer 21 of the first conductivity type and the partially lightly doped drift layer 22 of the first conductivity type constitute the collector structure of the floating buffer layer trench collector reverse-conducting insulated gate bipolar transistor .

The collector contact layer 1, heavily doped second conductivity type collector region 10, heavily doped first conductivity type collector region 11, collector trench heavily doped second conductivity type gate region 12, collector The trench insulating dielectric layer 35 , the first conductivity type buffer layer 20 , the first conductivity type floating buffer layer 21 and the partially lightly doped first conductivity type drift layer 22 constitute the floating buffer layer trench collector reverse conduction type insulating gate Collector structure of a bipolar transistor.

The gate contact layer 3 is located on a portion of the heavily doped first conductive type gate region 33 .

The heavily doped first conductive type gate region 33 is located inside the gate insulating dielectric layer 34 .

The transistor also includes a gate insulating dielectric layer 34 .

The gate contact layer 3 , the heavily doped first conductive type gate region 33 and the gate insulating dielectric layer 34 constitute the gate structure of the floating buffer layer trench collector reverse conducting insulated gate bipolar transistor.

The gate structure is located on a partial region of the lightly doped first conductivity type drift layer 22 . The gate structure is composed of a plurality of repeating units.

The second conductive type base region 30 is located between two repeating units of the gate structure.

The transistor also includes an emitter insulating dielectric layer 36 .

The emitter insulating dielectric layer 36 is located between the emitter contact layer 2 and the gate electrode contact layer 3, and plays an electrical isolation function.

The second conductivity type base region 30 , the heavily doped second conductivity type emitter region 31 , the heavily doped first conductivity type emitter region 32 , the heavily doped first conductivity type gate region 33 , and the gate insulating dielectric layer 34 , the emitter insulating dielectric layer 36 , the emitter contact layer 2 and the gate contact layer 3 constitute the front MOS structure of the floating buffer layer trench collector reverse conducting insulated gate bipolar transistor.

Example 3:

As shown in FIG. 3, a floating buffer layer trench collector reverse-conducting insulated gate bipolar transistor includes a collector contact layer 1, a heavily doped second conductivity type collector region 10, a heavily doped first Conductive type collector region 11, collector trench heavily doped second conductivity type gate region 12, first conductivity type floating buffer layer 21, lightly doped first conductivity type drift layer 22, second conductivity type base region 30. Heavily doped second conductivity type emitter region 31, heavily doped first conductivity type emitter region 32, heavily doped first conductivity type gate region 33, gate insulating dielectric layer 34, collector trench insulating dielectric layer 35. Emitter insulating dielectric layer 36, emitter contact layer 2, gate contact layer 3;

The collector trench heavily doped second conductivity type gate region 12 and the collector trench insulating dielectric layer 35 constitute the collector second conductivity type trench structure; the collector second conductivity type trench structure is composed of multiple The second conductive type trench structure of the collector is located on the partial area of the collector contact layer 1;

The heavily doped second conductivity type collector region 10 and the heavily doped first conductivity type collector region 11 cover part of the collector metal layer 1; the heavily doped second conductivity type collector region 10 and the heavily doped first conductivity type collector region 11 are respectively located between the two repeating units of the collector second conductivity type trench structure;

The lightly doped first conductivity type drift layer 22 is located on the heavily doped second conductivity type collector region 10, the collector trench insulating dielectric layer 35 and the heavily doped first conductivity type collector region 11;

The first conductive type floating buffer layer 21 is located on the collector trench insulating dielectric layer 35 and floats in the lightly doped first conductive type drift layer 22;

The collector contact layer 1, heavily doped second conductivity type collector region 10, heavily doped first conductivity type collector region 11, collector trench heavily doped second conductivity type gate region 12, collector The trench insulating dielectric layer 35, the first conductivity type floating buffer layer 21 and the partially lightly doped first conductivity type drift layer 22 constitute the floating buffer layer trench collector reverse conducting insulated gate bipolar transistor the collector structure;

The gate contact layer 3 is located on a partial area of the heavily doped first conductive type gate region 33; the heavily doped first conductive type gate region 33 is located inside the gate insulating dielectric layer 34; the gate The contact layer 3, the heavily doped first conductive type gate region 33 and the gate insulating dielectric layer 34 constitute the gate structure of the floating buffer layer trench collector reverse-conducting insulated gate bipolar transistor; so The gate structure is located on the partial area of the lightly doped first conductive type drift layer 22; the gate structure is composed of a plurality of repeating units;

The second conductive type base region 30 is located on the partial area of the lightly doped first conductive type drift layer 22; the second conductive type base region 30 is located between two repeating units of the gate structure;

The heavily doped second conductivity type emitter region 31 is located above the partial region of the lightly doped second conductivity type base region 30;

the heavily doped second conductivity type base region 32 is located above the partial region of the lightly doped second conductivity type base region 30;

The emitter contact layer 2 is located on the heavily doped second conductivity type emitter region 31; the emitter contact layer 2 is also located on the partial region of the heavily doped second conductivity type base region 32;

The emitter insulating medium layer 36 is located between the emitter contact layer 2 and the gate electrode contact layer 3, and plays an electrical isolation function;

The second conductivity type base region 30 , the heavily doped second conductivity type emitter region 31 , the heavily doped first conductivity type emitter region 32 , the heavily doped first conductivity type gate region 33 , and the gate insulating dielectric layer 34 , the emitter insulating dielectric layer 36 , the emitter contact layer 2 and the gate contact layer 3 constitute the front MOS structure of the floating buffer layer trench collector reverse-conducting insulated gate bipolar transistor.

Example 4:

As shown in FIG. 4, a floating buffer layer trench collector reverse-conducting insulated gate bipolar transistor includes a collector contact layer 1, a collector P+ region 10, a collector N+ region 11, and a collector trench P+ Polysilicon region 12, N-type buffer layer 20, floating buffer N-layer 21, N-type drift layer 22, P-type base region 30, emitter P+ region 31, emitter N+ region 32, N+ polysilicon gate region 33, gate Oxide layer 34 , collector trench oxide layer 35 , emitter oxide layer 36 , emitter contact layer 2 , gate contact layer 3 .

The N-type buffer layer 20 covers the collector P+ region 10 and the collector N+ region 11 .

Example 5:

As shown in FIG. 5, a floating buffer layer trench collector reverse-conducting insulated gate bipolar transistor includes a collector contact layer 1, a collector P+ region 10, a collector N+ region 11, and a collector trench P+ Polysilicon region 12, N-type buffer layer 20, floating buffer N-layer 21, N-type drift layer 22, P-type base region 30, emitter P+ region 31, emitter N+ region 32, N+ polysilicon gate region 33, gate Oxide layer 34 , collector trench oxide layer 35 , emitter oxide layer 36 , emitter contact layer 2 , gate contact layer 3 .

The N-type buffer layer 20 covers the collector P+ region 10 .

Example 6:

As shown in FIG. 5, a floating buffer layer trench collector reverse-conducting insulated gate bipolar transistor includes a collector contact layer 1, a collector P+ region 10, a collector N+ region 11, and a collector trench P+ Polysilicon region 12, N-type buffer layer 20, floating buffer N-layer 21, N-type drift layer 22, P-type base region 30, emitter P+ region 31, emitter N+ region 32, N+ polysilicon gate region 33, gate Oxide layer 34 , collector trench oxide layer 35 , emitter oxide layer 36 , emitter contact layer 2 , gate contact layer 3 .

The N-type buffer layer 20 covers the collector P+ region 10 .

The main material of the device adopts Si material; the thickness of the gate oxide layer 34 is 0.1 μm; the doping concentration of the N-type drift layer 22 is 5×10 ¹³ ; the thickness and doping concentration of the floating buffer N layer 21 are 1.0 μm and 1 respectively. ×10 ¹⁶ cm ^-3 ; the thickness and doping concentration of the collector N+ region 11 are 0.5 μm and 5×10 ¹⁹ cm ^-3 respectively; the thickness and doping concentration of the collector P+ region 10 are 0.5 μm and 4×10 respectively ¹⁷ cm ^-3 .

FIG. 6 shows a comparison diagram of the breakdown characteristics of the device of Example 4 and the existing P-type polysilicon trench collector RC-IGBT device 1 of FIG. 1;

FIG. 7 is a comparison diagram of the turn-off voltage and current waveforms of the device of Example 4 and the existing P-type polysilicon trench collector RC-IGBT device 1 of FIG. 1 .

Compared with the existing P-type polysilicon trench collector RC-IGBT structure of FIG. 1 and FIG. 2, combined with the breakdown characteristic comparison diagram of FIG. 6 and the turn-off voltage and current waveform comparison diagram of FIG. 7, the breakdown voltage of the device structure of the present invention is obtained. The improvement, the realization process is simplified, and the turn-off loss is further reduced.

Claims (10)

1. The utility model provides a reverse conducting type insulated gate bipolar transistor of floating buffer layer slot collector which characterized in that: the collector comprises a collector contact layer (1), a heavily doped second conductive type collector region (10), a heavily doped first conductive type collector region (11), a collector groove heavily doped second conductive type gate region (12), a first conductive type floating buffer layer (21), a lightly doped first conductive type drift layer (22), a second conductive type base region (30), a heavily doped second conductive type emitter region (31), a heavily doped first conductive type emitter region (32), a heavily doped first conductive type gate region (33), a collector groove insulating medium layer (35), an emitter contact layer (2) and a gate contact layer (3).

The collector groove heavily doped second conductive type gate region (12) and the collector groove insulating medium layer (35) form a collector second conductive type groove structure; the collector second conductivity type trench structure is composed of a plurality of repeating units; the collector second conduction type groove structure is positioned above a partial region of the collector contact layer (1);

the heavily doped second conduction type collector region (10) and the heavily doped first conduction type collector region (11) cover the partial region of the collector metal layer (1); the heavily doped second conduction type collector region (10) and the heavily doped first conduction type collector region (11) are respectively positioned between two repeating units of the second conduction type groove structure of the collector;

the first conductive type floating buffer layer (21) is positioned on the collector groove insulating medium layer (35) and floats in the lightly doped first conductive type drift layer (22);

the second conduction type base region (30) is positioned on a partial region of the lightly doped first conduction type drift layer (22);

the heavily doped second conductive type emitter region (31) is positioned above a partial region of the lightly doped second conductive type base region (30);

the heavily doped second conduction type base region (32) is positioned on a partial region of the lightly doped second conduction type base region (30);

the emitter contact layer (2) is positioned above the heavily doped second conduction type emitter region (31); the emitter contact layer (2) is also positioned on a partial area of the heavily doped base region (32) of the second conduction type.

2. The floating buffer layer trench collector reverse conducting insulated gate bipolar transistor according to claim 1, wherein: the lightly doped first conduction type drift layer (22) is positioned above the heavily doped second conduction type collector region (10), the collector groove insulating medium layer (35) and the heavily doped first conduction type collector region (11).

3. The floating buffer layer trench collector reverse conducting insulated gate bipolar transistor according to claim 1, wherein: further comprising a first conductivity type buffer layer (20);

the first conductive type buffer layer (20) is covered on the heavily doped second conductive type collector region (10);

the lightly doped first conductivity type drift layer (22) is located above the first conductivity type buffer layer (20), the collector trench insulating dielectric layer (35) and the heavily doped first conductivity type collector region (11).

4. The floating buffer layer trench collector reverse conducting insulated gate bipolar transistor according to claim 1, wherein: further comprising a first conductivity type buffer layer (20);

the first conduction type buffer layer (20) covers the heavily doped second conduction type collector region (10) and the heavily doped first conduction type collector region (11);

the lightly doped first conductive type drift layer (22) is located on the first conductive type buffer layer (20) and the collector groove insulating medium layer (35).

5. The floating buffer layer trench collector reverse conducting insulated gate bipolar transistor according to any one of claims 1, 2 and 3, wherein: the collector contact layer (1), the heavily doped second conduction type collector region (10), the heavily doped first conduction type collector region (11), the collector trench heavily doped second conduction type gate region (12), the collector trench insulating dielectric layer (35), the first conduction type floating buffer layer (21) and part of the lightly doped first conduction type drift layer (22) form a collector structure of the floating buffer layer trench collector reverse conducting type insulated gate bipolar transistor.

6. The floating buffer layer trench collector reverse conducting insulated gate bipolar transistor according to any one of claims 1, 2 and 4, wherein: the collector contact layer (1), the heavily doped second conduction type collector region (10), the heavily doped first conduction type collector region (11), the heavily doped second conduction type gate region (12), the collector trench insulating dielectric layer (35), the first conduction type buffer layer (20), the first conduction type floating buffer layer (21) and a part of the lightly doped first conduction type drift layer (22) form a collector structure of the floating buffer layer trench collector reverse conduction type insulated gate bipolar transistor.

7. The floating buffer layer trench collector reverse conducting insulated gate bipolar transistor according to claim 1, wherein: the gate contact layer (3) is positioned above a partial region of the heavily doped first conduction type gate region (33);

the heavily doped first conductivity type gate region (33) is located inside a gate insulating dielectric layer (34).

8. The floating buffer layer trench collector reverse conducting insulated gate bipolar transistor according to claim 1, wherein: further comprising a gate insulating dielectric layer (34);

the grid contact layer (3), the heavily doped first conduction type grid region (33) and the grid insulating medium layer (34) form a grid structure of the floating buffer layer groove collector reverse conducting type insulated gate bipolar transistor;

the gate structure is positioned above a part of the region of the lightly doped drift layer (22) of the first conductivity type; the gate structure is composed of a plurality of repeating units;

the second conductivity type base region (30) is located between two repeating units of the gate structure.

9. The floating buffer layer trench collector reverse conducting insulated gate bipolar transistor according to claim 8, wherein: an emitter insulating dielectric layer (36);

an emitter insulating medium layer (36) is positioned between the emitter contact layer (2) and the gate electrode contact layer (3) and plays a role in electric isolation.

10. The floating buffer layer trench collector reverse conducting insulated gate bipolar transistor according to claim 9, wherein: the front MOS structure of the floating buffer layer groove collector reverse conducting type insulated gate bipolar transistor is formed by the second conduction type base region (30), the heavily doped second conduction type emitting region (31), the heavily doped first conduction type emitting region (32), the heavily doped first conduction type gate region (33), the gate insulating medium layer (34), the emitter insulating medium layer (36), the emitter contact layer (2) and the gate contact layer (3).

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