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CN114759134A - LED chip testing method - Google Patents

LED chip testing method Download PDF

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Publication number
CN114759134A
CN114759134A CN202210379988.1A CN202210379988A CN114759134A CN 114759134 A CN114759134 A CN 114759134A CN 202210379988 A CN202210379988 A CN 202210379988A CN 114759134 A CN114759134 A CN 114759134A
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led chip
led
transparent conductive
conductive film
electrodes
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CN114759134B (en
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李美玲
张星星
简宏安
胡加辉
金从龙
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Jiangxi Zhao Chi Semiconductor Co Ltd
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Jiangxi Zhao Chi Semiconductor Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/14Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/32Additional lead-in metallisation on a device or substrate, e.g. additional pads or pad portions, lines in the scribe line, sacrificed conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/34Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/85Packages
    • H10H20/857Interconnections, e.g. lead-frames, bond wires or solder balls

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Automation & Control Theory (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Led Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

The invention provides a method for testing an LED chip, which comprises the following steps: the method comprises the following steps of (1) arranging LED chips cut by an LED wafer, and manufacturing a transparent conductive film correspondingly provided with a plurality of metal electrodes, wherein each metal electrode is used for being connected with the electrode of each LED chip to form a plurality of groups of LED chip groups connected in series and/or in parallel; attaching a transparent conductive film on the LED wafer, and enabling electrodes of the LED chips to be respectively contacted with corresponding metal electrodes to form a plurality of groups of LED chip groups which are formed by connecting a plurality of LED chips in series and/or in parallel; and sequentially placing a plurality of groups of probes with preset quantity on the metal electrodes at the head end and the tail end of each group of LED chip groups in the transparent conductive film respectively, and simultaneously testing the photoelectric parameter data of the plurality of groups of LED chip groups until all the LED chip groups on the LED wafer are completely tested, and removing the transparent conductive film. The invention solves the problems of low testing efficiency and easy generation of needle marks in the existing LED chip testing process.

Description

LED芯片测试方法LED chip test method

技术领域technical field

本发明涉及芯片测试技术领域,特别涉及一种LED芯片测试方法。The invention relates to the technical field of chip testing, in particular to a method for testing an LED chip.

背景技术Background technique

微缩化(Micro)LED芯片可以被用于直视型(Direct View)显示技术,形成发光单元,具有高亮度、广色域、高稳定性、长寿命、节能、透明等优点。然而,目前微缩化LED显示技术距离量产尚有诸多技术难点需要化解,光电特性测试正是诸多难点之一。Micro LED chips can be used in Direct View display technology to form light-emitting units, which have the advantages of high brightness, wide color gamut, high stability, long life, energy saving, and transparency. However, there are still many technical difficulties that need to be resolved in the miniaturized LED display technology from mass production, and optoelectronic characteristic testing is one of the many difficulties.

一方面,用于直视型显示技术的微缩化LED芯片修复成本很高,因此在放置到目标背板上必须具有很高的良率,方能降低修复的数量,这就要求在对LED芯片进行巨量转移之前对它们进行充分的光电特性测试,确保被转移的芯片良率接近100%。On the one hand, the repair cost of miniaturized LED chips for direct-view display technology is very high, so it must have a high yield when placed on the target backplane to reduce the number of repairs, which requires the LED chips to be repaired. They are fully tested for optoelectronic characteristics before mass transfer to ensure that the yield of the transferred chips is close to 100%.

另一方面,微缩化LED芯片尺寸很小,传统探针式的LED电致(Electroluminescent)发光测试方法所使用的探针尺寸较大,难以满足探针与LED芯片间有效的接触,且扎在LED芯片的正负电极上常会造成针痕偏大的问题,同时这些针痕会对LED芯片外观造成损伤,使得影响后续的封装或外观;另外在测试前调针时由于电极尺寸小而探针尺寸大使得容易出现针痕偏离电极中心点而出现扎偏的异常现象,使得降低了测试的准确率及外观良率。On the other hand, the size of the miniaturized LED chip is very small, and the size of the probe used in the traditional probe-type LED electroluminescent test method is relatively large, which is difficult to meet the effective contact between the probe and the LED chip, and is tied in The positive and negative electrodes of the LED chip often cause large needle marks. At the same time, these needle marks will damage the appearance of the LED chip, which will affect the subsequent packaging or appearance; The large size makes the abnormal phenomenon that the needle mark deviates from the center point of the electrode and is prone to misalignment, which reduces the accuracy of the test and the appearance yield.

再一方面,现有一组探针只能一次测试一颗LED芯片,使得测试效率有限,因微缩化LED芯片的产品需求数量巨大,使得传统的单颗测试方法已经无法满足产能的需求。On the other hand, the existing set of probes can only test one LED chip at a time, which makes the test efficiency limited. Due to the huge demand for miniaturized LED chips, the traditional single-chip testing method can no longer meet the production capacity demand.

发明内容SUMMARY OF THE INVENTION

基于此,本发明的目的是提供一种LED芯片测试方法,以从根本上解决现有LED芯片测试过程中测试效率低及易产生针痕的问题。Based on this, the purpose of the present invention is to provide an LED chip testing method to fundamentally solve the problems of low testing efficiency and easy generation of needle marks in the existing LED chip testing process.

根据本发明实施例的一种LED芯片测试方法,所述方法包括:According to a method for testing an LED chip according to an embodiment of the present invention, the method includes:

根据LED晶圆片所切割成的各个LED芯片排布,制作对应设有多个金属电极的透明导电膜,各个金属电极用于与各个LED芯片的电极连接形成多组串联和/或并联的LED芯片组;According to the arrangement of each LED chip cut from the LED wafer, a transparent conductive film corresponding to a plurality of metal electrodes is fabricated, and each metal electrode is used to connect with the electrodes of each LED chip to form multiple groups of series and/or parallel LEDs chipset;

将透明导电膜贴附在LED晶圆片上,使各个LED芯片的电极分别与所对应的金属电极相接触而形成多组由多个LED芯片串联和/或并联的LED芯片组;The transparent conductive film is attached to the LED wafer, so that the electrodes of each LED chip are respectively contacted with the corresponding metal electrodes to form multiple LED chip sets consisting of multiple LED chips in series and/or parallel;

依次将预设数量的多组探针分别放置在透明导电膜中的每组LED芯片组首尾两端的金属电极上同时测试多组LED芯片组的光电参数数据,直至在LED晶圆片上的所有LED芯片组测试完毕后将透明导电膜去除。Place a preset number of sets of probes on the metal electrodes at the beginning and end of each LED chip set in the transparent conductive film in turn to test the optoelectronic parameter data of multiple sets of LED chip sets until all LEDs on the LED wafer are The transparent conductive film is removed after the chip set is tested.

另外,根据本发明上述实施例的一种LED芯片测试方法,还可以具有如下附加的技术特征:In addition, the LED chip testing method according to the above-mentioned embodiment of the present invention may also have the following additional technical features:

进一步地,所述方法还包括:Further, the method also includes:

扩膜将LED晶圆片中的各个LED芯片分隔成等间距排列;The film expansion separates each LED chip in the LED wafer into an equidistant arrangement;

对各个LED芯片进行AOI外观检测;AOI appearance inspection for each LED chip;

在光电参数数据不良及外观检测不良的LED芯片上进行点胶;Dispensing on LED chips with poor photoelectric parameter data and poor appearance inspection;

将空蓝膜贴附在各个LED芯片表面,使所点胶后的LED芯片与空蓝膜黏连;Attach the empty blue film to the surface of each LED chip, so that the LED chip after dispensing is adhered to the empty blue film;

通过UV照射或加热使胶固化,并撕除空蓝膜使所黏连的LED芯片进行剥离。The glue is cured by UV irradiation or heating, and the empty blue film is torn off to peel off the stuck LED chips.

进一步地,所述LED晶圆片和透明导电膜上分别对应设有用于识别各个LED芯片位置的多个标记点;Further, the LED wafer and the transparent conductive film are respectively provided with a plurality of marking points for identifying the position of each LED chip;

所述制作对应设有多个金属电极的透明导电膜的步骤包括:The step of making a transparent conductive film corresponding to a plurality of metal electrodes includes:

根据透明导电膜上设置的多个标记点确定各个LED芯片位置;Determine the position of each LED chip according to a plurality of marking points set on the transparent conductive film;

根据各个LED芯片位置确定出用于串联和/或并联多个LED芯片的电极的各个金属电极的排布位置;Determine the arrangement position of each metal electrode used for the electrodes of the plurality of LED chips in series and/or in parallel according to the position of each LED chip;

在透明导电膜的各个排布位置上分别设置金属电极;Metal electrodes are respectively arranged on each arrangement position of the transparent conductive film;

所述将透明导电膜贴附在LED晶圆片上的步骤包括:The step of attaching the transparent conductive film on the LED wafer includes:

根据透明导电膜上的各个标记点将透明导电膜贴附在与LED晶圆片上的各个标记点相对应的位置。The transparent conductive film is attached to the position corresponding to each marked point on the LED wafer according to each marked point on the transparent conductive film.

进一步地,所述金属电极包括连接电极和测试电极;Further, the metal electrode includes a connection electrode and a test electrode;

所述制作对应设有多个金属电极的透明导电膜的步骤包括:The step of making a transparent conductive film corresponding to a plurality of metal electrodes includes:

在透明导电膜上用于与LED芯片组的各个LED芯片的电极进行串联和/或并联的位置区域设置连接电极;A connection electrode is arranged on the transparent conductive film in a position area used to be connected in series and/or in parallel with the electrodes of each LED chip of the LED chip set;

在透明导电膜上用于与LED芯片组的首尾两端LED芯片的电极对应的位置区域设置测试电极,其中测试电极的尺寸大于LED芯片的电极的尺寸,且测试电极穿透透明导电膜。Test electrodes are arranged on the transparent conductive film at positions corresponding to the electrodes of the LED chips at the head and tail ends of the LED chip set, wherein the size of the test electrodes is larger than that of the electrodes of the LED chips, and the test electrodes penetrate the transparent conductive film.

进一步地,所述在透明导电膜上用于与LED芯片组的各个LED芯片的电极进行串联和/或并联的位置区域设置连接电极的步骤包括:Further, the step of arranging connection electrodes on the transparent conductive film for connecting electrodes in series and/or in parallel with electrodes of each LED chip of the LED chip set includes:

在透明导电膜的中间区域阵列设置预设数量的连接电极,以使每行串联和/或并联相同预设数量的LED芯片形成多组第一LED芯片组;A preset number of connection electrodes are arrayed in the middle area of the transparent conductive film, so that each row of the same preset number of LED chips is connected in series and/or in parallel to form a plurality of first LED chip groups;

在透明导电膜的边缘区域根据每行剩余LED芯片的数量设置相应的连接电极,以使每行串联和/或并联剩余数量的LED芯片形成多组第二LED芯片组。Corresponding connection electrodes are arranged on the edge area of the transparent conductive film according to the number of the remaining LED chips in each row, so that the remaining number of LED chips in each row in series and/or parallel form multiple groups of second LED chips.

进一步地,所述在透明导电膜上用于与LED芯片组的首尾两端LED芯片的电极对应的位置区域设置测试电极的步骤包括:Further, the step of setting test electrodes on the transparent conductive film in the position regions corresponding to the electrodes of the LED chips at the head and tail ends of the LED chip set includes:

在透明导电膜上用于与LED芯片组的首端LED芯片的电极对应的位置区域设置第一形状的测试电极;A test electrode of the first shape is arranged on the transparent conductive film at a position area corresponding to the electrode of the LED chip at the head end of the LED chip set;

在透明导电膜上用于与LED芯片组的尾端LED芯片的电极对应的位置区域设置第二形状的测试电极。A test electrode of a second shape is provided on the transparent conductive film at a position area corresponding to the electrode of the LED chip at the tail end of the LED chip set.

进一步地,所述在光电参数数据不良及外观检测不良的LED芯片上进行点胶的步骤包括:Further, the step of dispensing glue on the LED chip with poor photoelectric parameter data and poor appearance detection includes:

对所测试的各组LED芯片组中光电参数数据不良的LED芯片组进行标记;Mark the LED chipsets with poor optoelectronic parameter data in each group of LED chipsets tested;

对所AOI外观检测的各个LED芯片中外观检测不良的LED芯片进行标记;Mark the LED chips with poor appearance in each LED chip inspected by AOI;

在所标记的光电参数数据不良的LED芯片组及外观检测不良的LED芯片上进行点胶。Glue is dispensed on the marked LED chip set with poor photoelectric parameter data and the LED chip with poor appearance inspection.

进一步地,所述在所标记的光电参数数据不良的LED芯片组及外观检测不良的LED芯片上进行点胶的步骤还包括:Further, the step of dispensing glue on the marked LED chip set with poor photoelectric parameter data and the LED chip with poor appearance detection further includes:

依次将预设数量的多组探针分别放置在所标记的光电参数数据不良的LED芯片组中的各个LED芯片的电极上同时测试多个LED芯片的光电参数数据;sequentially placing a preset number of multiple sets of probes on the electrodes of each LED chip in the marked LED chip set with poor optoelectronic parameter data to test the optoelectronic parameter data of the multiple LED chips simultaneously;

对所测试的光电参数数据不良的LED芯片组中光电参数数据不良的LED芯片进行标记;Mark the LED chips with bad optoelectronic parameter data in the tested LED chip set with bad optoelectronic parameter data;

在所标记的光电参数数据不良的LED芯片及外观检测不良的LED芯片上进行点胶。Glue is dispensed on the marked LED chips with poor photoelectric parameter data and LED chips with poor appearance inspection.

进一步地,所述依次将预设数量的多组探针分别放置在透明导电膜中的每组LED芯片组首尾两端的金属电极上同时测试多组LED芯片组的光电参数数据的步骤包括:Further, the step of sequentially placing a preset number of groups of probes on the metal electrodes at the head and tail ends of each group of LED chip groups in the transparent conductive film and simultaneously testing the photoelectric parameter data of the plurality of groups of LED chip groups includes:

依次将预设数量的多组探针分别放置在透明导电膜中的每组LED芯片组首尾两端的金属电极上同时测试多组LED芯片组的电性参数数据,所述电性参数数据包括顺向电压VF、漏电电流Ir、及抗静电能力ESD。A preset number of multiple sets of probes are sequentially placed on the metal electrodes at the head and tail ends of each LED chip set in the transparent conductive film to simultaneously test the electrical parameter data of the multiple sets of LED chip sets. To voltage VF, leakage current Ir, and anti-static ability ESD.

进一步地,所述方法还包括:Further, the method also includes:

利用标准机抽测LED芯片的光电参数数据;Use the standard machine to test the photoelectric parameter data of the LED chip;

根据所抽测得到的LED芯片的光电参数数据修正各组探针所测得的LED芯片的光电参数数据。The photoelectric parameter data of the LED chips measured by each group of probes are corrected according to the photoelectric parameter data of the LED chips obtained by sampling.

与现有技术相比:根据LED晶圆片所切割成的各个LED芯片排布直接制作一设有多个金属电极的透明导电膜,使得透明导电膜可贴附在LED晶圆片上使其金属电极与LED芯片的电极连接,因此探针可扎在透明导电膜的金属电极上直接进行测试,而非直接作用于LED芯片的电极本身,使得由于透明导电膜的中间缓冲作用而使测试时探针不会在LED芯片上留下针痕;同时由于金属电极用于与各个LED芯片的电极连接形成多组串联和/或并联的LED芯片组,以及由于采用多组探针同时测试的方式,使得每组探针都可以测试由多个LED芯片串联和/或并联形成的LED芯片组,可节省更多的测试时间,使得测试效率有效增加,解决了现有LED芯片测试过程中测试效率低及易产生针痕的问题。Compared with the prior art: according to the arrangement of each LED chip cut from the LED wafer, a transparent conductive film with a plurality of metal electrodes is directly produced, so that the transparent conductive film can be attached to the LED wafer to make the metal The electrode is connected to the electrode of the LED chip, so the probe can be directly tested on the metal electrode of the transparent conductive film, rather than directly acting on the electrode of the LED chip itself, so that the probe can be probed during the test due to the intermediate buffering effect of the transparent conductive film. The needle will not leave needle marks on the LED chips; at the same time, because the metal electrodes are used to connect with the electrodes of each LED chip to form multiple groups of LED chips in series and/or parallel, and because of the simultaneous testing of multiple groups of probes, Each set of probes can test LED chip groups formed by multiple LED chips in series and/or parallel, which can save more test time, effectively increase the test efficiency, and solve the problem of low test efficiency in the existing LED chip test process. And the problem of easy needle marks.

附图说明Description of drawings

图1为本发明第一实施例中的LED芯片测试方法的流程图;FIG. 1 is a flow chart of the LED chip testing method in the first embodiment of the present invention;

图2为本发明第二实施例中的LED芯片测试方法的流程图;FIG. 2 is a flow chart of the LED chip testing method in the second embodiment of the present invention;

图3为本发明第一实施例中LED晶圆片的结构示意图;3 is a schematic structural diagram of an LED wafer in the first embodiment of the present invention;

图4为本发明第一实施例中透明导电膜的结构示意图;4 is a schematic structural diagram of a transparent conductive film in the first embodiment of the present invention;

图5为本发明第一实施例中透明导电膜贴附在LED晶圆片上的俯视图;5 is a top view of the transparent conductive film attached to the LED wafer according to the first embodiment of the present invention;

图6为图3中圈Ⅳ部分的局部示意图;Fig. 6 is the partial schematic diagram of the circle IV part in Fig. 3;

图7为现有技术中LED芯片测试的示意图;7 is a schematic diagram of LED chip testing in the prior art;

图8为本发明第一实施例中LED芯片测试的示意图;8 is a schematic diagram of LED chip testing in the first embodiment of the present invention;

图9为本发明第一实施例中LED芯片的结构示意图;9 is a schematic structural diagram of an LED chip in the first embodiment of the present invention;

图10为本发明第一实施例中透明导电膜贴附在LED晶圆片上的剖视图;10 is a cross-sectional view of the transparent conductive film attached to the LED wafer according to the first embodiment of the present invention;

以下具体实施方式将结合上述附图进一步说明本发明。The following specific embodiments will further illustrate the present invention in conjunction with the above drawings.

具体实施方式Detailed ways

为了便于理解本发明,下面将参照相关附图对本发明进行更全面的描述。附图中给出了本发明的若干实施例。但是,本发明可以以许多不同的形式来实现,并不限于本文所描述的实施例。相反地,提供这些实施例的目的是使对本发明的公开内容更加透彻全面。In order to facilitate understanding of the present invention, the present invention will be described more fully hereinafter with reference to the related drawings. Several embodiments of the invention are presented in the accompanying drawings. However, the present invention may be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

需要说明的是,当元件被称为“固设于”另一个元件,它可以直接在另一个元件上或者也可以存在居中的元件。当一个元件被认为是“连接”另一个元件,它可以是直接连接到另一个元件或者可能同时存在居中元件。本文所使用的术语“垂直的”、“水平的”、“左”、“右”以及类似的表述只是为了说明的目的。It should be noted that when an element is referred to as being "fixed to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and similar expressions are used herein for illustrative purposes only.

除非另有定义,本文所使用的所有的技术和科学术语与属于本发明的技术领域的技术人员通常理解的含义相同。本文中在本发明的说明书中所使用的术语只是为了描述具体的实施例的目的,不是旨在于限制本发明。本文所使用的术语“及/或”包括一个或多个相关的所列项目的任意的和所有的组合。Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terms used herein in the description of the present invention are for the purpose of describing specific embodiments only, and are not intended to limit the present invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

实施例一Example 1

请参阅图1,所示为本发明第一实施例中的LED芯片测试方法,所述方法具体包括步骤S01-步骤S03。Please refer to FIG. 1 , which shows the LED chip testing method in the first embodiment of the present invention, and the method specifically includes steps S01 to S03 .

步骤S01,根据LED晶圆片所切割成的各个LED芯片排布,制作对应设有多个金属电极的透明导电膜,各个金属电极用于与各个LED芯片的电极连接形成多组串联和/或并联的LED芯片组。Step S01 , according to the arrangement of each LED chip cut from the LED wafer, a transparent conductive film correspondingly provided with a plurality of metal electrodes is fabricated, and each metal electrode is used for connecting with electrodes of each LED chip to form multiple groups of series and/or Parallel LED chipsets.

其中,首先利用划片机或切割机对LED晶圆片1进行划片切割形成独立的多个LED芯片10,其可参照图3所示,需要指出的是,其切割形成多个LED芯片10的LED晶圆片1背面贴附黏结有蓝膜,此时通过蓝膜黏结固定各个LED芯片10。具体的,如图3中圈Ⅳ的局部放大图(图6)所示,其每一LED芯片10上均包括N电极(即负电极)和P电极(即正电极),且LED芯片10的两个电极均位于外露的表面,比如位于顶部或者两侧,具体的该LED芯片10可以是正装或倒装LED芯片10。The LED wafer 1 is first diced by a dicing machine or a cutting machine to form a plurality of independent LED chips 10 , which can be referred to as shown in FIG. 3 . It should be pointed out that it is cut to form a plurality of LED chips 10 A blue film is attached to the back of the LED wafer 1, and each LED chip 10 is fixed by the blue film at this time. Specifically, as shown in the partial enlarged view of the circle IV in FIG. 3 ( FIG. 6 ), each LED chip 10 includes an N electrode (ie a negative electrode) and a P electrode (ie a positive electrode), and the LED chip 10 has an N electrode (ie a negative electrode) and a P electrode (ie a positive electrode). Both electrodes are located on the exposed surface, such as on the top or both sides. Specifically, the LED chip 10 may be a front-mounted or flip-chip LED chip 10 .

因此,在现有技术中需要对每个LED芯片10进行光电特性测试时,其通过将每组探针3中的两个探针3分别扎在LED芯片10的N电极及P电极上,并通过每组探针3连接至恒流源而使得LED芯片10被接通电源实现点亮,其可参照图7所示,使得每组探针3可逐一对每个LED芯片10进行光电特性测试。而由于LED芯片10在LED晶圆片1上排列紧密,可以称之为巨量,即使探针3能够按照传统的方法逐一对LED芯片10进行测试,一方面,由于LED芯片10数量较多,使得每次移动探针3时对移动的精度要求极高,导致探针3移动对准的耗时较多;另一方面,每次都需要移动用于与LED芯片10的正负极连接的两个探针3,导致移动探针3的次数较多,同样耗时较多。再一方面,由于LED芯片10的电极尺寸较小,而探针3的尺寸相对较大,使得探针3在每一LED芯片10进行测试时会造成针痕偏大的问题,严重时甚至会对LED芯片10外观造成损伤。Therefore, in the prior art, when each LED chip 10 needs to be tested for optoelectronic characteristics, the two probes 3 in each group of probes 3 are respectively tied to the N electrode and the P electrode of the LED chip 10, and the By connecting each group of probes 3 to a constant current source, the LED chips 10 are powered on to realize lighting, which can be referred to as shown in FIG. 7 , so that each group of probes 3 can perform a photoelectric characteristic test for each LED chip 10 one by one. . And because the LED chips 10 are closely arranged on the LED wafer 1, it can be called a huge amount. Even if the probes 3 can test the LED chips 10 one by one according to the traditional method, on the one hand, due to the large number of LED chips 10, Therefore, the precision of movement is extremely high when the probe 3 is moved each time, resulting in more time-consuming movement and alignment of the probe 3; Two probes 3 cause more times to move the probes 3, which also takes more time. On the other hand, since the size of the electrodes of the LED chip 10 is small, and the size of the probe 3 is relatively large, the probe 3 will cause the problem of large needle marks when each LED chip 10 is tested, and even in severe cases. The appearance of the LED chip 10 is damaged.

因此,在本发明的一个实施例中,其根据LED晶圆片1所切割成的各个LED芯片10排布直接制作一设有多个金属电极20的透明导电膜2,使得透明导电膜2可贴附在LED晶圆片1上使其金属电极20与LED芯片10的电极连接,因此探针3可在透明导电膜2的金属电极20上直接进行测试,而非直接作用于LED芯片10的电极本身,使得由于透明导电膜2的中间缓冲作用而使测试时探针3不会在LED芯片10上留下针痕。Therefore, in an embodiment of the present invention, a transparent conductive film 2 provided with a plurality of metal electrodes 20 is directly fabricated according to the arrangement of the LED chips 10 cut from the LED wafer 1, so that the transparent conductive film 2 can be It is attached to the LED wafer 1 so that the metal electrode 20 is connected to the electrode of the LED chip 10 , so the probe 3 can be directly tested on the metal electrode 20 of the transparent conductive film 2 instead of directly acting on the LED chip 10 . The electrode itself, so that the probe 3 will not leave needle marks on the LED chip 10 during the test due to the intermediate buffering effect of the transparent conductive film 2 .

具体的,其透明导电膜2为一具有优良透光性的软膜,使得在测试LED芯片10时不会由于透明导电膜2的设置而影响其LED芯片10的光性特性测试;而透明导电膜2上所设置的金属电极20具有优良的导电性,使得在测试LED芯片10时可与LED芯片10的电极进行良好的电接触而不会影响其LED芯片10的电性特性测试。进一步的,其软膜上除金属电极20外的其余位置均具有绝缘性,使得仅有金属电极20与LED芯片10的电极接触后可导电,而其余位置均绝缘,避免对LED芯片10的光电特性测试造成影响。Specifically, the transparent conductive film 2 is a soft film with excellent light transmittance, so that the installation of the transparent conductive film 2 will not affect the optical property test of the LED chip 10 when testing the LED chip 10; The metal electrodes 20 provided on the film 2 have excellent electrical conductivity, so that good electrical contact can be made with the electrodes of the LED chips 10 during testing of the LED chips 10 without affecting the electrical property test of the LED chips 10 . Further, the other positions on the soft film except the metal electrode 20 are insulating, so that only the metal electrode 20 can conduct electricity after contacting the electrode of the LED chip 10, and the other positions are insulated to avoid photoelectricity of the LED chip 10. Feature testing affects.

更进一步的,透明导电膜2上设置的金属电极20依照预设顺序排列,使得实现各个LED芯片10实现串联和/或并联,具体的其各个金属电极20用于与多个LED芯片10的电极连接形成多组串联和/或并联的LED芯片组,需要指出的是,其LED芯片组包括串联和/或并联的至少两个LED芯片10。作为本发明的一个示例,参照图5、图8及图10所示,其在每一LED芯片组中通过各个金属电极20连接相邻LED芯片10中的不同极性的电极,具体的,金属电极20分别连接上一LED芯片10的N电极和下一LED芯片10的P电极,使得LED芯片组中的各个LED芯片10实现串联,可以理解的,在本发明的其他实施例中,其LED芯片组还可为通过各个金属电极20连接相邻LED芯片10中的相同极性的电极实现各个LED芯片10的并联;或者通过部分电极连接相邻LED芯片10中的相同极性的电极,而部分电极连接相邻LED芯片10中的不同极性的电极实现各个LED芯片10的串并联,其根据实际使用需要进行设置,在此不做具体限定。Furthermore, the metal electrodes 20 provided on the transparent conductive film 2 are arranged in a preset order, so that each LED chip 10 can be connected in series and/or in parallel. The connection forms multiple groups of LED chips in series and/or in parallel. It should be noted that the LED chip groups include at least two LED chips 10 in series and/or in parallel. As an example of the present invention, as shown in FIG. 5 , FIG. 8 and FIG. 10 , in each LED chip group, electrodes of different polarities in adjacent LED chips 10 are connected through respective metal electrodes 20 . The electrodes 20 are respectively connected to the N electrode of the previous LED chip 10 and the P electrode of the next LED chip 10, so that the LED chips 10 in the LED chip group are connected in series. The chip set can also realize the parallel connection of each LED chip 10 by connecting electrodes of the same polarity in adjacent LED chips 10 through each metal electrode 20; or connecting electrodes of the same polarity in adjacent LED chips 10 by some electrodes, and Part of the electrodes are connected to electrodes of different polarities in adjacent LED chips 10 to realize series-parallel connection of each LED chip 10 , which are set according to actual use requirements, and are not specifically limited here.

同时,位于每组LED芯片组首尾两端的金属电极20的尺寸大于LED芯片10的电极的尺寸,使得可增加与探针3进行接触的区域面积,而使探针3可更好的与每组LED芯片组首尾两端的金属电极20进行对位,减少探针3测试时进行对位所需的时间。At the same time, the size of the metal electrodes 20 located at the head and tail ends of each group of LED chips is larger than the size of the electrodes of the LED chips 10, so that the area of the contact area with the probes 3 can be increased, so that the probes 3 can better communicate with each group. The metal electrodes 20 at both ends of the LED chip set are aligned, which reduces the time required for alignment when the probe 3 is tested.

进一步的,参照图3-图5所示,其为LED晶圆片1和透明导电膜2上分别对应设有用于识别各个LED芯片10位置的多个标记点4,具体如本发明的一个示例,其LED晶圆片1上设有9个标记点4,使得根据各个标记点4可识别出各个LED芯片10的坐标位置,需要指出的是,其实际生产制作的LED晶圆片1上的LED芯片10数量并非完全参照图3所示,其实际LED芯片10数量较图3所示中的LED芯片10数量多的多,因此其LED晶圆片1上的标记点4的数量根据实际使用需要进行设置,在此不做具体限定。Further, referring to FIGS. 3-5 , the LED wafer 1 and the transparent conductive film 2 are respectively provided with a plurality of marking points 4 for identifying the position of each LED chip 10 , specifically as an example of the present invention. , the LED wafer 1 is provided with 9 marking points 4, so that the coordinate position of each LED chip 10 can be identified according to each marking point 4. It should be pointed out that the actual production LED wafer 1 on the LED wafer 1 The number of LED chips 10 is not completely as shown in FIG. 3 . The actual number of LED chips 10 is much larger than the number of LED chips 10 shown in FIG. 3 . Therefore, the number of marking points 4 on the LED wafer 1 is based on actual use. Settings are required, which are not specifically limited here.

此时相应的,上述制作对应设有多个金属电极的透明导电膜的步骤包括:Correspondingly, the above-mentioned steps of fabricating a transparent conductive film corresponding to a plurality of metal electrodes include:

根据透明导电膜上设置的多个标记点确定各个LED芯片位置;Determine the position of each LED chip according to a plurality of marking points set on the transparent conductive film;

根据各个LED芯片位置确定出用于串联和/或并联多个LED芯片的电极的各个金属电极的排布位置;Determine the arrangement position of each metal electrode used for the electrodes of the plurality of LED chips in series and/or in parallel according to the position of each LED chip;

在透明导电膜的各个排布位置上分别设置金属电极。Metal electrodes are respectively arranged on each arrangement position of the transparent conductive film.

具体的,由于在透明导电膜2上设置有与LED晶圆片1的各个标记点4相对应的标记点4,使得其在透明导电膜2上根据所设置的各个标记点4可相应的确定出LED晶圆片1上的各个LED芯片10的坐标位置,此时相应的根据实际所需串联和/或并联多个LED芯片10的方式相应确定出各个金属电极20的排布位置并相应设置金属电极20,作为本发明的一个示例,如图4、图5、图8及图10所示,在采用串联的方式串联多个LED芯片10形成LED芯片组时,其根据各个LED芯片10的正负电极的坐标位置相应的确定出各个金属电极20的排布位置,并在各个金属电极20的排布位置上设置金属电极20,从而形成如图4所示的透明导电膜2。Specifically, since the marking points 4 corresponding to the marking points 4 of the LED wafer 1 are provided on the transparent conductive film 2 , the marking points 4 can be correspondingly determined on the transparent conductive film 2 according to the set marking points 4 The coordinate position of each LED chip 10 on the LED wafer 1 is obtained. At this time, the arrangement position of each metal electrode 20 is correspondingly determined according to the actual need to connect and/or parallel a plurality of LED chips 10 and set accordingly. As an example of the present invention, the metal electrode 20 is shown in FIGS. 4 , 5 , 8 and 10 . When a plurality of LED chips 10 are connected in series to form an LED chip group, the metal electrode 20 is formed according to the The coordinate positions of the positive and negative electrodes correspondingly determine the arrangement positions of the metal electrodes 20 , and the metal electrodes 20 are arranged on the arrangement positions of the metal electrodes 20 to form the transparent conductive film 2 as shown in FIG. 4 .

更进一步的,金属电极20包括连接电极21和测试电极22,上述制作对应设有多个金属电极的透明导电膜的步骤包括:Further, the metal electrode 20 includes a connection electrode 21 and a test electrode 22, and the above-mentioned steps of making a transparent conductive film corresponding to a plurality of metal electrodes include:

在透明导电膜上用于与LED芯片组的各个LED芯片的电极进行串联和/或并联的位置区域设置连接电极;A connection electrode is arranged on the transparent conductive film in a position area used to be connected in series and/or in parallel with the electrodes of each LED chip of the LED chip set;

在透明导电膜上用于与LED芯片组的首尾两端LED芯片的电极对应的位置区域设置测试电极,其中测试电极的尺寸大于LED芯片的电极的尺寸,且测试电极穿透透明导电膜。Test electrodes are arranged on the transparent conductive film at positions corresponding to the electrodes of the LED chips at the head and tail ends of the LED chip set, wherein the size of the test electrodes is larger than that of the electrodes of the LED chips, and the test electrodes penetrate the transparent conductive film.

也即是说,其各个连接电极21用于连接相邻LED芯片10的电极使得实现LED芯片10间的串联或并联,作为本发明的一个示例,如图4、图5及图8所示,其连接电极21分别连接上一LED芯片10的N电极以及下一LED芯片10的P电极,使得串联多个LED芯片10形成LED芯片组。而其各个测试电极22用于连接LED芯片组的首尾两端LED芯片10中未与连接电极21连接的电极,如图4、图5及图8所示,其测试电极22单独连接LED芯片组的首端LED芯片10的P电极以及尾端LED芯片10的N电极,使得在对LED芯片组进行光电特性测试时,只需将每组探针3中的两个探针3分别放置在两个测试电极22上即可。That is to say, each connection electrode 21 is used to connect the electrodes of adjacent LED chips 10 so as to realize series or parallel connection between the LED chips 10. As an example of the present invention, as shown in FIG. 4 , FIG. 5 and FIG. 8 , The connecting electrodes 21 are respectively connected to the N electrode of the previous LED chip 10 and the P electrode of the next LED chip 10 , so that a plurality of LED chips 10 are connected in series to form an LED chip group. Each of the test electrodes 22 is used to connect the electrodes of the LED chips 10 at the head and tail ends of the LED chip set that are not connected to the connection electrodes 21. As shown in FIG. 4 , FIG. 5 and FIG. 8 , the test electrodes 22 are connected to the LED chip set alone. The P electrode of the LED chip 10 at the head end and the N electrode of the LED chip 10 at the tail end, so that when testing the photoelectric characteristics of the LED chip set, it is only necessary to place the two probes 3 in each set of probes 3 on two only one test electrode 22.

进一步的,参照图9所示,作为本发明的一个示例,其LED芯片10大体包括衬底11、位于衬底11上的外延层12、及位于外延层12上的导电电极13,其中外延层12包括在衬底11上所依次设置的第一半导体层121、发光层122及第二半导体层123,导电电极13包括与第一半导体层121电连接的第一电极131、及与第二半导体层123电连接的第二电极132,具体的,在本发明示例中,其第一半导体层121为P型半导体层,第二半导体层123为N型半导体层,其第一电极131为P电极,第二电极132为N电极,此时LED芯片10的两个电极均位于外露的表面,且P电极的高度低于N电极的高度。可以理解的,在本发明的其他实施例中,其第一半导体还可以为N半导体层,其根据实际使用需要进行设置,在此不做具体限定。Further, as shown in FIG. 9, as an example of the present invention, the LED chip 10 generally includes a substrate 11, an epitaxial layer 12 on the substrate 11, and a conductive electrode 13 on the epitaxial layer 12, wherein the epitaxial layer 12 12 includes a first semiconductor layer 121, a light-emitting layer 122 and a second semiconductor layer 123 that are sequentially arranged on the substrate 11, and the conductive electrode 13 includes a first electrode 131 electrically connected to the first semiconductor layer 121 and a second semiconductor layer 131. The second electrode 132 to which the layer 123 is electrically connected. Specifically, in the example of the present invention, the first semiconductor layer 121 is a P-type semiconductor layer, the second semiconductor layer 123 is an N-type semiconductor layer, and the first electrode 131 is a P electrode. , the second electrode 132 is an N electrode. At this time, both electrodes of the LED chip 10 are located on the exposed surface, and the height of the P electrode is lower than that of the N electrode. It can be understood that in other embodiments of the present invention, the first semiconductor layer may also be an N semiconductor layer, which is set according to actual use requirements, which is not specifically limited herein.

因此相应的,其所制作的透明导电膜2包括基座和凸台,其中各个凸台的位置与相对高度较低的P电极的位置相对应,使得透明导电膜2贴附至LED晶圆片1上时,其透明导电膜2中的凸台可贴附至高度较低的P电极上,而透明导电膜2中的基座可贴附至高度较高的N电极上,避免由于LED芯片10中的两个电极存在高度差而使得透明导电膜2无法与高度较低的电极相贴附的问题。此时在本发明的一个示例中,其LED芯片组的各个LED芯片10进行串联时,其连接电极21的设置参照图4、图5、图8及图10所示,其连接电极21设于透明导电膜2的背面上,且由上一LED芯片10的N电极对应位置连接至下一LED芯片10的P电极对应位置,同时该连接电极21的尺寸小于LED芯片10的电极的尺寸,且连接电极21在透明导电膜2的正面露出,可以理解的,在本发明的其他实施例中,其连接电极21的尺寸还可大于或等于LED芯片10的电极的尺寸且不与同一LED芯片10中的相邻电极连接即可,其根据实际使用需要进行设置。相应的,测试电极22的设置参照图4、图5、图8及图10所示,其测试电极22的尺寸大于LED芯片10的电极的尺寸,且测试电极22穿透透明导电膜2,此时测试电极22在透明导电膜2的正面露出,使得在对各个LED芯片10进行光电特性测试时,其每组探针3中的探针3可扎在穿透该透明导电膜2的测试电极22上,其中在本发明示例中,其测试电极22在透明导电膜2的正面及背面的尺寸一致且大于LED芯片10的电极的尺寸,可以理解的,在本发明的其他实施例中,其测试电极22还可在透明导电膜2的背面尺寸较小,而当穿透透明导电膜2至其透明导电膜2正面时,其测试电极22的尺寸在透明导电膜2的正面尺寸较大,使得其测试电极22可在透明导电膜2的背面以较小尺寸与LED芯片10的电极连接,测试电极22在透明导电膜2的正面以较大尺寸与探针3连接,使得增加与探针3所接触的区域面积,从而可实现探针3与测试电极22的快速对位,减少探针3移动时的精度要求。Accordingly, the manufactured transparent conductive film 2 includes a base and a boss, wherein the position of each boss corresponds to the position of the relatively low P electrode, so that the transparent conductive film 2 is attached to the LED wafer 1, the boss in the transparent conductive film 2 can be attached to the P electrode with a lower height, and the base in the transparent conductive film 2 can be attached to the N electrode with a higher height. The two electrodes in 10 have a problem of height difference, so that the transparent conductive film 2 cannot be attached to the electrode with lower height. At this time, in an example of the present invention, when the LED chips 10 of the LED chip group are connected in series, the connection electrodes 21 are arranged as shown in FIGS. 4 , 5 , 8 and 10 , and the connection electrodes 21 are arranged at On the back side of the transparent conductive film 2, and is connected from the corresponding position of the N electrode of the previous LED chip 10 to the corresponding position of the P electrode of the next LED chip 10, and the size of the connecting electrode 21 is smaller than the size of the electrode of the LED chip 10, and The connection electrode 21 is exposed on the front surface of the transparent conductive film 2 . It can be understood that in other embodiments of the present invention, the size of the connection electrode 21 may be greater than or equal to the size of the electrode of the LED chip 10 and not the same as the size of the LED chip 10 . It is enough to connect the adjacent electrodes in it, which can be set according to the actual use needs. Correspondingly, the setting of the test electrode 22 is shown in FIG. 4 , FIG. 5 , FIG. 8 and FIG. 10 . The size of the test electrode 22 is larger than the size of the electrode of the LED chip 10 , and the test electrode 22 penetrates the transparent conductive film 2 . When the test electrode 22 is exposed on the front side of the transparent conductive film 2 , when the photoelectric characteristic test of each LED chip 10 is performed, the probes 3 in each group of probes 3 can be tied to the test electrodes penetrating the transparent conductive film 2 22, wherein in the example of the present invention, the size of the test electrode 22 on the front and back of the transparent conductive film 2 is the same and larger than the size of the electrode of the LED chip 10, it can be understood that in other embodiments of the present invention, its The test electrode 22 can also be smaller in size on the back side of the transparent conductive film 2, and when penetrating the transparent conductive film 2 to the front side of the transparent conductive film 2, the size of the test electrode 22 is larger on the front side of the transparent conductive film 2, The test electrode 22 can be connected with the electrode of the LED chip 10 in a smaller size on the back of the transparent conductive film 2, and the test electrode 22 can be connected with the probe 3 in a larger size on the front of the transparent conductive film 2, so that the connection between the probe and the probe can be increased. 3 is the area of the contacted area, so that the quick alignment of the probe 3 and the test electrode 22 can be realized, and the precision requirement when the probe 3 is moved is reduced.

更进一步的,上述在透明导电膜上用于与LED芯片组的各个LED芯片的电极进行串联和/或并联的位置区域设置连接电极的步骤包括:Further, the above-mentioned step of arranging connection electrodes on the transparent conductive film for connecting electrodes in series and/or in parallel with electrodes of each LED chip of the LED chip set includes:

在透明导电膜的中间区域阵列设置预设数量的连接电极,以使每行串联和/或并联相同预设数量的LED芯片形成多组第一LED芯片组;A preset number of connection electrodes are arrayed in the middle area of the transparent conductive film, so that each row of the same preset number of LED chips is connected in series and/or in parallel to form a plurality of first LED chip groups;

在透明导电膜的边缘区域根据每行剩余LED芯片的数量设置相应的连接电极,以使每行串联和/或并联剩余数量的LED芯片形成多组第二LED芯片组。Corresponding connection electrodes are arranged on the edge area of the transparent conductive film according to the number of the remaining LED chips in each row, so that the remaining number of LED chips in each row in series and/or parallel form multiple groups of second LED chips.

具体的,作为本发明的一个示例,参照图4及图5所示,其透明导电膜2的中间区域阵列设有预设数量的连接电极21,使得每行分别串联相同预设数量的LED芯片10形成多组第一LED芯片组,同时每组第一LED芯片组在每列中顺序排布。具体的,其第一LED芯片组中所串联的LED芯片10的数量根据探针3所连接的恒流源的电压、电流等参数条件进行相应设置,在本发明示例中,其每行第一LED芯片组均串联有8个LED芯片10,也即其每组第一LED芯片组中设置有7个连接电极21。可以理解的,在本发明的其他实施例中,其每行第一LED芯片组所串联的LED芯片10的数量还可以为其他,其根据实际使用需要进行设置,在此不做具体限定。进一步的,在透明导电膜2的边缘区域由于无法串联和/或并联预设数量的连接电极21,因此在透明导电膜2的边缘区域根据每行剩余LED芯片10的数量设置相应的连接电极21,使得每行串联和/或并联剩余数量的LED芯片10形成多组第二LED芯片组,其具体可参照图4及图5所示。此时通过在透明导电膜2的中间区域阵列设置预设数量的连接电极21,而使得在对LED芯片组进行光电特性测试时各组探针3中的两个探针3相对位置保持固定,仅需移动相对较小的位移即可对相邻LED芯片组进行测试,使得增加测试效率。Specifically, as an example of the present invention, as shown in FIG. 4 and FIG. 5 , a predetermined number of connection electrodes 21 are arranged in the middle area array of the transparent conductive film 2 , so that each row is connected in series with the same predetermined number of LED chips. 10. A plurality of groups of first LED chip groups are formed, and each group of first LED chip groups is sequentially arranged in each column. Specifically, the number of the LED chips 10 connected in series in the first LED chip group is set correspondingly according to the parameter conditions such as the voltage and current of the constant current source connected to the probe 3. In the example of the present invention, the first LED chip in each row Eight LED chips 10 are connected in series in the LED chip groups, that is, seven connection electrodes 21 are arranged in each group of the first LED chip group. It can be understood that, in other embodiments of the present invention, the number of LED chips 10 connected in series in each row of the first LED chip group may also be other, which is set according to actual use requirements, which is not specifically limited here. Further, since a preset number of connection electrodes 21 cannot be connected in series and/or in parallel in the edge region of the transparent conductive film 2, the corresponding connection electrodes 21 are arranged in the edge region of the transparent conductive film 2 according to the number of remaining LED chips 10 in each row. , so that the remaining number of LED chips 10 in each row are connected in series and/or in parallel to form multiple groups of second LED chip groups, which can be specifically shown in FIG. 4 and FIG. 5 . At this time, by arranging a preset number of connection electrodes 21 in the middle area of the transparent conductive film 2, the relative positions of the two probes 3 in each group of probes 3 remain fixed when the LED chip set is tested for optoelectronic characteristics. Adjacent LED chipsets can be tested by only moving a relatively small displacement, increasing the test efficiency.

更进一步的,上述在透明导电膜上用于与LED芯片组的首尾两端LED芯片的电极对应的位置区域设置测试电极的步骤包括:Further, the above-mentioned steps for setting test electrodes on the transparent conductive film in the position regions corresponding to the electrodes of the LED chips at the head and tail ends of the LED chip set include:

在透明导电膜上用于与LED芯片组的首端LED芯片的电极对应的位置区域设置第一形状的测试电极;A test electrode of the first shape is arranged on the transparent conductive film at a position area corresponding to the electrode of the LED chip at the head end of the LED chip set;

在透明导电膜上用于与LED芯片组的尾端LED芯片的电极对应的位置区域设置第二形状的测试电极。A test electrode of a second shape is provided on the transparent conductive film at a position area corresponding to the electrode of the LED chip at the tail end of the LED chip set.

具体的,为实现其LED芯片组的首尾两端极性辨别,避免在连接恒流源时连接相反的正负电源而对LED芯片组的各个LED芯片10造成损坏的问题,因此其不同极性的测试电极22对应有不同的形状,具体的作为本发明的一个示例,参照图4、图5及图8所示,其与首端LED芯片10的P电极连接的测试电极22的形状设置为方形,其与尾端LED芯片10的N电极连接的测试电极22的形状设置为圆形,使得在对LED芯片组进行光电特性测试时,其将探针3组中的两个探针3分别放置在两个测试电极22上,且放置在方形测试电极22上的探针3连接恒流源的正极电源,放置在圆形测试电极22上的探针3连接恒流源的负极电源即可。可以理解的,在本发明的其他实施例中,其还可以对测试电极22设置其他形状,在此不做具体限定。Specifically, in order to realize the polarity identification of the head and tail ends of the LED chip set, and avoid the problem of damage to each LED chip 10 of the LED chip set by connecting the opposite positive and negative power sources when connecting the constant current source, the different polarities thereof The test electrodes 22 have different shapes. Specifically, as an example of the present invention, referring to FIG. 4 , FIG. 5 and FIG. 8 , the shape of the test electrode 22 connected to the P electrode of the head-end LED chip 10 is set as The shape of the test electrode 22 connected to the N electrode of the LED chip 10 at the tail end is set to be a square shape, so that when the LED chip set is tested for optoelectronic characteristics, the two probes 3 in the set of probes 3 are respectively Placed on the two test electrodes 22, and the probe 3 placed on the square test electrode 22 is connected to the positive power supply of the constant current source, and the probe 3 placed on the circular test electrode 22 is connected to the negative power supply of the constant current source. . It can be understood that in other embodiments of the present invention, the test electrode 22 can also be provided with other shapes, which are not specifically limited herein.

进一步的,其透明导电膜2为具有弹性或具有柔性的软薄膜,此时透明导电膜2具有弹性或柔性的好处在于,即使出现测试电极22对的顶端不在同一平面上,或LED芯片10的两个电极不在同一平面上,或黏结承载LED晶圆片1的蓝膜弯曲等,也可以通过弹性/柔性的透明导电膜2的形变保证测试电极22较好地贴合在所有LED芯片10的两个电极的表面,从而保证测试电极22及连接电极21和LED芯片10的两个电极相互均匀贴近,避免出现高度差不均匀,形成的电容耦合程度相互差异较大,使得电致发光效果不均匀,测试效果不理想。Further, the transparent conductive film 2 is an elastic or flexible soft film. The advantage of the transparent conductive film 2 being elastic or flexible is that even if the tops of the test electrodes 22 are not on the same plane, or the LED chip 10 The two electrodes are not on the same plane, or the blue film bonding the LED wafer 1 is bent, etc., the deformation of the elastic/flexible transparent conductive film 2 can also ensure that the test electrode 22 is well attached to all the LED chips 10. The surface of the two electrodes ensures that the test electrode 22 and the connection electrode 21 and the two electrodes of the LED chip 10 are evenly close to each other, so as to avoid uneven height difference, and the degree of capacitive coupling formed is greatly different from each other, so that the electroluminescence effect is not good. Evenly, the test effect is not ideal.

步骤S02,将透明导电膜贴附在LED晶圆片上,使各个LED芯片的电极分别与所对应的金属电极相接触而形成多组由多个LED芯片串联和/或并联的LED芯片组。In step S02, the transparent conductive film is attached to the LED wafer, and the electrodes of each LED chip are respectively contacted with the corresponding metal electrodes to form multiple LED chip groups with multiple LED chips connected in series and/or in parallel.

其中,参照上述所述,在LED晶圆片1和透明导电膜2上分别对应设有用于识别各个LED芯片10位置的多个标记点4时,上述将透明导电膜贴附在LED晶圆片上的步骤包括:Wherein, referring to the above, when the LED wafer 1 and the transparent conductive film 2 are respectively provided with a plurality of marking points 4 for identifying the position of each LED chip 10, the above-mentioned transparent conductive film is attached to the LED wafer. The steps include:

根据透明导电膜上的各个标记点将透明导电膜贴附在与LED晶圆片上的各个标记点相对应的位置。The transparent conductive film is attached to the position corresponding to each marked point on the LED wafer according to each marked point on the transparent conductive film.

具体的,作为本发明的一个示例,参照图5、图8及图10所示,其为透明导电膜2贴附在LED晶圆片1上时的示意图,其透明导电膜2根据标记点4相应的贴附在LED晶圆片1上后,其透明导电膜2上的金属电极20与LED晶圆片1上的各个LED芯片10的电极相连接,具体的如前述所述,此时金属电极20中的连接电极21分别连接上一LED芯片10的N电极以及下一LED芯片10的P电极,而金属电极20中的测试电极22单独连接LED芯片组的首端LED芯片10的P电极以及尾端LED芯片10的N电极,使得在对LED芯片组进行光电特性测试时,只需将每组探针3中的两个探针3分别放置在两个测试电极22上即可。Specifically, as an example of the present invention, referring to FIG. 5 , FIG. 8 and FIG. 10 , which are schematic diagrams when the transparent conductive film 2 is attached to the LED wafer 1 , the transparent conductive film 2 is based on the marking points 4 Correspondingly attached to the LED wafer 1, the metal electrodes 20 on the transparent conductive film 2 are connected to the electrodes of the LED chips 10 on the LED wafer 1. Specifically, as described above, at this time, the metal The connection electrodes 21 of the electrodes 20 are respectively connected to the N electrode of the previous LED chip 10 and the P electrode of the next LED chip 10, while the test electrodes 22 of the metal electrodes 20 are individually connected to the P electrode of the LED chip 10 at the head end of the LED chip set. and the N electrode of the LED chip 10 at the tail end, so that the two probes 3 in each group of probes 3 only need to be placed on the two test electrodes 22 respectively when testing the optoelectronic characteristics of the LED chip set.

步骤S03,依次将预设数量的多组探针分别放置在透明导电膜中的每组LED芯片组首尾两端的金属电极上同时测试多组LED芯片组的光电参数数据,直至在LED晶圆片上的所有LED芯片组测试完毕后将透明导电膜去除。Step S03 , successively placing a preset number of probes on the metal electrodes at the head and tail ends of each LED chip set in the transparent conductive film, and simultaneously test the photoelectric parameter data of the multiple sets of LED chip sets, until they are on the LED wafer. The transparent conductive film is removed after all the LED chipsets are tested.

其中,每组探针3均包括两个探针3,其分别为P电极探针31和N电极探针32,具体使用时其P电极探针31扎在LED芯片10的P电极上,N电极探针32扎在LED芯片10的N电极上,同时P电极探针31连接恒流源的电源正极(+),N电极探针32连接恒流源的电源负极(-)。Wherein, each set of probes 3 includes two probes 3, which are P-electrode probes 31 and N-electrode probes 32 respectively. In specific use, the P-electrode probes 31 are tied on the P-electrode of the LED chip 10, and N The electrode probe 32 is pinned on the N electrode of the LED chip 10, while the P electrode probe 31 is connected to the positive (+) power supply of the constant current source, and the N electrode probe 32 is connected to the power supply negative (-) of the constant current source.

在本发明实施例中,其通过依次将预设数量的多组探针3分别放置在透明导电膜2中的金属电极20中的测试电极22上同时测试多组LED芯片组的光电参数数据,参照前述所述,其P电极探针3扎在透明导电膜2正面的金属电极20中的P极性的测试电极22上,具体如上述所述,其P电极探针3扎在方形的测试电极22上,而N电极探针3扎在圆形的测试电极22上。其中,上述光电参数数据包括光性参数数据和电性参数数据,其中光性参数数据包括主波长Wd和亮度Iv;电性参数数据包括顺向电压VF、漏电电流Ir、及抗静电能力ESD。In the embodiment of the present invention, by sequentially placing a preset number of multiple sets of probes 3 on the test electrodes 22 of the metal electrodes 20 in the transparent conductive film 2, the photoelectric parameter data of multiple sets of LED chip sets are simultaneously tested, Referring to the above, the P electrode probe 3 is tied to the P-polar test electrode 22 in the metal electrode 20 on the front side of the transparent conductive film 2. Specifically, as described above, the P electrode probe 3 is tied to the square test electrode 22. On the electrode 22 , and the N electrode probe 3 is tied on the circular test electrode 22 . The photoelectric parameter data includes optical parameter data and electrical parameter data, wherein the optical parameter data includes dominant wavelength Wd and brightness Iv; the electrical parameter data includes forward voltage VF, leakage current Ir, and antistatic capability ESD.

进一步的,在现有技术中通常采用一组或多组探针3,其探针3的数量根据探针3台的容量限制进行设置,如图7所示,例如在采用四组探针3对LED芯片10进行光电特性测试时,此时在一次测试中其四组探针3只能同时测试四个LED芯片10。而在本发明实施例中,其如图8及图10所示,其四组探针3可以同时测试四组LED芯片组,而每组LED芯片组中又具有8个LED芯片10,因此使得相较现有探针3只能测试单个LED芯片10而言,本发明实施例中探针3可以测试由多个LED芯片10串联和/或并联形成的LED芯片组,使得可节省更多的测试时间,使得测试效率大大增加。Further, in the prior art, one or more sets of probes 3 are usually used, and the number of probes 3 is set according to the capacity limit of the probes 3, as shown in FIG. 7 , for example, when four sets of probes 3 are used. When the photoelectric characteristic test is performed on the LED chips 10 , the four sets of probes 3 can only test four LED chips 10 at the same time in one test. In the embodiment of the present invention, as shown in FIG. 8 and FIG. 10 , the four sets of probes 3 can test four sets of LED chip sets at the same time, and each set of LED chip sets has 8 LED chips 10 , so that the Compared with the existing probe 3 that can only test a single LED chip 10, the probe 3 in the embodiment of the present invention can test an LED chip set formed by a plurality of LED chips 10 in series and/or in parallel, so that more energy can be saved. The test time greatly increases the test efficiency.

进一步的,当多组探针3同时测试完所对应的LED芯片组的光电参数数据后,其将多组探针3移动至下一待测试的LED芯片组所对应的测试电极22位置,直至将LED晶圆片1上的所有LED芯片组全部测试完毕,然后将透明导电膜2进行去除。Further, after the multiple sets of probes 3 have simultaneously tested the photoelectric parameter data of the corresponding LED chip sets, it moves the multiple sets of probes 3 to the position of the test electrode 22 corresponding to the next LED chip set to be tested, until After all the LED chip sets on the LED wafer 1 are tested, the transparent conductive film 2 is removed.

进一步的,在各个LED晶圆片1所生产制作完全相同时,其透明导电膜2还可利用至其他LED晶圆片1上,使得在制作一次透明导电膜2后,其透明导电膜2可重复利用。Further, when the production and production of each LED wafer 1 are exactly the same, the transparent conductive film 2 can also be used on other LED wafers 1, so that after the transparent conductive film 2 is fabricated once, the transparent conductive film 2 can be used. reuse.

综上,本发明上述实施例当中的LED芯片测试方法,根据LED晶圆片所切割成的各个LED芯片排布直接制作一设有多个金属电极的透明导电膜,使得透明导电膜可贴附在LED晶圆片上使其金属电极与LED芯片的电极连接,因此探针可扎在透明导电膜的金属电极上直接进行测试,而非直接作用于LED芯片的电极本身,使得由于透明导电膜的中间缓冲作用而使测试时探针不会在LED芯片上留下针痕;同时由于金属电极用于与各个LED芯片的电极连接形成多组串联和/或并联的LED芯片组,以及由于采用多组探针同时测试的方式,使得每组探针都可以测试由多个LED芯片串联和/或并联形成的LED芯片组,可节省更多的测试时间,使得测试效率有效增加,解决了现有LED芯片测试过程中测试效率低及易产生针痕的问题。To sum up, in the LED chip testing method in the above-mentioned embodiments of the present invention, a transparent conductive film with a plurality of metal electrodes is directly fabricated according to the arrangement of each LED chip cut from an LED wafer, so that the transparent conductive film can be attached The metal electrode of the LED wafer is connected to the electrode of the LED chip, so the probe can be directly tested on the metal electrode of the transparent conductive film instead of directly acting on the electrode of the LED chip itself. Due to the intermediate buffering effect, the probe will not leave needle marks on the LED chips during testing; at the same time, because the metal electrodes are used to connect with the electrodes of each LED chip to form multiple groups of LED chips in series and/or parallel, and due to the use of multiple The method of simultaneous testing of groups of probes enables each group of probes to test LED chip groups formed by multiple LED chips in series and/or parallel, which can save more test time, effectively increase test efficiency, and solve the problem of existing problems. The problem of low test efficiency and easy generation of needle marks during LED chip testing.

实施例二Embodiment 2

请参阅图2,所示为本发明第二实施例中的LED芯片测试方法,所述方法具体包括步骤S11至步骤S18。Please refer to FIG. 2 , which shows the LED chip testing method in the second embodiment of the present invention, and the method specifically includes steps S11 to S18 .

步骤S11,根据LED晶圆片所切割成的各个LED芯片排布,制作对应设有多个金属电极的透明导电膜,各个金属电极用于与各个LED芯片的电极连接形成多组串联和/或并联的LED芯片组。Step S11, according to the arrangement of each LED chip cut from the LED wafer, a transparent conductive film correspondingly provided with a plurality of metal electrodes is fabricated, and each metal electrode is used for connecting with the electrodes of each LED chip to form multiple groups of series and/or Parallel LED chipsets.

步骤S12,将透明导电膜贴附在LED晶圆片上,使各个LED芯片的电极分别与所对应的金属电极相接触而形成多组由多个LED芯片串联和/或并联的LED芯片组。In step S12, the transparent conductive film is attached to the LED wafer, and the electrodes of each LED chip are respectively contacted with the corresponding metal electrodes to form multiple LED chip groups with multiple LED chips connected in series and/or in parallel.

步骤S13,依次将预设数量的多组探针分别放置在透明导电膜中的每组LED芯片组首尾两端的金属电极上同时测试多组LED芯片组的光电参数数据,直至在LED晶圆片上的所有LED芯片组测试完毕后将透明导电膜去除。In step S13, a preset number of sets of probes are sequentially placed on the metal electrodes at the head and tail ends of each LED chip set in the transparent conductive film, and the photoelectric parameter data of the multiple sets of LED chip sets are tested simultaneously until they are on the LED wafer. The transparent conductive film is removed after all the LED chipsets are tested.

其中,该步骤S11-步骤S13的具体流程与前述实施例大体相同,其具体可参照前述实施例所述,在此不做具体限定。Wherein, the specific processes of the step S11 to the step S13 are substantially the same as those in the foregoing embodiments, and the details can be referred to the foregoing embodiments, which are not specifically limited herein.

进一步的,上述步骤S13还包括:Further, the above-mentioned step S13 also includes:

依次将预设数量的多组探针分别放置在透明导电膜中的每组LED芯片组首尾两端的金属电极上同时测试多组LED芯片组的电性参数数据,所述电性参数数据包括顺向电压VF、漏电电流Ir、及抗静电能力ESD。A preset number of multiple sets of probes are sequentially placed on the metal electrodes at the head and tail ends of each LED chip set in the transparent conductive film to simultaneously test the electrical parameter data of the multiple sets of LED chip sets. To voltage VF, leakage current Ir, and anti-static ability ESD.

也即是说,其多组探针3分别对多组LED芯片组进行光电特性测试时,其可以仅仅测试各组LED芯片组的电性参数数据,而不测试LED芯片组的光性参数数据,此时相比于现有同时测试光电参数数据可节省约2.5倍的测试时间。That is to say, when the multiple sets of probes 3 respectively perform the photoelectric characteristic test on multiple sets of LED chip sets, it can only test the electrical parameter data of each LED chip set, but not the optical parameter data of the LED chip set. , compared to the existing simultaneous testing of optoelectronic parameter data, the testing time can be saved by about 2.5 times.

步骤S14,扩膜将LED晶圆片中的各个LED芯片分隔成等间距排列。In step S14, film expansion separates each LED chip in the LED wafer into an equidistant arrangement.

其中,LED晶圆片1进行划片切割成多个LED芯片10后,由于各个LED芯片10依然排列紧密间距很小(约0.1mm),使得不利于后工序的操作。因此在本发明实施例中通过采用扩膜机对黏结LED芯片10的蓝膜进行扩张,使得各个LED芯片10分隔成等间距排列,具体可例如各个LED芯片10的间距拉伸到约0.6mm。当然在本发明的其他实施例中,也可以采用手工方式对蓝膜进行扩张,但很容易造成LED芯片10掉落浪费等不良问题。Wherein, after the LED wafer 1 is diced and cut into a plurality of LED chips 10, each LED chip 10 is still closely arranged with a small spacing (about 0.1 mm), which is not conducive to the operation of the subsequent process. Therefore, in the embodiment of the present invention, a film expander is used to expand the blue film bonded to the LED chips 10, so that the LED chips 10 are separated into an equidistant arrangement. Of course, in other embodiments of the present invention, the blue film can also be expanded manually, but it is easy to cause problems such as falling and waste of the LED chip 10 .

进一步的,在本发明的一个实施例中,其步骤S13或步骤S14之后还包括:Further, in an embodiment of the present invention, after step S13 or step S14, it further includes:

利用标准机抽测LED芯片的光电参数数据;Use the standard machine to test the photoelectric parameter data of the LED chip;

根据所抽测得到的LED芯片的光电参数数据修正各组探针所测得的LED芯片的光电参数数据。The photoelectric parameter data of the LED chips measured by each group of probes are corrected according to the photoelectric parameter data of the LED chips obtained by sampling.

具体的,在对各个LED芯片组的光电参数数据测试完成之后,或者仅仅测试LED芯片组的电性参数数据后,其利用标准机抽测LED芯片10的光电参数数据,具体的,其可以抽测一组LED芯片组的光电参数数据或抽测一组LED芯片组中的一个LED芯片10的光电参数数据,其还可以在每间隔的预设组LED芯片组中抽测一组LED芯片组的光电参数数据或抽测一组LED芯片组中的一个LED芯片10的光电参数数据,此时由于LED晶圆片1中相邻LED芯片10的光性差异较小,使得其抽测的LED芯片10的光电参数数据可以代替上述未测试的LED芯片10的光性参数数据。同时,其根据当前所抽测得到的LED芯片10的光电参数数据修正各组探针3所测得的LED芯片10的光电参数数据,避免测试误差或各组探针3的差异性所带来的光电参数数据差异。Specifically, after the photoelectric parameter data test of each LED chip set is completed, or after only testing the electrical parameter data of the LED chip set, the standard machine is used to test the photoelectric parameter data of the LED chip 10. The optoelectronic parameter data of a group of LED chip groups or the optoelectronic parameter data of one LED chip 10 in a group of LED chip groups can be sampled, and the optoelectronic parameter data of a group of LED chip groups can also be sampled in a preset group of LED chip groups at each interval. Or the optoelectronic parameter data of one LED chip 10 in a group of LED chip groups is randomly measured. At this time, due to the small optical difference between the adjacent LED chips 10 in the LED wafer 1, the optoelectronic parameter data of the LED chip 10 is sampled. The optical parameter data of the above-mentioned untested LED chip 10 can be substituted. At the same time, it corrects the photoelectric parameter data of the LED chip 10 measured by each group of probes 3 according to the photoelectric parameter data of the LED chip 10 obtained by the current sampling test, so as to avoid the test error or the difference caused by the difference of each group of probes 3. Differences in photoelectric parameter data.

步骤S15,对各个LED芯片进行AOI外观检测。Step S15, AOI appearance inspection is performed on each LED chip.

其中,在本发明实施例中,在通过扩膜将LED晶圆片1中的各个LED芯片10分隔成等间距排列后,其通过AOI外观检测仪对各个LED芯片10进行外观检测,以确定各个LED芯片10的外观是否存在不良问题。Among them, in the embodiment of the present invention, after the LED chips 10 in the LED wafer 1 are separated into equal intervals by film expansion, the appearance inspection of each LED chip 10 is performed by an AOI appearance inspection instrument to determine the appearance of each LED chip 10. Whether the appearance of the LED chip 10 is defective.

步骤S16,在光电参数数据不良及外观检测不良的LED芯片上进行点胶。Step S16, dispensing glue on the LED chips with poor photoelectric parameter data and poor appearance inspection.

其中,步骤S16具体包括:Wherein, step S16 specifically includes:

对所测试的各组LED芯片组中光电参数数据不良的LED芯片组进行标记;Mark the LED chipsets with poor optoelectronic parameter data in each group of LED chipsets tested;

对所AOI外观检测的各个LED芯片中外观检测不良的LED芯片进行标记;Mark the LED chips with poor appearance in each LED chip inspected by AOI;

在所标记的光电参数数据不良的LED芯片组及外观检测不良的LED芯片上进行点胶。Glue is dispensed on the marked LED chip set with poor photoelectric parameter data and the LED chip with poor appearance inspection.

具体的,在前述步骤S13中,其通过多组探针3分别同时测试多组LED芯片组的光电参数数据时,其会对所测试的各组LED芯片组中光电参数数据不良的LED芯片组进行标记,其具体为对LED芯片组的坐标位置进行标记,具体的光电参数数据不良为所测试的光电参数数据超出光电参数合理范围。相应的,在前述步骤S15中,其通过AOI外观检测仪对各个LED芯片10进行外观检测时,其相应的会对外观检测不良的LED芯片10进行标记,进一步的,在所标记的光电参数数据不良的LED芯片组及外观检测不良的LED芯片10上进行点胶,具体的,其胶可以为UV胶或者固化胶。Specifically, in the aforementioned step S13, when the multiple sets of probes 3 are used to test the optoelectronic parameter data of multiple groups of LED chip sets at the same time, it will test the LED chip sets with poor optoelectronic parameter data in the tested LED chip sets. Marking, which is specifically marking the coordinate position of the LED chip set, and the specific photoelectric parameter data is bad is that the tested photoelectric parameter data exceeds the reasonable range of the photoelectric parameter. Correspondingly, in the aforementioned step S15, when the AOI appearance detector is used to inspect the appearance of each LED chip 10, it will correspondingly mark the LED chips 10 with poor appearance inspection. Further, in the marked photoelectric parameter data Glue is dispensed on the defective LED chip sets and the LED chips 10 with poor appearance inspection. Specifically, the glue may be UV glue or curing glue.

其中,由于在检测到LED芯片组的光电参数数据不良时,其可能仅为LED芯片组中的一个或多个LED芯片10的光电参数数据不良,而非LED芯片组中的全部LED芯片10的光电参数数据不良,因此在本发明的一个实施例中,其可以为对不良的该LED芯片组中的所有LED芯片10进行点胶而使对整个LED芯片组中的LED芯片10进行去除,当然,在本发明的其他实施例中,其还可以单独对不良的该LED芯片组中的所有LED芯片10进行再一次的光电特性测试,使得确定出光电参数数据不良的LED芯片10并进行点胶,而保留其他光电参数数据合格的LED芯片10。Wherein, when it is detected that the optoelectronic parameter data of the LED chip set is bad, it may only be that the optoelectronic parameter data of one or more LED chips 10 in the LED chip set is bad, not the data of all the LED chips 10 in the LED chip set. The photoelectric parameter data is not good, so in an embodiment of the present invention, it can remove the LED chips 10 in the entire LED chip group in order to dispense glue on all the LED chips 10 in the defective LED chip group. Of course, , in other embodiments of the present invention, it can also perform another photoelectric characteristic test on all the LED chips 10 in the defective LED chip set, so that the LED chips 10 with poor photoelectric parameter data are determined and glued , while retaining the qualified LED chips 10 of other optoelectronic parameter data.

具体的,上述在所标记的光电参数数据不良的LED芯片组及外观检测不良的LED芯片上进行点胶的步骤还包括:Specifically, the above-mentioned steps of dispensing glue on the marked LED chip set with poor photoelectric parameter data and the LED chip with poor appearance detection further include:

依次将预设数量的多组探针分别放置在所标记的光电参数数据不良的LED芯片组中的各个LED芯片的电极上同时测试多个LED芯片的光电参数数据;sequentially placing a preset number of multiple sets of probes on the electrodes of each LED chip in the marked LED chip set with poor optoelectronic parameter data to test the optoelectronic parameter data of the multiple LED chips simultaneously;

对所测试的光电参数数据不良的LED芯片组中光电参数数据不良的LED芯片进行标记;Mark the LED chips with bad optoelectronic parameter data in the tested LED chip set with bad optoelectronic parameter data;

在所标记的光电参数数据不良的LED芯片及外观检测不良的LED芯片上进行点胶。Glue is dispensed on the marked LED chips with poor photoelectric parameter data and LED chips with poor appearance inspection.

步骤S17,将空蓝膜贴附在各个LED芯片表面,使所点胶后的LED芯片与空蓝膜黏连。In step S17 , the empty blue film is attached to the surface of each LED chip, so that the LED chip after the glue has been dispensed is adhered to the empty blue film.

其中,在本发明实施例中,在对光电参数数据不良及外观检测不良的LED芯片10进行点胶后,其使用一张新的空蓝膜贴附在各个LED芯片10表面,使所点胶后的LED芯片10与空蓝膜黏连。Among them, in the embodiment of the present invention, after dispensing the LED chips 10 with poor optoelectronic parameter data and poor appearance detection, a new empty blue film is used to adhere to the surface of each LED chip 10, so that the glue dispensed The latter LED chip 10 is adhered to the empty blue film.

步骤S18,通过UV照射或加热使胶固化,并撕除空蓝膜使所黏连的LED芯片进行剥离。In step S18, the glue is cured by UV irradiation or heating, and the empty blue film is torn off to peel off the adhered LED chips.

其中,在本发明实施例中,当所点的胶为UV胶时,其可通过UV照射方式使得其UV胶固化,而使得空蓝膜通过UV胶而与光电参数数据不良及外观检测不良的LED芯片10相黏连;当点的胶为固化胶时,其可通过加热方式使得其固化胶进行固化,而使得空蓝膜通过固化胶而与光电参数数据不良及外观检测不良的LED芯片10相黏连,进一步的,在胶完全固化后,将空蓝膜进行撕除,使得黏连在空蓝膜上的不良的LED芯片10可从中进行快速剥离出来,使得可以节省时间不良的LED芯片10的去除时间。而现有技术中需要通过分选设备对外观不良及光电参数数据不良的LED芯片10逐一的进行分选去除,造成增加不良的LED芯片10的去除时间。Among them, in the embodiment of the present invention, when the glue to be dispensed is UV glue, the UV glue can be cured by UV irradiation, so that the empty blue film passes through the UV glue and the LED with poor photoelectric parameter data and poor appearance detection The chips 10 are adhered to each other; when the glue dispensed is a curing glue, the curing glue can be cured by heating, so that the empty blue film passes through the curing glue and is in contact with the LED chip 10 with poor photoelectric parameter data and poor appearance inspection. Adhesion, further, after the glue is completely cured, the empty blue film is torn off, so that the bad LED chips 10 adhered to the empty blue film can be quickly peeled off from it, so that the bad LED chips 10 can be saved time. removal time. However, in the prior art, the LED chips 10 with poor appearance and poor photoelectric parameter data need to be sorted and removed one by one by a sorting device, which increases the removal time of the defective LED chips 10 .

综上,本发明上述实施例当中的LED芯片测试方法,通过在光电特性测试完成后再进行外观检测,并对光电参数数据不良及外观不良的LED芯片进行点胶及贴附空蓝膜,使得空蓝膜可将所有不良的LED芯片黏连,因此在撕空蓝膜时可将所黏连的所有不良的LED芯片进行去除剥离,使得可以节省时间,避免现有需要通过分选机进行逐一分选所造成的时间较长的问题。To sum up, in the LED chip testing method in the above-mentioned embodiments of the present invention, the appearance inspection is carried out after the photoelectric characteristic test is completed, and the LED chips with poor photoelectric parameter data and poor appearance are dispensed and attached with an empty blue film, so that the The empty blue film can adhere all bad LED chips, so when the empty blue film is torn off, all the bad LED chips adhered can be removed and peeled off, which saves time and avoids the need to pass the sorting machine one by one. Longer problems caused by sorting.

在本说明书的描述中,参考术语“一个实施例”、“一些实施例”、“示例”、“具体示例”、或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本发明的至少一个实施例或示例中。在本说明书中,对上述术语的示意性表述不一定指的是相同的实施例或示例。而且,描述的具体特征、结构、材料或者特点可以在任何的一个或多个实施例或示例中以合适的方式结合。In the description of this specification, description with reference to the terms "one embodiment," "some embodiments," "example," "specific example," or "some examples", etc., mean specific features described in connection with the embodiment or example , structure, material or feature is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

以上所述实施例仅表达了本发明的几种实施方式,其描述较为具体和详细,但并不能因此而理解为对本发明专利范围的限制。应当指出的是,对于本领域的普通技术人员来说,在不脱离本发明构思的前提下,还可以做出若干变形和改进,这些都属于本发明的保护范围。因此,本发明专利的保护范围应以所附权利要求为准。The above-mentioned embodiments only represent several embodiments of the present invention, and the descriptions thereof are specific and detailed, but should not be construed as a limitation on the scope of the patent of the present invention. It should be pointed out that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can also be made, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention should be subject to the appended claims.

Claims (10)

1.一种LED芯片测试方法,其特征在于,所述方法包括:1. A method for testing an LED chip, wherein the method comprises: 根据LED晶圆片所切割成的各个LED芯片排布,制作对应设有多个金属电极的透明导电膜,各个金属电极用于与各个LED芯片的电极连接形成多组串联和/或并联的LED芯片组;According to the arrangement of each LED chip cut from the LED wafer, a transparent conductive film corresponding to a plurality of metal electrodes is fabricated, and each metal electrode is used to connect with the electrodes of each LED chip to form multiple groups of series and/or parallel LEDs chipset; 将透明导电膜贴附在LED晶圆片上,使各个LED芯片的电极分别与所对应的金属电极相接触而形成多组由多个LED芯片串联和/或并联的LED芯片组;The transparent conductive film is attached to the LED wafer, so that the electrodes of each LED chip are respectively contacted with the corresponding metal electrodes to form multiple LED chip sets consisting of multiple LED chips in series and/or parallel; 依次将预设数量的多组探针分别放置在透明导电膜中的每组LED芯片组首尾两端的金属电极上同时测试多组LED芯片组的光电参数数据,直至在LED晶圆片上的所有LED芯片组测试完毕后将透明导电膜去除。Place a preset number of sets of probes on the metal electrodes at the beginning and end of each LED chip set in the transparent conductive film in turn to test the optoelectronic parameter data of multiple sets of LED chip sets until all LEDs on the LED wafer are The transparent conductive film is removed after the chip set is tested. 2.根据权利要求1所述的LED芯片测试方法,其特征在于,所述方法还包括:2. The LED chip testing method according to claim 1, wherein the method further comprises: 扩膜将LED晶圆片中的各个LED芯片分隔成等间距排列;The film expansion separates each LED chip in the LED wafer into an equidistant arrangement; 对各个LED芯片进行AOI外观检测;AOI appearance inspection for each LED chip; 在光电参数数据不良及外观检测不良的LED芯片上进行点胶;Dispensing on LED chips with poor photoelectric parameter data and poor appearance inspection; 将空蓝膜贴附在各个LED芯片表面,使所点胶后的LED芯片与空蓝膜黏连;Attach the empty blue film to the surface of each LED chip, so that the LED chip after dispensing is adhered to the empty blue film; 通过UV照射或加热使胶固化,并撕除空蓝膜使所黏连的LED芯片进行剥离。The glue is cured by UV irradiation or heating, and the empty blue film is torn off to peel off the stuck LED chips. 3.根据权利要求1所述的LED芯片测试方法,其特征在于,所述LED晶圆片和透明导电膜上分别对应设有用于识别各个LED芯片位置的多个标记点;3 . The LED chip testing method according to claim 1 , wherein the LED wafer and the transparent conductive film are respectively provided with a plurality of marking points for identifying the position of each LED chip; 3 . 所述制作对应设有多个金属电极的透明导电膜的步骤包括:The step of making a transparent conductive film corresponding to a plurality of metal electrodes includes: 根据透明导电膜上设置的多个标记点确定各个LED芯片位置;Determine the position of each LED chip according to a plurality of marking points set on the transparent conductive film; 根据各个LED芯片位置确定出用于串联和/或并联多个LED芯片的电极的各个金属电极的排布位置;Determine the arrangement position of each metal electrode used for the electrodes of the plurality of LED chips in series and/or in parallel according to the position of each LED chip; 在透明导电膜的各个排布位置上分别设置金属电极;Metal electrodes are respectively arranged on each arrangement position of the transparent conductive film; 所述将透明导电膜贴附在LED晶圆片上的步骤包括:The step of attaching the transparent conductive film on the LED wafer includes: 根据透明导电膜上的各个标记点将透明导电膜贴附在与LED晶圆片上的各个标记点相对应的位置。The transparent conductive film is attached to the position corresponding to each marked point on the LED wafer according to each marked point on the transparent conductive film. 4.根据权利要求1所述的LED芯片测试方法,其特征在于,所述金属电极包括连接电极和测试电极;4. The LED chip testing method according to claim 1, wherein the metal electrode comprises a connection electrode and a test electrode; 所述制作对应设有多个金属电极的透明导电膜的步骤包括:The step of making a transparent conductive film corresponding to a plurality of metal electrodes includes: 在透明导电膜上用于与LED芯片组的各个LED芯片的电极进行串联和/或并联的位置区域设置连接电极;A connection electrode is arranged on the transparent conductive film in a position area used to be connected in series and/or in parallel with the electrodes of each LED chip of the LED chip set; 在透明导电膜上用于与LED芯片组的首尾两端LED芯片的电极对应的位置区域设置测试电极,其中测试电极的尺寸大于LED芯片的电极的尺寸,且测试电极穿透透明导电膜。Test electrodes are arranged on the transparent conductive film at positions corresponding to the electrodes of the LED chips at the head and tail ends of the LED chip set, wherein the size of the test electrodes is larger than that of the electrodes of the LED chips, and the test electrodes penetrate the transparent conductive film. 5.根据权利要求4所述的LED芯片测试方法,其特征在于,所述在透明导电膜上用于与LED芯片组的各个LED芯片的电极进行串联和/或并联的位置区域设置连接电极的步骤包括:5. The LED chip testing method according to claim 4, characterized in that, on the transparent conductive film, a connection electrode is provided in a position area used to be connected in series and/or in parallel with the electrodes of each LED chip of the LED chip group. Steps include: 在透明导电膜的中间区域阵列设置预设数量的连接电极,以使每行串联和/或并联相同预设数量的LED芯片形成多组第一LED芯片组;A preset number of connection electrodes are arrayed in the middle area of the transparent conductive film, so that each row of the same preset number of LED chips is connected in series and/or in parallel to form a plurality of first LED chip groups; 在透明导电膜的边缘区域根据每行剩余LED芯片的数量设置相应的连接电极,以使每行串联和/或并联剩余数量的LED芯片形成多组第二LED芯片组。Corresponding connection electrodes are arranged on the edge area of the transparent conductive film according to the number of the remaining LED chips in each row, so that the remaining number of LED chips in each row in series and/or parallel form multiple groups of second LED chips. 6.根据权利要求4所述的LED芯片测试方法,其特征在于,所述在透明导电膜上用于与LED芯片组的首尾两端LED芯片的电极对应的位置区域设置测试电极的步骤包括:6 . The LED chip testing method according to claim 4 , wherein the step of disposing test electrodes on the transparent conductive film at positions corresponding to the electrodes of the LED chips at the head and tail ends of the LED chip set comprises: 6 . 在透明导电膜上用于与LED芯片组的首端LED芯片的电极对应的位置区域设置第一形状的测试电极;A first-shaped test electrode is arranged on the transparent conductive film at a position area corresponding to the electrode of the LED chip at the head end of the LED chip set; 在透明导电膜上用于与LED芯片组的尾端LED芯片的电极对应的位置区域设置第二形状的测试电极。A test electrode of a second shape is provided on the transparent conductive film at a position area corresponding to the electrode of the tail end LED chip of the LED chip set. 7.根据权利要求2所述的LED芯片测试方法,其特征在于,所述在光电参数数据不良及外观检测不良的LED芯片上进行点胶的步骤包括:7. The LED chip testing method according to claim 2, wherein the step of dispensing glue on the LED chip with poor photoelectric parameter data and poor appearance inspection comprises: 对所测试的各组LED芯片组中光电参数数据不良的LED芯片组进行标记;Mark the LED chipsets with poor optoelectronic parameter data in each group of LED chipsets tested; 对所AOI外观检测的各个LED芯片中外观检测不良的LED芯片进行标记;Mark the LED chips with poor appearance in each LED chip inspected by AOI; 在所标记的光电参数数据不良的LED芯片组及外观检测不良的LED芯片上进行点胶。Glue is dispensed on the marked LED chip set with poor photoelectric parameter data and the LED chip with poor appearance inspection. 8.根据权利要求7所述的LED芯片测试方法,其特征在于,所述在所标记的光电参数数据不良的LED芯片组及外观检测不良的LED芯片上进行点胶的步骤还包括:8 . The LED chip testing method according to claim 7 , wherein the step of dispensing glue on the marked LED chip set with poor photoelectric parameter data and the LED chip with poor appearance detection further comprises: 9 . 依次将预设数量的多组探针分别放置在所标记的光电参数数据不良的LED芯片组中的各个LED芯片的电极上同时测试多个LED芯片的光电参数数据;sequentially placing a preset number of multiple sets of probes on the electrodes of each LED chip in the marked LED chip set with poor optoelectronic parameter data to test the optoelectronic parameter data of the multiple LED chips simultaneously; 对所测试的光电参数数据不良的LED芯片组中光电参数数据不良的LED芯片进行标记;Mark the LED chips with bad optoelectronic parameter data in the tested LED chip set with bad optoelectronic parameter data; 在所标记的光电参数数据不良的LED芯片及外观检测不良的LED芯片上进行点胶。Glue is dispensed on the marked LED chips with poor photoelectric parameter data and LED chips with poor appearance inspection. 9.根据权利要求1所述的LED芯片测试方法,其特征在于,所述依次将预设数量的多组探针分别放置在透明导电膜中的每组LED芯片组首尾两端的金属电极上同时测试多组LED芯片组的光电参数数据的步骤包括:9 . The LED chip testing method according to claim 1 , wherein a preset number of sets of probes are sequentially placed on the metal electrodes at the head and tail ends of each set of LED chips in the transparent conductive film simultaneously. 10 . The steps of testing photoelectric parameter data of multiple groups of LED chipsets include: 依次将预设数量的多组探针分别放置在透明导电膜中的每组LED芯片组首尾两端的金属电极上同时测试多组LED芯片组的电性参数数据,所述电性参数数据包括顺向电压VF、漏电电流Ir、及抗静电能力ESD。A preset number of multiple sets of probes are sequentially placed on the metal electrodes at the head and tail ends of each LED chip set in the transparent conductive film to simultaneously test the electrical parameter data of the multiple sets of LED chip sets. To voltage VF, leakage current Ir, and anti-static ability ESD. 10.根据权利要求1或9所述的LED芯片测试方法,其特征在于,所述方法还包括:10. The LED chip testing method according to claim 1 or 9, wherein the method further comprises: 利用标准机抽测LED芯片的光电参数数据;Use the standard machine to test the photoelectric parameter data of the LED chip; 根据所抽测得到的LED芯片的光电参数数据修正各组探针所测得的LED芯片的光电参数数据。The photoelectric parameter data of the LED chips measured by each group of probes are corrected according to the photoelectric parameter data of the LED chips obtained by sampling.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116148623A (en) * 2023-03-23 2023-05-23 深圳市西渥智控科技有限公司 LED intelligent testing device and testing method thereof
WO2024031819A1 (en) * 2022-08-12 2024-02-15 福建兆元光电有限公司 Test method for integrated micro led

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030113942A1 (en) * 2001-12-13 2003-06-19 Shu-Hsin Lin Testing methods of oled panels for all pixels on
KR20070045461A (en) * 2005-10-27 2007-05-02 엘지이노텍 주식회사 Light emitting diodes and manufacturing method thereof
US20130264592A1 (en) * 2012-04-09 2013-10-10 Cree, Inc. Wafer level packaging of multiple light emitting diodes (leds) on a single carrier die
CN204538029U (en) * 2015-02-10 2015-08-05 大连德豪光电科技有限公司 A kind of flip LED chips
CN106493094A (en) * 2016-09-23 2017-03-15 华灿光电(浙江)有限公司 Detection method of LED chip
US20200133069A1 (en) * 2018-10-26 2020-04-30 Foshan Nationstar Optoelectronics Co., Ltd. Led backlight module, display screen and detection method of led backlight module
CN111929571A (en) * 2020-10-19 2020-11-13 深圳市Tcl高新技术开发有限公司 LED chip test fixture, test method and test system
WO2022035065A1 (en) * 2020-08-13 2022-02-17 (주)라이타이저 Method for manufacturing middle platform device for led chip test performed before transfer of led chips to display panel

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030113942A1 (en) * 2001-12-13 2003-06-19 Shu-Hsin Lin Testing methods of oled panels for all pixels on
KR20070045461A (en) * 2005-10-27 2007-05-02 엘지이노텍 주식회사 Light emitting diodes and manufacturing method thereof
US20130264592A1 (en) * 2012-04-09 2013-10-10 Cree, Inc. Wafer level packaging of multiple light emitting diodes (leds) on a single carrier die
CN204538029U (en) * 2015-02-10 2015-08-05 大连德豪光电科技有限公司 A kind of flip LED chips
CN106493094A (en) * 2016-09-23 2017-03-15 华灿光电(浙江)有限公司 Detection method of LED chip
US20200133069A1 (en) * 2018-10-26 2020-04-30 Foshan Nationstar Optoelectronics Co., Ltd. Led backlight module, display screen and detection method of led backlight module
WO2022035065A1 (en) * 2020-08-13 2022-02-17 (주)라이타이저 Method for manufacturing middle platform device for led chip test performed before transfer of led chips to display panel
CN111929571A (en) * 2020-10-19 2020-11-13 深圳市Tcl高新技术开发有限公司 LED chip test fixture, test method and test system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2024031819A1 (en) * 2022-08-12 2024-02-15 福建兆元光电有限公司 Test method for integrated micro led
CN116148623A (en) * 2023-03-23 2023-05-23 深圳市西渥智控科技有限公司 LED intelligent testing device and testing method thereof

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