CN114758891A

CN114758891A - Encapsulating lead Y-type capacitor and preparation method thereof

Info

Publication number: CN114758891A
Application number: CN202210534059.3A
Authority: CN
Inventors: 朱江滨; 吴育东; 王凯星; 张子山; 林志盛
Original assignee: Fujian Torch Electron Technology Co ltd
Current assignee: Fujian Torch Electron Technology Co ltd
Priority date: 2022-05-17
Filing date: 2022-05-17
Publication date: 2022-07-15

Abstract

The invention provides a Y-shaped capacitor with encapsulated leads and a preparation method thereof, the Y-shaped capacitor comprises two chip groups which are arranged at intervals, a common lead, two independent leads, a first insulating layer, a shell, a fixing mechanism and a pouring sealant, wherein the two chips are arranged side by side at intervals, the chip groups comprise at least one ceramic chip, the conductive ends of all the ceramic chips of the chip groups which are positioned on the same side are in conductive connection to form a total conductive end, the common lead is connected with the two total conductive ends of the two chip groups which are positioned on the same side, the two independent leads are respectively connected with the other total conductive end of the two chip groups, the first insulating layer is arranged between the two chip groups to insulate and isolate the two chip groups, the two chip groups are arranged in the shell, the common lead and the two independent leads extend out of the shell, the fixing mechanism is arranged between the common lead and the two independent leads and the shell, and the pouring sealant is arranged between the chip groups and the shell. The invention can realize the function of inhibiting common mode interference, has high reliability, strong mechanical property and strong shock resistance, and can meet the requirement of batch production.

Description

Encapsulating lead Y-shaped capacitor and preparation method thereof

Technical Field

The invention relates to a Y-shaped capacitor with encapsulated leads and a preparation method thereof.

Background

In the prior art, as shown in fig. 1, the common mode interference rejection circuit is two capacitors connected in series, the free ends of the two capacitors are connected to a power supply, and the common end is grounded. However, in actual use, when designing a PCB, the overall circuit design may become complicated due to the common mode interference suppression circuit. Moreover, in the using process, the circuit may be damaged due to environmental reasons, so as to affect the reliability of the common mode interference suppression circuit, and the shockproof performance of the common mode interference suppression circuit is poor, and the common mode interference suppression circuit is very easy to damage and lose function in extreme environments.

Disclosure of Invention

The encapsulated lead Y-type capacitor and the preparation method thereof provided by the invention can realize the effect of inhibiting common mode interference, have high reliability, strong mechanical property and strong shock resistance, and can meet the requirement of batch production.

The invention is realized by the following technical scheme:

the utility model provides an embedment lead Y type condenser, including two chipsets of interval arrangement, public lead, two independent leads, the first insulation layer, the shell, fixed establishment and casting glue, two chipsets interval are arranged side by side, the chipset includes at least one ceramic chip, the conductive terminal conductive connection that lies in same one side of all ceramic chips of a chipset forms total conductive terminal, the two total conductive terminal that lie in same one side of sharing lead and two chipsets are connected, two independent leads are connected with another total conductive terminal of two chipsets respectively, two chipsets are kept apart with insulating in the first insulation layer setting between two chipsets, the shell is arranged in to two chipsets, public lead and two independent leads stretch out outside the shell, fixed establishment sets up between public lead and two independent leads and shell, the casting glue sets up between chipset and shell.

Furthermore, two total conductive ends of the two chip groups on the same side are provided with a first copper sheet, and one end of the common lead is welded on the first copper sheet.

Further, the shell upper end has the opening, the lower extreme is provided with the hole of stepping down that supplies public lead wire and two independent lead wires to wear out, fixed establishment is including setting up the red glue that corresponds the position with the hole of stepping down on public lead wire, two independent lead wires.

Further, the shell is made of high-strength insulating materials and high-temperature and high-pressure resistant materials.

Furthermore, the ceramic chip also comprises a second insulating layer, the ceramic chip comprises two conductive ends and a ceramic body arranged between the two conductive ends, and the second insulating layer is arranged on the periphery of the ceramic body.

Further, the second insulating layer is insulating paint coated on the periphery of the porcelain body.

Further, the first insulating layer is a rectangular sheet made of polyimide material, the area of the rectangular sheet is not smaller than that of the ceramic chip, and the thickness of the rectangular sheet is not smaller than 1 mm.

The invention is also realized by the following technical scheme:

a method for preparing Y-type capacitor with encapsulated lead includes setting the first insulating layer between two chip sets, connecting the public lead with two total conductive ends of two chip sets at the same side, connecting two single leads with another total conductive end of two chip sets separately, setting chip set in shell and making public lead and single lead penetrate out of shell, and introducing embedding glue between chip set and shell for solidification.

The invention has the following beneficial effects:

1. the invention firstly arranges a first insulating layer between two chip groups to ensure the insulation and isolation of the two chip groups, then respectively connects a public lead with two total conductive ends of the two chip groups positioned on the same side, respectively connects two independent leads with the other total conductive end of the two chip groups, then places the chip in a shell, makes the public lead and the independent leads penetrate out of the shell, and introduces potting adhesive between the chip groups and the shell for curing, when in use, the two independent leads are connected with a power supply, and the common lead is grounded, thus realizing the function of inhibiting common mode interference; the invention is a modular design, integrates a common mode interference direct circuit into a capacitor module, and can be used by simple welding operation, so that the design of a PCB is simpler; the fixing mechanisms are arranged among the public lead, the two independent leads and the shell, so that the two chip groups after the public lead and the independent leads are welded can be fixed in the shell, and the pouring sealant is introduced between the chip groups and the shell, so that the reliability, the polarity performance and the anti-seismic performance of the invention can be improved; the ceramic chip is a ceramic chip which is marked and matched in the market, and when the ceramic chip is used, the number of the ceramic chips contained in the chip set can be selected according to specific use conditions, so that the ceramic chip has proper capacitance, is strong in adaptability and can meet the requirement of mass production.

Drawings

The present invention will be described in further detail with reference to the accompanying drawings.

Fig. 1 is a circuit diagram of a common mode interference rejection circuit in the prior art.

Fig. 2 is a schematic structural diagram of the present invention.

Fig. 3 is a schematic view of the exploded mechanism of the present invention.

FIG. 4 is a schematic structural diagram of the present invention after removing the housing and the potting compound.

11, a conductive end; 2. a common lead; 21. a first copper sheet; 3. a separate lead; 4. a first insulating layer; 5. a second insulating layer; 6. a housing; 61. an opening; 7. pouring a sealant; 8. and (5) red glue.

Detailed Description

As shown in fig. 2 to 4, the potting lead Y-type capacitor includes two chip groups arranged at intervals, a common lead 2, two individual leads 3, a first insulating layer 4, a second insulating layer 5, a housing 6, a fixing mechanism, and a potting adhesive 7. In this embodiment, the chip set includes a ceramic chip, and the ceramic chip includes two conductive terminals 11 and a ceramic body disposed between the two conductive terminals 11. The conductive end 11 of the ceramic chip is the total conductive end of the chipset, and the two conductive ends 11 of the two ceramic chips located on the same side are provided with a first copper sheet 21 so as to electrically connect the two conductive ends 11. The upper end of the common lead is welded on the first copper sheet 21, the upper ends of the two single leads 3 are respectively welded with the other conductive ends 11 of the two ceramic chips, and the two ceramic chips are arranged side by side at intervals. The first insulating layer 4 is disposed between the two ceramic chips to isolate the two ceramic chips. The second insulating layer 5 is insulating paint coated on the periphery of the porcelain body to further ensure that the two ceramic chips cannot contact with a short circuit. Two ceramic chips to which the common lead 2 and the two individual leads 3 are bonded are placed inside the case 6, and the common lead 2 and the two individual leads 3 protrude outside the case 6. The fixing mechanism is arranged between the common lead 2 and the shell 6 and between the two single leads 3 and the shell 6. The potting adhesive 7 is disposed between the ceramic chip and the housing 6.

In another embodiment, the chip set includes a plurality of ceramic chips, the conductive terminals 11 of the plurality of ceramic chips located on the same side are conductively connected to form a total conductive terminal, and the conductive connection of the conductive terminals 11 located on the same side can be implemented by a second copper sheet disposed on the conductive terminals 11. The common lead is connected with two total conductive ends of two chip groups located on the same side, two independent leads 3 are respectively connected with the other total conductive end of the two chip groups, the two chip groups are arranged side by side at intervals, a first insulation layer 4 is arranged between the two chip groups, the two chip groups are arranged in a shell 6, the periphery of a porcelain body of each ceramic chip of each chip group is coated with insulation paint, the common lead 2 and the two independent leads 3 extend out of the shell 6, a fixing mechanism is arranged between the common lead 2 and the two independent leads 3 and the shell 6, and a pouring sealant 7 is arranged between the chip groups and the shell 6.

The housing 6 is made of a high-strength insulating and high-temperature and high-pressure resistant material, and specifically, Polybenzimidazole (PBI) can be adopted. The casing sets up to hollow cuboid, and for the convenience of ceramic chip's the putting into, this cuboid upper end is provided with opening 61, and the lower extreme then is provided with the hole of stepping down that supplies public lead wire 2 and two to lead wire 3 alone to wear out, and fixed establishment then including set up on public lead wire 2, two lead wire 3 alone with step down the red glue 8 that the hole corresponds the position.

In the present embodiment, the first insulating layer 4 is a rectangular sheet made of a polyimide material, the area of the rectangular sheet is not less than the area of the ceramic chip, and the thickness of the rectangular sheet is not less than 1mm, so as to ensure the insulating strength of the product.

The preparation method of the encapsulating lead Y-type capacitor comprises the following steps: coating a first insulating layer 4 on the periphery of a ceramic body of a ceramic chip, arranging the first insulating layer 4 between two chip sets, connecting a common lead 2 with two total conductive ends of the two chip sets positioned on the same side, respectively connecting two independent leads 3 with the other total conductive end of the two chip sets, placing the chip sets in a shell 6, enabling the common lead 2 and the independent leads 3 to penetrate out of the shell 6, and introducing a pouring sealant 7 between the chip sets and the shell 6 for curing.

The above description is only a preferred embodiment of the present invention, and therefore should not be taken as limiting the scope of the invention, which is defined by the appended claims and their equivalents and modifications within the scope of the description.

Claims

1. The utility model provides an embedment lead wire Y type condenser which characterized in that: including two chipsets of interval arrangement, public lead wire, two independent lead wires, first insulating layer, a housing, fixed establishment and casting glue, two chip intervals are arranged side by side, the chipset includes at least one ceramic chip, the electrically conductive end electrically conductive connection that lies in same side of all ceramic chips of a chipset forms total electrically conductive end, the two total electrically conductive end that lie in same side of common lead wire and two chipsets are connected, two independent lead wires are connected with another total electrically conductive end of two chipsets respectively, two chipsets are kept apart with the insulation in the first insulating layer setting between two chipsets, two chipsets are arranged in the housing, public lead wire and two independent lead wires stretch out outside the housing, fixed establishment sets up between public lead wire and two independent lead wires and housing, the casting glue sets up between chipset and housing.

2. The potted lead Y-capacitor of claim 1 wherein: the two general conductive ends of the two chip groups on the same side are provided with first copper sheets, and one end of the common lead is welded on the first copper sheets.

3. The potted lead Y-capacitor of claim 1 wherein: the shell upper end has opening, lower extreme and is provided with the hole of stepping down that supplies public lead wire and two independent lead wires to wear out, fixed establishment is including setting up the red glue that corresponds the position with the hole of stepping down on public lead wire, two independent lead wires.

4. A potted lead Y-capacitor as claimed in claim 1 or 2 or 3 wherein: the shell is made of high-strength insulating high-temperature and high-pressure resistant materials.

5. The potted lead Y-capacitor of claim 1 or 2 or 3 wherein: the ceramic chip comprises two conductive ends and a ceramic body arranged between the two conductive ends, and the second insulating layer is arranged on the periphery of the ceramic body.

6. The potted lead Y-capacitor of claim 5 wherein: the second insulating layer is insulating paint coated on the periphery of the porcelain body.

7. A potted lead Y-capacitor as claimed in claim 1 or 2 or 3 wherein: the first insulating layer is a rectangular sheet made of polyimide materials, the area of the rectangular sheet is not smaller than that of the ceramic chip, and the thickness of the rectangular sheet is not smaller than 1 mm.

8. A preparation method of a Y-shaped capacitor with encapsulated leads is characterized by comprising the following steps: first insulating layer is set between two chip sets, then the public lead is connected with two general conductive ends of two chip sets at the same side, two independent leads are connected with another general conductive end of two chip sets, then the chip sets are placed in the casing, the public lead and the independent leads are passed out of the casing, and pouring sealant is introduced between the chip sets and the casing for solidification.