CN114756079B - Single event effect radiation resistant reinforced band gap reference circuit - Google Patents
Single event effect radiation resistant reinforced band gap reference circuit Download PDFInfo
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- CN114756079B CN114756079B CN202210394652.2A CN202210394652A CN114756079B CN 114756079 B CN114756079 B CN 114756079B CN 202210394652 A CN202210394652 A CN 202210394652A CN 114756079 B CN114756079 B CN 114756079B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is DC
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
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Abstract
The invention relates to a single event effect radiation resistant reinforced band gap reference circuit, which comprises a starting circuit, a first power supply circuit and a second power supply circuit, wherein the starting circuit is used for providing bias current for the band gap reference circuit; the MP3 and MP4 provide bias for the operational amplifier through the current mirror image MP1, the MP5 also provides bias for the subsequent reference voltage generating part through the current mirror image, and the input end of the operational amplifier is respectively connected with the R3 emitter and the BP3 emitter for the grid potential of MP6 and MP7; the R4, R5, R3, BP 1-BP 3, D9 and R6 and C3 form a band gap reference voltage generating circuit. The band gap reference circuit realizes good radiation resistance through smaller area and power consumption expenditure, reduces the minimum working voltage of the circuit, improves the application range of the circuit, and improves the SET resistance by using the technology of adding a diode and a capacitor at an important node.
Description
Technical Field
The invention relates to a radiation-resistant reinforced integrated circuit technology, in particular to a single event effect radiation-resistant reinforced band gap reference circuit.
Background
The bandgap reference circuit is used to generate a voltage reference that has a small temperature dependence. The theoretical basis is that two voltage signals with opposite polarities and basically equal absolute values are overlapped to obtain the voltage with approximate zero temperature coefficient. The negative temperature coefficient voltage is realized by PNP triode base-emitter PN junction voltage; and two PNP tubes working at different current densities are adopted, and the difference of the base electrode and the emitter electrode of the PNP tubes forms positive temperature coefficient voltage.
The invention belongs to an analog integrated circuit, and relates to a radiation-resistant reinforcement technology for improving the single event transient (SingleEvent Transient, SET) resistance of the circuit. The single event transient phenomenon is a phenomenon that parasitic current of a device is changed forward due to high-energy particle bombardment in the space, and instantaneous voltage deviation (voltage spike) of voltage at a node in an integrated circuit is induced. This event occurs mainly in analog integrated circuits, and can cause significant shifts in the voltage at the critical node, which can cause abnormal operation or even failure of the circuit.
In the prior art, a Cascade structure is adopted, so that the minimum working voltage of the circuit is limited by increasing the voltage headroom, and the application range of the circuit is limited; the circuit improves the single event transient resistance by increasing the power supply to the ground, so that the overall power consumption overhead of the circuit is greatly increased, and the current of a single module is in mA level under 5V power supply; at the same time in order to obtain a large current I + The NPN triode area must be very big, bring very big domain area overhead, increase the circuit cost.
Disclosure of Invention
In order to solve the technical problems, the single event effect radiation resistant reinforced band gap reference circuit comprises PMOS transistors MP 1-MP 7; NMOS transistors MN1 to MN8; diodes D1 to D9; PNP triodes BP1 to BP3; resistors R1 to R6; capacitors C1-C3; r1, MN2, MP1, MP2, MN3, MN4 and D1-D4 are starting circuits, and bias current is provided for the band gap reference circuit; the MP3, MP6, MP7, MN5, MN6, D5-D8, C1-C2, R2, MN7, MP4, MP5 and MN8 form an operational amplifier, the MP3 and MP4 provide bias for the operational amplifier through the current mirror image MP1, the MP5 also provides bias for the subsequent reference voltage generating part through the current mirror image, and the grid potential of the input end of the operational amplifier is respectively connected with the R3 emitter and the BP3 emitter; r4, R5, R3, BP 1-BP 3, D9, R6 and C3 form a band gap reference voltage generating circuit, wherein the voltage difference between the base electrode and the emitter electrode of BP1 and BP3 generates a voltage signal with a positive temperature coefficient, the base electrode and the emitter electrode of BP3 generate a voltage with a negative temperature coefficient, and the voltage with the negative temperature coefficient and the voltage with the positive temperature coefficient are added to obtain a reference voltage irrelevant to temperature;
one end of the resistor R1 is connected with an external power supply, and the other end is connected with the drain end of the MN 1; the source end of the MN1 is connected with the ground, and the gate end of the MN1 is connected with the gate end of the MN 2; the source end of the MN2 is grounded, and the drain end of the MN2 is connected with the drain end and the gate end of the MP 1; the source of MP1 is connected with a power supply; the gate end of MP1 is connected with the gate ends of MP3, MP4 and MP 5; the drain end of MP2 is connected with the drain end and the gate end of MN3, the source end of MN3 is connected with the anode of D1, and the cathode of D1 is grounded; the MN3 gate is connected with the MN4 gate end, the MN4 source is connected with the D2 anode, the D2 cathode is connected with the D3 anode, the D3 cathode is connected with the D4 anode, and the D4 cathode is grounded; the drain end of MN4 connects with the drain ends of MP5 and MN8 respectively; the gate end of the MN8 is respectively connected with the drain ends of the MP4 and the MN7, and the source end of the MN8 is connected with one end of the R4, the R5 and the R6; the other end of R4 is respectively connected with one end of R3, the gate end of MP6 and the anode of D9; the other end of R5 is respectively connected with one end of R3, the gate end of MP7 and the emitter of BP3; the cathode of D9 is connected with the BP2 emitter; the other end of R3 is connected with the BP1 emitter; BP1, BP2 and BP3 are grounded at the base and collector; the MP3 drain terminal is connected with the MP6 source terminal and the MP7 source terminal respectively; MP6 drain terminal connects with MN5 drain terminal and gate terminal; the source end of the MN5 is grounded, the gate end of the MN5 is connected with the anode of the D5, the cathode of the D5 is connected with the anode of the D6, and the cathode of the D6 is grounded; one end of C1 is connected with MP6 and MP7 source ends, and the other end is connected with ground; MP7 drain terminal connects with MN6 drain terminal, MN6 source terminal connects with ground; the drain end of the MN6 is respectively connected with the gate end of the MN7 and the anode of the D7, and one end of the R2; the cathode of the D7 is connected with the anode of the D8, and the cathode of the D8 is grounded; the other end of R2 is connected with one end of C2, and the other end of C2 is connected with the drain end of MN 7.
In one embodiment of the present invention, after the start-up circuit is turned on, the gate terminal voltage of MN3 is V D1 +V THN3 The gate voltage required for MN4 turn on is V D1 +V D2 +V D3 +V THN4 ≈3V D1 +V THN3 ＞V D1 +V THN3 。
In one embodiment of the present invention, R2 and C2 in the operational amplifier provide miller compensation for the operational amplifier, and the capacitor C1 is disposed directly at the sources of MP6 and MP7 to provide filtering.
In one embodiment of the present invention, the voltages turned on by D5 and D6 in the operational amplifier are smaller than the threshold voltages of MN5 and MN6, so that they are not turned on under normal conditions, and if single-event transient disturbance peak currents occur at the gates of MN5 and MN6, they can be timely discharged through D5 and D6.
In one embodiment of the present invention, the voltages turned on by D7 and D8 in the operational amplifier are smaller than the threshold voltages of MN6 and MN7, so as to stabilize the gate potential of MN 7.
In one embodiment of the present invention, the source of MN8 is connected to one end of resistors R4 and R5, and the gate potentials of MP6 and MP7 are connected to the other ends of resistors R4 and R5, respectively, so as to ensure that the currents flowing through the two resistors are equal.
In one embodiment of the invention, the voltages at the two ends of R4 and R5 in the band-gap reference voltage generating circuit are exactly equal, so that the emitter currents of BP1 and BP3 are ensured to be equal, and the offset of an output reference is reduced; d9 and BP2 are not conducted when working normally, transient current of a reference generating part can be effectively discharged under irradiation conditions, and output reference stability is ensured; r6 and C3 form a low-pass filter to filter out peak voltage induced by single particle incidence.
Compared with the prior art, the technical scheme of the invention has the following advantages: according to the anti-single event effect radiation reinforced band gap reference circuit, good radiation resistance is realized through smaller area and power consumption expenditure, the lowest working voltage of the circuit is reduced, the application range of the circuit is improved, the anti-SET performance is improved by using a technology of adding a diode and a capacitor at an important node, the required circuit area and power consumption are greatly reduced, and the circuit cost is reduced; the operational amplifier is utilized to improve the precision of the output voltage, the required voltage headroom is obviously reduced compared with the prior art, and the application range of the circuit is expanded.
Drawings
In order that the invention may be more readily understood, a more particular description of the invention will be rendered by reference to specific embodiments thereof that are illustrated in the appended drawings.
Fig. 1 is a schematic diagram of a radiation-resistant bandgap reference circuit of the invention.
Detailed Description
As shown in fig. 1, the present embodiment provides a single event effect radiation-resistant reinforced bandgap reference circuit, which includes PMOS transistors MP1 to MP7; NMOS transistors MN1 to MN8; diodes D1 to D9; PNP triodes BP1 to BP3; resistors R1 to R6; capacitances C1 to C3.
R1, MN2, MP1, MP2, MN3, MN4, D1-D4 are starting circuits and provide bias current for the whole band gap reference circuit. After the circuit is started, the voltage of the gate terminal of MN3 is V D1 +V THN3 The gate voltage required for MN4 turn on is V D1 +V D2 +V D3 +V THN4 ≈3V D1 +V THN3 ＞V D1 +V THN3 The MN4 turns off after the start-up is completed, so that the normal operation of the reference circuit is not affected. Meanwhile, D1 can effectively discharge transient current induced by single particle incidence at the drain end of MN3, and the SET resistance is improved.
One end of the resistor R1 is connected with an external power supply, and the other end is connected with the drain end of the MN 1; the source end of the MN1 is connected with the ground, and the gate end of the MN1 is connected with the gate end of the MN 2; the source end of the MN2 is grounded, and the drain end of the MN2 is connected with the drain end and the gate end of the MP 1; the source of MP1 is connected with a power supply; the gate end of MP1 is connected with the gate ends of MP3, MP4 and MP 5; the drain end of MP2 is connected with the drain end and the gate end of MN3, the source end of MN3 is connected with the anode of D1, and the cathode of D1 is grounded; the MN3 gate is connected with the MN4 gate end, the MN4 source is connected with the D2 anode, the D2 cathode is connected with the D3 anode, the D3 cathode is connected with the D4 anode, and the D4 cathode is grounded; the drain end of MN4 connects with the drain ends of MP5 and MN8 respectively; the gate end of the MN8 is respectively connected with the drain ends of the MP4 and the MN7, and the source end of the MN8 is connected with one end of the R4, the R5 and the R6; the other end of R4 is respectively connected with one end of R3, the gate end of MP6 and the anode of D9; the other end of R5 is respectively connected with one end of R3, the gate end of MP7 and the emitter of BP3; the cathode of D9 is connected with the BP2 emitter; the other end of R3 is connected with the BP1 emitter; BP1, BP2 and BP3 are grounded at the base and collector; the MP3 drain terminal is connected with the MP6 source terminal and the MP7 source terminal respectively; MP6 drain terminal connects with MN5 drain terminal and gate terminal; the source end of the MN5 is grounded, the gate end of the MN5 is connected with the anode of the D5, the cathode of the D5 is connected with the anode of the D6, and the cathode of the D6 is grounded; one end of C1 is connected with MP6 and MP7 source ends, and the other end is connected with ground; MP7 drain terminal connects with MN6 drain terminal, MN6 source terminal connects with ground; the drain end of the MN6 is respectively connected with the gate end of the MN7 and the anode of the D7, and one end of the R2; the cathode of the D7 is connected with the anode of the D8, and the cathode of the D8 is grounded; the other end of R2 is connected with one end of C2, and the other end of C2 is connected with the drain end of MN 7.
MP3, MP6, MP7, MN5, MN6, D5-D8, C1-C2, R2, MN7, MP4, MP5, MN8 constitute an operational amplifier. Wherein MP 3-MP 4 provide bias for the operational amplifier through the current of the current mirror image MP1, MP5 also provides bias for the subsequent reference voltage generating part through the current mirror image; grid potentials of the operational amplifier input pair transistors MP6 and MP7 are respectively connected with the R3 emitter and the BP3 emitter, and the high gain of the operational amplifier is utilized to make the potentials at two positions equal; r2 and C2 provide Miller compensation for the operational amplifier, so that stability is ensured; the capacitor C1 is used for filtering the MP6 and MP7 sources, preventing the transient voltage disturbance of the common mode point of the operational amplifier caused by single particle incidence, and improving the common mode rejection ratio of the operational amplifier in an irradiation environment; the voltage of the opening of the D5 and the D6 is smaller than the threshold voltage of the MN5 and the 6, so that the current cannot be conducted under normal conditions, and if single-particle transient disturbance peak currents appear on the grid electrodes of the MN5 and the MN6, the current can be timely discharged through the D5 and the D6; d7, D8 play the same role for stabilizing MN7 gate potential; the source electrode of the output device MN8 is simultaneously connected with one ends of R4 and R5, and the grid potentials of MP6 and MP7 are respectively connected with the other ends of the resistors, so that the equal currents flowing through the two resistors are ensured.
R4, R5, R3, BP1 to BP3, D9, and R6, C3 constitute a bandgap reference voltage generating circuit. Similar to the prior art, the voltage difference between the base and the emitter of BP1 and BP3 generates a voltage signal with positive temperature coefficient, the positive PN junction of the base and the emitter of BP3 generates a voltage with negative temperature coefficient, and the voltage signal are added to obtain a reference voltage irrelevant to temperature; the voltages at the two ends of R4 and R5 are exactly equal, so that the emitter currents of BP1 and BP3 are guaranteed to be equal, and the offset of an output reference is reduced; d9 and BP2 are not conducted when working normally, transient current of a reference generating part can be effectively discharged under irradiation conditions, and output reference stability is ensured; r6 and C3 form a low-pass filter to filter out peak voltage induced by single particle incidence.
According to the invention, the diode and the capacitor are added at important nodes of the circuit to inhibit transient spike voltage and current induced by a single event effect, so that the anti-irradiation performance of the circuit is improved. Compared with the prior art, the whole reference static power consumption is less than 100 mu A under 5V power supply and is far smaller than the prior art without larger current loss; the triode area is smaller, the overall layout is more compact, and the design and the transplanting are easy; meanwhile, the Cascade structure in the prior art is replaced by the operational amplifier to improve the precision of the output voltage, so that the minimum working voltage of the circuit is effectively reduced, and the application range is wider.
It is apparent that the above examples are given by way of illustration only and are not limiting of the embodiments. Other variations and modifications of the present invention will be apparent to those of ordinary skill in the art in light of the foregoing description. It is not necessary here nor is it exhaustive of all embodiments. And obvious variations or modifications thereof are contemplated as falling within the scope of the present invention.
Claims (7)
1. The single event effect radiation resistant reinforced band gap reference circuit is characterized by comprising PMOS transistors MP 1-MP 7; NMOS transistors MN1 to MN8; diodes D1 to D9; PNP triodes BP1 to BP3; resistors R1 to R6; capacitors C1-C3; r1, MN2, MP1, MP2, MN3, MN4 and D1-D4 are starting circuits, and bias current is provided for the band gap reference circuit; the MP3, MP6, MP7, MN5, MN6, D5-D8, C1-C2, R2, MN7, MP4, MP5 and MN8 form an operational amplifier, the MP3 and MP4 provide bias for the operational amplifier through the current mirror image MP1, the MP5 also provides bias for the subsequent reference voltage generating part through the current mirror image, and the grid potential of the input end of the operational amplifier is respectively connected with the R3 emitter and the BP3 emitter; r4, R5, R3, BP 1-BP 3, D9, R6 and C3 form a band gap reference voltage generating circuit, wherein the voltage difference between the base electrode and the emitter electrode of BP1 and BP3 generates a voltage signal with a positive temperature coefficient, the base electrode and the emitter electrode of BP3 generate a voltage with a negative temperature coefficient, and the voltage with the negative temperature coefficient and the voltage with the positive temperature coefficient are added to obtain a reference voltage irrelevant to temperature;
one end of the resistor R1 is connected with an external power supply, and the other end is connected with the drain end of the MN 1; the source end of the MN1 is connected with the ground, and the gate end of the MN1 is connected with the gate end of the MN 2; the source end of the MN2 is grounded, and the drain end of the MN2 is connected with the drain end and the gate end of the MP 1; the source of MP1 is connected with a power supply; the gate end of MP1 is connected with the gate ends of MP3, MP4 and MP 5; the drain end of MP2 is connected with the drain end and the gate end of MN3, the source end of MN3 is connected with the anode of D1, and the cathode of D1 is grounded; the MN3 gate is connected with the MN4 gate end, the MN4 source is connected with the D2 anode, the D2 cathode is connected with the D3 anode, the D3 cathode is connected with the D4 anode, and the D4 cathode is grounded; the drain end of MN4 connects with the drain ends of MP5 and MN8 respectively; the gate end of the MN8 is respectively connected with the drain ends of the MP4 and the MN7, and the source end of the MN8 is connected with one end of the R4, the R5 and the R6; the other end of R4 is respectively connected with one end of R3, the gate end of MP6 and the anode of D9; the other end of R5 is respectively connected with one end of R3, the gate end of MP7 and the emitter of BP3; the cathode of D9 is connected with the BP2 emitter; the other end of R3 is connected with the BP1 emitter; BP1, BP2 and BP3 are grounded at the base and collector; the MP3 drain terminal is connected with the MP6 source terminal and the MP7 source terminal respectively; MP6 drain terminal connects with MN5 drain terminal and gate terminal; the source end of the MN5 is grounded, the gate end of the MN5 is connected with the anode of the D5, the cathode of the D5 is connected with the anode of the D6, and the cathode of the D6 is grounded; one end of C1 is connected with MP6 and MP7 source ends, and the other end is connected with ground; MP7 drain terminal connects with MN6 drain terminal, MN6 source terminal connects with ground; the drain end of the MN6 is respectively connected with the gate end of the MN7 and the anode of the D7, and one end of the R2; the cathode of the D7 is connected with the anode of the D8, and the cathode of the D8 is grounded; the other end of R2 is connected with one end of C2, and the other end of C2 is connected with the drain end of MN 7.
2. The anti-single event effect radiation hardened bandgap reference circuit of claim 1, wherein: after the starting circuit is started, the voltage of the gate terminal of MN3 is V D1 +V THN3 The gate voltage required for MN4 turn on is V D1 +V D2 +V D3 +V THN4 ≈3V D1 +V THN3 ＞V D1 +V THN3 。
3. The anti-single event effect radiation hardened bandgap reference circuit of claim 1, wherein: in the operational amplifier, R2 and C2 provide Miller compensation for the operational amplifier, and a capacitor C1 is arranged at the source electrodes of MP6 and MP7 directly to provide filtering.
4. The anti-single event effect radiation hardened bandgap reference circuit of claim 1, wherein: the voltage on which D5 and D6 are started in the operational amplifier is smaller than the threshold voltage of MN5 and MN6, so that the operational amplifier cannot be conducted under normal conditions, and if single-particle transient disturbance peak currents appear on grid electrodes of MN5 and MN6, the single-particle transient disturbance peak currents can be timely discharged through the D5 and the D6.
5. The anti-single event effect radiation hardened bandgap reference circuit of claim 1, wherein: in the operational amplifier, the turned-on voltages of D7 and D8 are smaller than the threshold voltages of MN6 and MN7, so that the gate potential of MN7 can be stabilized.
6. The anti-single event effect radiation hardened bandgap reference circuit of claim 1, wherein: the source electrode of MN8 is connected with one end of the resistor R4 and one end of the resistor R5, and the grid potentials of MP6 and MP7 are respectively connected with the other ends of the resistor R4 and the resistor R5, so that equal currents flowing through the resistor R4 and the resistor R5 are ensured.
7. The anti-single event effect radiation hardened bandgap reference circuit of claim 1, wherein: the voltages at the two ends of R4 and R5 in the band gap reference voltage generating circuit are exactly equal, so that the emitter currents of BP1 and BP3 are guaranteed to be equal, and the offset of an output reference is reduced; d9 and BP2 are not conducted when working normally, transient current of a reference generating part can be effectively discharged under irradiation conditions, and output reference stability is ensured; r6 and C3 form a low-pass filter to filter out peak voltage induced by single particle incidence.
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| US10061340B1 (en) * | 2018-01-24 | 2018-08-28 | Invecas, Inc. | Bandgap reference voltage generator |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102289243B (en) * | 2011-06-30 | 2013-06-12 | 西安电子科技大学 | Complementary metal oxide semiconductor (CMOS) band gap reference source |
| JP6242274B2 (en) * | 2014-04-14 | 2017-12-06 | ルネサスエレクトロニクス株式会社 | Band gap reference circuit and semiconductor device including the same |
| CN106125811B (en) * | 2016-06-15 | 2017-07-21 | 北京工业大学 | A kind of ultra-low temperature drift high PSRR bandgap voltage reference |
| CN106909192B (en) * | 2017-03-14 | 2018-06-29 | 中国电子科技集团公司第五十八研究所 | A kind of high-order temperature compensated voltage-reference |
| CN109725672B (en) * | 2018-09-05 | 2023-09-08 | 南京浣轩半导体有限公司 | Band gap reference circuit and high-order temperature compensation method |
| CN111781983A (en) * | 2020-07-14 | 2020-10-16 | 天津工业大学 | A High Power Supply Rejection Than Threshold MOSFET Compensation Bandgap Reference Voltage Circuit |
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| US6052020A (en) * | 1997-09-10 | 2000-04-18 | Intel Corporation | Low supply voltage sub-bandgap reference |
| US10061340B1 (en) * | 2018-01-24 | 2018-08-28 | Invecas, Inc. | Bandgap reference voltage generator |
| CN109947169A (en) * | 2019-04-23 | 2019-06-28 | 电子科技大学 | A High Power Supply Rejection Ratio Bandgap Reference Circuit with Preregulated Structure |
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