CN114744602B - Protection circuit and terminal equipment - Google Patents

Abstract

The present application provides a protection circuit and a terminal device, wherein the protection circuit is connected to a device port, and the protection circuit includes a first protection circuit and a second protection circuit. One end of the first protection circuit is connected to the device port, the other end of the first protection circuit is connected to one end of the second protection circuit, and the other end of the second protection circuit is connected to a reference ground. The second protection circuit includes a first capacitor subcircuit and a first protection subcircuit connected in parallel. Among them, the first protection circuit reduces its own impedance when the device port voltage is greater than a first voltage threshold to reduce the device port voltage; the first protection circuit and the first protection subcircuit reduce their respective impedances when the device port voltage is greater than a second voltage threshold to reduce the device port voltage, and the second voltage threshold is greater than the first voltage threshold. By adopting the present application, the DC tolerance of the device port can be improved, and the applicability is strong.

Description

Protection circuits and terminal equipment

Technical Field

The present application relates to the technical field of electronic circuits, and in particular to a protection circuit and a terminal device.

Background technique

The D+ and D- ends of the USB port need to support 480M high-speed communication, so the junction capacitance of the transient voltage suppressor (TVS) is relatively high. At the same time, since the USB PHY side usually adopts low-voltage process during the manufacturing process, the industry currently mainly uses low-power TVS with low turn-on voltage (such as 8.5V) to protect the USB port.

However, with the development of charging technology, the charging voltage has increased to 11V or even 20V. The above-mentioned low-power TVS alone can no longer meet the high-voltage protection of the USB port. Specifically, if there is liquid or foreign matter in the USB port, causing the D+ terminal and/or D- terminal to short-circuit with the power terminal of the USB port, once the voltage of the power terminal of the USB port exceeds 8.5V continuously, the TVS will be directly burned out, thereby causing damage to the USB port. Therefore, it is particularly important to improve the DC tolerance of the USB port.

Summary of the invention

The present application provides a protection circuit and terminal device, which can improve the DC tolerance of the device port and has strong applicability.

In the first aspect, an embodiment of the present application provides a protection circuit, which is connected to a device port, and the protection circuit includes a first protection circuit and a second protection circuit. One end of the first protection circuit is connected to the device port, the other end of the first protection circuit is connected to one end of the second protection circuit, and the other end of the second protection circuit is connected to a reference ground. The second protection circuit includes a first capacitor subcircuit and a first protection subcircuit connected in parallel. Among them, the first protection circuit reduces its own impedance when the device port voltage is greater than a first voltage threshold to reduce the device port voltage; the first protection circuit and the first protection subcircuit reduce their respective impedances when the device port voltage is greater than a second voltage threshold to reduce the device port voltage, and the second voltage threshold is greater than the first voltage threshold. Since the device port here includes a positive data line terminal, a negative data line terminal and a power supply terminal, and the device port voltage includes a positive data line terminal voltage and/or a negative data line terminal voltage, the protection circuit can achieve overvoltage protection for the positive data line terminal and/or the negative data line terminal when the positive data line terminal and/or the negative data line terminal are short-circuited with the power supply terminal, regardless of whether the device port voltage is instantaneously greater than the first voltage threshold or continuously greater than the second voltage threshold, through the working characteristics of the capacitor (i.e., the capacitor is short-circuited under instantaneous DC voltage and open-circuited under long-term DC voltage), the first protection circuit and the first protection sub-circuit The characteristics of fast energy discharge, thereby achieving overvoltage protection for the device port and improving the DC tolerance of the device port (including instantaneous DC tolerance and long-term DC tolerance), and having strong applicability.

In combination with the first aspect, in a first possible implementation, the device port includes a first end and a second end, the first protection circuit includes a second protection subcircuit and a third protection subcircuit, one end of the second protection subcircuit is connected to the first end, one end of the third protection subcircuit is connected to the second end, and the other end of the second protection subcircuit and the other end of the third protection subcircuit are both connected to one end of the second protection circuit. According to the above connection relationship, the second protection subcircuit and the third protection subcircuit share the first protection circuit, and the second protection subcircuit can reduce its own impedance when the voltage of the first end is greater than the first voltage threshold, thereby reducing the voltage of the first end; the first protection circuit and the first protection subcircuit reduce their respective impedances when the voltage of the first end is greater than the second voltage threshold, so as to reduce the voltage of the first end. And the third protection subcircuit can reduce its own impedance when the voltage of the first end is greater than the first voltage threshold, thereby reducing the voltage of the first end; the first protection circuit and the first protection subcircuit reduce their respective impedances when the voltage of the second end is greater than the second voltage threshold, so as to reduce the voltage of the second end. Therefore, the protection circuit in this implementation can simultaneously realize overvoltage protection of the positive data line end and the negative data line end in the device port, so as to better realize overvoltage protection of the device port and improve the DC tolerance of the device port.

In combination with the first possible implementation of the first aspect, in a second possible implementation, the second protection subcircuit and the third protection subcircuit each include a first protection element, or at least two first protection elements connected in series and/or in parallel. It can be understood that the second protection subcircuit and the third protection subcircuit have various structures and high flexibility. In addition, when the second protection subcircuit and the third protection subcircuit both include multiple first protection elements, the surge resistance of the terminal device where the device port is located can be improved by simultaneously adjusting the connection relationship between the multiple first protection elements in the second protection subcircuit and the third protection subcircuit.

In combination with the first aspect, in a third possible implementation, the device port includes a first end, and the first end is connected to one end of the first protection circuit. It can be understood that in this implementation, the device port voltage is the first end voltage, and the first end here can be the positive data line end or the negative data line end of the device port. Therefore, the protection circuit in this implementation can be set at the positive data line end or the negative data line end of the device port, so as to achieve overvoltage protection of the positive data line end or the negative data line end of the device port, and then achieve overvoltage protection of the device port, and improve the DC tolerance of the device port.

In combination with the third possible implementation of the first aspect, in a fourth possible implementation, the first protection circuit includes a first protection element, or at least two first protection elements connected in series and/or in parallel. It can be understood that the structure of the first protection circuit is diverse and highly flexible. In addition, when the first protection circuit includes multiple first protection elements, the surge resistance of the terminal device where the device port is located can be improved by adjusting the connection relationship between the multiple first protection elements in the first protection circuit.

In combination with the third possible implementation or the fourth possible implementation of the first aspect, in a fifth possible implementation, the device port further includes a second terminal, the protection circuit further includes a third protection circuit and a fourth protection circuit, the third protection circuit is connected in series with the fourth protection circuit, one end of the third protection circuit is connected to the second terminal, one end of the fourth protection circuit is connected to the reference ground, and the fourth protection circuit includes a second capacitor subcircuit and a fourth protection subcircuit connected in parallel. The third protection circuit reduces its own impedance when the voltage at the second terminal is greater than the first voltage threshold, thereby reducing the voltage at the second terminal; the third protection circuit and the fourth protection subcircuit reduce their respective impedances when the voltage at the second terminal is greater than the second voltage threshold, thereby reducing the voltage at the second terminal. Since the first end and the second end here can correspond one-to-one to the positive data line end and the negative data line end, the protection circuit can achieve overvoltage protection for the positive data line end and/or the negative data line end of the device port through the working characteristics of the capacitor (that is, the characteristics of the capacitor being short-circuited under instantaneous DC voltage and being open-circuited under long-term DC voltage), the first protection circuit, the first protection sub-circuit, the third protection circuit and the fourth protection sub-circuit. The characteristics of fast energy discharge can achieve overvoltage protection for the device port, thereby achieving overvoltage protection for the device port and improving the DC tolerance of the device port (including instantaneous DC tolerance and long-term DC tolerance), when the positive data line end and/or the negative data line end are short-circuited with the power supply end. The device port has strong applicability.

In combination with any one of the first aspect to the fifth possible implementation, in a sixth possible implementation, the second protection circuit further includes a first resistor subcircuit, and the first resistor subcircuit is connected in parallel with the first capacitor subcircuit. Then, after there is no voltage at the first end and/or the second end of the device port, the first resistor subcircuit discharges the energy stored in the first capacitor subcircuit during the overvoltage protection process, thereby ensuring that the protection circuit can still achieve instantaneous overvoltage protection and long-term overvoltage protection for the device port when the device port voltage is instantaneously greater than the first voltage threshold next time, or when the device port voltage is continuously greater than the second voltage threshold next time.

In combination with the sixth possible implementation of the first aspect, in a seventh possible implementation, the first resistor subcircuit includes a resistor, or at least two resistors connected in series and/or in parallel. It can be understood that the structure of the first resistor subcircuit is diverse and highly flexible.

In combination with any one of the fifth to seventh possible implementations of the first aspect, in an eighth possible implementation, the fourth protection circuit further includes a second resistor subcircuit, and the second resistor subcircuit is connected in parallel with the second capacitor subcircuit. Then, after there is no longer voltage at the second end of the device port, the second resistor subcircuit discharges the energy stored in the second capacitor subcircuit during the overvoltage protection process, thereby ensuring that the protection circuit can still achieve instantaneous overvoltage protection and long-term overvoltage protection for the device port when the voltage at the second end is instantaneously greater than the first voltage threshold next time, or when the voltage at the second end is continuously greater than the second voltage threshold.

In combination with the eighth possible implementation of the first aspect, in a ninth possible implementation, the second resistor subunit includes a resistor, or at least two resistors connected in series and/or in parallel. It can be understood that the second resistor subcircuit has a diverse structure and high flexibility.

In combination with any one of the fifth to ninth possible implementations of the first aspect, in a tenth possible implementation, the third protection circuit includes a first protection element, or at least two first protection elements connected in series and/or in parallel; the fourth protection subcircuit includes a second protection element, or at least two second protection elements connected in series and/or in parallel. It can be understood that the structures of the third protection circuit and the fourth protection subcircuit are diverse and highly flexible. In addition, in the case where the third protection circuit includes a plurality of first protection elements and the fourth protection subcircuit includes a plurality of second protection elements, the DC tolerance of the device port and the surge resistance of the terminal device where the device port is located can be improved by adjusting the connection relationship between the plurality of first protection elements in the third protection circuit and the connection relationship between the plurality of second protection elements in the fourth protection subcircuit.

In combination with any one of the first aspect to the tenth possible implementation manner, in the eleventh possible implementation manner, the first protection subcircuit includes a second protection element, or at least two second protection elements connected in series and/or in parallel. It can be understood that the structure of the first protection subcircuit is diverse and highly flexible.

In combination with the first aspect to the tenth possible implementation or the eleventh possible implementation, in a twelfth possible implementation, the second protection element includes a transient diode or a varistor. It can be understood that the second protection element has various types, so that the structure of the protection circuit is diverse and has high flexibility.

In combination with any one of the second possible implementation manner and the fourth possible implementation manner to the twelfth possible implementation manner of the first aspect, in a thirteenth possible implementation manner, the first protection element includes a transient diode or a varistor. It can be understood that the types of the first protection element are various, so that the structure of the protection circuit is diverse and the flexibility is high.

In combination with any one of the first aspect to the thirteenth possible implementation manner, in the fourteenth possible implementation manner, the device port includes a USB port. It can be understood that the protection circuit provided in the present application can be applied to all devices including USB ports, and has strong applicability.

In the second aspect, an embodiment of the present application provides a terminal device, which includes the protection circuit and the device port provided by the first aspect to any possible implementation of the first aspect. It can be understood that the terminal device can implement overvoltage protection for the device port based on the protection circuit provided by the first aspect to any possible implementation of the first aspect, improve the DC tolerance of the device port, and further implement protection of the subsequent circuit of the device port, which has strong applicability.

It should be understood that the implementation and beneficial effects of the above-mentioned aspects of the present application can be referenced to each other.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a schematic diagram of an application scenario of a terminal device provided in an embodiment of the present application;

FIG2 is a schematic diagram of a structure of a terminal device provided in an embodiment of the present application;

FIG3 is another schematic diagram of the structure of a terminal device provided in an embodiment of the present application;

FIG4 is another schematic diagram of the structure of a terminal device provided in an embodiment of the present application;

FIG5 is another schematic diagram of the structure of a terminal device provided in an embodiment of the present application;

FIG6 is another schematic diagram of the structure of a terminal device provided in an embodiment of the present application;

FIG. 7 is another schematic diagram of the structure of the terminal device provided in an embodiment of the present application.

Detailed ways

The protection circuit provided in the present application can be set at the positive data line terminal and/or the negative data line terminal of the device port, and is used to implement overvoltage protection for the positive data line terminal and/or the negative data line terminal when there is a short circuit between the positive data line terminal and/or the negative data line terminal and the power supply terminal of the device port due to the presence of liquid or foreign matter, so as to improve the DC tolerance of the device port. The protection circuit can be applied to terminal device charging scenarios (terminal devices include smartphones, tablet computers, desktop computers, smart speakers, etc.). The terminal device charging scenario is described below using a smartphone as an example.

Referring to Figure 1, Figure 1 is a schematic diagram of an application scenario of a terminal device provided in an embodiment of the present application. In the terminal device charging scenario, the terminal device provided in the present application is applicable to a smartphone as shown in Figure 1, which is connected to the output terminal of a power adapter, and the input terminal of the power adapter is connected to a power grid. The smartphone includes a USB port and a protection circuit connected to the D+ terminal and/or D- terminal of the USB port. When the USB port of the smartphone is connected to the output terminal of the power adapter, the power adapter inverts the AC voltage (such as 220V) provided by the power grid into a DC voltage that meets the charging requirements of the smartphone, and outputs the DC voltage to the smartphone, thereby charging the smartphone. During the charging process of a smart phone, if the power supply terminal of the USB port is short-circuited with the D+ terminal and/or the D- terminal due to the presence of liquid or foreign matter in the USB port, the protection circuit can quickly discharge the first voltage of the D+ terminal and/or the D- terminal when the voltage of the D+ terminal and/or the D- terminal instantaneously reaches a first voltage greater than the first voltage threshold or continues to be a first voltage greater than the second voltage threshold, thereby realizing overvoltage protection of the D+ terminal and/or the D- terminal of the USB port, thereby realizing overvoltage protection of the USB port, improving the DC tolerance of the USB port, and having strong applicability. The above is only an example of the application scenarios of the terminal device provided by this application, not an exhaustive list, and this application does not limit the application scenarios.

The working principle of the protection circuit of the terminal device and the device port provided in the embodiment of the present application is illustrated below in conjunction with Figures 2 to 7.

Referring to FIG. 2 , FIG. 2 is a schematic diagram of a structure of a terminal device provided in an embodiment of the present application. As shown in FIG. 2 , the terminal device 1 includes a protection circuit 10 and a device port 11. The first end and/or the second end of the device port 11 are connected to the protection circuit 10, and the device port 11 is used to establish an electrical connection with an external device. Among them, the external device may be a power adapter or a terminal device (which may be of the same type as the terminal device 1 or of a different type from the terminal device 1), etc., the terminal device 1 may be a smart phone, a tablet computer, a desktop computer, a smart speaker, etc., and the device port 11 may be a USB port, a network cable port, a video input/output port, and other peripheral ports. The device port 11 includes a first end, a second end, and a power supply end, wherein the first end may be a positive data line end or a negative data line end of the device port 11, and the second end is the other end of the positive data line end and the negative data line end of the device port 11 except the first end. Exemplarily, in the case where the device port 11 is a USB port, the first end is a D+ end and the second end is a D- end. Optionally, the terminal device 1 may further include an audio switch 12 and a system on chip (SOC) 13. The device port 11 may be connected to the SOC 13 via the audio switch 12.

The protection circuit 10 includes a first protection circuit 101 and a second protection circuit 102, wherein one end of the first protection circuit 101 is connected to the first end and/or the second end, the other end of the first protection circuit 101 is connected to one end of the second protection circuit 102, and the other end of the second protection circuit 102 is connected to a reference ground. The second protection circuit 102 includes a first capacitor subcircuit 1021 and a first protection subcircuit 1022 connected in parallel. The two ends formed by the first capacitor subcircuit 1021 and the first protection subcircuit 1022 being connected in parallel are the two ends of the second protection circuit 102.

Specifically, when there is liquid or foreign matter in the device port 11, causing the power supply end of the device port 11 to be short-circuited with the first end and/or the second end, when the external device instantaneously outputs a first voltage to the first end of the device port 11 through the power supply end of the device port 11, the first capacitor subcircuit 1021 is equivalent to a short-circuit state. Since the first voltage is greater than the first voltage threshold, the impedance of the first protection circuit 101 drops rapidly. The protection circuit 10 discharges the device port voltage (i.e., the first end voltage and/or the second end voltage of the device port 11) to the reference ground through the first protection circuit 101 and the first capacitor subcircuit 1021, so that the device port voltage drops rapidly, thereby effectively realizing overvoltage protection of the first end and/or the second end of the device port 11 by an instantaneous voltage greater than the first voltage threshold, thereby realizing overvoltage protection of the device port 11, and thereby improving the instantaneous DC tolerance of the device port 11.

When the external device continuously outputs the first voltage to the first end and/or the second end of the device port 11 through the power end of the device port 11, the first capacitor subcircuit 1021 is equivalent to an open circuit state. Since the first voltage is greater than the second voltage threshold, and the second voltage threshold is greater than the first voltage threshold, the impedance of the first protection circuit 101 and the first protection subcircuit 1022 both drop rapidly. The protection circuit 10 discharges the device port voltage (i.e., the first end voltage and/or the second end voltage of the device port 11) to the reference ground through the first protection circuit 101 and the first protection subcircuit 1022, so that the device port voltage drops rapidly, thereby effectively realizing overvoltage protection of the first end and/or the second end of the device port 11 by a long-term voltage greater than the second voltage threshold, so as to realize overvoltage protection of the device port 11, thereby improving the long-term DC tolerance of the device port 11.

It can be understood that no matter whether the device port voltage instantaneously reaches a voltage greater than the first voltage threshold or continues to be a voltage greater than the second voltage threshold, the first protection circuit 101 and the first protection sub-circuit 1022 can quickly discharge energy and the working characteristics of the capacitor (i.e., the capacitor is short-circuited under instantaneous DC voltage and open-circuited under long-term DC voltage). This can effectively achieve overvoltage protection for the device port 11 and improve the DC tolerance of the device port 11 (including instantaneous DC tolerance and long-term DC tolerance), thereby also protecting the subsequent circuits of the device port 11, and has strong applicability.

It should be noted that the number of elements included in the first protection circuit 101, the first capacitor subcircuit 1021 and the first protection subcircuit 1022 in the present application can be changed accordingly according to actual needs, so the present application does not limit the number of elements included in the first protection circuit 101, the first capacitor subcircuit 1021 and the first protection subcircuit 1022. Specifically, the first protection circuit 101 includes a first protection element, or at least two first protection elements connected in series and/or in parallel; the first capacitor subcircuit 1021 includes a capacitor, or at least two capacitors connected in series and/or in parallel; the first protection subcircuit 1022 includes a second protection element, or at least two second protection elements connected in series and/or in parallel. For the convenience of introduction, the following is an example of the number of elements included in the first protection circuit 101, the first capacitor subcircuit 1021 and the first protection subcircuit 1022 being one.

Exemplarily, see FIG. 3, which is another structural schematic diagram of a terminal device provided in an embodiment of the present application. As shown in FIG. 3, the terminal device 1 includes a protection circuit 10 and a device port 11, the device port 11 includes a first end and a power supply end, and the protection circuit 10 includes a first protection circuit 101 and a second protection circuit 102. One end of the first protection circuit 101 is connected to the first end, the other end of the first protection circuit 101 is connected to one end of the second protection circuit 102, and the other end of the second protection circuit 102 is connected to the reference ground. The second protection circuit 102 includes a first capacitor subcircuit 1021 and a first protection subcircuit 1022 connected in parallel. Among them, the first protection circuit 101 is a first protection element TVS11, the first capacitor subcircuit 1021 is a capacitor C1, and the first protection subcircuit 1022 is a second protection element TVS21.

Here, the first end can be a positive data line end or a negative data line end. This embodiment is introduced by taking the first end as the positive data line end as an example. Specifically, one end of TVS11 is connected to the positive data line end, and the other end is connected to one end formed by C1 and TVS21 in parallel (that is, one end of the second protection circuit 102), and the other end formed by C1 and TVS21 in parallel (that is, the other end of the second protection circuit 102) is connected to the reference ground. In addition, the above-mentioned first protection element and the second protection element can also be other elements with fast overvoltage protection function other than TVS, such as varistors. Moreover, the types of the first protection element and the second protection element can be the same or different.

In the case where there is liquid or foreign matter in the device port 11, causing the power supply terminal and the positive data line terminal of the device port 11 to be short-circuited, when the external device instantaneously outputs a first voltage to the positive data line terminal through the power supply terminal of the device port 11, that is, when the voltage at the positive data line terminal of the device port 11 instantaneously reaches the first voltage, C1 is equivalent to a short-circuit state, and because the first voltage is greater than the first voltage threshold (that is, the turn-on voltage of TVS11), TVS11 is turned on. Then, when the voltage at the positive data line terminal of the device port 11 instantaneously reaches the first voltage, the protection circuit 10 can discharge the first voltage to the reference ground through the turned-on TVS11 and the short-circuited C1, thereby effectively realizing overvoltage protection of the positive data line terminal of the device port 11 by an instantaneous voltage greater than the first voltage threshold, so as to realize overvoltage protection of the device port 11, thereby improving the instantaneous DC tolerance of the device port 11.

When the voltage at the positive data line end of the device port 11 is continuously at the first voltage, C1 is equivalent to an open circuit state, and because the first voltage is greater than the second voltage threshold (i.e., the sum of the turn-on voltage of TVS11 and the turn-on voltage of TVS21), TVS11 and TVS21 are both turned on. Then, when the voltage at the positive data line end of the device port 11 is continuously at the first voltage, the protection circuit 10 discharges the first voltage to the reference ground through the turned-on TVS11 and TVS21, thereby effectively realizing overvoltage protection of the positive data line end of the device port 11 by a long-term voltage greater than the second voltage threshold, so as to realize overvoltage protection of the device port 11, thereby improving the long-term DC tolerance of the device port 11. It should be noted that the turn-on voltage of TVS in this application refers to the minimum breakdown voltage of TVS.

Optionally, the second protection circuit 102 further includes a first resistor subcircuit 1023 connected in parallel with the first capacitor subcircuit 1021, wherein the first resistor subcircuit 1023 includes a resistor, or at least two resistors connected in series and/or in parallel. Here, the number and connection relationship of the resistors included in the first resistor subcircuit 1023 can be appropriately changed according to the requirements for the discharge speed of the capacitor in the first capacitor subcircuit 1021, which has high flexibility.

For the convenience of introduction, this embodiment is described by taking the first resistor subcircuit 1023 including the resistor R1 as an example. After there is no voltage at the positive data line end of the device port 11, the energy stored in C1 when the voltage at the positive data line end is continuously greater than the second voltage threshold is discharged through R1, thereby ensuring that when the voltage at the positive data line end of the device port 11 is continuously greater than the second voltage threshold next time, the protection circuit 10 can still achieve long-term overvoltage protection for the positive data line end, thereby achieving overvoltage protection for the device port 11.

It can be understood that no matter whether the voltage at the positive data line end of the device port 11 is instantaneously greater than the first voltage threshold or continuously greater than the second voltage threshold, the overvoltage protection of the positive data line end of the device port 11 can be effectively achieved through the characteristics of TVS11 and TVS21 to quickly discharge energy, as well as the working characteristics of C1, so as to achieve overvoltage protection of the device port 11, thereby improving the DC tolerance of the device port 11, and further protecting the subsequent circuits of the device port 11 (such as the audio switch 12 and the SOC13). In addition, since the surge resistance of the protection circuit 10 is equivalent to the single TVS level when the protection circuit 10 performs instantaneous overvoltage protection; and the surge resistance of the protection circuit 10 is equivalent to the dual TVS level when the protection circuit 10 performs long-term overvoltage protection, the surge resistance of the protection circuit 10 can maintain at least one TVS level, and the applicability is strong.

Furthermore, in order to simultaneously realize overvoltage protection for the first end and the second end of the device port 11 and further improve the DC tolerance capability of the device port 11, it can be achieved by adding a third protection circuit and a fourth protection circuit with the same functions as the first protection circuit 101 and the second protection circuit 102 at the second end of the device port 11 on the basis of the protection circuit 10 shown in Figure 2.

Please refer to Figure 4, which is a schematic diagram of the structure of another terminal device provided in an embodiment of the present application. As shown in Figure 4, the device port 11 includes a first end (i.e., a positive data line end) and a second end (i.e., a negative data line end), and the protection circuit 10 also includes a third protection circuit 103 and a fourth protection circuit 104. The third protection circuit 103 is connected in series with the fourth protection circuit 104, one end of the third protection circuit 103 is connected to the negative data line end, and one end of the fourth protection circuit 104 is connected to the reference ground. Among them, the fourth protection circuit 104 includes a second capacitor subcircuit 1041 and a fourth protection subcircuit 1042 connected in parallel.

It should be noted that the number of elements included in the third protection circuit 103, the second capacitor subcircuit 1041, and the fourth protection subcircuit 1042 in the present application can be changed accordingly according to actual needs, so the present application does not limit the number of elements included in the third protection circuit 103, the second capacitor subcircuit 1041, and the fourth protection subcircuit 1042. Specifically, the third protection circuit 103 includes a first protection element, or at least two first protection elements connected in series and/or in parallel; the second capacitor subcircuit 1041 includes a capacitor, or at least two capacitors connected in series and/or in parallel; the fourth protection subcircuit 1042 includes a second protection element, or at least two second protection elements connected in series and/or in parallel. For the convenience of introduction, this embodiment takes the number of elements included in the third protection circuit 103, the second capacitor subcircuit 1041, and the fourth protection subcircuit 1042 as one as an example for introduction.

As shown in FIG4 , the third protection circuit 103 is a first protection element TVS41, the second capacitor subcircuit 1041 is a capacitor C2, and the fourth protection subcircuit 1042 is a second protection element TVS51. One end of TVS41 is connected to the negative data line end of the device port 11, and the other end is connected to one end formed by C2 and TVS51 in parallel (i.e., the other end of the fourth protection circuit 104), and the other end formed by C2 and TVS51 in parallel (i.e., one end of the fourth protection circuit 104) is connected to the reference ground.

In the case where there is liquid or foreign matter in the device port 11, causing the power supply terminal of the device port 11 to be short-circuited with the positive data line terminal and the negative data line terminal, the specific implementation method of the first protection circuit 101 and the second protection circuit 102 to implement overvoltage protection for the positive data line terminal can be found in the description of the corresponding part of the embodiment shown in Figure 3, which will not be repeated here.

When the external device instantaneously outputs a first voltage to the negative data line terminal through the power terminal of the device port 11, that is, when the voltage at the negative data line terminal of the device port 11 instantaneously reaches the first voltage, C2 is equivalent to a short-circuit state, and because the first voltage is greater than the first voltage threshold (that is, the turn-on voltage of TVS41, the turn-on voltage of TVS41 is the same as the turn-on voltage of TVS11), TVS41 is turned on, then when the voltage at the negative data line terminal of the device port 11 instantaneously reaches the first voltage, the protection circuit 10 can discharge the first voltage to the reference ground through the turned-on TVS41 and the short-circuited C2, thereby effectively realizing overvoltage protection of the negative data line terminal of the device port 11 by an instantaneous voltage greater than the first voltage threshold, so as to realize overvoltage protection of the device port 11, thereby improving the instantaneous DC tolerance of the device port 11.

When the voltage at the negative data line terminal of the device port 11 is continuously at the first voltage, C2 is equivalent to an open circuit state, and since the first voltage is greater than the second voltage threshold (i.e., the sum of the turn-on voltage of TVS41 and the turn-on voltage of TVS51, the sum of the turn-on voltage of TVS41 and the turn-on voltage of TVS51 is the same as the sum of the turn-on voltage of TVS11 and the turn-on voltage of TVS21), TVS41 and TVS51 are both turned on. Then, when the voltage at the negative data line terminal of the device port 11 is continuously at the first voltage, the protection circuit 10 discharges the first voltage to the reference ground through the turned-on TVS41 and TVS51, thereby effectively realizing overvoltage protection of the negative data line terminal of the device port 11 by a long-term voltage greater than the second voltage threshold, so as to realize overvoltage protection of the device port 11, thereby improving the long-term DC tolerance of the device port 11.

Optionally, the fourth protection circuit 104 further includes a second resistor subcircuit 1043 connected in parallel with the second capacitor subcircuit 1041, wherein the second resistor subcircuit 1043 includes a resistor, or at least two resistors connected in series and/or in parallel. Here, the number and connection relationship of the electrodes included in the second electrode subcircuit 1043 can be appropriately changed according to the requirements for the discharge speed of the capacitor in the second capacitor subcircuit 1041, with high flexibility.

For the convenience of introduction, this embodiment is described by taking the second resistor subcircuit 1043 including the resistor R2 as an example. After there is no voltage at the negative data line end of the device port 11, the energy stored in C2 when the voltage at the negative data line end is continuously greater than the second voltage threshold is discharged through R2, thereby ensuring that when the voltage at the negative data line end of the device port 11 is continuously greater than the second voltage threshold next time, the protection circuit 10 can still achieve long-term overvoltage protection for the negative data line end, thereby achieving overvoltage protection for the device port 11.

It can be understood that no matter whether the voltage at the positive data line end and the voltage at the negative data line end of the device port 11 are instantaneously greater than the first voltage threshold or continuously greater than the second voltage threshold, the TVS in FIG4 can be used to quickly discharge energy and the working characteristics of the capacitor to simultaneously achieve overvoltage protection for the positive data line end and the negative data line end of the device port 11, thereby achieving overvoltage protection for the device port 11, thereby improving the DC tolerance of the device port 11, and further achieving protection for the subsequent circuits of the device port 11 (such as the audio switch 12 and the SOC 13). In addition, since the surge resistance of the protection circuit 10 is equivalent to the single TVS level when the protection circuit 10 performs instantaneous overvoltage protection; and the surge resistance of the protection circuit 10 is equivalent to the dual TVS level when the protection circuit 10 performs long-term overvoltage protection, the surge resistance of the protection circuit 10 can maintain at least one TVS level, and has strong applicability.

Furthermore, in order to simultaneously realize overvoltage protection for the first end and the second end of the device port 11 and further improve the DC tolerance capability of the device port 11, it can be achieved by adding a TVS with the same function as TVS11 in the first protection circuit 101 between the second end of the device port 11 and the second protection circuit 102 on the basis of the protection circuit 10 shown in FIG. 2.

Please refer to Figure 5, which is a schematic diagram of the structure of another terminal device provided in an embodiment of the present application. As shown in Figure 5, the first protection circuit 101 includes a second protection subcircuit 1011 and a third protection subcircuit 1012. Among them, one end of the second protection subcircuit 1011 is connected to the first end (i.e., the positive data line end), one end of the third protection subcircuit 1012 is connected to the second end (i.e., the negative data line end), the other end of the second protection subcircuit 1011 and the other end of the third protection subcircuit 1012 are both connected to one end of the second protection circuit 102, and the other end of the second protection circuit 102 is connected to the reference ground.

It should be noted that the third protection subcircuit 1012 includes a first protection element, or at least two first protection elements connected in series and/or in parallel, and the number of first protection elements included in the third protection subcircuit 1012 and the connection relationship between the first protection elements when the number is multiple are consistent with those of the second protection subcircuit 1011. Therefore, when the second protection subcircuit 1011 is TVS11, the third protection subcircuit 1012 is TVS31.

Specifically, one end of TVS11 and one end of TVS31 are connected to the positive data line end and the negative data line end respectively, and the other end of TVS11 and the other end of TVS31 are both connected to one end formed by C1 and TVS21 in parallel (i.e., one end of the second protection circuit 102), and the other end formed by C1 and TVS21 in parallel (i.e., the other end of the second protection circuit 102) is connected to the reference ground.

In the case where there is liquid or foreign matter in the device port 11, causing the power supply terminal of the device port 11 to be short-circuited with the positive data line terminal and the negative data line terminal, when the voltage at the positive data line terminal and the voltage at the negative data line terminal of the device port 11 both instantaneously reach the first voltage, C1 is equivalent to a short-circuit state, and because the first voltage is greater than the first voltage threshold (i.e., the turn-on voltage of TVS11, i.e., the turn-on voltage of TVS31), TVS11 and TVS31 are both turned on, then when the voltage at the positive data line terminal and the voltage at the negative data line terminal of the device port 11 both reach the first voltage, C1 is equivalent to a short-circuit state. When the voltage average instantaneously reaches the first voltage, the protection circuit 10 can discharge the first voltage at the positive data line end to the reference ground through the turned-on TVS11 and the short-circuited C1, and discharge the first voltage at the negative data line end to the reference ground through the turned-on TVS31 and the short-circuited C1, thereby effectively realizing overvoltage protection of the positive data line end and the negative data line end of the device port 11 by an instantaneous voltage greater than the first voltage threshold, thereby realizing overvoltage protection of the device port 11, thereby improving the instantaneous DC tolerance of the device port 11.

When the positive data line voltage and the negative data line terminal voltage of the device port 11 are continuously at the first voltage, C1 is equivalent to an open circuit state, and because the first voltage is greater than the second voltage threshold (i.e., the sum of the turn-on voltage of TVS11 and the turn-on voltage of TVS21), TVS11, TVS21 and TVS31 are all turned on. Then, when the positive data line terminal voltage and the negative data line terminal voltage of the device port 11 are continuously at the first voltage, the protection circuit 10 discharges the first voltage of the positive data line terminal to the reference ground through the turned-on TVS11 and TVS21, and discharges the first voltage of the negative data line terminal to the reference ground through the turned-on TVS31 and TVS21, thereby effectively realizing overvoltage protection of the positive data line terminal and the negative data line terminal of the device port 11 by a long-term voltage greater than the second voltage threshold, so as to realize overvoltage protection of the device port 11, thereby improving the long-term DC tolerance capability of the device port 11.

After there is no longer any voltage at the positive data line terminal and the negative data line terminal of the device port 11, the energy stored in C1 when both the negative data line terminal voltage and the positive data line terminal voltage are instantaneously greater than the first voltage threshold or when both the negative data line terminal voltage and the positive data line terminal voltage are continuously greater than the second voltage threshold is discharged through R1, thereby ensuring that when the positive data line terminal voltage and the negative data line terminal voltage of the device port 11 are instantaneously greater than the first voltage threshold or continuously greater than the second voltage threshold next time, the protection circuit 10 can still achieve instantaneous overvoltage protection and long-term overvoltage protection for the positive data line terminal and the negative data line terminal, so as to achieve overvoltage protection for the device port 11.

It can be understood that the protection circuit 10 shown in FIG5 can simultaneously implement overvoltage protection for the positive data line terminal and the negative data line terminal, thereby better implementing overvoltage protection for the device port 11, and further improving the DC tolerance of the device port 11. In addition, each circuit and each sub-circuit in the protection circuit 10 shown in FIG5 uses the least components, so it can also effectively save circuit costs and has stronger applicability.

It should be noted that the number of components included in each protection circuit and each protection subcircuit in the protection circuit 10, and the specific connection method of multiple components when the number of components is multiple, is determined by the maximum withstand voltage of the subsequent circuit of the device port 11 and the requirement for the surge resistance of the terminal device. The protection circuit 10 is introduced below by taking the maximum withstand voltage of the subsequent circuit of the device port 11 as 30V and the requirement for the surge resistance of the terminal device 1 as at least two TVS levels as an example.

Exemplarily, it is assumed that the turn-on voltage of TVS is 8.5V. Referring to FIG6 , FIG6 is another schematic diagram of the structure of the terminal device provided in an embodiment of the present application. As shown in FIG6 , the first protection circuit 101 includes a second protection subcircuit 1011 and a third protection subcircuit 1012, the second protection subcircuit 1011 includes TVS11 and TVS12 in parallel, and the third protection subcircuit 1012 includes TVS31 and TVS32 in parallel. The second protection circuit 102 includes a first capacitor subcircuit 1021, a first protection subcircuit 1022 and a first resistor subcircuit 1023, wherein the first capacitor subcircuit 1021 is C1, the first protection subcircuit 1022 is TVS21 and TVS22 connected in series, and the first resistor subcircuit 1023 is R1.

Specifically, one end formed by TVS11 and TVS12 being connected in parallel (i.e., one end of the second protection sub-circuit 1011), and one end formed by TVS31 and TVS32 being connected in parallel (i.e., one end of the third protection sub-circuit 1012), are respectively connected to the first end (i.e., the positive data line end) and the second end (i.e., the negative data line end), and the other end formed by TVS11 and TVS12 being connected in parallel (i.e., the other end of the second protection sub-circuit 1011), and the other end formed by TVS31 and TVS32 being connected in parallel (i.e., the other end of the third protection sub-circuit 1012) are both connected to one end formed by the first capacitor sub-circuit 1021 and the first protection sub-circuit 1022 being connected in parallel (i.e., one end of the second protection circuit 102), and one end formed by the first capacitor sub-circuit 1021 and the first protection sub-circuit 1022 being connected in parallel (i.e., one end of the second protection circuit 102) is connected to the reference ground.

In the case where there is liquid or foreign matter in the device port 11, causing the power supply terminal of the device port 11 to be short-circuited with the positive data line terminal and the negative data line terminal, when the voltage of the positive data line terminal and the voltage of the negative data line terminal of the device port 11 instantaneously reach the first voltage, C1 is equivalent to a short-circuit state, and since the first voltage is greater than the first voltage threshold (i.e., the TVS turn-on voltage of 8.5V), and since the turn-on voltages of TVS11, TVS12, TVS31 and TVS32 are all 8.5V, TVS11, TVS12, TVS31 and TVS32 are all turned on, When the positive data line terminal voltage and the negative data line terminal voltage of the device port 11 instantaneously reach the first voltage, the protection circuit 10 can discharge the first voltage of the positive data line terminal to the reference ground through the turned-on TVS11 and TVS12, and the short-circuited C1, and discharge the first voltage of the negative data line terminal to the reference ground through the turned-on TVS31 and TVS32, and the short-circuited C1, thereby realizing instantaneous overvoltage protection for the positive data line terminal and the negative data line terminal, thereby realizing overvoltage protection for the device port 11, thereby improving the instantaneous DC tolerance capability of the device port 11.

When the positive data line terminal voltage and the negative data line terminal voltage of the device port 11 are both continuously at the first voltage, C1 is equivalent to an open circuit state, and because the first voltage is greater than the second voltage threshold (i.e., the turn-on voltage of the three TVSs is 25.5V), all TVSs in Figure 6 are in the on state at this time. Then, when the positive data line terminal voltage and the negative data line terminal voltage of the device port 11 are both continuously at the first voltage, the protection circuit 10 discharges the first voltage of the positive data line terminal to the reference ground through the turned-on TVS11, TVS12, TVS21 and TVS22, and discharges the first voltage of the negative data line terminal to the reference ground through the turned-on TVS31, TVS32, TVS21 and TVS22, thereby realizing long-term overvoltage protection for the positive data line terminal and the negative data line terminal, so as to realize overvoltage protection for the device port 11, thereby improving the long-term DC tolerance capability of the device port 11.

After there is no longer any voltage at the positive data line terminal and the negative data line terminal of the device port 11, the energy stored in C1 when the negative data line terminal voltage and the positive data line terminal voltage are continuously greater than the second voltage threshold is discharged through R1, thereby ensuring that when the positive data line terminal voltage and the negative data line terminal voltage of the device port 11 are continuously greater than the second voltage threshold next time, the protection circuit 10 can still achieve long-term overvoltage protection for the positive data line terminal and the negative data line terminal, thereby achieving overvoltage protection for the device port 11.

It can be understood that the protection circuit 10 shown in FIG6 can realize instantaneous overvoltage protection for the device port 11 when the positive data line terminal voltage and the negative data line terminal voltage of the device port 11 instantaneously reach 8.5V; the protection circuit 10 shown in FIG5 can also realize long-term overvoltage protection for the device port 11 when the positive data line terminal voltage and the negative data line terminal voltage of the device port 11 are continuously not less than 25.5V. Therefore, the protection circuit 10 can ensure that the device port 11 can still work normally under the DC voltage of 25.5V when its positive data line terminal voltage and negative data line terminal voltage are 25.5V. At the same time, the protection circuit 10 can be triggered to perform overvoltage protection when the positive data line terminal voltage and the negative data line terminal voltage are less than the maximum tolerance voltage of the subsequent circuit, thereby realizing the protection of the device port 11 and the subsequent circuit of the device port 11. In addition, it can be seen from the structure of the protection circuit 10 shown in FIG6 that the surge resistance of the protection circuit 10 when performing overvoltage protection is maintained at at least two TVS levels.

Exemplarily, it is assumed that the turn-on voltage of the TVS is 8.5V and the varistor voltage is 17V. Referring to FIG. 7 , FIG. 7 is another schematic diagram of the structure of the terminal device provided in an embodiment of the present application. Compared with the first protection subcircuit 1022 in FIG. 6 being two TVSs connected in series, as shown in FIG. 7 , the first protection subcircuit 101 here is a varistor R3. Here, for the specific connection method between each circuit and each subcircuit in the protection circuit 10, please refer to the description of the corresponding part in the embodiment shown in FIG. 6 , which will not be repeated here.

In the case where there is liquid or foreign matter in the device port 11, causing the power supply terminal of the device port 11 to be short-circuited with the positive data line terminal and the negative data line terminal, when the voltage of the positive data line terminal and the voltage of the negative data line terminal of the device port 11 instantaneously reach the first voltage, C1 is equivalent to a short-circuit state, and because the first voltage is greater than the first voltage threshold (i.e., the TVS turn-on voltage of 8.5V), the turn-on voltages of TVS11, TVS12, TVS31 and TVS32 are all 8.5V, and TVS11, TVS12, TVS31 and TVS32 are all turned on. Then, when When the positive data line terminal voltage and the negative data line terminal voltage of the device port 11 instantaneously reach the first voltage, the protection circuit 10 can discharge the first voltage of the positive data line terminal to the reference ground through the turned-on TVS11 and TVS12, and the short-circuited C1, and discharge the first voltage of the negative data line terminal to the reference ground through the turned-on TVS31 and TVS32, and the short-circuited C1, thereby realizing instantaneous overvoltage protection for the positive data line terminal and the negative data line terminal, so as to realize overvoltage protection for the device port 11, thereby improving the instantaneous DC tolerance capability of the device port 11.

When the voltage at the positive data line end and the voltage at the negative data line end of the device port 11 are both continuously at the first voltage, C1 is equivalent to an open circuit state, and because the first voltage is greater than the second voltage threshold (i.e., the sum of the TVS turn-on voltage and the varistor voltage of the varistor 25.5V), TVS21 and TVS22 are both turned on, and the impedance of R2 decreases rapidly. When the voltage at the positive data line end of the device port 11 is continuously at the first voltage, all TVSs in FIG. 7 are in a conducting state, and the impedance of the varistor R3 decreases rapidly. The protection circuit 10 discharges the first voltage at the positive data line end to the reference ground through the turned-on TVS11 and TVS12, and the R2 with rapidly reduced impedance, and discharges the first voltage at the negative data line end to the reference ground through the turned-on TVS31 and TVS32, and the R2 with rapidly reduced impedance, to achieve long-term overvoltage protection for the positive data line end and the negative data line end, so as to achieve overvoltage protection for the device port 11, thereby improving the long-term DC tolerance of the device port 11.

After there is no longer any voltage at the positive data line terminal and the negative data line terminal of the device port 11, the energy stored in C1 when the negative data line terminal voltage and the positive data line terminal voltage are continuously greater than the second voltage threshold is discharged through R1, thereby ensuring that when the positive data line terminal voltage and the negative data line terminal voltage of the device port 11 are continuously greater than the second voltage threshold next time, the protection circuit 10 can still achieve long-term overvoltage protection for the positive data line terminal and the negative data line terminal, thereby achieving overvoltage protection for the device port 11.

It can be understood that the protection circuit 10 shown in FIG. 7 can also realize instantaneous overvoltage protection for the device port 11 when the positive data line terminal voltage and the negative data line terminal voltage of the device port 11 instantaneously reach 8.5V; the protection circuit 10 shown in FIG. 5 can also realize long-term overvoltage protection for the device port 11 when the positive data line terminal voltage and the negative data line terminal voltage of the device port 11 are continuously not less than 25.5V. Therefore, the protection circuit 10 can ensure that the device port 11 can still work normally under the DC voltage of 25.5V when its positive data line terminal voltage and negative data line terminal voltage are 25.5V. At the same time, the protection circuit 10 can be triggered to perform overvoltage protection when the positive data line terminal voltage and the negative data line terminal voltage are less than the maximum tolerance voltage of the subsequent circuit, thereby realizing the protection of the device port 11 and the subsequent circuit of the device port 11. In addition, it can be seen from the structure of the protection circuit 10 shown in FIG. 7 that the surge resistance of the protection circuit 10 when performing overvoltage protection is maintained at at least two TVS levels.

It can be further known that the present application can improve the surge resistance of the terminal device 1 by increasing the number of first protection elements connected in parallel in the second protection sub-circuit 1011, the number of first protection elements connected in parallel in the third protection sub-circuit 1012, and the number of second protection elements connected in parallel in the first protection sub-circuit 1022, at least one of the three methods. It can also improve the DC tolerance of the device port 11 by increasing the number of second protection elements connected in series in the first protection sub-circuit 1022. Therefore, the protection circuit 10 can meet the actual needs in different application scenarios by adjusting at least one circuit in the first protection circuit 101 and the first protection sub-circuit 1022, and has strong applicability.

The above are only specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims (8)

1. A protection circuit, characterized in that the protection circuit is connected to a device port, the device port includes a first end and a second end, the protection circuit includes a first protection circuit and a second protection circuit, the first protection circuit includes a second protection subcircuit and a third protection subcircuit, one end of the second protection subcircuit is connected to the first end, one end of the third protection subcircuit is connected to the second end, the other end of the second protection subcircuit and the other end of the third protection subcircuit are both connected to one end of the second protection circuit, the other end of the second protection circuit is connected to a reference ground, the second protection circuit includes a first capacitor subcircuit, a first protection subcircuit and a first resistor subcircuit connected in parallel, wherein: The second protection subcircuit reduces the impedance of the second protection subcircuit when the first terminal voltage is greater than a first voltage threshold, so as to reduce the first terminal voltage; The third protection subcircuit reduces the impedance of the third protection subcircuit when the second terminal voltage is greater than the first voltage threshold, so as to reduce the second terminal voltage; The first protection circuit and the first protection subcircuit reduce their respective impedances to reduce the device port voltage when the device port voltage is greater than a second voltage threshold, and the second voltage threshold is greater than the first voltage threshold; The first capacitor subcircuit discharges through the first resistor subcircuit after the voltage at the device port is zero. 2 . The protection circuit according to claim 1 , wherein the second protection sub-circuit and the third protection sub-circuit both comprise: a first protection element, or at least two first protection elements connected in series and/or in parallel. 3 . The protection circuit according to claim 1 , wherein the first resistance subcircuit comprises one resistor, or at least two resistors connected in series and/or in parallel. 4 . The protection circuit according to claim 1 , wherein the first protection subcircuit comprises a second protection element, or at least two second protection elements connected in series and/or in parallel. 5 . The protection circuit according to claim 4 , wherein the second protection element comprises a transient diode or a varistor. 6 . The protection circuit according to claim 2 , wherein the first protection element comprises a transient diode or a varistor. 7 . The protection circuit according to claim 1 , wherein the device port comprises a USB port. 8. A terminal device, characterized in that the terminal device comprises the protection circuit and the device port according to any one of claims 1 to 7.