CN114724503B - Voltage control circuit, display panel driving chip, display panel and electronic equipment - Google Patents
Voltage control circuit, display panel driving chip, display panel and electronic equipment Download PDFInfo
- Publication number
- CN114724503B CN114724503B CN202210382946.3A CN202210382946A CN114724503B CN 114724503 B CN114724503 B CN 114724503B CN 202210382946 A CN202210382946 A CN 202210382946A CN 114724503 B CN114724503 B CN 114724503B
- Authority
- CN
- China
- Prior art keywords
- transistor
- pole
- display panel
- frequency parameter
- image data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
Abstract
The present disclosure relates to a voltage control circuit, display panel driver chip, display panel and electronic equipment, voltage control circuit connects drive circuit's first signal end, and first signal end is used for resetting drive circuit, and voltage control circuit includes: an acquisition unit configured to acquire a first frequency parameter associated with a second frequency parameter of the application processor side output image data; the control unit is used for controlling the voltage value of the first signal end according to the first frequency parameter, so that the change rule of the voltage value of the first signal end is opposite to the change rule of the first frequency parameter. According to the voltage control circuit, the probability of flickering of the light emitting device during frame frequency switching can be reduced, and the image display quality is improved.
Description
Technical Field
The disclosure relates to the field of display technologies, and in particular, to a voltage control circuit, a display panel driving chip, a display panel and an electronic device.
Background
Along with the continuous development of science and technology, more and more electronic devices with display functions are widely applied to daily life and work of people, bring great convenience to daily life and work of people, and become an indispensable important tool for people at present. The main component of the electronic apparatus that realizes the display function is a display panel, which is generally provided with a plurality of light emitting devices, and a driving circuit for driving the plurality of light emitting devices to emit light. In the prior art, when a light emitting device for driving a display panel emits light, flicker risks may exist if frame frequency switching is encountered, so that image display quality is affected.
Disclosure of Invention
In view of this, the present disclosure proposes a voltage control circuit, a display panel driving chip, a display panel, and an electronic apparatus, according to which the probability of occurrence of flicker of a light emitting device at the time of frame rate switching can be reduced, and image display quality can be improved.
According to an aspect of the present disclosure, there is provided a voltage control circuit connected to a first signal terminal of a driving circuit, the first signal terminal being used for resetting the driving circuit, the voltage control circuit comprising: an acquisition unit configured to acquire a first frequency parameter associated with a second frequency parameter of the application processor side output image data; the control unit is used for controlling the voltage value of the first signal end according to the first frequency parameter so that the change rule of the voltage value of the first signal end is opposite to the change rule of the first frequency parameter.
In one possible implementation, the voltage control circuit further includes: the output unit is used for outputting a tearing effect signal to the application processor in a preset mode, and the first frequency parameter is the frequency for outputting the tearing effect signal; a receiving unit configured to receive the image data generated by the application processor; when any frame of image data is received, the first frequency parameter is equal to the second frequency parameter of the frame of image data.
In a possible implementation manner, the first frequency parameter includes N preset values, where N is an integer greater than 1, and each preset value corresponds to a preset period of time, and the preset manner includes: if the image data is received in the 1 st time period after the first time point of one frame of image data is received, outputting the tearing effect signal by taking the 1 st preset value as a first frequency parameter; if no image data is received in the 1 st to M-1 st time period after the first time point of one frame of image data is received, outputting the tearing effect signal by taking the M preset value as a first frequency parameter in the M time period, wherein M is more than or equal to 2 and less than or equal to N and is an integer.
In one possible implementation manner, the preset manner further includes: if no image data is received in the 1 st to N th time periods after the first time point of one frame of image data is received, the tearing effect signal is output to the application processor in a preset mode again by taking the ending time point of the N th time period as a new first time point.
In one possible implementation, the driving circuit includes a first transistor and a second transistor connected between the gate of the first transistor and the first signal terminal, the first transistor being configured to provide a driving current for the light emitting device.
In one possible implementation, a first pole of the second transistor is connected to the first transistor gate, and a second pole of the second transistor is connected to the first signal terminal, and the driving circuit further includes: a third transistor, a first pole of the third transistor being connected to the first pole of the second transistor, a second pole of the third transistor being connected to the first pole of the first transistor; a first electrode of the fourth transistor is connected with a second electrode of the first transistor, and a second electrode of the fourth transistor is connected with a second signal end; a fifth transistor, a first pole of which is connected to the third signal terminal, and a second pole of which is connected to the second pole of the first transistor and the first pole of the fourth transistor; a sixth transistor, a first pole of the sixth transistor being connected to the first pole of the first transistor and a second pole of the third transistor, the second pole of the sixth transistor being connected to an anode of the light emitting device; a seventh transistor, a first electrode of which is connected to a second electrode of the sixth transistor and an anode of the light emitting device, and a second electrode of which is connected to the first signal terminal; the cathode of the light-emitting device is connected with a fourth signal end; and the first end of the first capacitor is connected with the third signal end, and the second end of the first capacitor is connected with the first pole of the second transistor, the grid electrode of the first transistor and the first pole of the third transistor.
According to another aspect of the present disclosure, there is provided a display panel driving chip including the voltage control circuit of any one of the above, and the driving circuit.
According to another aspect of the present disclosure, there is provided a display panel including the above-described display panel driving chip.
In one possible implementation, the display panel is one of a liquid crystal display panel, a micro light emitting diode display panel, a mini light emitting diode display panel, a quantum dot light emitting diode display panel, and an organic light emitting diode display panel.
According to another aspect of the present disclosure, there is provided an electronic device including the display panel described above.
In one possible implementation, the electronic device includes a display, a smart phone, or a portable device.
According to the voltage control circuit of the embodiment of the disclosure, since the first frequency parameter is associated with the second frequency parameter of the output image data of the application processor side, the frequency information of the output image data of the application processor side can be obtained by obtaining the first frequency parameter, so that when the first frequency parameter changes, it can be determined that the second frequency parameter has changed; the voltage value of the first signal end is controlled according to the first frequency parameter, so that the change rule of the voltage value of the first signal end is opposite to the change rule of the first frequency parameter, and when the driving circuit drives the light-emitting device to emit light, the voltage value of the first signal end correspondingly changes along with the change of the second frequency parameter, and the current flowing through the light-emitting device can be more stable. The second frequency parameter, namely the frame frequency, of the image data is output by the processor side, so that even if the second frequency parameter changes, namely the frame frequency is switched, the current flowing through the light emitting device is more stable due to the change of the voltage value of the first signal end, the brightness stability of the light emitting device is improved, the flicker probability of the light emitting device can be reduced, and the display quality of images is improved.
Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments, features and aspects of the present disclosure and together with the description, serve to explain the principles of the disclosure.
Fig. 1 illustrates an exemplary application scenario of a voltage control circuit according to an embodiment of the present disclosure.
Fig. 2 shows an exemplary structural schematic diagram of the driving circuit 10 according to an embodiment of the present disclosure.
Fig. 3 is a timing chart showing the signal voltage for controlling the on or off of each transistor, the voltage of the first signal terminal, and the voltage of the node N1 in the prior art.
Fig. 4a shows an exemplary structural schematic diagram of the voltage control circuit 20 according to an embodiment of the present disclosure.
Fig. 4b shows one example of making the voltage value of the first signal terminal (Vinit) high according to an embodiment of the present disclosure.
Fig. 5 shows an exemplary structural schematic diagram of the voltage control circuit 20 according to an embodiment of the present disclosure.
Fig. 6 shows an exemplary structural schematic diagram of the driving circuit 10 according to an embodiment of the present disclosure.
Detailed Description
Various exemplary embodiments, features and aspects of the disclosure will be described in detail below with reference to the drawings. In the drawings, like reference numbers indicate identical or functionally similar elements. Although various aspects of the embodiments are illustrated in the accompanying drawings, the drawings are not necessarily drawn to scale unless specifically indicated.
The word "exemplary" is used herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
In addition, numerous specific details are set forth in the following detailed description in order to provide a better understanding of the present disclosure. It will be understood by those skilled in the art that the present disclosure may be practiced without some of these specific details. In some instances, methods, means, elements, and circuits well known to those skilled in the art have not been described in detail in order not to obscure the present disclosure.
Fig. 1 illustrates an exemplary application scenario of a voltage control circuit according to an embodiment of the present disclosure. As shown in fig. 1, the voltage control circuit of the present disclosure may be disposed on a display panel driving chip, which further includes a driving circuit operable to drive a light emitting device (not shown) on the display panel to cause the display panel to display one frame of image data. The display panel may be in communication with an application processor (Application Processor, AP) and image data displayed by the display panel may be rendered by the application processor. An application processor (Application Processor, AP) is a very large scale integrated circuit which expands audio and video functions and dedicated interfaces on the basis of a low power consumption CPU.
For example, when the display panel is ready to refresh the next frame of image, a Tearing Effect (TE) signal may be generated and output to the application processor. The tearing effect signal can be used to prevent tearing problems during refreshing of the picture during image display. Examples of waveforms of the tear effect signal may be found below in the example of TE signal of fig. 4 b. The application processor may send image data of a next frame of image to the display panel driving chip after hearing a rising edge of the tearing effect signal or after detecting that the tearing effect signal is in a high level state. The voltage control circuit may be used to adjust the voltage supplied to the driving circuit during a process in which the display panel displays one frame of image data. Alternatively, the tearing effect signal may also be issued by the voltage control circuit.
Fig. 2 shows an exemplary structural schematic diagram of the driving circuit 10 according to an embodiment of the present disclosure. The principle of driving the light emitting device to emit light by the driving circuit will be described with reference to fig. 2.
As shown in fig. 2, the driving circuit 10 may include transistors T1 to T7, a light emitting device D1, and a capacitor CST, wherein the transistor T1 is a driving transistor. The first pole T21 of the transistor T2 is connected to the gate T13 of the transistor T1, and the second stage T22 of the transistor T2 is connected to the first signal terminal Vinit. The gate T23 of transistor T2 receives a Reset signal Reset-N.
The first pole T31 of the transistor T3 is connected to the first pole T21 of the transistor T2, and the second pole T32 of the transistor T3 is connected to the first pole T11 of the transistor T1; the Gate T33 of the transistor T3 receives the first row scan signal Gate-N.
The first pole T41 of the transistor T4 is connected to the second pole T12 of the transistor T1, and the second pole T42 of the transistor T4 is connected to the second signal terminal Data; the Gate T43 of the transistor T4 receives the second row scan signal Gate-P.
The first pole T51 of the transistor T5 is connected to the third signal terminal ELVDD, and the second pole T52 of the transistor T5 is connected to the second pole T12 of the transistor T1 and the first pole T41 of the transistor T4; the gate T53 of the transistor T5 receives the enable signal EM.
The first pole T61 of the transistor T6 is connected to the first pole T11 of the transistor T1 and the second pole T32 of the transistor T3, and the second pole T62 of the transistor T6 is connected to the anode of the light emitting device D1; the gate T63 of the transistor T6 receives the enable signal EM.
The first pole T71 of the transistor T7 is connected to the second pole T62 of the transistor T6 and the anode of the light emitting device D1, and the second pole T72 of the transistor T7 is connected to the first signal terminal Vinit; the Gate T73 of the transistor T7 receives the second row scan signal Gate-P. A cathode of the light emitting device D1 is connected to the fourth signal terminal ELVSS;
the first terminal c1 of the capacitor CST is connected to the third signal terminal ELVDD, and the second terminal c2 of the capacitor CST is connected to the first electrode T21 of the transistor T2, the gate T13 of the transistor T1, and the first electrode T31 of the transistor T3.
The above is exemplified by the P-type transistors as each transistor. In this case, the first pole T11 of the transistor T1 is the drain, and the second pole T12 is the source. The first pole T21 of the transistor T2 is the drain, and the second pole T22 is the source. The first pole T31 of the transistor T3 is a source, and the second pole T32 is a drain. The first pole T41 of the transistor T4 is a source, and the second pole T42 is a drain. The first pole T51 of the transistor T5 is a source, and the second pole T52 is a drain. The first pole T61 of the transistor T6 is a source and the second pole T62 is a drain. The first pole T71 of the transistor T7 is a drain, and the second pole T72 is a source. The type of each transistor in the driving circuit and the specific connection mode of the transistors are not limited, so long as the corresponding functions can be realized.
Assuming that the second terminal c2 of the capacitor CST, the first electrode T21 of the transistor T2, the gate T13 of the transistor T1, and the first electrode T31 of the transistor T3 are connected to the node N1, the gate voltage of the transistor T1 may be controlled by the voltage of the node N1, i.e., the on or off state of the transistor T1 may be controlled by the voltage of the node N1. The gate voltages of the transistors T2-T7 may be controlled by the voltages of the signals received by their gates, respectively, i.e. the turning on or off of the transistors T2-T7 may be controlled by the voltages of the signals received by their gates. Fig. 3 is a timing chart showing the signal voltage for controlling the on or off of each transistor, the voltage of the first signal terminal, and the voltage of the node N1 in the prior art.
As shown in fig. 3, one driving cycle of the driving circuit may sequentially undergo three phases of reset, compensation, and light emission. Taking each transistor as a P-type transistor as an example, in the Reset stage, the Reset signal Reset-N is low voltage, the first row scan signal Gate-N, the second row scan signal Gate-P, and the enable signal EM are high voltage, the first signal terminal Vinit is low voltage, the transistor T2 is turned on, and the rest of the transistors are turned off. In the reset phase, the capacitor CST is charged while the voltage of the node N1 is equal to the voltage of the first signal terminal Vinit, i.e., the voltage of the gate of the driving transistor T1 is reset to the voltage of Vinit.
In the compensation stage, the Reset signal Reset-N and the enable signal EM are high voltages, the first row scan signal Gate-N and the second row scan signal Gate-P are low voltages, the first signal terminal Vinit is low voltage, the transistors T2, T4 and T7 are turned on, and the rest of the transistors are turned off. In the compensation phase, the voltage V of the second signal terminal Data Data The second terminal T12 of the driving transistor T1 is written, and the anode voltage of the light emitting device D1 is reset to the voltage of the first signal terminal Vinit. Assuming that the threshold voltage of the transistor T1 is Vth, the source (second pole T12) voltage vs=v of the transistor T1 Data Gate voltage vg=v Data +Vth。
In the light emitting stage, the enable signal EM is low voltage, the Reset signal Reset-N\the first row scanning signal Gate-N and the second row scanning signal Gate-P are both high voltage, the first signal end Vinit is low voltage, the transistors T5, T1 and T6 are turned on, and the rest transistors are turned off. At this time, the gate-source voltage vgs= (V) of the transistor T1 Data +Vth)-V ELVDD The flow through luminescence can be calculated according to equation (1)The drive current of the device.
In formula (1), μ is carrier mobility of the driving transistor; cox is the capacitance between the gate and channel of the drive transistor; W/L is the width to length ratio of the drive transistor, vth is the threshold voltage of the drive transistor, vgs is the gate-source voltage of the drive transistor.
Thus, from equation (1), it can be known that the driving current i=1/2 μ×cox×w/L (V Data -V ELVDD ) 2 . Since the current I is independent of the threshold voltage Vth of the driving transistor T1, luminance uniformity of each light emitting device can be improved.
Also shown in fig. 3 is the voltage at node N1, and it can be seen that during the light-emitting phase, a leakage phenomenon occurs at node N1, resulting in a continuous decrease in the voltage at node N1. As can be seen from fig. 2, the leakage may be caused by the N1 node at the high voltage discharging to the first signal terminal Vinit at the low voltage through the transistor T2.
The frequency (i.e., frame rate) at which the application processor side renders the resulting image data may vary with application scene requirements. The refresh frequency of the image data per frame is different on the display panel side for different frame rates, and thus the duration of driving the light emitting device to emit light may be different when each frame of image is displayed. For example, at a frame rate of 120Hz, on the display panel side, the frequency of image data refresh is high, the time required for data writing is generally less than 3 μs, and the data holding time (i.e., the time required for light emission by the light emitting device) is about 8.33ms; at a frame rate of 60Hz, the refresh frequency of image data is low, the data writing time is generally less than 3 μs, and the data holding time (i.e., the time required for light emission by the light emitting device) is twice as long as that at a frequency of 120Hz, which is about 16.67ms. As can be seen from fig. 3, since the N1 node continuously leaks electricity when the light emitting device emits light, the data voltage to be written into the driving circuit needs to be adjusted when the frequency changes in order to improve the luminance stability of the light emitting device. Taking the driving circuit in fig. 3 as an example, since the driving transistor is a P-type transistor, when the frequency is changed from high to low, the data voltage written into the driving circuit can be adjusted to be reduced; when the frequency is changed from low to high, the data voltage of the write driving circuit can be adjusted to be increased.
However, if the time point of adjusting the data voltage written in the driving circuit is not consistent with the time point of frame frequency conversion, the luminance of the light emitting device is still unstable during the frame frequency conversion, resulting in a problem that the screen is easy to flicker, etc. The voltage control circuit provided by the embodiment of the disclosure can solve the problem of flickering of the light emitting device in the frame frequency conversion process by adjusting the voltage supplied to the driving circuit, and improve the image display quality.
Fig. 4a shows an exemplary structural schematic diagram of the voltage control circuit 20 according to an embodiment of the present disclosure. As shown in fig. 4a, in one possible implementation, the present disclosure provides a voltage control circuit 20, where the voltage control circuit 20 is connected to a first signal terminal (see the first signal terminal Vinit in fig. 1 and above) of the driving circuit 10, and the first signal terminal is used for resetting the driving circuit 10, and the voltage control circuit 20 includes:
an acquisition unit 201 for acquiring a first frequency parameter associated with a second frequency parameter of the application processor 30 side output image data.
The first frequency parameter may refer to the frequency at which the display panel outputs a tearing effect signal to the application processor 30. The second frequency parameter of the application processor 30 side output image data may refer to a frame rate. If the first frequency parameter is the same as the second frequency parameter of the image data output by the application processor 30, a frame of image data can be received when the display panel outputs the tearing effect signal with the first frequency parameter. If the first frequency parameter is different from the second frequency parameter of the image data output by the application processor 30, the display panel cannot receive one frame of image data when outputting the tearing effect signal with the first frequency parameter.
The control unit 202 is configured to control the voltage value of the first signal terminal Vinit according to the first frequency parameter, so that the change rule of the voltage value of the first signal terminal is opposite to the change rule of the first frequency parameter.
The first signal terminal (Vinit) may be used to reset the driving circuit 10 such that in the driving circuit 10, the transistor driving the light emitting device (see transistor T1 above and in fig. 1 for an example) is reset, for example, the gate voltage thereof is reset to be equal to the voltage value of the first signal terminal (Vinit). When the first frequency parameter is changed from high to low, the voltage value of the first signal terminal (Vinit) can be controlled to be high, and the voltage drop of the gate of the transistor (T1) for driving the light emitting device caused by electric leakage can be reduced, so that the voltage of the gate of the transistor (T1) for driving the light emitting device is more stable under the control of the voltage control circuit 20, and the current flowing through the light emitting device is also more stable. Fig. 4b shows one example of making the voltage value of the first signal terminal (Vinit) high according to an embodiment of the present disclosure. Where Vinit1 represents an example of a voltage value of the first signal terminal of the related art, and Vinit2 represents an example of a voltage value of the first signal terminal according to an embodiment of the present disclosure.
The specific value of the voltage value of the first signal terminal (Vinit) along with the change of the first frequency parameter may be preset according to the application scenario requirement, or may be determined in real time according to the voltage value of the gate of the transistor (T1) driving the light emitting device in the driving circuit 10.
According to the voltage control circuit of the embodiment of the disclosure, since the first frequency parameter is associated with the second frequency parameter of the output image data of the application processor side, the frequency information of the output image data of the application processor side can be obtained by obtaining the first frequency parameter, so that when the first frequency parameter changes, it can be determined that the second frequency parameter has changed; the voltage value of the first signal end is controlled according to the first frequency parameter, so that the change rule of the voltage value of the first signal end is opposite to the change rule of the first frequency parameter, and when the driving circuit drives the light-emitting device to emit light, the voltage value of the first signal end correspondingly changes along with the change of the second frequency parameter, and the current flowing through the light-emitting device can be more stable. The second frequency parameter, namely the frame frequency, of the image data is output by the processor side, so that even if the second frequency parameter changes, namely the frame frequency is switched, the current flowing through the light emitting device is more stable due to the change of the voltage value of the first signal end, the brightness stability of the light emitting device is improved, the flicker probability of the light emitting device can be reduced, and the display quality of images is improved.
Fig. 5 shows an exemplary structural schematic diagram of the voltage control circuit 20 according to an embodiment of the present disclosure.
As shown in fig. 5, in one possible implementation, the voltage control circuit 20 further includes:
an output unit 203, configured to output the tearing effect signal to the application processor 30 in a preset manner, where the first frequency parameter is a frequency of outputting the tearing effect signal;
a receiving unit 204 for receiving the image data generated by the application processor 30;
when any frame of image data is received, the first frequency parameter is equal to the second frequency parameter of the frame of image data.
For example, as can be seen from the above description, the display panel driving chip needs to carry the operations of outputting the tearing effect signal and receiving the image data, and the voltage control circuit 20 of the present disclosure is disposed on the display panel driving chip, so on the basis of the acquisition unit 201 and the control unit 202, the output unit 203 and the receiving unit 204 may also be disposed on the voltage control circuit 20, where the output unit 203 may be configured to output the tearing effect signal in a preset manner, and the first frequency parameter may be a frequency of outputting the tearing effect signal. The receiving unit 204 may be used to receive image data generated by the application processor 30. When the receiving unit 204 receives any frame of image data, the output unit 203 outputs a first frequency parameter of the tearing effect signal, which may be equal to a second frequency parameter of the frame of image data. In this way, it is made possible to determine the second frequency parameter from the first frequency parameter.
In a possible implementation manner, the first frequency parameter includes N preset values, where N is an integer greater than 1, and each preset value corresponds to a preset period of time, and the preset manner includes:
if the image data is received in the 1 st time period after the first time point of one frame of image data is received, outputting the tearing effect signal by taking the 1 st preset value as a first frequency parameter;
if no image data is received in the 1 st to M-1 st time period after the first time point of one frame of image data is received, outputting the tearing effect signal by taking the M preset value as a first frequency parameter in the M time period, wherein M is more than or equal to 2 and less than or equal to N and is an integer.
For example, according to the alternative values of the second frequency parameter at the application processor side, N preset values may be preset, so that the N preset values may include the alternative values of the second frequency parameter. Since the second frequency parameter is switchable, the second frequency parameter should comprise at least two alternative values, and accordingly N can be set to an integer greater than 1.
Each preset value may correspond to a preset time period. For example, it may be assumed that n=3, the 1 st preset value 120 corresponds to the 1 st time period, the 2 nd preset value 90 corresponds to the 2 nd time period, and the 3 rd preset value 60 corresponds to the 3 rd time period. Assuming that the first frequency parameter is 120Hz when the first frame image data is received at the first time point, since the first frequency parameter is equal to the second frequency parameter at this time by being able to receive the first frame image data, it can be determined that the second frequency parameter of the first frame image data is also 120Hz.
After the first point in time when one frame of image data is received, the display panel is ready to receive the next frame of image data. Therefore, in the 1 st time period after the first time point, the display panel may output the tearing effect signal with the 1 st preset value 120 as the value of the first frequency parameter. If no image data is received within this 1 st time period, it can be considered that the application processor 30 side second frequency parameter has been transformed, no longer to be 120Hz. If image data is received within this 1 st time period, it can be considered that the application processor side second frequency parameter is not transformed, still 120Hz.
Assuming that no image data is received in the 1 st period, in a 2 nd period (m=2) after the 1 st period, the display panel may output the tearing effect signal with the 2 nd preset value 90 as the value of the first frequency parameter. If no image data is received within this 2 nd time period (m=3), it can be considered that the application processor side second frequency parameter has been transformed, not 120Hz anymore, nor 90Hz. If image data is received within this 2 nd time period, the application processor side second frequency parameter may be considered to have been transformed and is transformed from 120Hz to 90Hz.
Assuming that no image data is received in the 2 nd time period, in the 3 rd time period (m=3) after the 2 nd time period, the display panel may output the tearing effect signal with the 3 rd preset value 60 as the value of the first frequency parameter. If image data is received within this 3 rd time period, the application processor side second frequency parameter may be considered to have been transformed and is transformed from 120Hz to 60Hz. If no image data is received within this 3 rd time period, it can be considered that the application processor side second frequency parameter has been transformed, no longer 120Hz, nor 90Hz or 60Hz.
The duration of each time period can be preset according to the application scene requirement and can be set to be the same or different. For example, the duration of each period may be set to 6ms, and for another example, the duration of the 1 st period may be set to 8ms, the duration of the 2 nd period may be set to 5ms, and the duration of the 3 rd period may be set to 3ms. Alternatively, in order to make the control of the voltage value of the first signal terminal Vinit more accurate, the sum of the durations of the N time periods may be set to be greater than or equal to the sum of the data writing and the data holding times corresponding to the minimum frame rate supported by the application processor 30 side. Alternatively, the sum of the durations of the N time periods may be set to be low to improve the image data display efficiency of the display panel. It should be understood by those skilled in the art that, for different requirements of the application scenario on the image data display efficiency of the display panel and the control accuracy of the voltage value of the first signal terminal Vinit, the sum of the durations of the N time periods may have multiple setting manners, and the duration of each time period may also have multiple setting manners, which is not limited in this disclosure.
In this way, the accuracy of the correspondence relationship of the first frequency parameter and the second frequency parameter can be ensured.
In one possible implementation manner, the preset manner further includes: if no image data is received in the 1 st to N th time periods after the first time point of one frame of image data is received, the tearing effect signal is output to the application processor in a preset mode again by taking the ending time point of the N th time period as a new first time point.
For example, assuming that no image data is received for all of the time periods 1 to N, it is considered that a problem may occur in the image data rendering process, and the frame of image data needs to be received again. The tearing effect signal may be outputted again in a preset manner with the end time point of the nth period as a new first time point. In this way, continuity of the image data can be ensured.
After the output unit 203 obtains the first frequency parameter based on the above preset manner, the obtaining unit 201 may obtain the first frequency parameter.
In one possible implementation, the driving circuit 10 includes a first transistor and a second transistor connected between the gate of the first transistor and the first signal terminal, where the first transistor is used to provide a driving current for the light emitting device. Fig. 6 shows an exemplary structural schematic diagram of the driving circuit 10 according to an embodiment of the present disclosure.
In fig. 6, an example of the first transistor may be referred to above and the transistor T1 in fig. 2, an example of the second transistor may be referred to above and the transistor T2 in fig. 2, and an example of the first signal terminal may be referred to above and Vinit in fig. 2. Examples of the light emitting device may be found above and in fig. 2 as light emitting device D1.
The voltage value of the first signal terminal (Vinit) can be written into the gate of the first transistor (T1) through the turned-on second transistor (T2), when the first frequency parameter is changed from high to low, by controlling the voltage value of the first signal terminal (Vinit) to be high, the voltage drop of the gate of the first transistor (T1), i.e. the transistor driving the light emitting device, caused by the electric leakage can be reduced, and therefore, the voltage of the gate of the transistor driving the light emitting device is more stable under the control of the voltage control circuit 20.
In one possible implementation, the first electrode of the second transistor is connected to the gate of the first transistor, and the second electrode of the second transistor is connected to the first signal terminal, and the driving circuit 10 further includes:
a third transistor, a first pole of the third transistor being connected to the first pole of the second transistor, a second pole of the third transistor being connected to the first pole of the first transistor;
a first electrode of the fourth transistor is connected with a second electrode of the first transistor, and a second electrode of the fourth transistor is connected with a second signal end;
a fifth transistor, a first pole of which is connected to the third signal terminal, and a second pole of which is connected to the second pole of the first transistor and the first pole of the fourth transistor;
a sixth transistor, a first pole of the sixth transistor being connected to the first pole of the first transistor and a second pole of the third transistor, the second pole of the sixth transistor being connected to an anode of the light emitting device;
a seventh transistor, a first electrode of which is connected to a second electrode of the sixth transistor and an anode of the light emitting device, and a second electrode of which is connected to the first signal terminal; the cathode of the light-emitting device is connected with a fourth signal end;
and the first end of the first capacitor is connected with the third signal end, and the second end of the first capacitor is connected with the first pole of the second transistor, the grid electrode of the first transistor and the first pole of the third transistor.
Wherein the first transistor to the seventh transistor may be referred to the above-described related description of the transistors T1 to T7, respectively. The first capacitance may be described with reference to the capacitance CST described above. The light emitting device may be described with reference to the light emitting device D1 described above. The connection manner of the first transistor to the seventh transistor, the first capacitor, and the light emitting device can be referred to the above and the example of fig. 2.
Those skilled in the art will understand that the structures of the units in the voltage control circuit 20 may be the examples of fig. 4a or fig. 5, and may also include more devices, as long as each unit may implement its corresponding function, and the specific structures of the units in the voltage control circuit 20 are not limited by the embodiments of the present disclosure.
It should be noted that each unit in the embodiments of the present disclosure may be implemented by a hardware circuit.
The embodiment of the disclosure also proposes a display panel driving chip, which includes the voltage control circuit 20 described above, and the driving circuit 10.
The embodiment of the disclosure also provides a display panel, which comprises the display panel driving chip.
The display panel may be a large-screen display panel, for example, a large-scale LED display screen disposed indoors or outdoors, or a combination display screen with a larger display capability may be obtained by combining a plurality of display panels.
In one possible implementation, the display panel is one of a liquid crystal display panel, a micro Light Emitting Diode (Micro Light Emitting Diode, micro led) display panel, a mini Light Emitting Diode display panel (Mini Light Emitting Diode, miniLED), a quantum dot Light Emitting Diode (Quantum dot Light Emitting Diode, QLED) display panel, and an Organic Light-Emitting Diode (OLED) display panel.
The embodiment of the disclosure also provides electronic equipment, which comprises the display panel.
In one possible implementation, the electronic device includes a display, a smart phone, or a portable device.
The circuit of the embodiment of the present disclosure may be various electronic devices with a display function, which are also called User Equipment (UE), mobile Station (MS), mobile Terminal (MT), etc., and are devices for providing voice and/or data connectivity to a user, for example, a handheld device with a wireless connection function, an in-vehicle device, etc. Currently, some examples of terminals are: a mobile phone, a tablet, a notebook, a palm, a mobile internet device (mobile internet device, MID), a wearable device, a Virtual Reality (VR) device, an augmented reality (augmented reality, AR) device, a wireless terminal in industrial control (industrial control), a wireless terminal in unmanned (self-driving), a wireless terminal in teleoperation (remote medical surgery), a wireless terminal in smart grid (smart grid), a wireless terminal in transportation security (transportation safety), a wireless terminal in smart city (smart city), a wireless terminal in smart home (smart home), a wireless terminal in the internet of vehicles, and the like.
The foregoing description of the embodiments of the present disclosure has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the various embodiments described. The terminology used herein was chosen in order to best explain the principles of the embodiments, the practical application, or the technical improvements in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
Claims (9)
1. The utility model provides a voltage control circuit, its characterized in that, voltage control circuit connects drive circuit's first signal terminal, first signal terminal is used for to drive circuit resets, voltage control circuit includes:
an acquisition unit configured to acquire a first frequency parameter associated with a second frequency parameter of the application processor side output image data;
the control unit is used for controlling the voltage value of the first signal end according to the first frequency parameter so that the change rule of the voltage value of the first signal end is opposite to the change rule of the first frequency parameter;
the output unit is used for outputting a tearing effect signal to the application processor in a preset mode, and the first frequency parameter is the frequency for outputting the tearing effect signal;
a receiving unit configured to receive the image data generated by the application processor;
when any frame of image data is received, the first frequency parameter is equal to the second frequency parameter of the frame of image data;
the first frequency parameter includes N preset values, N is an integer greater than 1, each preset value corresponds to a preset time period, and the preset mode includes:
if the image data is received in the 1 st time period after the first time point of one frame of image data is received, outputting the tearing effect signal by taking the 1 st preset value as a first frequency parameter;
if no image data is received in the 1 st to M-1 st time period after the first time point of one frame of image data is received, outputting the tearing effect signal by taking the M preset value as a first frequency parameter in the M time period, wherein M is more than or equal to 2 and less than or equal to N and is an integer.
2. The voltage control circuit of claim 1, wherein the predetermined pattern further comprises:
if no image data is received in the 1 st to N th time periods after the first time point of one frame of image data is received, the tearing effect signal is output to the application processor in a preset mode again by taking the ending time point of the N th time period as a new first time point.
3. A voltage control circuit according to claim 1 or 2, wherein the drive circuit comprises a first transistor and a second transistor connected between the gate of the first transistor and the first signal terminal, the first transistor being arranged to provide a drive current for the light emitting device.
4. The voltage control circuit of claim 3 wherein a first pole of the second transistor is connected to the first transistor gate and a second pole of the second transistor is connected to the first signal terminal, the drive circuit further comprising:
a third transistor, a first pole of the third transistor being connected to the first pole of the second transistor, a second pole of the third transistor being connected to the first pole of the first transistor;
a first electrode of the fourth transistor is connected with a second electrode of the first transistor, and a second electrode of the fourth transistor is connected with a second signal end;
a fifth transistor, a first pole of which is connected to the third signal terminal, and a second pole of which is connected to the second pole of the first transistor and the first pole of the fourth transistor;
a sixth transistor, a first pole of the sixth transistor being connected to the first pole of the first transistor and a second pole of the third transistor, the second pole of the sixth transistor being connected to an anode of the light emitting device;
a seventh transistor, a first electrode of which is connected to a second electrode of the sixth transistor and an anode of the light emitting device, and a second electrode of which is connected to the first signal terminal; the cathode of the light-emitting device is connected with a fourth signal end;
and the first end of the first capacitor is connected with the third signal end, and the second end of the first capacitor is connected with the first pole of the second transistor, the grid electrode of the first transistor and the first pole of the third transistor.
5. A display panel driving chip comprising the voltage control circuit of any one of claims 1-4, and the driving circuit.
6. A display panel comprising the display panel drive chip of claim 5.
7. The display panel of claim 6, wherein the display panel is one of a liquid crystal display panel, a micro light emitting diode display panel, a mini light emitting diode display panel, a quantum dot light emitting diode display panel, and an organic light emitting diode display panel.
8. An electronic device comprising the display panel according to claim 6 or 7.
9. The electronic device of claim 8, wherein the electronic device comprises a display, a smart phone, or a portable device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210382946.3A CN114724503B (en) | 2022-04-12 | 2022-04-12 | Voltage control circuit, display panel driving chip, display panel and electronic equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210382946.3A CN114724503B (en) | 2022-04-12 | 2022-04-12 | Voltage control circuit, display panel driving chip, display panel and electronic equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114724503A CN114724503A (en) | 2022-07-08 |
| CN114724503B true CN114724503B (en) | 2024-01-26 |
Family
ID=82244520
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210382946.3A Active CN114724503B (en) | 2022-04-12 | 2022-04-12 | Voltage control circuit, display panel driving chip, display panel and electronic equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114724503B (en) |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20190034729A (en) * | 2017-09-25 | 2019-04-03 | 엘지디스플레이 주식회사 | Pixel and light emitting display device including the same |
| CN109697960A (en) * | 2019-02-27 | 2019-04-30 | 深圳吉迪思电子科技有限公司 | Pixel-driving circuit and driving method, display panel |
| CN110827756A (en) * | 2019-12-11 | 2020-02-21 | 厦门天马微电子有限公司 | Display panel and display device |
| CN111028767A (en) * | 2019-12-06 | 2020-04-17 | 深圳市华星光电半导体显示技术有限公司 | Pixel circuit and driving method |
| CN111243480A (en) * | 2020-01-17 | 2020-06-05 | 昆山国显光电有限公司 | Display panel driving method and display device |
| CN111445857A (en) * | 2020-04-17 | 2020-07-24 | 上海天马有机发光显示技术有限公司 | Pixel driving circuit, driving method thereof and display device |
| CN112542130A (en) * | 2020-08-17 | 2021-03-23 | 友达光电股份有限公司 | Low-power-consumption pixel circuit and display |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102417983B1 (en) * | 2015-08-27 | 2022-07-07 | 삼성디스플레이 주식회사 | Organic light emitting display device and driving method thereof |
-
2022
- 2022-04-12 CN CN202210382946.3A patent/CN114724503B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20190034729A (en) * | 2017-09-25 | 2019-04-03 | 엘지디스플레이 주식회사 | Pixel and light emitting display device including the same |
| CN109697960A (en) * | 2019-02-27 | 2019-04-30 | 深圳吉迪思电子科技有限公司 | Pixel-driving circuit and driving method, display panel |
| CN111028767A (en) * | 2019-12-06 | 2020-04-17 | 深圳市华星光电半导体显示技术有限公司 | Pixel circuit and driving method |
| CN110827756A (en) * | 2019-12-11 | 2020-02-21 | 厦门天马微电子有限公司 | Display panel and display device |
| CN111243480A (en) * | 2020-01-17 | 2020-06-05 | 昆山国显光电有限公司 | Display panel driving method and display device |
| CN111445857A (en) * | 2020-04-17 | 2020-07-24 | 上海天马有机发光显示技术有限公司 | Pixel driving circuit, driving method thereof and display device |
| CN112542130A (en) * | 2020-08-17 | 2021-03-23 | 友达光电股份有限公司 | Low-power-consumption pixel circuit and display |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114724503A (en) | 2022-07-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US12165581B2 (en) | Pixel circuit, driving method therefor, and display apparatus | |
| CN107610652B (en) | Pixel circuit, its driving method, display panel and display device | |
| WO2023071677A1 (en) | Pixel driving circuit and control method therefor, and display screen and display device | |
| US9437134B2 (en) | Organic light emitting display and method of driving the same | |
| CN107564478B (en) | A display panel, a display method and a display device | |
| US10978002B2 (en) | Pixel circuit and driving method thereof, and display panel | |
| CN205920745U (en) | Pixel circuit , display panel and display device | |
| CN107885477B (en) | Display device, constant display control method and mobile terminal using the same | |
| CN107146575B (en) | Organic light emitting diode display | |
| CN113838421A (en) | Pixel circuit, driving method thereof and display panel | |
| KR20180071466A (en) | Display device and driving method thereof | |
| CN114766048B (en) | Pixel circuit, driving method, display panel and display device | |
| CN112164375B (en) | Pixel compensation circuit, driving method thereof and display device | |
| CN111785212A (en) | Pixel circuit, driving method thereof and display device | |
| KR20180085121A (en) | Pixel and Organic Light Emitting Display Device Using the same | |
| CN105869574A (en) | Pixel driving circuit, pixel driving method of pixel driving circuit, array base plate and display device | |
| US11875734B2 (en) | Pixel circuit and drive method for same, and display panel and drive method for same | |
| CN105551426A (en) | AMOLED pixel unit and driving method thereof, and AMOLED display apparatus | |
| WO2022217527A1 (en) | Display panel and control method therefor, and display device | |
| EP4503006A1 (en) | Pixel circuit and driving method therefor, display panel, and display device | |
| CN113421524A (en) | Voltage supply unit, voltage supply method and display device | |
| CN114724503B (en) | Voltage control circuit, display panel driving chip, display panel and electronic equipment | |
| KR101699045B1 (en) | Organic Light Emitting Display and Driving Method Thereof | |
| CN116363998A (en) | Display panel and display device | |
| CN114446241B (en) | Pixel circuit, driving method thereof and display substrate |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |