CN114696745A - A frequency converter isolation circuit - Google Patents

Abstract

The application discloses a frequency converter isolation circuit, comprising: a switching power supply circuit, a control circuit, a driving circuit, a power circuit and a current sampling circuit; the switching power supply circuit is respectively connected to the respective power supply terminals of the control circuit, the driving circuit and the current sampling circuit, The current sampling detection input terminal of the control circuit is connected with the current sampling detection output terminal of the current sampling circuit, the driving circuit is respectively connected to the control circuit and the power circuit, and the current sampling circuit is connected in parallel with the sampling resistor in the power circuit; the current sampling circuit and the control circuit share the ground ; The control circuit is isolated from the upper bridge drive circuit and the lower bridge drive circuit of the drive circuit. In the present application, the upper bridge drive is isolated, the lower bridge drive is isolated, and the current sampling is resistance sampling. Under the condition of ensuring the quality of the current sampling signal and the stability of the inverter, the cost of the entire isolation circuit is not increased.

Description

A frequency converter isolation circuit

technical field

The invention relates to the technical field of power electronics, in particular to a frequency converter isolation circuit.

Background technique

The frequency converter is a kind of adjustable speed drive system. It uses variable frequency drive technology to change the frequency and amplitude of the working voltage of the AC motor to smoothly control the speed and torque of the AC motor. The most common is that the input and output are AC/AC. AC converter.

In the existing inverter three-phase full-bridge inverter isolation drive scheme, current sampling of the inverter is required to better control the stable operation of the inverter, but the sampling method adopted in the existing technology is either expensive or easily interfered. The interference is large and the sampling accuracy is insufficient.

Therefore, there is a need for an inverter isolation circuit that is inexpensive and improves the accuracy of current sampling.

SUMMARY OF THE INVENTION

In view of this, the purpose of the present invention is to provide a frequency converter isolation circuit, which can improve the current sampling accuracy without increasing the price. Its specific plan is as follows:

A frequency converter isolation circuit, comprising: a switching power supply circuit, a control circuit, a driving circuit, a power circuit and a current sampling circuit;

The switching power supply circuit is respectively connected with the respective power supply terminals of the control circuit, the driving circuit and the current sampling circuit, the current sampling detection input terminal of the control circuit and the current sampling detection output terminal of the current sampling circuit The drive circuit is connected to the control circuit and the power circuit respectively, the current sampling circuit is connected in parallel with the sampling resistor in the power circuit; the current sampling circuit and the control circuit share the same ground; the control The circuit is separated from the upper bridge driving circuit and the lower bridge driving circuit of the driving circuit.

Optionally, the current sampling circuit includes a filter circuit for filtering out current sampling interference signals and a first-stage current sampling signal differential amplifier for amplifying the alternating current sampling signal, which are connected in sequence, and are connected to the current sampling signal. A third diode inside the filter circuit for clamping the current sampling signal.

Optionally, the filter circuit includes a seventh resistor, an eighth resistor and a third capacitor; one end of the seventh resistor serves as the first sampling end of the current sampling circuit and one end of the sampling resistor in the power circuit connected, the other end of the seventh resistor is connected to one end of the third capacitor, and one end of the eighth resistor is connected to the other end of the sampling resistor in the power circuit as the second sampling end of the current sampling circuit , the other end of the eighth resistor is connected to the other end of the third capacitor.

Optionally, the first-stage current sampling signal differential amplifier includes a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, and a fourth operational amplifier; one end of the ninth resistor is connected to the The other end of the seventh resistor is connected to the other end of the ninth resistor, the other end of the ninth resistor is respectively connected to one end of the twelfth resistor and the negative input end of the fourth operational amplifier, and one end of the tenth resistor is connected to the eighth resistor. The other end of the tenth resistor is connected to one end of the eleventh resistor and the positive input end of the fourth operational amplifier, and the other end of the twelfth resistor is connected to the fourth operational amplifier. The output end of the amplifier is connected, and the other end of the eleventh resistor is grounded.

Optionally, the current sampling circuit further includes a current sampling detection output terminal of the current sampling circuit connected to the first-stage current sampling signal differential amplifier and used for increasing the voltage of the alternating current sampling signal. A second-stage additive current-sampling signal amplifier above the reference ground voltage.

Optionally, the second-stage additive current sampling signal amplifier includes a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a fourth capacitor, and a fifth operational amplifier; the thirteenth resistor One end of the resistor is connected to the output end of the fourth operational amplifier, the other end of the thirteenth resistor, one end of the fourteenth resistor, one end of the fourth capacitor and the positive terminal of the fifth operational amplifier. The input ends are connected to each other, one end of the fifteenth resistor is grounded, the other end of the fifteenth resistor, the other end of the fourth capacitor, the negative input end of the fifth operational amplifier and the sixteenth One end of the resistor is connected to each other, the other end of the fourteenth resistor is used as the power supply end of the current sampling circuit, and the other end of the sixteenth resistor is connected to the output end of the fifth operational amplifier as the current sampling circuit The current sampling detection output terminal.

Optionally, the drive circuit includes an upper bridge drive circuit and a lower bridge drive circuit;

The upper bridge driving circuit includes an upper bridge isolation driving optocoupler, a first diode, a first resistor, a second resistor, a third resistor, a first capacitor, a first Zener diode, and a second Zener diode;

The VO terminal of the upper bridge isolation driving optocoupler is respectively connected to the cathode of the first diode and one end of the first resistor, and the anode of the first diode is connected to one end of the second resistor , the other end of the second resistor, one end of the first capacitor, the other end of the first resistor, one end of the third resistor and the cathode of the second Zener diode are connected to each other, as the The first drive end of the drive circuit is connected to the power circuit, the other end of the third resistor, the other end of the first capacitor and the cathode of the second Zener diode are connected to each other, as the drive circuit The second drive terminal is connected to the power circuit, and the anode of the first Zener diode and the anode of the second Zener diode are connected to each other;

The lower bridge driving circuit includes a lower bridge isolation driving optocoupler, a second diode, a fourth resistor, a fifth resistor, a sixth resistor, a second capacitor, a third Zener diode and a fourth Zener diode;

The VO terminal of the lower bridge driving circuit is respectively connected to the cathode of the second diode and one end of the fourth resistor, and the anode of the second diode is connected to one end of the fifth resistor, so The other end of the fifth resistor, the other end of the fourth resistor, one end of the sixth resistor, one end of the second capacitor and the cathode of the fourth Zener diode are connected to each other, as the drive circuit The third drive terminal of the MOSFET is connected to the power circuit, the other end of the sixth resistor, the other end of the second capacitor and the cathode of the third Zener diode are connected to each other, as the fourth terminal of the drive circuit The driving end is connected to the power circuit, and the anode of the third Zener diode and the anode of the fourth Zener diode are connected to each other.

Optionally, the drive circuit includes an upper bridge drive circuit and a lower bridge drive circuit;

The upper bridge drive circuit includes an upper bridge isolation drive chip, a third diode, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a third capacitor, a fifth zener diode and a sixth zener diode ;

The CLAMP terminal of the upper bridge isolation driver chip is connected to one end of the tenth resistor, and the Gout terminal of the upper bridge isolation driver chip is respectively connected to the cathode of the third diode and one end of the seventh resistor, so The anode of the third diode is connected to one end of the eighth resistor, the other end of the eighth resistor, one end of the third capacitor, the other end of the seventh resistor, and the other end of the ninth resistor One end is connected to the cathode of the sixth Zener diode and the other end of the tenth resistor, and is connected to the power circuit as the first drive end of the drive circuit, and the other end of the ninth resistor, the The other end of the third capacitor and the cathode of the sixth zener diode are connected to each other, and the second drive end of the drive circuit is connected to the power circuit, and the anode of the fifth zener diode is connected to the sixth zener diode. The anodes of the six zener diodes are connected to each other, and the NC terminal of the upper bridge isolation driving optocoupler is connected to the MCU control circuit;

The lower bridge driver circuit includes a lower bridge isolation driver chip, a fourth diode, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fourth capacitor, a seventh zener diode and a third resistor. Eight Zener diodes;

The CLAMP terminal of the lower bridge isolation driver chip is connected to one end of the fourteenth resistor, and the Gout terminal of the lower bridge driver circuit is respectively connected to the cathode of the second diode and one end of the eleventh resistor, The anode of the second diode is connected to one end of the twelfth resistor, the other end of the twelfth resistor, the other end of the eleventh resistor, one end of the thirteenth resistor, and the other end of the twelfth resistor. One end of the fourth capacitor is connected to the cathode of the eighth Zener diode, and the other end of the fourteenth resistor is connected to each other, and is connected to the power circuit as the third drive end of the drive circuit. The other end of the three resistors, the other end of the fourth capacitor and the cathode of the seventh zener diode are connected to each other, and are connected to the power circuit as the fourth drive end of the drive circuit, and the seventh zener diode is connected to the power circuit. The anode of the diode and the anode of the eighth Zener diode are connected to each other, and the NC terminal of the lower bridge isolation driving optocoupler is connected to the MCU control circuit.

Optionally, the power circuit includes an upper bridge power circuit, a lower bridge power circuit and a sampling resistor;

The control end of the upper bridge power circuit is connected to the first driving end as the first control end of the power circuit, and the output end of the upper bridge power circuit is connected to the input end of the lower bridge power circuit, as the first control end of the power circuit. The U-phase output terminal of the power circuit is connected to the second driving terminal, the control terminal of the lower bridge power circuit is connected to the third driving terminal as the second control terminal of the power circuit, and the lower bridge power circuit is connected to the third driving terminal. The output end of the circuit is connected to one end of the sampling resistor, the ULE phase output end of the power circuit is connected to the fourth driving end, and the other end of the sampling resistor is grounded.

Optionally, the upper bridge power circuit and the lower bridge power circuit are both full-bridge three-phase rectifier circuits.

Optionally, the control circuit is an MCU.

In the present invention, the inverter isolation circuit includes: a switching power supply circuit, a control circuit, a driving circuit, a power circuit and a current sampling circuit; the switching power supply circuit is respectively connected to the respective power supply terminals of the control circuit, the driving circuit and the current sampling circuit, and the control circuit The current sampling detection input terminal of the current sampling detection circuit is connected to the current sampling detection output terminal of the current sampling circuit, the driving circuit is respectively connected to the control circuit and the power circuit, and the current sampling circuit is connected in parallel with the sampling resistor in the power circuit; the current sampling circuit and the control circuit share the ground; The circuit is isolated from the upper bridge drive circuit and the lower bridge drive circuit of the drive circuit.

In the present invention, the upper bridge is driven and isolated, the lower bridge is isolated, and the current sampling is resistance sampling, and the cost of the entire isolation circuit is not increased under the condition of ensuring the quality of the current sampling signal and the stability of the frequency converter.

Description of drawings

In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the following briefly introduces the accompanying drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only It is an embodiment of the present invention. For those of ordinary skill in the art, other drawings can also be obtained according to the provided drawings without creative work.

FIG. 1 is a schematic structural diagram of a frequency converter isolation circuit disclosed in an embodiment of the present invention;

2 is a schematic structural diagram of a switching power supply circuit disclosed in an embodiment of the present invention;

3 is a schematic topology diagram of a current sampling circuit disclosed in an embodiment of the present invention;

FIG. 4 is a schematic topology diagram of a driving circuit disclosed in an embodiment of the present invention;

5 is a schematic diagram of a power circuit topology disclosed in an embodiment of the present invention;

6 is a schematic structural diagram of a control circuit disclosed in an embodiment of the present invention;

7 is a schematic structural diagram of an upper bridge driving circuit disclosed in an embodiment of the present invention;

FIG. 8 is a schematic structural diagram of a lower bridge driving circuit disclosed in an embodiment of the present invention.

Detailed ways

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

An embodiment of the present invention discloses a frequency converter isolation circuit, as shown in FIG. 1 , the circuit includes: a switching power supply circuit 1 , a control circuit 2 , a driving circuit 3 , a power circuit 4 and a current sampling circuit 5 ;

The switching power supply circuit 1 is respectively connected with the respective power supply terminals of the control circuit 2, the driving circuit 3 and the current sampling circuit 5, the current sampling detection input terminal of the control circuit 2 is connected with the current sampling detection output terminal of the current sampling circuit 5, and the driving circuit 3 is respectively Connect the control circuit 2 and the power circuit 4, the current sampling circuit 5 is connected in parallel with the sampling resistor in the power circuit 4; the current sampling circuit 5 shares the ground with the control circuit 2; the upper bridge driving circuit 3 and the lower bridge of the control circuit 2 and the driving circuit 3 The drive circuit 3 is isolated.

Specifically, the switching power supply circuit 1 supplies power to the control circuit 2, the driving circuit 3 and the current sampling circuit 5 respectively; the current sampling circuit 5 samples from the power circuit 4 to obtain a current sampling signal, and outputs the current sampling signal from the current sampling detection output terminal to control circuit 2; the control circuit 2 outputs a control signal to the drive circuit 3 according to the current sampling signal; the drive circuit 3 sends a drive signal to drive the power circuit 4 according to the control signal.

Specifically, the switching power supply circuit 1 generates multiple power supplies, and supplies power to the control circuit 2 , the driving circuit 3 , and the current sampling circuit 5 respectively. The control circuit 2 sends 6 channels of PWM waves as the input switch signal of the drive circuit 3, the driver circuit 3 sends 6 channels of drive signals to drive the IGBT switches in the upper bridge power circuit and the lower bridge power circuit in the power circuit 4, and the current sampling circuit 5 is powered from the power The circuit 4 collects the current sampling signal and outputs it to the control circuit 2 for detection.

Specifically, as shown in FIG. 2 , the switching power supply circuit 1 includes a high voltage input, an upper bridge driving power supply output, a lower bridge driving power supply output, and a control part of the power supply output. Among them, DC+ is the positive pole of the high-voltage input, DC- is the high-voltage input ground; +VCC-U is the positive pole of the upper bridge drive power supply, -VEE-U is the negative pole of the upper bridge drive power supply, and the reference ground is the U-phase output; +VCC-DOWN It is the positive pole of the power supply of the lower bridge drive, -VEE-DOWN is the negative pole of the power supply of the lower bridge drive, and the reference ground is the high voltage input ground DC-; +VCC-MCU is the positive pole of the power supply of the control part, -VCC-MCU is the negative pole of the power supply of the control part , GND is the reference ground for the power supply of the control part.

Specifically, the switching power supply circuit 1 is divided into three outputs, of which the high-voltage input DC+ and DC- are located on the primary side, the lower-bridge driving power supply is located on the primary side, and the reference ground is the high-voltage input ground DC-; the upper-bridge driving power supply is a floating power supply , the reference ground is the U-phase output; the power supply of the control part is located on the secondary side and is isolated from the high-voltage input.

Specifically, as shown in FIG. 3 , the current sampling circuit 5 may include a filter circuit 51 for filtering out current sampling interference signals and a first-stage current sampling signal differential amplifier 52 for amplifying the alternating current sampling signal, which are connected in sequence. and a third diode D3 connected inside the filter circuit 51 for clamping the current sampling signal.

Specifically, the filter circuit 51 of the current sampling circuit 5 includes a seventh resistor R7, an eighth resistor R8 and a third capacitor C3; one end of the seventh resistor R7 serves as the first sampling end DC- of the current sampling circuit 5, and the seventh resistor The other end of R7 is connected to one end of the third capacitor C3, one end of the eighth resistor R8 serves as the second sampling end ULE of the current sampling circuit 5, and the other end of the eighth resistor R8 is connected to the other end of the third capacitor C3.

Specifically, the first-stage current sampling signal differential amplifier 52 includes a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12 and a fourth operational amplifier U4; one end of the ninth resistor R9 is connected to The other end of the seventh resistor R7 is connected, the other end of the ninth resistor R9 is respectively connected with one end of the twelfth resistor R12 and the negative input end of the fourth operational amplifier U4, and one end of the tenth resistor R10 is connected with the other end of the eighth resistor R8 connection, the other end of the tenth resistor R10 is respectively connected with one end of the eleventh resistor R11 and the positive input end of the fourth operational amplifier U4, and the other end of the twelfth resistor R12 is connected with the output end of the fourth operational amplifier U4 as a current sampling The current sampling detection output end of the circuit 5, the other end of the eleventh resistor R11 is grounded.

Further, as shown in FIG. 3 , the output end of the fourth operational amplifier U4 of the first-stage current sampling signal differential amplifier 52 can also be connected to the second-stage addition current sampling signal amplifier 53, which is used for the second-stage addition current sampling signal amplifier 53. The purpose of this is to raise the voltage of the alternating current sampling signal above the reference ground voltage, thereby improving the sampling accuracy.

Specifically, the second-stage additive current sampling signal amplifier 53 includes a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a fourth capacitor C4, and a fifth operational amplifier U5; One end of the three resistors R13 is connected to the output end of the fourth operational amplifier U4, the other end of the thirteenth resistor R13, one end of the fourteenth resistor R14, one end of the fourth capacitor C4 and the positive input end of the fifth operational amplifier U5 are mutually connection, one end of the fifteenth resistor R15 is grounded, the other end of the fifteenth resistor R15, the other end of the fourth capacitor C4, the negative input end of the fifth operational amplifier U5 and one end of the sixteenth resistor R16 are connected to each other, and the tenth The other end of the four resistors R14 serves as the power supply end of the current sampling circuit 5 , and the other end of the sixteenth resistor R16 is connected to the output end of the fifth operational amplifier U5 as the current sampling detection output end of the current sampling circuit 5 .

Specifically, the output terminal of the fourth operational amplifier U4 is no longer used as the current sampling detection output terminal of the current sampling circuit 5 after being connected to the second-stage additive current sampling signal amplifier 53 , but is used by the second-stage additive current sampling signal amplifier 53 . The output terminal of the fifth operational amplifier U5 is used as the current sampling detection output terminal of the current sampling circuit 5 again.

The power supplies of the fourth operational amplifier U4 and the fifth operational amplifier U5 are +VCC-MCU and -VCC-MCU dual power supplies.

Specifically, the inputs ULE and DC- of the current sampling circuit 5 are connected to both ends of the sampling resistor of the power circuit 4 for sampling, and the current sampling detection output terminal I_U of the current sampling circuit 5 is connected to the current sampling detection input terminal I_U of the control circuit 2 to control The PWM wave outputs PWM-UH and PWM-UL of circuit 2 are connected to the PWM wave input terminals of the upper and lower bridges of the drive circuit 3 to isolate and drive the optocouplers U1 and U2 to form complementary inputs. The 3-way power output of switching power supply circuit 1, namely +VCC-U and -VEE-U, +VCC-DOWN and -VEE-DOWN, +VCC-MCU and -VCC-MCU, drive the optocoupler U1, The lower bridge drives the optocoupler U2, the control circuit 2, the fourth operational amplifier U4 and the fifth operational amplifier U5 to supply power.

Specifically, as shown in FIG. 4 , the above-mentioned driving circuit 3 includes an upper-bridge driving circuit 31 and a lower-bridge driving circuit 32 ;

The upper bridge driving circuit 31 includes an upper bridge isolation driving optocoupler U1, a first diode D1, a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor C1, a first Zener diode DZ1, a second Zener diode DZ2;

The VO terminal of the upper bridge isolation driving optocoupler U1 is respectively connected to the cathode of the first diode D1 and one end of the first resistor R1, the anode of the first diode D1 is connected to one end of the second resistor R2, and the second resistor R2 The other end of the first capacitor C1, the other end of the first resistor R1, one end of the third resistor R3 and the cathode of the second Zener diode DZ2 are connected to each other, as the first drive end UHG of the drive circuit 3 and the power circuit 4 connection, the other end of the third resistor R3, the other end of the first capacitor C1 and the cathode of the second Zener diode DZ2 are connected to each other, as the second drive terminal U of the drive circuit 3 is connected to the power circuit 4, the first voltage regulator The anode of the diode DZ1 is connected to the anode of the second Zener diode DZ2;

The lower bridge driving circuit 32 includes a lower bridge isolation driving optocoupler U2, a second diode D2, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a second capacitor C2, a third Zener diode DZ3 and a fourth Zener diode DZ4;

The VO terminal of the lower bridge driving circuit 32 is respectively connected to the cathode of the second diode D2 and one end of the fourth resistor R4, the anode of the second diode D2 is connected to one end of the fifth resistor R5, and the other end of the fifth resistor R5 is connected. One end, the other end of the fourth resistor R4, one end of the sixth resistor R6, one end of the second capacitor C2 and the cathode of the fourth Zener diode DZ4 are connected to each other, and are connected to the power circuit 4 as the third drive end ULG of the drive circuit 3 , the other end of the sixth resistor R6, the other end of the second capacitor C2 and the cathode of the third Zener diode DZ3 are connected to each other, as the fourth drive terminal ULE of the drive circuit 3 is connected to the power circuit 4, and the third Zener diode DZ3 and the anode of the fourth Zener diode DZ4 are connected to each other.

Among them, the first diode D1 and the second resistor R2 constitute the upper bridge discharge circuit, the first resistor R1 constitutes the upper bridge charging circuit, the second diode D2 and the fifth resistor R5 constitute the lower bridge discharge circuit, and the fourth resistor R4 The lower bridge charging loop is formed. The third resistor R3 prevents the upper bridge power device in the power circuit 4 from being misconnected, the sixth resistor R6 prevents the lower bridge power device in the power circuit 4 from being misconnected, and the first capacitor C1 filters out the power circuit 4. The interference between the control terminal and the output terminal of the power device in the upper bridge power circuit, the second capacitor C2 filters the interference between the control terminal and the output terminal of the power device in the lower bridge power circuit, and the second Zener diode DZ2 clamps The positive voltage of the upper bridge power circuit, the first Zener diode DZ1 clamps the negative voltage of the upper bridge power circuit to prevent overvoltage breakdown of the power devices in the upper bridge power circuit, and the fourth Zener diode DZ4 clamps the positive voltage of the upper bridge power circuit , the third Zener diode DZ3 clamps the negative voltage of the upper bridge power circuit to prevent the overvoltage breakdown of the power devices in the lower bridge power circuit.

Specifically, the drive circuit 3 shares the ground with the high-voltage input DC+ and DC-, and the control circuit 2 shares the ground with the current sampling circuit 5. However, through differential sampling, the current can be sampled only by the low-end sampling resistor, instead of the traditional phase-to-phase current. At the same time, because the lower bridge drive of the control circuit 2 and the drive circuit 3 is isolated by an optocoupler, it can be ensured that the drive interference will not affect the control circuit 2. The actual control circuit 2 is connected to the reference ground driven by the lower bridge of the driving circuit 3 through the sampling resistor, the eighth resistor R8, the tenth resistor R10, and the eleventh resistor R11, which are electrically non-isolated and signal isolated.

Specifically, as shown in FIG. 5 , the above-mentioned power circuit 4 includes an upper bridge power circuit Q1, a lower bridge power circuit Q2 and a sampling resistor RS1;

The control terminal of the upper bridge power circuit Q1 is connected to the first driving terminal UHG as the first control terminal of the power circuit 4 , and the output terminal of the upper bridge power circuit Q1 is connected to the input terminal of the lower bridge power circuit Q2 as the U phase of the power circuit 4 . The output end is connected to the second drive end U, the control end of the lower bridge power circuit Q2 is connected to the third drive end ULG as the second control end of the power circuit 4, and the output end of the lower bridge power circuit Q2 is connected to one end of the sampling resistor RS1 , as the ULE phase output end of the power circuit 4 is connected to the fourth drive end ULE, and the other end of the sampling resistor RS1 is grounded.

The power devices in the power circuit 4 can all be IGBTs, the control terminal of the upper-bridge power circuit Q1 is the gate of each IGBT in the upper-bridge power circuit Q1, and the input terminal of the upper-bridge power circuit Q1 is the upper-bridge power circuit Q1 The collector of each IGBT in the upper bridge power circuit Q1 is the emitter of each IGBT in the upper bridge power circuit Q1.

It should be noted that FIG. 5 is an equivalent diagram of the power circuit 4. The upper-bridge power circuit Q1 and the lower-bridge power circuit Q2 of the power circuit 4 are actually full-bridge three-phase rectifier circuits including 6 power devices.

Specifically, as shown in FIG. 6 , the control circuit 2 includes an MCU control chip U3, and its external ports include +VCC-MCU, GND, I_U, PWM-UH, and PWM-UL. Among them, +VCC-MCU is the positive input of the power supply of the control part, GND is the reference ground of the power supply of the control part, I_U is the U-phase current detection input port, PWM-UH is the U-phase upper bridge control PWM wave output, and PWM-UL is the U-phase. The lower bridge controls the PWM wave output.

Among them, the ANODE terminal of the upper bridge isolation driver optocoupler U1 is connected to the PWM-UH terminal of the MCU control chip U3, the CATHODE terminal of the upper bridge isolation driver chip U1 is connected to the PWM-UL terminal of the MCU control chip U3, and the lower bridge isolation drive light The ANODE end of the coupling U2 is connected to the PWM-UL end of the MCU control chip U3, and the CATHODE end of the lower bridge isolation driver chip U2 is connected to the PWM-UH end of the MCU control chip U3.

It can be seen that, in the embodiment of the present invention, the upper bridge drive is isolated, the lower bridge drive is isolated, and the current sampling is resistance sampling. Under the condition of ensuring the quality of the current sampling signal and the stability of the inverter, the cost of the entire isolation circuit is not increased.

Further, the lower bridge driving power supply is isolated from the power supply of the control circuit 2, and the lower bridge driving power supply is connected to the reference ground of the two power supplies of the control circuit 2 through the sampling resistor RS1, so as to realize electrical isolation, and no expensive interphase current sampling sensor can be used. , direct resistance sampling. However, the control side PWM wave input and the drive signal output are isolated by the drive optocoupler, which can achieve signal isolation and ensure that the interference at the drive end will not flow to the MCU control end, making the inverter stronger anti-interference ability and reliability.

Further, in another embodiment of the present invention, as shown in FIG. 7 and FIG. 8 , the above-mentioned driving circuit 3 includes an upper-bridge driving circuit 31 and a lower-bridge driving circuit 32 ;

The upper bridge drive circuit 31 includes an upper bridge isolation drive chip U1, a third diode D3, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a third capacitor C3, and a fifth Zener diode. DZ5 and the sixth Zener diode DZ6;

The CLAMP terminal of the upper bridge isolation driver chip U1 is connected to one end of the tenth resistor R10, the Gout terminal of the upper bridge isolation driver chip U1 is respectively connected to the cathode of the third diode D3 and one end of the seventh resistor R7, and the third diode The anode of the tube D3 is connected to one end of the eighth resistor R8, the other end of the eighth resistor R8, one end of the third capacitor C3, the other end of the seventh resistor R7, one end of the ninth resistor R9 and the sixth zener diode DZ6. The cathode and the other end of the tenth resistor R10 are connected to each other, as the first drive end UHG of the drive circuit 3 is connected to the power circuit, the other end of the ninth resistor R9, the other end of the third capacitor C3 and the sixth Zener diode DZ6 are connected. The cathodes are connected to each other, as the second drive terminal U of the drive circuit 3 is connected to the power circuit, the anode of the fifth Zener diode DZ5 and the anode of the sixth Zener diode DZ6 are connected to each other, and the IN+ terminal of the upper bridge isolation driver chip U1 is connected to the MCU The PWM-UH terminal of the control chip U3 is connected, and the IN- terminal of the upper bridge isolation driver chip U1 is connected to the PWM-UL terminal of the MCU control chip U3;

The lower bridge driver circuit 32 includes a lower bridge isolation driver chip U2, a fourth diode D4, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fourth capacitor C4, and a fourth resistor R11. Seven Zener diodes DZ7 and eighth Zener diodes DZ8;

The CLAMP end of the lower bridge isolation driver chip U2 is connected to one end of the fourteenth resistor R14, the Gout end of the lower bridge drive circuit 32 is respectively connected to the cathode of the fourth diode D4 and one end of the eleventh resistor R11, the fourth second The anode of the pole tube D4 is connected to one end of the twelfth resistor R12, the other end of the twelfth resistor R12, the other end of the eleventh resistor R11, one end of the thirteenth resistor R13, one end of the fourth capacitor C4 and the eighth The cathode of the Zener diode DZ8 and the other end of the fourteenth resistor R14 are connected to each other, and are connected to the power circuit as the third drive end ULG of the drive circuit 3. The other end of the thirteenth resistor R13, the other end of the fourth capacitor C4 and The cathodes of the seventh Zener diode DZ7 are connected to each other, and the fourth driving terminal ULE of the driving circuit 3 is connected to the power circuit. The anode of the seventh Zener diode DZ7 is connected to the anode of the eighth Zener diode DZ8, and the lower bridge is isolated and driven. The IN+ terminal of the chip U2 is connected to the PWM-UL terminal of the MCU control chip U3, and the IN- terminal of the lower bridge isolation driver chip U2 is connected to the PWM-UH terminal of the MCU control chip U3.

Finally, it should also be noted that in this document, relational terms such as first and second are used only to distinguish one entity or operation from another, and do not necessarily require or imply these entities or that there is any such actual relationship or sequence between operations. Moreover, the terms "comprising", "comprising" or any other variation thereof are intended to encompass a non-exclusive inclusion such that a process, method, article or device that includes a list of elements includes not only those elements, but also includes not explicitly listed or other elements inherent to such a process, method, article or apparatus. Without further limitation, an element qualified by the phrase "comprising a..." does not preclude the presence of additional identical elements in a process, method, article or apparatus that includes the element.

Professionals may further realize that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two, in order to clearly illustrate the possibilities of hardware and software. Interchangeability, the above description has generally described the components and steps of each example in terms of functionality. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Skilled artisans may implement the described functionality using different methods for each particular application, but such implementations should not be considered beyond the scope of the present invention.

The technical content provided by the present invention is described in detail above, and specific examples are used in this paper to illustrate the principles and implementations of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea; Meanwhile, for those of ordinary skill in the art, according to the idea of the present invention, there will be changes in the specific embodiments and application scope. In summary, the contents of this specification should not be construed as limiting the present invention.

Claims (11)

1. a frequency converter isolation circuit, is characterized in that, comprises: switching power supply circuit, control circuit, drive circuit, power circuit and current sampling circuit; The switching power supply circuit is respectively connected with the respective power supply terminals of the control circuit, the driving circuit and the current sampling circuit, the current sampling detection input terminal of the control circuit and the current sampling detection output terminal of the current sampling circuit The drive circuit is connected to the control circuit and the power circuit respectively, the current sampling circuit is connected in parallel with the sampling resistor in the power circuit; the current sampling circuit and the control circuit share the same ground; the control The circuit is isolated from the upper-bridge driving circuit and the lower-bridge driving circuit of the driving circuit. 2 . The inverter isolation circuit according to claim 1 , wherein the current sampling circuit comprises a filter circuit connected in sequence for filtering out the current sampling interference signal and amplifying the alternating current sampling signal. 3 . The first-stage current sampling signal differential amplifier, and a third diode connected inside the filter circuit for clamping the current sampling signal. 3 . The inverter isolation circuit according to claim 2 , wherein the filter circuit comprises a seventh resistor, an eighth resistor and a third capacitor; one end of the seventh resistor is used as the first part of the current sampling circuit. 4 . A sampling end is connected to one end of the sampling resistor in the power circuit, the other end of the seventh resistor is connected to one end of the third capacitor, and one end of the eighth resistor is used as the second sampling of the current sampling circuit The end is connected to the other end of the sampling resistor in the power circuit, and the other end of the eighth resistor is connected to the other end of the third capacitor. 4. The inverter isolation circuit according to claim 3, wherein the first-stage current sampling signal differential amplifier comprises a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor and a fourth resistor an operational amplifier; one end of the ninth resistor is connected to the other end of the seventh resistor, and the other end of the ninth resistor is respectively connected to one end of the twelfth resistor and the negative input end of the fourth operational amplifier , one end of the tenth resistor is connected to the other end of the eighth resistor, and the other end of the tenth resistor is respectively connected to one end of the eleventh resistor and the positive input end of the fourth operational amplifier, so The other end of the twelfth resistor is connected to the output end of the fourth operational amplifier as a current sampling detection output end of the current sampling circuit, and the other end of the eleventh resistor is grounded. 5 . The inverter isolation circuit according to claim 4 , wherein the current sampling circuit further comprises a current sampling detection output terminal connected to the first-stage current sampling signal differential amplifier as the current sampling circuit. 6 . and a second-stage additive current sampling signal amplifier for raising the voltage of the alternating current sampling signal above the reference ground voltage. 6 . The inverter isolation circuit according to claim 5 , wherein the second-stage additive current sampling signal amplifier comprises a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a a fourth capacitor and a fifth operational amplifier; one end of the thirteenth resistor is connected to the output end of the fourth operational amplifier, the other end of the thirteenth resistor, one end of the fourteenth resistor, the One end of the fourth capacitor and the positive input end of the fifth operational amplifier are connected to each other, one end of the fifteenth resistor is grounded, the other end of the fifteenth resistor, the other end of the fourth capacitor, the The negative input end of the fifth operational amplifier and one end of the sixteenth resistor are connected to each other, the other end of the fourteenth resistor serves as the power supply end of the current sampling circuit, and the other end of the sixteenth resistor is connected to the The output end of the fifth operational amplifier is connected as the current sampling detection output end of the current sampling circuit. 7. The inverter isolation circuit according to claim 4, wherein the drive circuit comprises an upper bridge drive circuit and a lower bridge drive circuit; The upper bridge driving circuit includes an upper bridge isolation driving optocoupler, a first diode, a first resistor, a second resistor, a third resistor, a first capacitor, a first Zener diode, and a second Zener diode; The VO terminal of the upper bridge isolation driving optocoupler is respectively connected to the cathode of the first diode and one end of the first resistor, and the anode of the first diode is connected to one end of the second resistor , the other end of the second resistor, one end of the first capacitor, the other end of the first resistor, one end of the third resistor and the cathode of the second Zener diode are connected to each other, as the The first drive end of the drive circuit is connected to the power circuit, the other end of the third resistor, the other end of the first capacitor and the cathode of the second Zener diode are connected to each other, as the drive circuit The second drive terminal is connected to the power circuit, the anode of the first Zener diode and the anode of the second Zener diode are connected to each other, the NC terminal of the upper bridge isolation driving optocoupler and the MCU control circuit connect; The lower bridge driving circuit includes a lower bridge isolation driving optocoupler, a second diode, a fourth resistor, a fifth resistor, a sixth resistor, a second capacitor, a third Zener diode and a fourth Zener diode; The VO terminal of the lower bridge driving circuit is respectively connected to the cathode of the second diode and one end of the fourth resistor, and the anode of the second diode is connected to one end of the fifth resistor, so The other end of the fifth resistor, the other end of the fourth resistor, one end of the sixth resistor, one end of the second capacitor and the cathode of the fourth Zener diode are connected to each other, as the drive circuit The third drive terminal of the MOSFET is connected to the power circuit, the other end of the sixth resistor, the other end of the second capacitor and the cathode of the third Zener diode are connected to each other, as the fourth terminal of the drive circuit The drive terminal is connected to the power circuit, the anode of the third Zener diode is connected to the anode of the fourth Zener diode, and the NC terminal of the lower bridge isolation driving optocoupler is connected to the MCU control circuit. 8. The inverter isolation circuit according to claim 4, wherein the drive circuit comprises an upper bridge drive circuit and a lower bridge drive circuit; The upper bridge drive circuit includes an upper bridge isolation drive chip, a third diode, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a third capacitor, a fifth zener diode and a sixth zener diode ; The CLAMP terminal of the upper bridge isolation driver chip is connected to one end of the tenth resistor, and the Gout terminal of the upper bridge isolation driver chip is respectively connected to the cathode of the third diode and one end of the seventh resistor, so The anode of the third diode is connected to one end of the eighth resistor, the other end of the eighth resistor, one end of the third capacitor, the other end of the seventh resistor, and the other end of the ninth resistor One end is connected to the cathode of the sixth Zener diode and the other end of the tenth resistor, and is connected to the power circuit as the first drive end of the drive circuit, and the other end of the ninth resistor, the The other end of the third capacitor and the cathode of the sixth zener diode are connected to each other, and the second drive end of the drive circuit is connected to the power circuit, and the anode of the fifth zener diode is connected to the sixth zener diode. The anodes of the six Zener diodes are connected to each other; The lower bridge driver circuit includes a lower bridge isolation driver chip, a fourth diode, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fourth capacitor, a seventh zener diode and a third resistor. Eight Zener diodes; The CLAMP terminal of the lower bridge isolation driver chip is connected to one end of the fourteenth resistor, and the Gout terminal of the lower bridge driver circuit is respectively connected to the cathode of the fourth diode and one end of the eleventh resistor, The anode of the fourth diode is connected to one end of the twelfth resistor, the other end of the twelfth resistor, the other end of the eleventh resistor, one end of the thirteenth resistor, and the One end of the fourth capacitor is connected to the cathode of the eighth Zener diode, and the other end of the fourteenth resistor is connected to each other, and is connected to the power circuit as the third drive end of the drive circuit. The other end of the three resistors, the other end of the fourth capacitor and the cathode of the seventh zener diode are connected to each other, and are connected to the power circuit as the fourth drive end of the drive circuit, and the seventh zener diode is connected to the power circuit. The anode of the diode and the anode of the eighth Zener diode are connected to each other. 9. The inverter isolation circuit according to claim 7 or 8, wherein the power circuit comprises an upper bridge power circuit, a lower bridge power circuit and a sampling resistor; The control end of the upper bridge power circuit is connected to the first driving end as the first control end of the power circuit, and the output end of the upper bridge power circuit is connected to the input end of the lower bridge power circuit, as the first control end of the power circuit. The U-phase output terminal of the power circuit is connected to the second driving terminal, the control terminal of the lower bridge power circuit is connected to the third driving terminal as the second control terminal of the power circuit, and the lower bridge power circuit is connected to the third driving terminal. The output end of the circuit is connected to one end of the sampling resistor, the ULE phase output end of the power circuit is connected to the fourth driving end, and the other end of the sampling resistor is grounded. 10 . The inverter isolation circuit according to claim 9 , wherein the upper-bridge power circuit and the lower-bridge power circuit are both full-bridge three-phase rectifier circuits. 11 . 11. The inverter isolation circuit according to claim 10, wherein the control circuit is an MCU.

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