CN114695616A - Reversed-polarity LED structure and manufacturing method thereof - Google Patents

Abstract

The application discloses a reverse polarity LED structure and a manufacturing method thereof, wherein photoetching is carried out on a P-GaP window layer of a reverse polarity epitaxial wafer, a highly doped P-GaP window layer part is etched through a dry etching process or a wet etching process to form a graphical P-GaP window layer, and then an oxidation structure is formed through film coating on the whole surface, so that the external quantum efficiency is improved, the current expansion is better and the voltage is reduced under the condition of not influencing the voltage.

Description

A kind of reverse polarity LED structure and manufacturing method thereof

technical field

The invention relates to the technical field of semiconductor chip fabrication, in particular to a reverse polarity LED structure and a fabrication method thereof.

Background technique

LED is a new light source for lighting in the 21st century. Under the same brightness, the power consumption of semiconductor lamps is only 1/10 of that of ordinary incandescent lamps, and the lifespan can be extended by 100 times. LED devices are cold light sources with high luminous efficiency, low operating voltage, low power consumption, small size, flat packaging, easy to develop thin and light products, sturdy structure and long life, and the light source itself does not contain mercury, lead and other harmful substances , No infrared and ultraviolet pollution, no pollution to the outside world in production and use. Therefore, semiconductor lamps have the characteristics of energy saving, environmental protection, and long life. Just like transistors replace electron tubes, semiconductor lamps will replace traditional incandescent lamps and fluorescent lamps. It will also be the general trend. Whether from the perspective of saving electricity, reducing greenhouse gas emissions, or reducing environmental pollution, LED as a new type of lighting source has great potential to replace traditional lighting sources.

In the current LED chips in the industry, the P-side GaP has a whole-surface structure without patterning, and the P-side GaP highly doped layer absorbs light, resulting in low brightness.

SUMMARY OF THE INVENTION

In view of this, the present invention provides a reverse polarity LED structure and a manufacturing method thereof. By fabricating a patterned P-GaP window layer on a reverse polarity epitaxial wafer, the external quantum efficiency is improved without affecting the voltage, so that the The current spreads better and lowers the voltage.

In order to achieve the above object, the present invention provides the following technical solutions:

A manufacturing method of a reverse polarity LED structure, the manufacturing method comprising:

providing a GaAs substrate;

A GaAs buffer layer, an etch stop layer, a GaAs ohmic contact layer, an N-type roughening layer, an N-type confinement layer, an MQW quantum well active layer, a P-type confinement layer, and a P-type confinement layer are sequentially grown on one surface of the GaAs substrate. -GaP window layer, forming the epitaxial wafer of the reverse polarity LED structure; wherein, the side of the P-GaP window layer away from the P-type confinement layer is a highly doped P-GaP window layer;

The highly doped P-GaP window layer is partially etched by photolithography to form a patterned P-GaP window layer;

An oxide structure is formed on the surface of the patterned P-GaP window layer on one side away from the GaAs substrate, and the oxide structure includes a first oxide layer, a second oxide layer and a third oxide layer, and the second oxide layer a layer between the first oxide layer and the third oxide layer;

The oxidized structure is etched by photolithography to form a plurality of dielectric holes penetrating the oxidized structure, and a dielectric material is filled in the dielectric holes to form a bonded metal structure;

A metal mirror layer is formed on a surface of the oxidized structure away from the epitaxial wafer, and the metal mirror layer is metal-bonded with the bonding metal structure;

performing substrate transfer, removing the GaAs substrate, forming an N electrode on the surface of the epitaxial wafer away from the oxide structure, and forming a roughened structure on both sides of the N electrode;

forming a Si substrate on a surface of the metal mirror layer facing away from the oxide structure;

A P electrode is formed on the side surface of the Si substrate away from the metal mirror layer.

Preferably, in the above manufacturing method, the doping concentration of the highly doped P-GaP window layer portion is 2×10 ¹⁸ cm ⁻³ .

Preferably, in the above manufacturing method, the first oxide layer is an ITO layer, an IZO layer or an Al ₂ O ₃ layer.

Preferably, in the above manufacturing method, the second oxide layer is a SiO ₂ layer.

Preferably, in the above manufacturing method, the third oxide layer is an Al ₂ O ₃ layer, an ITO layer or an IZO layer.

Preferably, in the above manufacturing method, the bonding metal structure is an AuZnAu layer or an AuBeAu layer.

Preferably, in the above manufacturing method, the method for etching the highly doped P-GaP window layer portion includes:

forming a first photoresist layer on the surface of the highly doped P-GaP window layer facing away from the P-type confinement layer;

Using a photolithography process, the first photoresist layer is etched to form a patterned first photoresist layer;

Based on the patterned first photoresist layer, the highly doped P-GaP window layer is partially etched to form a patterned P-GaP window layer;

The remaining first photoresist layer is removed.

Preferably, in the above-mentioned manufacturing method, the method for forming the oxidized structure includes:

forming a first oxide layer on a surface of the patterned P-GaP window layer away from the P-type confinement layer;

forming a second oxide layer on a surface of the first oxide layer away from the patterned P-GaP window layer;

A third oxide layer is formed on a surface of the second oxide layer facing away from the first oxide layer.

Preferably, in the above manufacturing method, the method for forming the bonded metal structure includes:

forming a second photoresist layer on a surface of the third oxide layer away from the second oxide layer;

Using a photolithography process, the second photoresist layer is etched to form a patterned second photoresist layer;

Based on the patterned second photoresist layer, the oxide structure is etched to remove part of the first oxide layer, part of the second oxide layer and part of the third oxide layer to form a plurality of dielectric pores through the oxidized structure;

Filling the dielectric material in the dielectric hole to form a bonded metal structure;

The remaining second photoresist layer is removed.

The present invention also provides a reverse polarity LED structure, and the reverse polarity LED structure includes:

An epitaxial wafer, the epitaxial wafer includes a GaAs buffer layer, an etching cut-off layer, a GaAs ohmic contact layer, an N-type roughening layer, an N-type confinement layer, an MQW quantum well active layer, a P-type confinement layer and A patterned P-GaP window layer; wherein the side of the patterned P-GaP window layer away from the P-type confinement layer is a highly doped P-GaP window layer;

an oxide structure located on the surface of the patterned P-GaP window layer away from the P-type confinement layer, the oxide structure includes a first oxide layer, a second oxide layer and a third oxide layer, the second oxide layer a layer between the first oxide layer and the third oxide layer;

a plurality of bonded metal structures in the oxidized structure;

a metal mirror layer located on the surface of the oxide structure on one side away from the epitaxial wafer, the metal mirror layer is metal-bonded with the bonding metal structure;

an N electrode located on the surface of the epitaxial wafer on one side away from the oxide structure, and a roughened structure located on both sides of the N electrode;

a Si substrate on the surface of the metal mirror layer facing away from the oxide structure;

A P electrode located on the side surface of the Si substrate away from the metal mirror layer.

It can be seen from the above description that in the reverse polarity LED structure and the manufacturing method thereof provided by the technical solution of the present invention, photolithography is performed on the P-GaP window layer of the reverse polarity epitaxial wafer, and the high The doped P-GaP window layer is partially etched to form a patterned P-GaP window layer, and then the entire surface is coated to form an oxide structure, which improves the external quantum efficiency and makes the current spread better without affecting the voltage. , reduce the voltage.

Description of drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the accompanying drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only It is an embodiment of the present application. For those of ordinary skill in the art, other drawings can also be obtained according to the provided drawings without any creative effort.

The structures, proportions, sizes, etc. shown in the drawings in this specification are only used to cooperate with the contents disclosed in the specification, so as to be understood and read by those who are familiar with the technology, and are not used to limit the conditions that the application can be implemented. Therefore, Without technical substantive significance, any structural modification, proportional relationship change or size adjustment should still fall within the technology disclosed in this application without affecting the effect that the application can produce and the purpose that can be achieved. The content must be within the scope of coverage.

1-16 are process flow diagrams of a method for fabricating a reverse-polarity LED structure according to an embodiment of the present invention.

Detailed ways

The embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

In order to make the above objects, features and advantages of the present application more clearly understood, the present application will be described in further detail below with reference to the accompanying drawings and specific embodiments.

Referring to FIG. 1-FIG. 16, FIG. 1-FIG. 16 is a process flow diagram of a manufacturing method of a reverse polarity LED structure provided by an embodiment of the present invention. As shown in FIG. 1-FIG. 16, the manufacturing method includes:

Step S1 : as shown in FIG. 1 , a GaAs substrate 10 is provided;

Step S2: As shown in FIG. 2, using MOCVD (metal organic compound chemical vapor deposition), a GaAs buffer layer 111, an etching stop layer 112, a GaAs ohmic contact layer 113, a GaAs buffer layer 111, an etching stop layer 112, a GaAs ohmic contact layer 113, The N-type roughening layer 114, the N-type confinement layer 115, the MQW quantum well active layer 116, the P-type confinement layer 117, and the P-GaP window layer 118 form the epitaxial wafer 11 of the reverse polarity LED structure; wherein, The side of the P-GaP window layer 118 away from the P-type confinement layer 117 is a highly doped P-GaP window layer 121;

Wherein, the doping concentration of the highly doped P-GaP window layer 121 may be 2×10 ¹⁸ cm ⁻³ .

Step S3: as shown in FIG. 3-FIG. 5, using a photolithography technique to etch a portion of the highly doped P-GaP window layer 121 to form a patterned P-GaP window layer 118;

Wherein, the method for etching the portion of the highly doped P-GaP window layer 121 includes:

First, as shown in FIG. 3 , a first photoresist layer 13 is formed on the side surface of the highly doped P-GaP window layer 121 away from the P-type confinement layer 117 ;

Then, as shown in FIG. 4 , using a photolithography process, the first photoresist layer 13 is etched to form a patterned first photoresist layer 13 ;

Finally, as shown in FIG. 5 , based on the patterned first photoresist layer 13 , the highly doped P-GaP window layer 121 is partially etched to form a patterned P-GaP window layer 118 , and The remaining first photoresist layer 13 is removed.

In the embodiment of the present invention, acetone, isopropanol, deionized water, etc. can be used to clean the surface of the epitaxial wafer 11, and then photolithography is performed on the surface of the P-GaP window layer 118, and the surface layer is removed by dry or wet etching. Part of the highly doped P-GaP window layer 121 is etched to remove the photoresist.

Step S4 : as shown in FIGS. 6 to 8 , an oxide structure 14 is formed on the surface of the patterned P-GaP window layer 118 away from the GaAs substrate 10 , and the oxide structure 14 includes a first oxide layer 141, a second oxide layer 142 and a third oxide layer 143, the second oxide layer 142 is located between the first oxide layer 141 and the third oxide layer 143;

Wherein, the method for forming the oxidized structure 14 includes:

First, as shown in FIG. 6 , a first oxide layer 141 is formed on the side surface of the patterned P-GaP window layer 118 away from the P-type confinement layer 117 ; the first oxide layer 141 may be an ITO layer Or IZO layer or Al ₂ O ₃ layer.

Then, as shown in FIG. 7 , a second oxide layer 142 is formed on the surface of the first oxide layer 141 away from the patterned P-GaP window layer 118 ; the second oxide layer 142 may be SiO ₂ Floor.

Finally, as shown in FIG. 8 , a third oxide layer 143 is formed on the side surface of the second oxide layer 142 away from the first oxide layer 141 . The third oxide layer 143 may be an Al ₂ O ₃ layer, an ITO layer or an IZO layer.

Step S5 : as shown in FIG. 9 to FIG. 12 , the oxide structure 14 is etched by using a photolithography technique to form a plurality of dielectric holes 16 penetrating the oxide structure 14 , and the dielectric holes 16 are filled with a medium material to form a bonding metal structure 17; the bonding metal structure 17 may be an AuZnAu layer or an AuBeAu layer.

Wherein, the method for forming the bonding metal structure 17 includes:

First, as shown in FIG. 9 , a second photoresist layer 15 is formed on the surface of the third oxide layer 143 away from the second oxide layer 142 ;

Then, as shown in FIG. 10 , using a photolithography process, the second photoresist layer 15 is etched to form a patterned second photoresist layer 15 ;

Then, as shown in FIG. 11 , based on the patterned second photoresist layer 15 , the oxide structure 14 is etched to remove part of the first oxide layer 141 and part of the second oxide layer 142 and part of the third oxide layer 143 to form a plurality of dielectric holes 16 penetrating the oxide structure 14;

Finally, as shown in FIG. 12 , a dielectric material is filled in the dielectric holes 16 to form a bonding metal structure 17 , and the remaining second photoresist layer 15 is removed.

Step S6 : as shown in FIG. 13 , a metal mirror layer 18 is formed on the surface of the oxide structure 14 away from the epitaxial wafer 11 , and the metal mirror layer 18 is metal bonded to the bonding metal structure 17 ;

Wherein, the material of the metal surface layer 18 may be any one or a combination of Ag, TiW, Ti, Pt and Au.

Step S7 : as shown in FIG. 14 , substrate transfer is performed, the GaAs substrate 10 is removed, and an N electrode 19 is formed on the surface of the epitaxial wafer 11 away from the oxide structure 14 , and an N electrode 19 is formed on the N electrode A roughened structure 20 is formed on both sides;

Step S8 : as shown in FIG. 15 , a Si substrate 21 is formed on a surface of the metal mirror layer 18 away from the oxide structure 14 ;

Step S9 : as shown in FIG. 16 , a P electrode 22 is formed on the surface of the Si substrate 21 on the side away from the metal mirror layer 18 .

In the embodiment of the present invention, Al ₂ O ₃ /ITO/IZO is plated after the P-GaP window layer 118 is patterned, which can make the current spread better, reduce the voltage, and improve the reliability and brightness. And Al ₂ O ₃ /ITO/IZO can increase the adhesion of SiO ₂ and Ag mirror. The refractive index of GaP (~3.3), the refractive index of SiO ₂ (~1.4), the refractive index of Al ₂ O ₃ /ITO/IZO (~1.8), and the Al ₂ O ₃ /ITO/IZO plating between GaP and SiO ₂ is beneficial to Improve external quantum efficiency and improve brightness.

It can be seen from the above description that in the manufacturing method of the reverse polarity LED structure provided by the technical solution of the present invention, photolithography is performed on the P-GaP window layer of the reverse polarity epitaxial wafer, and the high dopant The miscellaneous P-GaP window layer is partially etched to form a patterned P-GaP window layer, and then the entire surface is coated to form an oxide structure, which improves the external quantum efficiency and makes the current spread better without affecting the voltage. Lower the voltage.

Based on the above-mentioned embodiment, another embodiment of the present invention further includes a reverse-polarity LED structure, and the reverse-polarity LED structure is prepared and formed by the above-mentioned manufacturing method. As shown in FIG. 16 , the reverse-polarity LED structure includes:

Epitaxial wafer 11, the epitaxial wafer 11 includes a GaAs buffer layer 111, an etching stop layer 112, a GaAs ohmic contact layer 113, an N-type roughening layer 114, an N-type confinement layer 115, and an MQW quantum well active layer grown sequentially on the same side layer 116, a P-type confinement layer 117 and a patterned P-GaP window layer 118; wherein, the side of the patterned P-GaP window layer 118 away from the P-type confinement layer 117 is highly doped P- GaP window layer 121;

The oxide structure 14 on the surface of the patterned P-GaP window layer 118 facing away from the P-type confinement layer 117, the oxide structure 14 includes a first oxide layer 141, a second oxide layer 142 and a third oxide layer 143, the second oxide layer 142 is located between the first oxide layer 141 and the third oxide layer 143;

a plurality of bonded metal structures 17 in the oxidized structure 14;

a metal mirror layer 18 located on the surface of the oxide structure 14 away from the epitaxial wafer 11 , the metal mirror layer 18 is metal-bonded with the bonding metal structure 17 ;

The N electrode 19 on the surface of the epitaxial wafer 11 away from the oxide structure 14, and the roughened structure 20 on both sides of the N electrode 19;

The Si substrate 21 on the surface of the metal mirror layer 18 away from the oxide structure 14;

The P electrode 22 is located on the surface of the Si substrate 21 on the side facing away from the metal mirror layer 18 .

It can be seen from the above description that in the reverse polarity LED structure provided by the technical solution of the present invention, by performing photolithography on the P-GaP window layer of the reverse polarity epitaxial wafer, the highly doped P - Part of the GaP window layer is etched to form a patterned P-GaP window layer, and then the entire surface is coated to form an oxide structure, which improves the external quantum efficiency without affecting the voltage, makes the current spread better, and reduces the voltage.

The various embodiments in this specification are described in a progressive manner, or in parallel, or in a combination of progressive and juxtaposed. Each embodiment focuses on the differences from other embodiments, and the same and similar parts between the various embodiments are mutually exclusive. See it. For the reverse polarity LED structure disclosed in the embodiment, since it corresponds to the manufacturing method of the reverse polarity LED structure disclosed in the embodiment, the description is relatively simple.

It should be noted that, in this document, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any relationship between these entities or operations. any such actual relationship or sequence exists. Moreover, the terms "comprising", "comprising" or any other variation thereof are intended to encompass a non-exclusive inclusion, whereby an article or device comprising a list of elements includes not only those elements, but also other elements not expressly listed, Or also include elements inherent to the article or equipment. Without further limitation, an element defined by the phrase "comprising a..." does not preclude the presence of additional identical elements in an article or device that includes the above-mentioned element.

The above description of the disclosed embodiments enables any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, this application is not intended to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A manufacturing method of a reverse polarity LED structure is characterized by comprising the following steps:

providing a GaAs substrate;

sequentially growing a GaAs buffer layer, an etching stop layer, a GaAs ohmic contact layer, an N-type coarsening layer, an N-type limiting layer, an MQW quantum well active layer, a P-type limiting layer and a P-GaP window layer on the surface of one side of the GaAs substrate to form an epitaxial wafer of the reverse polarity LED structure; wherein one side of the P-GaP window layer, which is far away from the P-type limiting layer, is a highly doped P-GaP window layer;

etching the highly doped P-GaP window layer part by adopting a photoetching technology to form a graphical P-GaP window layer;

forming an oxidation structure on the surface of one side, away from the GaAs substrate, of the patterned P-GaP window layer, wherein the oxidation structure comprises a first oxidation layer, a second oxidation layer and a third oxidation layer, and the second oxidation layer is located between the first oxidation layer and the third oxidation layer;

etching the oxidation structure by adopting a photoetching technology to form a plurality of medium holes penetrating through the oxidation structure, and filling medium materials in the medium holes to form a bonding metal structure;

forming a metal mirror layer on the surface of one side of the oxidation structure, which is far away from the epitaxial wafer, wherein the metal mirror layer is in metal bonding with the bonding metal structure;

carrying out substrate transfer, removing the GaAs substrate, forming an N electrode on the surface of one side of the epitaxial wafer, which is far away from the oxidation structure, and forming coarsening structures on two sides of the N electrode;

forming a Si substrate on the surface of one side, away from the oxidation structure, of the metal mirror layer;

and forming a P electrode on the surface of the Si substrate on the side facing away from the metal mirror layer.

2. The method of claim 1, wherein the highly doped P-GaP window layer has a doping concentration of 2 x 10¹⁸cm^-3。

3. The method of claim 1, wherein the first oxide layer is an ITO layer, an IZO layer, or Al₂O₃A layer.

4. The method of claim 1, wherein the second oxide layer is SiO₂And (3) a layer.

5. The method of claim 1, wherein the third oxide layer is Al₂O₃A layer or an ITO layer or an IZO layer.

6. The method of claim 1, wherein the bonding metal structure is an AuZnAu layer or an AuBeAu layer.

7. The method of claim 1, wherein the etching the highly doped P-GaP window layer comprises:

forming a first photoresist layer on the surface of one side, away from the P-type limiting layer, of the highly doped P-GaP window layer;

etching the first photoresist layer by adopting a photoetching process to form a patterned first photoresist layer;

etching the highly doped P-GaP window layer part based on the patterned first photoresist layer to form a patterned P-GaP window layer;

and removing the residual first photoresist layer.

8. The method of claim 1, wherein forming the oxide structure comprises:

forming a first oxide layer on the surface of one side, away from the P-type limiting layer, of the patterned P-GaP window layer;

forming a second oxide layer on the surface of one side of the first oxide layer, which is far away from the patterned P-GaP window layer;

and forming a third oxide layer on the surface of one side of the second oxide layer, which is far away from the first oxide layer.

9. The method of making according to claim 1, wherein forming the bond metal structure comprises:

forming a second photoresist layer on the surface of one side of the third oxide layer, which is far away from the second oxide layer;

etching the second photoresist layer by adopting a photoetching process to form a patterned second photoresist layer;

etching the oxidation structure based on the patterned second photoresist layer, removing part of the first oxidation layer, part of the second oxidation layer and part of the third oxidation layer, and forming a plurality of medium holes penetrating through the oxidation structure;

filling a dielectric material in the dielectric hole to form a bonding metal structure;

and removing the residual second photoresist layer.

10. A reverse polarity LED structure, comprising:

the epitaxial wafer comprises a GaAs buffer layer, an etch stop layer, a GaAs ohmic contact layer, an N-type coarsening layer, an N-type limiting layer, an MQW quantum well active layer, a P-type limiting layer and a graphical P-GaP window layer which are sequentially grown on the same side; wherein one side of the graphical P-GaP window layer, which is far away from the P-type limiting layer, is a highly doped P-GaP window layer;

the oxidation structure is positioned on the surface of one side, away from the P-type limiting layer, of the patterned P-GaP window layer and comprises a first oxidation layer, a second oxidation layer and a third oxidation layer, and the second oxidation layer is positioned between the first oxidation layer and the third oxidation layer;

a plurality of bond metal structures located in the oxidized structure;

the metal mirror layer is positioned on the surface of one side, away from the epitaxial wafer, of the oxidation structure, and the metal mirror layer is in metal bonding with the bonding metal structure;

the N electrode is positioned on the surface of one side, away from the oxidation structure, of the epitaxial wafer, and the coarsening structures are positioned on the two sides of the N electrode;

the Si substrate is positioned on the surface of one side, away from the oxidation structure, of the metal mirror layer;

and the P electrode is positioned on the surface of the Si substrate on the side away from the metal mirror layer.

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