CN114615812B - A monitoring method for PCB etching pattern accuracy and PCB manufacturing method - Google Patents

Abstract

The invention discloses a monitoring method for the accuracy of a PCB etched pattern and a PCB manufacturing method, wherein the monitoring method for the accuracy of the PCB etched pattern comprises the following steps: etching a target circuit and a monitoring graphic module on the surface metal layer of the plate; the target circuit is used for participating in forming a circuit structure in a PCB finished product, the monitoring pattern module comprises a plurality of monitoring lines, wherein the design distance between two monitoring lines is one time of the maximum allowable deviation of the line width, and the design superposition width between two monitoring lines is one time of the maximum allowable lower deviation of the line width; and determining whether the line width of the target line meets the precision requirement according to the interval or the superposition state between the etched monitoring lines. The monitoring method for the etching pattern precision of the PCB and the PCB manufacturing method can improve the detection efficiency of the etching pattern manufacturing precision in the PCB manufacturing process.

Description

A monitoring method for PCB etching pattern accuracy and PCB manufacturing method

Technical Field

The invention relates to the technical field of PCB manufacturing, and in particular to a monitoring method for PCB etching pattern accuracy and a PCB manufacturing method.

Background Art

At present, some PCBs have very high requirements for the production of circuit graphics. For example, the production requirements of high-frequency antenna PCBs are usually higher than 1 mil. Therefore, during the production process of these PCBs, it is necessary to monitor the size of the graphics formed by etching. In the related technology, sample boards are extracted, and then optical detection and other methods are used to detect the line width of the graphics in the sample boards one by one, and each line width obtained by the detection is compared and calculated with the standard graphic line width one by one to confirm whether the graphic size exceeds the tolerance. Therefore, the detection process is cumbersome and inefficient, which seriously affects production efficiency.

Summary of the invention

The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the present invention provides a monitoring method for PCB etching pattern accuracy and a PCB manufacturing method to improve the detection efficiency of etching pattern manufacturing accuracy during the PCB manufacturing process.

To achieve this object, the present invention adopts the following technical solutions:

A method for monitoring the accuracy of PCB etching patterns comprises the following steps:

Etching a target circuit and a monitoring graphic module on the surface metal layer of the board; wherein the target circuit is used to participate in forming a circuit structure in a finished PCB product, and the monitoring graphic module includes a plurality of monitoring lines, wherein a design spacing between two monitoring lines is one times the maximum upper deviation allowed by the line width, and a design overlap width between two monitoring lines is one times the maximum lower deviation allowed by the line width;

Based on the spacing or overlap between the monitored lines after etching, determine whether the line width of the target line meets the accuracy requirements.

Optionally, the monitoring graphic module includes a first monitoring line, a second monitoring line and a third monitoring line, the design spacing between the first monitoring line and the second monitoring line is twice the maximum upper deviation allowed by the line width, and the design overlap width between the first monitoring line and the third monitoring line is twice the maximum lower deviation allowed by the line width.

Optionally, the second monitoring line and the third monitoring line are both located on the same side of the first monitoring line.

Optionally, the design line widths of the first monitoring line, the second monitoring line, and the third monitoring line are all greater than 8 mil, and the design lengths are all greater than 10 mm.

Optionally, in the length direction of the first monitoring line, the size of the relative area between the first monitoring line and the second monitoring line and the size of the overlapping area between the first monitoring line and the third monitoring line are both greater than 1 mil.

Specifically, determining whether the line width of the target line meets the accuracy requirement based on the interval or overlap state between the monitored lines after etching includes the following steps:

Determine the spacing or overlap between monitoring lines. If two monitoring lines with a design spacing of one times the maximum upper deviation allowed by the line width overlap, it is determined that the line width of the target line is greater than the maximum allowed value.

Specifically, determining whether the line width of the target line meets the accuracy requirement based on the interval or overlap state between the monitored lines after etching includes the following steps:

If a gap appears between two monitoring lines whose designed overlap width is one times the maximum lower deviation allowed by the line width, it is determined that the line width of the target line is less than the minimum allowed value.

Optionally, etching a target circuit and a monitoring graphic module on the surface metal layer of the board includes the following steps:

A target circuit and a plurality of monitoring graphic modules are etched on the surface metal layer of the board, and the plurality of monitoring graphic modules are distributed at different positions of the board.

Optionally, determining whether the line width of the target line meets the accuracy requirement based on the interval or overlap state between the monitored lines after etching includes the following steps:

According to the interval or overlap between the monitoring lines in each monitoring graphic module, it is determined whether the line width of the target line in the peripheral area of each monitoring graphic module meets the accuracy requirement.

A PCB manufacturing method, using any of the above methods for monitoring PCB etching pattern accuracy to monitor the line width of a target line;

If the line width of the target line does not meet the precision requirement, the etching process parameters are adjusted so that the line width of the target line meets the precision requirement.

Compared with the prior art, the present invention has the following beneficial effects:

By etching a monitoring graphic module on a plate at the same time as etching a target circuit, since the etching process parameter conditions of the monitoring graphic module and the target circuit are consistent, the difference between the actual line width of each monitoring line in the monitoring graphic module after etching and the designed line width can be made substantially the same as the difference between the actual line width of the target circuit after etching and the designed line width. When the actual line width of the monitoring line is wider, the spacing between the two monitoring lines will be reduced, and when the difference between the actual line width and the designed line width exceeds the maximum upper deviation allowed, the two monitoring lines that originally had the designed spacing will overlap. When the actual line width of the monitoring line is narrower, and when the difference between the actual line width and the designed line width exceeds the maximum lower deviation allowed, there will be a gap between the two monitoring lines that were originally designed to overlap. Therefore, the present invention only needs to observe the change in the spacing or overlapping state between the monitoring lines after etching to understand whether the line width of the target circuit exceeds the required accuracy, without measuring and comparing the specific widths of the line widths one by one, so it can greatly improve the detection efficiency of the etching pattern production accuracy.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and/or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

FIG1 is a flow chart of a method for monitoring PCB etching pattern accuracy according to a first embodiment of the present invention;

2 is a schematic diagram of the positional relationship between the first monitoring line, the second monitoring line and the third monitoring line when the etching effect reaches the optimal idealization in the first embodiment of the present invention;

3 is a schematic diagram of the positional relationship between the first monitoring line, the second monitoring line and the third monitoring line when the widening degree of the line width does not reach the upper deviation range in the first embodiment of the present invention;

4 is a schematic diagram of the positional relationship between the first monitoring line, the second monitoring line and the third monitoring line when the widening degree of the line width reaches the upper deviation range in the first embodiment of the present invention;

5 is a schematic diagram of the positional relationship between the first monitoring line, the second monitoring line and the third monitoring line when the widening degree of the line width exceeds the upper deviation range in the first embodiment of the present invention;

6 is a schematic diagram of the positional relationship between the first monitoring line, the second monitoring line and the third monitoring line when the narrowing degree of the line width does not reach the lower deviation range in the first embodiment of the present invention;

7 is a schematic diagram of the positional relationship between the first monitoring line, the second monitoring line and the third monitoring line when the narrowing degree of the line width reaches the lower deviation range in the first embodiment of the present invention;

8 is a schematic diagram of the positional relationship between the first monitoring line, the second monitoring line and the third monitoring line when the narrowing degree of the line width exceeds the lower deviation range in the first embodiment of the present invention;

FIG. 9 is a flow chart of a method for manufacturing a PCB according to a second embodiment of the present invention.

Reference numerals:

The first monitoring line 10, the second monitoring line 20, the third monitoring line 30, the designed spacing D1, and the designed overlap width D2.

DETAILED DESCRIPTION

Embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

In the description of the present invention, it should be understood that descriptions involving orientation, such as up, down, left, right, front, back, etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

In the description of the present invention, if there is a description of first and second, it is only for the purpose of distinguishing the technical features, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.

The following describes a method for monitoring PCB etching pattern accuracy according to a first embodiment of the present invention with reference to FIGS. 1 to 8 .

1, the monitoring method of PCB etching pattern accuracy of the present embodiment is applied to the etching process of the PCB manufacturing process, and specifically includes the following steps:

S110, etching a target circuit and a monitoring graphic module on the surface metal layer of the board;

It should be noted that the board can be a substrate used in a single-layer PCB finished product and a composite board composed of copper foil attached to the surface of the substrate. The board can also be a multi-layer laminated board used in a multi-layer PCB finished product and a composite board composed of a copper plating attached to the surface of the laminated board, or it can be other semi-finished boards that require etching processing during the PCB production process.

It should also be explained that the target circuit is used to participate in the subsequent formation of the circuit structure in the finished PCB product, that is, the circuit that actually needs to produce conduction and other functions in the finished PCB product; the monitoring graphic module includes a plurality of monitoring lines, and these monitoring lines are mainly used to assist in monitoring the accuracy of the etching graphics in the etching process, that is, the monitoring lines are process-assisted lines, which basically do not participate in the formation of the conduction circuit of the finished PCB product.

Furthermore, among the multiple monitoring lines that need to be etched, referring to Figure 2, the design spacing D1 between two monitoring lines (for example, the first monitoring line and the second monitoring line to be mentioned below) is twice the maximum upper deviation allowed by the line width, and the design overlap width D2 between two monitoring lines (for example, the first monitoring line and the third monitoring line to be mentioned below) is twice the maximum lower deviation allowed by the line width.

It should be noted that the maximum upper deviation and the maximum lower deviation allowed for the line width can be determined based on the tolerance range of the line width during design. For example, when the tolerance range of the line width is ±20μm, the maximum upper deviation is 20μm, and the maximum lower deviation is also 20μm. At this time, D1=D2=20μm.

It should be understood that the design spacing D1 between the two monitoring lines refers to the spacing between the two monitoring lines when the etching effect reaches the best idealization according to the design requirements or design drawings, etc. Similarly, the design overlap width D2 between the two monitoring lines refers to the width of the overlapped portion between the two monitoring lines when the etching effect reaches the best idealization according to the design requirements or design drawings, etc.

It should be understood that the process steps of etching the target circuit and each monitoring line on the board can be carried out according to a conventional etching process, and no specific limitation is made in this embodiment.

S120, determining whether the line width of the target circuit meets the accuracy requirement based on the interval or overlap status between the monitored lines after etching.

It should be understood that since the target circuit and the various monitoring lines in the monitoring graphic module are formed together on the metal layer of the board through an etching process, the difference between the actual line width of each monitoring line after etching and the designed theoretical line width, and the difference between the actual line width of the target circuit after etching and the designed line width will be basically the same, that is, the actual width of the monitoring line after etching becomes wider or narrower relative to the designed line width, which is basically the same as the actual width of the target circuit after etching becomes wider or narrower relative to the designed line width.

When the line width becomes wider after etching, the distance between the two monitoring lines whose original design spacing D1 is one times the maximum upper deviation allowed by the line width will be reduced. Referring to FIG3 , when the degree of line width widening has not yet reached the maximum upper deviation, there is still a gap between the two monitoring lines; referring to FIG4 , when the degree of line width widening reaches the maximum upper deviation, since the two monitoring lines are widened at the same time, the widened parts of the two monitoring lines will just fill the original gap, so that the edges of the two monitoring lines fit each other; referring to FIG5 , when the degree of line width widening exceeds the maximum upper deviation, since the two monitoring lines are widened at the same time, the widened parts of the two monitoring lines will not only fill the original gap, but also the two monitoring lines will overlap.

When the line width becomes narrower after etching, the width of the overlapping part between the two monitoring lines, which originally overlapped and the designed overlapping width D2 is twice the maximum lower deviation allowed by the line width, will be reduced. Referring to Figure 6, when the degree of line width narrowing has not reached the maximum lower deviation, there is still an overlapping area between the two monitoring lines; referring to Figure 7, when the degree of line width narrowing reaches the maximum lower deviation, since the two monitoring lines are narrowed at the same time, the narrowed and disappeared parts of the two monitoring lines will just be the originally designed overlapping parts, so that the edges of the two monitoring lines fit together; and when the degree of line width narrowing exceeds the maximum lower deviation, a gap will appear between the two monitoring lines.

In summary, the present invention can determine whether the line width of the target line meets the accuracy requirements, that is, whether it is within the design tolerance range of the line width, by judging the interval or overlap between the monitoring lines, without measuring and comparing the specific width of the line width one by one, so it can greatly improve the detection efficiency of the etching pattern production accuracy.

Furthermore, specifically, through the above analysis, it can be known that in step S120, it can be determined that the line width of the target line does not meet the graphic accuracy requirement mainly through the following two points:

If two monitoring lines with a design spacing D1 equal to one times the maximum upper deviation allowed by the line width overlap, it is determined that the line width of the target line is greater than the maximum allowed value;

If a gap appears between two monitoring lines whose designed overlap width D2 is one times the maximum lower deviation allowed by the line width, it is determined that the line width of the target line is less than the minimum allowed value.

In cases other than the above two points, it can be determined that the line width of the target line is within the graphic accuracy requirements.

It can be understood that in order to ensure that there is a designed spacing D1 between two monitoring lines and a designed overlap width D2 between the two monitoring lines, the monitoring graphic module needs to include at least three monitoring lines; and, in this embodiment, in order to reduce some unnecessary monitoring lines and avoid affecting the overall size of the panel, the monitoring graphic module includes three monitoring lines, namely the first monitoring line 10, the second monitoring line 20 and the third monitoring line 30, wherein the designed spacing D1 between the first monitoring line 10 and the second monitoring line 20 is one times the maximum upper deviation allowed by the line width, and the designed overlap width D2 between the first monitoring line 10 and the third monitoring line 30 is one times the maximum lower deviation allowed by the line width.

It should be understood that, depending on the actual application, in some other embodiments, the monitoring graphic module may also use four or more monitoring lines; for example, the monitoring graphic module may also include a first monitoring line 10, a second monitoring line 20, a third monitoring line 30 and a fourth monitoring line, wherein the design spacing D1 between the first monitoring line 10 and the second monitoring line 20 is one times the maximum upper deviation allowed by the line width, and the design overlap width D2 between the fourth monitoring line and the third monitoring line 30 is one times the maximum lower deviation allowed by the line width.

In this embodiment, in order to further reduce the impact on the overall size of the plate in the width direction, in this embodiment, the second monitoring line 20 and the third monitoring line 30 are both located on the same side of the first monitoring line 10 .

It should be understood that, according to actual applications, in some other embodiments, the second monitoring line 20 and the third monitoring line 30 may be respectively arranged on opposite sides of the first monitoring line 10 in the width direction, and no specific limitation is made here.

It is understandable that when the line width is too small, it is not easy to form through the etching process. Therefore, the design line width of the first monitoring line 10, the second monitoring line 20 and the third monitoring line 30 should all be greater than 8 mils, for example, in this embodiment, they can all be 10 mils; and when the length of the monitoring line is too short, it is not easy to observe the monitoring lines in the monitoring graphic module. In order to avoid affecting the subsequent detection efficiency due to difficulty in observation after etching, the design lengths of the first monitoring line 10, the second monitoring line 20 and the third monitoring line 30 should all be greater than 10 mm, for example, in this embodiment, specifically, they are all 15 mm.

Moreover, similarly, in order to facilitate the observation of whether there are gaps or overlaps between the monitoring lines, the size of the relative area between the monitoring lines in the length direction of the first monitoring line 10 and other monitoring lines should not be too small; therefore, in the present embodiment, in the length direction of the first monitoring line 10 and other monitoring lines, the size of the relative area between the first monitoring line 10 and the second monitoring line 20 and the size of the overlapping area between the first monitoring line 10 and the third monitoring line 30 are both greater than 1 mil, for example, in the present embodiment, they can both be 3 mils.

It is understandable that in the production process of PCB, one board can often be used to form multiple PCB products, that is, the board can form multiple target circuits required for multiple PCB products when etching. The size of such boards is usually large and much larger than the size of the finished PCB. In addition, in the production process of PCB, for some electronic products with larger volumes, the corresponding finished PCB may only have one set of target circuits etched, but the size may also be relatively large. It should be understood that each set of target circuits includes multiple target circuits.

Therefore, considering that when the board is large, the etching speeds at different positions of the board may be different, in this case it is necessary to monitor the target lines at different positions or areas of the board respectively; for this reason, in some embodiments, step S110 specifically includes the following steps:

A target circuit and a plurality of monitoring graphic modules are etched on the surface metal layer of the board, and the plurality of monitoring graphic modules are distributed at different positions of the board.

It should be understood that in this step S110, for a board that corresponds to the production of multiple PCB products, the target circuits etched on the board also have multiple groups; and for a board that is only used to produce a PCB product with a larger area, there may be only one group of target circuits etched on the board, and therefore the number of groups of target circuits on the board is not limited here.

Correspondingly, in step S120, the following steps are specifically included:

According to the interval or overlap between the monitoring lines in each monitoring graphic module, it is determined whether the line width of the target line in the peripheral area of each monitoring graphic module meets the accuracy requirement.

It should be understood that in this step, if a board is used to produce multiple PCB products, and the PCB products are relatively small, each monitoring graphic module can be used to monitor all target lines in at least one group of target lines around it. If a board is only used to produce a PCB product with a larger area, and there is only one group of target lines etched on the board, each monitoring graphic module can be used to monitor at least one target line around it.

9 , a PCB manufacturing method according to a second embodiment of the present invention is described below.

The PCB manufacturing method of this embodiment includes the following steps:

S100, using the PCB etching pattern accuracy monitoring method described in Example 1 to monitor the line width of the target line; since the specific implementation methods of step S100 have been described in the above Example 1, they will not be repeated here.

S200: If the line width of the target line does not meet the precision requirement, the etching process parameters are adjusted to make the line width of the target line meet the precision requirement.

It is understood that the etching process parameters may be conventional technical parameters that can be adjusted in the etching process, such as etching reaction temperature and/or etching time, and are not specifically limited here. In addition, when it is detected that the line width of the circuit exceeds the maximum upper deviation, it can be adjusted by reducing the etching time and/or lowering the etching reaction temperature; otherwise, it can be adjusted by increasing the etching time and/or increasing the etching reaction temperature.

Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims (8)

1. A method for monitoring the accuracy of PCB etching patterns, comprising: Etching a target circuit and a monitoring graphic module on the surface metal layer of the board; wherein the target circuit is used to participate in forming a circuit structure in a finished PCB product, and the monitoring graphic module includes a plurality of monitoring lines, wherein a design spacing between two of the monitoring lines is one times the maximum upper deviation allowed by the line width, and a design overlap width between two of the monitoring lines is one times the maximum lower deviation allowed by the line width; According to the spacing or overlap between the monitoring lines after etching, determine whether the line width of the target line meets the accuracy requirements; if overlap occurs between two monitoring lines whose design spacing is twice the maximum upper deviation allowed by the line width, it is determined that the line width of the target line is greater than the maximum allowed value; if a spacing occurs between two monitoring lines whose design overlap width is twice the maximum lower deviation allowed by the line width, it is determined that the line width of the target line is less than the minimum allowed value. 2. A method for monitoring the accuracy of PCB etching patterns according to claim 1, characterized in that the monitoring pattern module includes a first monitoring line, a second monitoring line and a third monitoring line, the design spacing between the first monitoring line and the second monitoring line is twice the maximum upper deviation allowed by the line width, and the design overlap width between the first monitoring line and the third monitoring line is twice the maximum lower deviation allowed by the line width. 3. A method for monitoring PCB etching pattern accuracy according to claim 2, characterized in that the second monitoring line and the third monitoring line are both located on the same side of the first monitoring line. 4. A method for monitoring the accuracy of PCB etching patterns according to claim 2, characterized in that the design line widths of the first monitoring line, the second monitoring line and the third monitoring line are all greater than 8 mils, and the design lengths are all greater than 10 mm. 5. A method for monitoring the accuracy of PCB etching patterns according to claim 2, characterized in that, in the length direction of the first monitoring line, the size of the relative area between the first monitoring line and the second monitoring line and the size of the overlapping area between the first monitoring line and the third monitoring line are both greater than 1 mil. 6. A method for monitoring the PCB etching pattern accuracy according to any one of claims 1 to 5, characterized in that etching a target circuit and a monitoring pattern module on the surface metal layer of the plate comprises the following steps: A target circuit and a plurality of monitoring graphic modules are etched on the surface metal layer of the board, and the plurality of monitoring graphic modules are distributed at different positions of the board. 7. A method for monitoring the accuracy of PCB etching patterns according to claim 6, characterized in that the step of determining whether the line width of the target line meets the accuracy requirement based on the interval or overlap between the monitoring lines after etching comprises the following steps: According to the interval or overlap between the monitoring lines in each monitoring graphic module, it is determined whether the line width of the target line in the peripheral area of each monitoring graphic module meets the accuracy requirement. 8. A PCB manufacturing method, characterized in that it includes the following steps: The line width of the target line is monitored by using a PCB etching pattern accuracy monitoring method as described in any one of claims 1 to 7; If the line width of the target line does not meet the precision requirement, the etching process parameters are adjusted so that the line width of the target line meets the precision requirement.