CN114597244B - Display panel and mobile terminal - Google Patents
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- CN114597244B CN114597244B CN202210200015.7A CN202210200015A CN114597244B CN 114597244 B CN114597244 B CN 114597244B CN 202210200015 A CN202210200015 A CN 202210200015A CN 114597244 B CN114597244 B CN 114597244B
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- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 34
- 230000031700 light absorption Effects 0.000 claims abstract description 22
- 229910052751 metal Inorganic materials 0.000 claims description 98
- 239000002184 metal Substances 0.000 claims description 98
- 238000002161 passivation Methods 0.000 claims description 52
- 239000000463 material Substances 0.000 claims description 21
- 229910052698 phosphorus Inorganic materials 0.000 claims description 15
- 239000011574 phosphorus Substances 0.000 claims description 15
- 238000003475 lamination Methods 0.000 claims description 2
- 238000000034 method Methods 0.000 abstract description 21
- 238000001514 detection method Methods 0.000 abstract description 16
- 230000008569 process Effects 0.000 abstract description 14
- 239000010410 layer Substances 0.000 description 521
- 239000011229 interlayer Substances 0.000 description 17
- 239000000758 substrate Substances 0.000 description 17
- -1 phosphorus ion Chemical class 0.000 description 14
- 238000005530 etching Methods 0.000 description 12
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical group [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 9
- 239000007769 metal material Substances 0.000 description 9
- 238000000151 deposition Methods 0.000 description 8
- 230000004888 barrier function Effects 0.000 description 6
- 230000006870 function Effects 0.000 description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 5
- 229920005591 polysilicon Polymers 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000010521 absorption reaction Methods 0.000 description 3
- 229910010272 inorganic material Inorganic materials 0.000 description 3
- 239000011147 inorganic material Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 239000002210 silicon-based material Substances 0.000 description 3
- 229910004205 SiNX Inorganic materials 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005224 laser annealing Methods 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 239000004793 Polystyrene Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- YZZNJYQZJKSEER-UHFFFAOYSA-N gallium tin Chemical compound [Ga].[Sn] YZZNJYQZJKSEER-UHFFFAOYSA-N 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 239000004417 polycarbonate Substances 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 229920002223 polystyrene Polymers 0.000 description 1
- 230000009711 regulatory function Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 239000013589 supplement Substances 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
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- Life Sciences & Earth Sciences (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Sustainable Development (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
Abstract
The embodiment of the application provides a display panel and a mobile terminal; the display panel comprises a plurality of sub-pixel units, wherein at least one sub-pixel unit comprises a switch transistor and at least one light-sensitive sensor, the light-sensitive sensor comprises a light shielding layer, a first insulating layer, a light-absorbing layer and a light-sensitive electrode layer, the orthographic projection of the light-absorbing layer on the light shielding layer is positioned in the light shielding layer, the light-sensitive electrode layer comprises a first light-sensitive electrode and a second light-sensitive electrode which are arranged separately, the first light-sensitive electrode is electrically connected with a first end of the light-absorbing layer, and the second light-sensitive electrode is electrically connected with a second end of the light-absorbing layer; according to the display panel, at least one photosensitive sensor is arranged in at least one sub-pixel unit, the photosensitive sensor comprises the light absorption layer and the photosensitive electrode layer electrically connected with the light absorption layer, and the photosensitive sensor can be integrated in the sub-pixel unit only by adding an amorphous silicon process, so that the detection of ambient light is realized at low cost.
Description
Technical Field
The application relates to the field of display, in particular to a display panel and a mobile terminal.
Background
With the rapid development of the panel industry, other requirements are put on the display panel in addition to requirements on high resolution, wide viewing angle, low power consumption and the like of the display. The display panel has the advantages of enriching the functions of the panel, increasing man-machine interaction and improving the competitiveness of the display panel, and is one of the main development directions of the display panel at present. The ambient light detection function can automatically adjust the screen brightness according to the brightness of the external environment, and can also automatically turn on a flash lamp or supplement light when photographing according to the external environment.
However, the existing ambient light sensor basically adopts an external hanging manner, which inevitably increases the manufacturing cost. Therefore, how to integrate the ambient light sensor inside the array substrate with a smaller number of masks, thereby realizing the integration of low-cost ambient light detection, has become a technical difficulty faced by various panel manufacturers and terminal manufacturers.
Therefore, a display panel and a mobile terminal are needed to solve the above-mentioned problems.
Disclosure of Invention
The embodiment of the application provides a display panel and a mobile terminal, which can solve the technical problem that the current display panel is difficult to realize low-cost detection of ambient light.
The embodiment of the application provides a display panel, which comprises a plurality of sub-pixel units, wherein at least one sub-pixel unit comprises a switch transistor and at least one photosensitive sensor; the light-sensitive sensor comprises a light-shielding layer, a first insulating layer arranged on the light-shielding layer, a light-absorbing layer arranged on the first insulating layer, and a light-sensitive electrode layer arranged on the light-absorbing layer;
The light-absorbing layer is positioned in the shading layer in a orthographic projection manner, the photosensitive electrode layer comprises a first photosensitive electrode and a second photosensitive electrode which are arranged in a separated manner, the first photosensitive electrode is electrically connected with the first end of the light-absorbing layer, and the second photosensitive electrode is electrically connected with the second end of the light-absorbing layer.
Optionally, in some embodiments of the present application, the light sensing sensor further includes a second metal layer, where the second metal layer is disposed in the same layer as and insulated from the source-drain metal layer in the switching transistor, and the second metal layer includes a first metal block and a second metal block disposed in insulation with the first metal block;
The first photosensitive electrode is electrically connected with the driving chip of the display panel through the first metal block, and the second photosensitive electrode is electrically connected with the driving chip through the second metal block.
Optionally, in some embodiments of the present application, the light shielding layer includes at least two of a first sub light shielding layer, a second sub light shielding layer, and a third sub light shielding layer;
The first sub-shading layer and the shading metal layer in the switch transistor are arranged in the same layer and in an insulating manner, the second sub-shading layer and the grid metal layer in the switch transistor are arranged in the same layer and in an insulating manner, and the third sub-shading layer and the second metal layer are arranged in the same layer and in an insulating manner.
Optionally, in some embodiments of the present application, the light sensing sensor further includes an ohmic contact layer disposed on the light absorbing layer, the ohmic contact layer including a first sub-ohmic contact layer and a second sub-ohmic contact layer disposed insulated from the first sub-ohmic contact layer;
The first photosensitive electrode is electrically connected with the light absorption layer through the first sub-ohmic contact layer, and the second photosensitive electrode is electrically connected with the light absorption layer through the second sub-ohmic contact layer.
Optionally, in some embodiments of the present application, the material of the ohmic contact layer is a phosphorus ion heavily doped amorphous silicon layer, and the material of the light absorbing layer is an amorphous silicon layer.
Optionally, in some embodiments of the present application, each of the first photosensitive electrode layer and the second photosensitive electrode layer includes a first sub-electrode and a second sub-electrode disposed on the first sub-electrode, where the first sub-electrode is electrically connected to the light absorbing layer through the ohmic contact layer, and the second sub-electrode is electrically connected to the second metal layer;
the first sub-electrode and the common electrode in the switch transistor are arranged in the same layer and in an insulating way, and the second sub-electrode and the pixel electrode in the switch transistor are arranged in the same layer and in an insulating way.
Optionally, in some embodiments of the present application, each of the first photosensitive electrode layer and the second photosensitive electrode layer includes a third sub-electrode, one end of the third sub-electrode is directly electrically connected to the light absorbing layer, and the other end of the third sub-electrode is electrically connected to the second metal layer;
The third sub-electrode and the pixel electrode in the switch transistor are arranged in the same layer and insulated.
Optionally, in some embodiments of the present application, the switching transistor further includes a planarization layer, a first passivation layer disposed on the planarization layer, the common electrode disposed on the first passivation layer, a second passivation layer disposed on the first passivation layer and covering the common electrode, and the pixel electrode disposed on the second passivation layer;
wherein the first insulating layer comprises the first passivation layer or a lamination layer formed by the planarization layer and the first passivation layer.
Optionally, in some embodiments of the present application, a portion of the planarization layer corresponding to the photosensitive sensor has an opening, and a portion of the first passivation layer is disposed in the opening;
the light absorption layer is arranged on the first passivation layer and is positioned in the opening.
Correspondingly, the embodiment of the application also provides a mobile terminal, which comprises a terminal main body and the display panel according to any one of the above, wherein the terminal main body and the spliced display panel are combined into a whole.
The embodiment of the application provides a display panel and a mobile terminal; the display panel comprises a plurality of sub-pixel units, at least one sub-pixel unit comprises a switch transistor and at least one photosensitive sensor, the photosensitive sensor comprises a shading layer, a first insulating layer arranged on the shading layer, a light absorption layer arranged on the first insulating layer and a photosensitive electrode layer arranged on the light absorption layer, the orthographic projection of the light absorption layer on the shading layer is positioned in the shading layer, the photosensitive electrode layer comprises a first photosensitive electrode and a second photosensitive electrode which are arranged separately, the first photosensitive electrode is electrically connected with a first end of the light absorption layer, and the second photosensitive electrode is electrically connected with a second end of the light absorption layer; according to the display panel, at least one photosensitive sensor is arranged in at least one sub-pixel unit, and comprises the light absorption layer and the photosensitive electrode layer electrically connected with the light absorption layer, and the photosensitive sensor is integrated in the sub-pixel unit only by adding an amorphous silicon process, so that the detection of ambient light is realized at low cost.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic cross-sectional view of a display panel according to an embodiment of the present application;
fig. 2 is a schematic cross-sectional view of a display panel according to an embodiment of the present application;
fig. 3 is a schematic cross-sectional view of a display panel according to an embodiment of the present application;
FIG. 4 is a schematic flow chart of a method for manufacturing a first display panel according to the present application;
Fig. 5A to 5E are specific processes of the method for manufacturing a display panel according to the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to fall within the scope of the application. Furthermore, it should be understood that the detailed description is presented herein for purposes of illustration and description only, and is not intended to limit the application. In the present application, unless otherwise indicated, terms of orientation such as "upper" and "lower" are used to generally refer to the upper and lower positions of the device in actual use or operation, and specifically the orientation of the drawing figures; while "inner" and "outer" are for the outline of the device.
The embodiment of the application aims at the technical problem that the current display panel is difficult to realize low-cost detection of ambient light, and can improve the technical problem.
The technical scheme of the present application will now be described with reference to specific embodiments.
Referring to fig. 1 to 5E, an embodiment of the present application provides a display panel 10, which includes a plurality of sub-pixel units, at least one of the sub-pixel units includes a switching transistor T1 and at least one photosensitive sensor S1; wherein the photosensitive sensor S1 comprises a light shielding layer 201, a first insulating layer disposed on the light shielding layer 201, a light absorbing layer 203 disposed on the first insulating layer, and a photosensitive electrode layer disposed on the light absorbing layer 203;
The orthographic projection of the light absorbing layer 203 on the light shielding layer 201 is located in the light shielding layer 201, the photosensitive electrode layer includes a first photosensitive electrode 205 and a second photosensitive electrode 206 that are separately disposed, the first photosensitive electrode 205 is electrically connected to a first end of the light absorbing layer 203, and the second photosensitive electrode 206 is electrically connected to a second end of the light absorbing layer 203.
According to the display panel 10 provided by the embodiment of the application, at least one photosensitive sensor S1 is arranged in at least one sub-pixel unit, the photosensitive sensor S1 comprises a light absorption layer 203 and a photosensitive electrode layer electrically connected with the light absorption layer 203, and the photosensitive sensor S1 is integrated in the sub-pixel unit only by adding an amorphous silicon process, so that the detection of ambient light with low cost is realized.
The technical scheme of the present application will now be described with reference to specific embodiments.
Example 1
Fig. 1 is a schematic cross-sectional view of a display panel 10 according to an embodiment of the present application; the display panel 10 includes a plurality of sub-pixel units, at least one of which includes a switching transistor T1 and at least one photosensitive sensor S1; wherein the photosensitive sensor S1 comprises a light shielding layer 201, a first insulating layer disposed on the light shielding layer 201, a light absorbing layer 203 disposed on the first insulating layer, and a photosensitive electrode layer disposed on the light absorbing layer 203;
The orthographic projection of the light absorbing layer 203 on the light shielding layer 201 is located in the light shielding layer 201, the photosensitive electrode layer includes a first photosensitive electrode 205 and a second photosensitive electrode 206 that are separately disposed, the first photosensitive electrode 205 is electrically connected to a first end of the light absorbing layer 203, and the second photosensitive electrode 206 is electrically connected to a second end of the light absorbing layer 203.
In the embodiment of the present application, the portion of the sub-pixel unit corresponding to the switching transistor T1 includes a substrate 101, a light shielding metal layer 102 disposed on the substrate 101, a buffer layer 103 disposed on the substrate 101 and covering the light shielding metal layer 102, an active layer 104 disposed on the buffer layer 103, a gate insulating layer 105 disposed on the buffer layer 103 and covering the active layer 104, a gate metal layer 106 disposed on the gate insulating layer 105, an interlayer insulating layer 107 disposed on the gate insulating layer 105 and completely covering the gate metal layer 106, a source-drain metal layer 108 disposed on the interlayer insulating layer 107, a planarization layer 109 disposed on the interlayer insulating layer 107 and completely covering the source-drain metal layer 108, a first passivation layer 110 disposed on the planarization layer 109, a common electrode 111 disposed on the first passivation layer 110, a second passivation electrode 111 disposed on the first passivation layer 110 and covering the common electrode 111, and a second passivation layer 112 disposed on the pixel electrode 112;
In the top view direction of the display panel 10, the orthographic projection of the active layer 104 on the substrate 101 is located in the light shielding metal layer 102, and the orthographic projection of the gate metal layer 106 on the substrate 101 is located in the light shielding metal layer 102.
Further, a first via 1071 and a second via 1072 are disposed on the interlayer insulating layer 107, the source 1081 of the source-drain metal layer 108 is electrically connected to one end of the active layer 104 through the first via 1071, and the drain 1082 of the source-drain metal layer 108 is electrically connected to the other end of the active layer 104 through the second via 1072.
Further, a sixth via 1123 is disposed on the second passivation layer 112, and the pixel electrode 113 is electrically connected to the source 1081 of the source/drain metal layer 108 through the sixth via 1123.
In the embodiment of the present application, the portion of the sub-pixel unit corresponding to the light sensing sensor S1 includes the substrate 101, a first sub-light shielding layer 2011 disposed on the substrate 101, the buffer layer 103 disposed on the substrate 101 and covering the first sub-light shielding layer 2011, a gate insulating layer 105 disposed on the buffer layer 103, a second sub-light shielding layer 2012 disposed on the gate insulating layer 105, the interlayer insulating layer 107 disposed on the gate insulating layer 105 and completely covering the second sub-light shielding layer 2012, a third sub-light shielding layer 2013 and a second metal layer 202 disposed on the interlayer insulating layer 107 in the same layer, and the planarization layer 109 disposed on the interlayer insulating layer 107;
wherein the second metal layer 202 is insulated from the third sub-light shielding layer 2013; the portion of the planarization layer 109 corresponding to the photosensitive sensor S1 has an opening 1091, a portion of the first passivation layer 110 is disposed in the opening 1091, and the light absorbing layer 203 is disposed on the first passivation layer 110 and is located in the opening 1091.
In the embodiment of the present application, the first insulating layer is the first passivation layer 110; the light shielding layer 201 includes the first sub light shielding layer 2011, the second sub light shielding layer 2012, and the third sub light shielding layer 2013. The first sub-light shielding layer 2011 is arranged in a same layer and insulated from the light shielding metal layer 102 in the switch transistor T1, the second sub-light shielding layer 2012 is arranged in a same layer and insulated from the gate metal layer 106 in the switch transistor T1, and the third sub-light shielding layer 2013 is arranged in a same layer and insulated from the second metal layer 202.
In the embodiment of the present application, the photosensitive sensor S1 further includes a photosensitive electrode layer disposed on the light absorbing layer 203, where the photosensitive electrode layer includes a first photosensitive electrode 205 and a second photosensitive electrode 206 that are separately disposed, the first photosensitive electrode 205 is electrically connected to the first end of the light absorbing layer 203, and the second photosensitive electrode 206 is electrically connected to the second end of the light absorbing layer 203.
In the embodiment of the present application, the photosensitive sensor S1 further includes a second metal layer 202, where the second metal layer 202 is disposed in the same layer as the source-drain metal layer 108 in the switch transistor T1 and is insulated from the source-drain metal layer, and the second metal layer 202 includes a first metal block 2021 and a second metal block 2022 disposed in an insulated manner from the first metal block 2021;
The first photosensitive electrode 205 is electrically connected to the driving chip of the display panel 10 through the first metal block 2021, and the second photosensitive electrode 206 is electrically connected to the driving chip through the second metal block 2022.
In the embodiment of the present application, the light sensing sensor S1 further includes an ohmic contact layer 204 disposed on the light absorbing layer 203, where the ohmic contact layer 204 includes a first sub-ohmic contact layer 2041 and a second sub-ohmic contact layer 2042 insulated from the first sub-ohmic contact layer 2041;
The first photosensitive electrode 205 is electrically connected to the light-absorbing layer 203 through the first sub-ohmic contact layer 2041, and the second photosensitive electrode 206 is electrically connected to the light-absorbing layer 203 through the second sub-ohmic contact layer 2042.
Further, the ohmic contact layer 204 is an amorphous silicon layer heavily doped with phosphorus ions, and the light absorbing layer 203 is an amorphous silicon layer.
Specifically, the material of the light absorbing layer 203 is amorphous silicon, and the material of the photosensitive electrode layer is indium tin oxide; since the amorphous silicon material and the indium tin oxide material have a large work function difference, a contact barrier may exist when the light absorbing layer 203 is in contact with the photosensitive electrode layer. Therefore, by adding the ohmic contact layer 204 with lower resistivity between the light absorbing layer 203 and the photosensitive electrode layer, the contact barrier can be reduced, so that the light absorbing layer 203 and the photosensitive electrode layer are more easily conducted.
In the embodiment of the present application, the first photosensitive electrode 205 layer and the second photosensitive electrode 206 layer each include a first sub-electrode and a second sub-electrode disposed on the first sub-electrode, where the second sub-electrode is directly electrically connected to the first sub-electrode; the first sub-electrode is electrically connected with the light absorbing layer 203 through the ohmic contact layer 204, and the second sub-electrode is electrically connected with the second metal layer 202;
the first sub-electrode is disposed in the same layer and insulated from the common electrode 111 in the switching transistor T1, and the second sub-electrode is disposed in the same layer and insulated from the pixel electrode 113 in the switching transistor T1.
Further, the first sub-electrode includes a first sub-electrode block 2051 and a second sub-electrode block 2061 provided to be insulated from the first sub-electrode block 2051; the second sub-electrode includes a third sub-electrode block 2052 and a fourth sub-electrode block 2062 provided to be insulated from the third sub-electrode block 2052.
Further, the photosensitive sensor S1 further includes the second passivation layer 112, the second passivation layer 112 completely covers the light absorbing layer 203, the ohmic contact layer 204 and the first sub-electrode, a third via 1121 and a fourth via 1122 are disposed on the second passivation layer 112, the first photosensitive electrode 205 is electrically connected to the first metal block 2021 through the third via 1121, and the second photosensitive electrode 206 is electrically connected to the second metal block 2022 through the fourth via 1122.
In the embodiment of the present application, since the portion of the planarization layer 109 corresponding to the light-sensing sensor S1 is provided with the opening 1091, the distance between the light-absorbing layer 203 and the third sub-light-shielding layer 2013 is equal to the thickness of the first passivation layer 110 (the thickness of the first passivation layer 110 is typically about 2000 a/m), so that the distance between the light-absorbing layer 203 and the third sub-light-shielding layer 2013 is much smaller than 1um; at this time, the third sub-light shielding layer 2013 is multiplexed to the bottom gate structure of the light sensor S1, so that the third sub-light shielding layer 2013 has a regulatory function on the conductive channel of the light absorbing layer 203. The photosensitive sensor S1 is turned on when a positive voltage is applied to the third sub-light shielding layer 2013, and the photosensitive sensor S1 is turned off when a negative voltage is applied to the third sub-light shielding layer 2013.
Further, a fifth via 1073 is disposed on the interlayer insulating layer 107, and the third sub-light-shielding layer 2013 is electrically connected to the second sub-light-shielding layer 2012 through the fifth via 1073; by this arrangement, the second sub-light shielding layer 2012 can be connected to the electrical signal of the photosensitive sensor S1, so that the electrical signal of the photosensitive sensor S1 can be saturated more easily.
In an embodiment of the present application, the substrate 101 may be a polyimide film, and the substrate 101 may be formed of one or more polyimide films. The active layer 104 includes a conductive portion and a non-conductive portion, the material of the non-conductive portion of the active layer 104 is polysilicon, and the material of the conductive portion of the active layer 104 is polysilicon doped with phosphorus ions. The materials of the buffer layer 103, the first passivation layer 110, and the second passivation layer 112 may be one or more of inorganic materials such as silicon nitride, silicon oxide, silicon oxynitride, or silicon dioxide, which serve as a barrier to water and oxygen. The material of the gate insulating layer 105 may be one or more of inorganic materials such as silicon nitride, silicon oxide, silicon oxynitride, or silicon dioxide, so as to perform an insulating protection function. The materials of the light shielding metal layer 102, the second metal layer 202, the first sub-light shielding layer 2011, the second sub-light shielding layer 2012, the third sub-light shielding layer 2013, and the source drain metal layer 108 may be metal materials having excellent conductivity such as molybdenum, copper, and aluminum.
In the embodiment of the present application, the material of the interlayer insulating layer 107 may be one or more of inorganic materials such as silicon nitride, silicon oxide or silicon oxynitride, and is used for isolating water and oxygen, and playing a role in insulating and protecting other functional film layers. The material of the planarization layer 109 may be one or more of an organic material such as acrylic resin, polycarbonate, and polystyrene, and is used to release stress generated by the display panel 10, thereby enhancing the bending resistance of the display panel 10 and avoiding the occurrence of cracks.
In the embodiment of the present application, the materials of the common electrode 111, the pixel electrode 113 and the photosensitive electrode are at least one of indium tin oxide and indium gallium tin oxide.
In the embodiment of the present application, the thickness of the planarization layer 109 is 1000 nm to 1500 nm, and the thickness is very thick, so that a certain distance is kept between the source-drain metal layer 108 and the common electrode 111, and electrostatic interference or signal crosstalk is avoided between the source-drain metal layer 108 and the common electrode 111.
In the embodiment of the present application, the switching transistor T1 on the display panel 10 is a top gate structure, which can greatly improve the parasitic capacitance problem caused by the overlapping of the source-drain metal layer 108 and the gate metal layer 106 in the vertical direction.
Specifically, the method steps of the display panel 10 according to the first embodiment of the present application are as follows:
Firstly, preparing the light shielding metal layer 102 and a first sub light shielding layer 2011 which is the same layer as the light shielding metal layer 102 and is arranged in an insulating way on the substrate 101, wherein the light shielding metal layer 102 is used for shielding the bottom of the switch transistor T1 device, and the first sub light shielding layer 2011 is used for shielding the bottom of the light sensing sensor S1; thereafter, preparing the buffer layer 103 and an amorphous silicon layer on the substrate 101, converting the amorphous silicon layer into a polysilicon layer by Excimer Laser Annealing (ELA), and performing phosphorus ion doping on both ends of the edge of the polysilicon layer to form a conductive portion of the active layer 104; then, the gate metal layer 106 and the second sub-light shielding layer 2012, which is the same layer as the gate metal layer 106 and is provided in an insulating manner, are formed on the gate insulating layer 105, and the second sub-light shielding layer 2012 is used as the gate wiring of the photosensitive sensor S1 and is multiplexed as the light shielding layer 201 of the photosensitive sensor S1; then, an interlayer insulating layer 107 is deposited on the gate insulating layer 105, and the first via 1071, the second via 1072, and the fifth via 1073 of the interlayer insulating layer 107 are etched out by an exposure etching process; then, the source-drain metal layer 108, the second metal layer 202 and the third sub-light shielding layer 2013 are prepared on the interlayer insulating layer 107, the source 1081 of the source-drain metal layer 108 is electrically connected to the active layer 104 through the first via 1071, the drain 1082 of the source-drain metal layer 108 is electrically connected to the active layer 104 through the second via 1072, and the third sub-light shielding layer 2013 is electrically connected to the second sub-light shielding layer 2012 through the fifth via 1073.
Thereafter, the planarization layer 109 is deposited on the interlayer insulating layer 107, and a portion of the planarization layer 109 corresponding to the photosensitive sensor S1 has the opening 1091; the planarization layer 109 may be an organic planarization material, or an insulating layer material such as SiNx/SiOx. Thereafter, depositing a layer of the first passivation layer 110 on the planarization layer 109; then, a layer of amorphous silicon is deposited as the light absorbing layer 203 of the light sensing sensor S1. And depositing a phosphorus ion heavily doped amorphous layer on the amorphous silicon layer.
Then, a bottom indium tin oxide layer is deposited on the first passivation layer 110, wherein the bottom indium tin oxide layer is used as the common electrode 111 in the area of the switch transistor T1 and is used as the first sub-electrode of the photosensitive sensor S1 in the area of the photosensitive sensor S1; and then, etching the amorphous layer heavily doped with phosphorus ions by adopting the pattern shielding of the bottom indium tin oxide layer in the region of the photosensitive sensor S1 to prepare the ohmic contact layer 204.
Then, depositing the second passivation layer 112 on the first passivation layer 110, and etching out a pixel electrode 113 hole and a bridge hole of the photosensitive electrode layer of the region of the photosensitive sensor S1 by exposure etching; finally, a top indium tin oxide layer is deposited on the second passivation layer 112, the pixel electrode 113 is formed in the region of the transistor of the opening 1091 by exposure etching, a second sub-electrode of the photosensor S1 is formed in the region of the photosensor S1, the second sub-electrode is electrically connected to the light absorbing layer 203 through a bridge hole on the first passivation layer 110, and the other end of the second sub-electrode is electrically connected to the second metal layer 202 (source drain 1082 trace) through the third via 1121 or the fourth via 1122 on the second passivation layer 112.
The display panel 10 prepared in the embodiment of the application has the following advantages:
first, the absorption layer of the photosensitive sensor S1 is arranged above the planarization layer 109, so that the absorption layer is closer to ambient light with less interference;
Secondly, the light shielding layer 201 below the absorbing layer of the light sensing sensor S1 may select three metal light shielding materials, namely a light shielding metal material, a gate metal material and a source drain 1082 metal material, and may repeat light shielding by at least 2 or more metal materials, so as to reduce interference light of backlight incident on the light absorbing layer 203 and improve detection accuracy of ambient light;
Finally, in the embodiment of the present application, the light absorbing layer 203 is prepared by adding an amorphous silicon process, so that the ambient light function can be integrated on the array substrate, wherein the pattern of the ohmic contact layer 204 can be defined by a photomask of the bottom indium tin oxide layer, the bottom indium tin oxide layer is exposed, then the pattern of the bottom indium tin oxide layer is fabricated by wet etching, and then the pattern of the ohmic contact layer 204 is fabricated by dry etching.
Therefore, the amorphous silicon type light sensing sensor S1 with excellent performance is integrated into the panel to realize the function of ambient light, the process is simplified as much as possible, the light absorbing layer 203 is arranged above the planarization layer 109, the light absorbing layer is closer to the ambient light, and the interference is smaller; in addition, the light shielding layer 201 below the light absorbing layer 203 may be made of a light shielding metal material, a gate metal material, and three metal light shielding materials of the source/drain 1082 metal materials, and may be made of at least 2 or more metal materials to perform repeated light shielding, so as to reduce interference light incident on the light absorbing layer 203 from backlight, and improve the detection accuracy of ambient light.
Aiming at the technical problem that the current display panel 10 is difficult to realize low-cost detection of ambient light, the embodiment of the application provides the display panel 10; the display panel 10 includes a plurality of sub-pixel units, at least one of the sub-pixel units includes a switching transistor T1 and at least one light-sensing sensor S1, the light-sensing sensor S1 includes a light-shielding layer 201, a first insulating layer disposed on the light-shielding layer 201, a light-absorbing layer 203 disposed on the first insulating layer, and a light-sensing electrode layer disposed on the light-absorbing layer 203, a front projection of the light-absorbing layer 203 on the light-shielding layer 201 is located in the light-shielding layer 201, the light-sensing electrode layer includes a first light-sensing electrode 205 and a second light-sensing electrode 206 that are separately disposed, the first light-sensing electrode 205 is electrically connected with a first end of the light-absorbing layer 203, and the second light-sensing electrode 206 is electrically connected with a second end of the light-absorbing layer 203, wherein the display panel 10 further includes the planarization layer 109, the planarization layer 109 has the opening 1091, and the light-absorbing layer 203 is disposed in the opening 1091; in the display panel 10, at least one photosensitive sensor S1 is disposed in at least one sub-pixel unit, the photosensitive sensor S1 includes a light absorbing layer 203 and a photosensitive electrode layer electrically connected to the light absorbing layer 203, and only an amorphous silicon process is added to integrate the photosensitive sensor S1 in the sub-pixel unit, thereby realizing detection of ambient light at low cost. In addition, since the light absorbing layer 203 is disposed in the opening 1091, the third sub-light shielding layer 2013 below the light absorbing layer 203 may be multiplexed as a bottom gate of the light sensing sensor S1, so as to regulate and control a conductive channel of the light absorbing layer 203.
Example two
Fig. 2 is a schematic diagram showing a second cross-sectional structure of the display panel 10 according to the embodiment of the application; the structure of the display panel 10 in the second embodiment of the present application is the same as or similar to the structure of the display panel 10 in the first embodiment of the present application, and the only difference is that the planarization layer 109 does not have the opening 1091 in the area corresponding to the photosensitive sensor S1, and the first insulating layer includes the planarization layer 109 and the first passivation layer 110. Because the film layer of the planarization layer 109 is thicker, generally more than 1um, the distance between the light absorbing layer 203 and the third sub-light shielding layer 2013 is too large, so that the third sub-light shielding layer 2013 cannot be multiplexed into the bottom gate structure of the light sensing sensor S1, and the third sub-light shielding layer 2013 cannot regulate the conductive channel of the light absorbing layer 203. At this time, the light absorbing layer 203 corresponds to a photoresistor.
Compared to the first embodiment of the present application, in the second embodiment of the present application, the planarization layer 109 is not provided with the opening 1091, so that the third sub-light-shielding layer 2013 cannot regulate the light-absorbing layer 203, and it is difficult for the display panel 10 to turn off the light-sensing sensor S1 without sensing the external ambient light, which further results in an increase of the power consumption of the display panel 10.
Aiming at the technical problem that the current display panel 10 is difficult to realize low-cost detection of ambient light, the embodiment of the application provides the display panel 10; the display panel 10 includes a plurality of sub-pixel units, at least one of the sub-pixel units includes a switching transistor T1 and at least one photosensitive sensor S1, the photosensitive sensor S1 includes a light shielding layer 201, a first insulating layer disposed on the light shielding layer 201, a light absorbing layer 203 disposed on the first insulating layer, and a photosensitive electrode layer disposed on the light absorbing layer 203, a front projection of the light absorbing layer 203 on the light shielding layer 201 is located in the light shielding layer 201, the photosensitive electrode layer includes a first photosensitive electrode 205 and a second photosensitive electrode 206 that are separately disposed, the first photosensitive electrode 205 is electrically connected with a first end of the light absorbing layer 203, and the second photosensitive electrode 206 is electrically connected with a second end of the light absorbing layer 203; in the display panel 10, at least one photosensitive sensor S1 is disposed in at least one sub-pixel unit, the photosensitive sensor S1 includes a light absorbing layer 203 and a photosensitive electrode layer electrically connected to the light absorbing layer 203, and only an amorphous silicon process is added to integrate the photosensitive sensor S1 in the sub-pixel unit, thereby realizing detection of ambient light at low cost.
Example III
Fig. 3 is a schematic diagram showing a third cross-sectional structure of the display panel 10 according to the embodiment of the application; the structure of the display panel 10 in the third embodiment of the present application is the same as or similar to the structure of the display panel 10 in the second embodiment of the present application, and the difference is that the first photosensitive electrode 205 layer and the second photosensitive electrode 206 layer each include a third sub-electrode, one end of the third sub-electrode is directly electrically connected to the light absorbing layer 203, and the other end of the third sub-electrode is electrically connected to the second metal layer 202;
Specifically, the third sub-electrode includes a fifth electrode block 2053 and a sixth electrode block 2063, which are disposed in the same layer and are insulated, one end of the fifth electrode block 2053 is directly electrically connected to the light-absorbing layer 203, and the other end of the fifth electrode block 2053 is electrically connected to the first metal block 2021; one end of the sixth electrode block 2063 is directly electrically connected to the light absorbing layer 203, and the other end of the sixth electrode block 2063 is electrically connected to the second metal block 2022;
Wherein the fifth electrode block 2053 and the sixth electrode block 2063 are each disposed in the same layer and insulated from the pixel electrode 113 in the switching transistor T1.
Compared with the second embodiment of the application, the third embodiment of the application has a contact barrier because the indium tin oxide material is in direct contact with the amorphous silicon material; however, the contact barrier is not completely non-conductive, and a certain current can pass through, so that in the third scheme, in order to omit the film plating process of the phosphorus ion heavily doped amorphous silicon, the indium tin oxide material is required to be in direct contact with the amorphous silicon material. Therefore, compared with the second embodiment of the present application, the embodiment of the present application may omit the plating process of the phosphorus ion heavily doped amorphous silicon, but increases the contact barrier between the photosensitive electrode layer and the absorption layer, thereby resulting in a decrease in sensitivity of the photosensitive sensor S1.
Aiming at the technical problem that the current display panel 10 is difficult to realize low-cost detection of ambient light, the embodiment of the application provides the display panel 10; the display panel 10 includes a plurality of sub-pixel units, at least one of the sub-pixel units includes a switching transistor T1 and at least one photosensitive sensor S1, the photosensitive sensor S1 includes a light shielding layer 201, a first insulating layer disposed on the light shielding layer 201, a light absorbing layer 203 disposed on the first insulating layer, and a photosensitive electrode layer disposed on the light absorbing layer 203, a front projection of the light absorbing layer 203 on the light shielding layer 201 is located in the light shielding layer 201, the photosensitive electrode layer includes a first photosensitive electrode 205 and a second photosensitive electrode 206 that are separately disposed, the first photosensitive electrode 205 is electrically connected with a first end of the light absorbing layer 203, and the second photosensitive electrode 206 is electrically connected with a second end of the light absorbing layer 203; in the display panel 10, at least one photosensitive sensor S1 is disposed in at least one sub-pixel unit, the photosensitive sensor S1 includes a light absorbing layer 203 and a photosensitive electrode layer electrically connected to the light absorbing layer 203, and only an amorphous silicon process is added to integrate the photosensitive sensor S1 in the sub-pixel unit, thereby realizing detection of ambient light at low cost.
As shown in fig. 4, a flowchart of a method for manufacturing the display panel 10 according to an embodiment of the present application specifically includes (taking the manufacturing of the display panel 10 according to the first embodiment of the present application as an example):
S10, a light shielding metal pattern, a buffer layer 103, an active layer 104, a gate metal pattern, and an interlayer insulating layer 107 are sequentially prepared on a substrate 101.
Specifically, the step S10 further includes:
Step1: preparing a metal pattern on a substrate 101, and patterning the metal pattern by exposure etching to form a light shielding metal layer 102 and a first sub-light shielding layer 2011;
Step2: sequentially preparing a buffer layer 103 and an amorphous silicon layer on the substrate 101, wherein the amorphous silicon layer is converted into a polycrystalline silicon layer after excimer laser annealing, and an active layer 104 is formed by adopting an exposure etching method;
step3: performing phosphorus ion doping on two ends of the polysilicon layer to form a source-drain doped region of the active layer 104;
Step4: depositing a gate metal pattern on the buffer layer 103 to form a gate metal layer 106 and a second sub-light shielding layer 2012; then, shielding the active layer 104 by the gate metal layer 106, and performing N - ion implantation on the active layer 104; wherein the gate metal layer 106 is used as a top gate structure of the switch transistor T1, and the second sub-shielding layer 2012 is used as a gate wiring of the photosensitive sensor S1;
Step5: a layer of insulating layer 107 is deposited on the gate insulating layer 105, and a SiNx/SiOx stack structure is used, and then the first via 1071, the second via 1072, and the fifth via 1073 are formed by exposure etching, as shown in fig. 5A.
S20, a source-drain metal layer 108, a second metal layer 202 and a third sub-light shielding layer 2013 are formed on the interlayer insulating layer 107.
Specifically, the step S20 further includes:
Step6: depositing a metal layer, and patterning by adopting an exposure etching method to form a source/drain metal layer 108, a second metal layer 202 and a third sub-shading layer 2013; the source 1081 of the source-drain metal layer 108 is electrically connected to one end of the active layer 104 through the first via 1071, the drain 1082 of the source-drain metal layer 108 is electrically connected to the other end of the active layer 104 through the second via 1072, and the third sub-light-shielding layer 2013 is electrically connected to the second sub-light-shielding layer 2012 through the fifth via 1073, as shown in fig. 5B.
S30, preparing a planarization layer 109 on the interlayer insulating layer 107, wherein the planarization layer 109 has an opening 1091 in a region corresponding to the third sub-light shielding layer 2013.
Specifically, the step S30 further includes:
Step7: preparing a planarization layer 109 on the interlayer insulating layer 107, the planarization layer 109 having an opening 1091 in a region corresponding to the third sub-light-shielding layer 2013; thereafter, the planarization layer 109 is subjected to an opening process to form a third via 1121, a fourth via 1122, and a sixth via 1123, as shown in fig. 5C.
S40, sequentially preparing a first passivation layer 110, a light-absorbing layer 203 and a phosphorus ion heavily doped amorphous silicon layer on the planarization layer 109, where the light-absorbing layer 203 and the phosphorus ion heavily doped amorphous silicon layer are disposed in the opening 1091.
Specifically, the step S40 further includes:
step8: an inorganic insulating layer is deposited, the layer is coated to form the first passivation layer 110, then an amorphous silicon layer and a phosphorus ion heavily doped amorphous silicon layer are deposited on the portion of the first passivation layer 110 corresponding to the opening 1091, the amorphous silicon layer is patterned into the light absorbing layer 203 of the photosensitive sensor S1 by exposure etching, and the light absorbing layer 203 and the phosphorus ion heavily doped amorphous silicon layer are disposed in the opening 1091, as shown in fig. 5D.
S50, sequentially preparing a bottom electrode pattern, a second passivation layer 112 and a top electrode pattern on the first passivation layer 110.
Specifically, the step S40 further includes:
step9: depositing a bottom electrode layer on the first passivation layer 110, wherein the bottom electrode layer is patterned to form a common electrode 111 of the switching transistor T1 and a first sub-electrode of the photosensitive sensor S1; then, etching part of the phosphorus ion heavily doped amorphous silicon layer through the shielding of the first sub-electrode to form an ohmic contact layer 204;
Step10: depositing a second passivation layer 112 on the first passivation layer 110, and opening the third via 1121, the fourth via 1122, and the sixth via 1123 (etching away a portion of the first passivation layer 110 in the contact hole);
Step11: depositing a top electrode layer on the second passivation layer 112, the top electrode layer being patterned to form a pixel electrode 113 of the switching transistor T1 and a second sub-electrode of the photosensitive sensor S1; the pixel electrode 113 is in contact with the source electrode 1081 of the source-drain metal layer 108 through the sixth via 1123, and the second sub-electrode is electrically connected to the second metal layer 202 through the third via 1121 and the fourth via 1122, respectively, as shown in fig. 5E.
Correspondingly, the embodiment of the application also provides a mobile terminal, which comprises a terminal main body and the display panel 10 according to any one of the above, wherein the terminal main body and the display panel 10 are combined into a whole. The mobile terminal may be a mobile phone, a computer, an intelligent wearable display device, or the like, which is not particularly limited in this embodiment.
The embodiment of the application provides a display panel 10 and a mobile terminal; the display panel 10 includes a plurality of sub-pixel units, at least one of the sub-pixel units includes a switching transistor T1 and at least one photosensitive sensor S1, the photosensitive sensor S1 includes a light shielding layer 201, a first insulating layer disposed on the light shielding layer 201, a light absorbing layer 203 disposed on the first insulating layer, and a photosensitive electrode layer disposed on the light absorbing layer 203, wherein a front projection of the light absorbing layer 203 on the light shielding layer 201 is located in the light shielding layer 201, the photosensitive electrode layer includes a first photosensitive electrode 205 and a second photosensitive electrode 206 that are separately disposed, the first photosensitive electrode 205 is electrically connected with a first end of the light absorbing layer 203, and the second photosensitive electrode 206 is electrically connected with a second end of the light absorbing layer 203; in the display panel 10, at least one photosensitive sensor S1 is disposed in at least one sub-pixel unit, the photosensitive sensor S1 includes a light absorbing layer 203 and a photosensitive electrode layer electrically connected to the light absorbing layer 203, and only an amorphous silicon process is added to integrate the photosensitive sensor S1 in the sub-pixel unit, thereby realizing detection of ambient light at low cost.
The display panel 10 and the mobile terminal provided by the embodiments of the present application are described in detail, and specific examples are applied to illustrate the principles and embodiments of the present application, and the description of the above embodiments is only for helping to understand the method and the core idea of the present application; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in light of the ideas of the present application, the present description should not be construed as limiting the present application.
Claims (9)
1. A display panel, comprising a plurality of sub-pixel units, at least one of the sub-pixel units comprising a switching transistor and at least one light-sensitive sensor; wherein, the photosensitive sensor includes:
A light shielding layer;
a first insulating layer disposed on the light shielding layer;
The light absorption layer is arranged on the first insulating layer, and orthographic projection of the light absorption layer on the light shielding layer is positioned in the light shielding layer; and
The photosensitive electrode layer is arranged on the light absorption layer, the photosensitive electrode layer comprises a first photosensitive electrode and a second photosensitive electrode which are arranged in a separated mode, the first photosensitive electrode is electrically connected with a first end of the light absorption layer, the second photosensitive electrode is electrically connected with a second end of the light absorption layer, the photosensitive sensor further comprises a second metal layer, the second metal layer is arranged in the same layer as the source drain metal layer in the switch transistor in an insulating mode, and the second metal layer comprises a first metal block and a second metal block which is arranged in an insulating mode with the first metal block; the first photosensitive electrode is electrically connected with the driving chip of the display panel through the first metal block, and the second photosensitive electrode is electrically connected with the driving chip through the second metal block.
2. The display panel according to claim 1, wherein the light shielding layer includes at least two of a first sub light shielding layer, a second sub light shielding layer, and a third sub light shielding layer;
The first sub-shading layer and the shading metal layer in the switch transistor are arranged in the same layer and in an insulating manner, the second sub-shading layer and the grid metal layer in the switch transistor are arranged in the same layer and in an insulating manner, and the third sub-shading layer and the second metal layer are arranged in the same layer and in an insulating manner.
3. The display panel of claim 1, wherein the light sensing sensor further comprises an ohmic contact layer disposed on the light absorbing layer, the ohmic contact layer comprising a first sub-ohmic contact layer and a second sub-ohmic contact layer disposed insulated from the first sub-ohmic contact layer;
The first photosensitive electrode is electrically connected with the light absorption layer through the first sub-ohmic contact layer, and the second photosensitive electrode is electrically connected with the light absorption layer through the second sub-ohmic contact layer.
4. A display panel according to claim 3, wherein the material of the ohmic contact layer is a phosphorus ion heavily doped amorphous silicon layer, and the material of the light absorbing layer is an amorphous silicon layer.
5. The display panel of claim 3, wherein the first photosensitive electrode and the second photosensitive electrode each comprise a first sub-electrode and a second sub-electrode disposed on the first sub-electrode, the first sub-electrode is electrically connected to the light absorbing layer through the ohmic contact layer, and the second sub-electrode is electrically connected to the second metal layer;
the first sub-electrode and the common electrode in the switch transistor are arranged in the same layer and in an insulating way, and the second sub-electrode and the pixel electrode in the switch transistor are arranged in the same layer and in an insulating way.
6. The display panel according to claim 3, wherein the first photosensitive electrode and the second photosensitive electrode each include a third sub-electrode, one end of the third sub-electrode is directly electrically connected to the light absorbing layer, and the other end of the third sub-electrode is electrically connected to the second metal layer;
The third sub-electrode and the pixel electrode in the switch transistor are arranged in the same layer and insulated.
7. The display panel of claim 5, wherein the switching transistor further comprises:
A planarization layer;
the first passivation layer is arranged on the planarization layer;
The public electrode is arranged on the first passivation layer;
The second passivation layer is arranged on the first passivation layer and covers the common electrode; and
The pixel electrode is arranged on the second passivation layer;
wherein the first insulating layer comprises the first passivation layer or a lamination layer formed by the planarization layer and the first passivation layer.
8. The display panel according to claim 7, wherein a portion of the planarization layer corresponding to the light-sensing sensor has an opening, and a portion of the first passivation layer is disposed in the opening;
the light absorption layer is arranged on the first passivation layer and is positioned in the opening.
9. A mobile terminal comprising a terminal body and a display panel according to any one of claims 1 to 8, the terminal body being integral with the display panel.
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