CN114578729B - Acquisition module of solid-state power distribution device - Google Patents
Acquisition module of solid-state power distribution device Download PDFInfo
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Abstract
The invention relates to the technical field of power electronics and electricians, in particular to an acquisition module of a solid-state power distribution device, which comprises a singlechip and a data acquisition circuit, wherein the singlechip is in communication connection with the data acquisition circuit and is used as a microcontroller of the whole acquisition module to communicate data with a main control board through a CAN bus; the data acquisition circuit comprises a current sensing amplifier, a triode, a MOSFET, a diode, a resistor and the like, and is used for acquiring data related to a load current signal and a level signal, transmitting the data to the singlechip, and sending an on-off signal instruction to the data acquisition circuit by the singlechip; the acquisition module also comprises an isolated power supply for supplying power to the whole acquisition module; the invention improves the fault response speed, reduces the hardware cost, supports the rapid expansion of the number of load channels and improves the rapid adaptation capability of the device.
Description
Technical Field
The invention relates to the technical field of power electronics and electricians, in particular to an acquisition module of a solid-state power distribution device.
Background
The traditional distribution device mainly realizes on-off control of a circuit by controlling an electromagnetic relay or a relay, and realizes current overcurrent protection or current short-circuit protection through a fuse. When the current flows or is short-circuited, the conductor is fused according to the current flowing through the fuse and the accumulated heat in time, so that the protection effect is realized, and the circuit path can be restored by manually replacing the fuse. The microcontroller enables the power distribution device to realize automatic functions such as electronic switch control, fusing control, line monitoring and the like. Meanwhile, because the equipment required to be monitored and managed in the aircraft is large in collection number, complex in logic and high in precision requirement, the requirements on the number of IO ports and time sequence control are high, and therefore, most manufacturers commonly use FPGA to realize the collection modules of the power distribution device.
The current overcurrent protection or the current short-circuit protection in the prior art needs manual reset, the inverse time limit overcurrent protection has low accuracy, the load fault response speed is low, the hardware cost is high, and meanwhile, the problems of strong coupling, low modularization degree and the like exist.
Disclosure of Invention
The invention aims at: aiming at the problems existing in the prior art, the acquisition module of the solid-state power distribution device is provided.
In order to achieve the above purpose, the technical scheme adopted by the invention is as follows:
the acquisition module of the solid-state power distribution device comprises a singlechip and a data acquisition circuit, wherein the singlechip is in communication connection with the data acquisition circuit; the data acquisition circuit comprises a ninth resistor, a tenth resistor, an eleventh resistor, a diode, a voltage amplifier, a current sense amplifier, a fifteenth resistor, a sixteenth resistor, a triode, an eighteenth resistor, a nineteenth resistor and a MOSFET;
one end of the sixteenth resistor is used as a first communication interface, the other end of the sixteenth resistor is connected with the first pin of the triode, the second pin of the triode is grounded, the third pin of the triode is connected with one end of the eighteenth resistor, the other end of the eighteenth resistor is connected with one end of the nineteenth resistor, the other end of the eighteenth resistor is connected with the first pin of the MOSFET, the second pin of the MOSFET is connected with one end of the fifteenth resistor), and the third pin of the MOSFET is used as a load terminal.
The other end of the nineteenth resistor is connected with the first pin of the voltage amplifier, the second pin of the voltage amplifier is connected with the second pin of the MOSFET, the third pin of the voltage amplifier is connected with one end of the ninth resistor, the other end of the ninth resistor is used as a second communication interface, and the third pin of the voltage amplifier is grounded through the tenth resistor;
the other end of the fifteenth resistor is connected with a power supply, a first pin of the current sense amplifier is connected with one end of the fifteenth resistor, a second pin of the current sense amplifier is connected with the other end of the fifteenth resistor, a third pin of the current sense amplifier is connected with one end of the eleventh resistor, the other end of the eleventh resistor is used as a third communication interface, the other end of the eleventh resistor is connected with one end of the diode, and the other end of the diode is grounded.
As a preferable scheme of the invention, the acquisition module of the solid-state power distribution device comprises a fourth resistor, a fifth resistor, a sixth resistor, a capacitor and an eighth resistor, wherein a first pin of the singlechip is connected with one end of the fourth resistor, the other end of the fourth resistor is grounded, a second pin of the singlechip is connected with one end of the fifth resistor, and the other end of the fifth resistor is connected with the other end of the fourth resistor; the third pin of the singlechip is connected with one end of the sixth resistor and one end of the capacitor, the other end of the sixth resistor is connected with a power supply, and the other end of the capacitor is grounded; and the fourth pin of the singlechip is grounded through the eighth resistor.
As a preferable scheme of the invention, the acquisition module of the solid-state power distribution device is characterized in that the singlechip is an STM32F103 singlechip.
As a preferable scheme of the invention, the acquisition module of the solid-state power distribution device comprises a main control board, and the singlechip is in communication connection with the main control board by adopting a CAN bus.
As a preferred aspect of the invention, an acquisition module for a solid state power distribution device includes an isolated power supply (3) for generating 3.3v and 5v power.
A control method of an acquisition module of a solid-state power distribution device comprises the following specific steps:
s1, a singlechip filters and receives a message of a main control board, and identifies and obtains a remote control frame and a data frame;
s2, using a data frame to update data of a channel on-off control register, a last period instruction, a channel current register and a rated current register and send an on-off instruction;
s3, monitoring the data and the on-off instruction of the channel on-off control register, the last period instruction, the channel current register and the rated current register by utilizing a remote control frame to obtain the on-off state, the fault state and the acquisition current value of each channel;
s4, the singlechip replies the on-off state, the fault state and the acquired current value of each channel to the main control board.
As a preferable scheme of the invention, the control method of the acquisition module of the solid-state power distribution device and the judging method of the fault state comprise the following steps:
s11, the singlechip collects on-off signals, level signals and current signals of the data acquisition circuit;
s22, performing fault judgment based on the on-off signal, the level signal and the current signal:
when the on-off signal and the level signal are at a high level or the on-off signal and the level signal are at a low level, the internal fault is generated;
when the on-off signal is high level and the current signal is larger than or equal to 1.2 times of rated working current and smaller than or equal to 8 times of rated working current, the on-off signal is an overcurrent fault;
when the on-off signal is high level and the current signal is larger than 8 times of rated working current, the on-off signal is short circuit fault;
and when the on-off signal is at a high level and the level signal is at a low level, or the on-off signal is at a low level and the level signal is at a high level, the device is in a normal working state.
As a preferable scheme of the invention, the control method of the acquisition module of the solid-state power distribution device starts to calculate the heat accumulation value when an overcurrent fault occurs, and the formula is as follows:
wherein I is load current, I p For rated current, deltaT is sampling interval time, N is the measurement times of heat accumulation value, M is a constant with the value range of 0.05-2.
In summary, due to the adoption of the technical scheme, the beneficial effects of the invention are as follows:
1. by using the form of combining the singlechip with the data acquisition circuit and utilizing the workflow logic realized based on the singlechip, when a fault occurs, the singlechip immediately executes the fault protection logic, executes the turn-off instruction after judging through the fault protection logic, shields the turn-on instruction, and executes the protection operation after judging the fault and replying the control command according to the main control board without uploading the acquired data, thereby improving the response speed of the load fault;
2. the method supports on-line setting of rated currents of different channels, and improves the calculation error caused by interruption of other peripheral devices under the condition of a fixed time interval by setting the interval time in the inverse time limit overcurrent protection calculation as the actual interval time, so that the accuracy of overcurrent protection is improved; the heat accumulation calculated value is obtained through a table look-up method, complex multiplication calculation is not needed for a plurality of times, and the operation resource of the singlechip is saved; meanwhile, the automatic reset after the overcurrent protection state is withdrawn is realized, and the circuit protection device does not need to be replaced manually.
3. The singlechip is utilized to collect multichannel analog quantity by carrying the ADC polling without increasing the ADC peripheral, thereby greatly simplifying the circuit complexity and reducing the hardware cost;
4. through modularization data acquisition module, use CAN bus to carry out with the main control board communication, realize the quick extension of collection channel, improve the expansibility to the different distribution scene of adaptation multi-machine type.
Drawings
Fig. 1 is a schematic circuit diagram of the present invention.
Fig. 2 is a schematic diagram of the operation of the data acquisition system of the present invention.
Fig. 3 is a graph of the overcurrent power versus trip for the inverse time-limit trip protection algorithm of the present invention.
Fig. 4 is a flow chart of the inverse time-limited overcurrent protection algorithm of the invention.
Fig. 5 is a short-circuit protection flow chart of the present invention.
Icon: 1-a singlechip; 2-loading; 3-isolating the power supply; 4-fourth resistor; 5-a fifth resistor; 6-sixth resistance; 7-capacitance; 8-eighth resistor; 9-ninth resistor; 10-tenth resistor; 11-eleventh resistor; a 12-diode; 13-a voltage amplifier; 14-a current sense amplifier; 15-fifteenth resistor; 16-sixteenth resistor; 17-triode; 18-eighteenth resistor; 19-nineteenth resistor; 20-MOSFET.
Detailed Description
The present invention will be described in detail with reference to the accompanying drawings.
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Example 1
As shown in fig. 1 and 2, an acquisition module of a solid-state power distribution device comprises a main control board 0, a singlechip 1 and a data acquisition circuit, wherein the singlechip 1 is in communication connection with the main control board 0 by adopting a CAN bus, and meanwhile, the singlechip 1 is in communication connection with the data acquisition circuit; the acquisition module also comprises an isolation power supply 3, and the isolation power supply 3 receives external 28v power to generate 3.3v and 5v internal isolation power supplies for supplying power to the whole acquisition module.
Specifically, as shown in fig. 1, the single-chip microcomputer 1 is used as a microcontroller of the acquisition module, meanwhile, the single-chip microcomputer 1 adopts a CAN bus to perform data communication with the main control board 0, in this embodiment 1, the single-chip microcomputer 1 adopts an STM32F103 single-chip microcomputer, an ADC multipath channel of the STM32F103 single-chip microcomputer is used for acquiring data, complexity of a circuit is simplified, hardware cost is reduced, in addition, the single-chip microcomputer is provided with a load 1-0 control channel, a load 1-1 control channel, a load 1-2 control channel and a load 1-3 control channel, and is used for acquiring and switching 4 paths of loads, when the load required to be acquired exceeds 4 paths, the acquisition module CAN be expanded by using the CAN bus, the purpose of increasing the number of channels is achieved, and the speed of the solid-state power distribution device is realized;
the acquisition module further comprises a fourth resistor 4 and a fifth resistor 5, a first pin of the single chip microcomputer 1 is connected with one end of the fourth resistor 4, the other end of the fourth resistor 4 is grounded, a second pin of the single chip microcomputer 1 is connected with one end of the fifth resistor 5, the other end of the fifth resistor 5 is connected with the other end of the fourth resistor 4, and after the single chip microcomputer 1 is electrified, the fourth resistor 4 and the fifth resistor 5 form an external circuit for debugging SWCLK and SWDIO pins at later stage;
the acquisition module further comprises a sixth resistor 6, a capacitor 7 and an eighth resistor 8, a third pin of the singlechip 1 is connected with one end of the sixth resistor 6 and one end of the capacitor 7, the other end of the sixth resistor 6 is connected with a power supply, the other end of the capacitor 7 is grounded, a circuit formed by the sixth resistor 6 and the capacitor 7 is reset on the nReset pin when the singlechip 1 is electrified, and in addition, the reset level is automatically ended after the capacitor 7 is charged; the fourth pin of the singlechip 1 is grounded through the eighth resistor 8, and a starting mode can be set through the eighth resistor 8 and the BOOT0 pin.
Specifically, as shown in fig. 1, the data acquisition circuit includes a ninth resistor 9, a tenth resistor 10, an eleventh resistor 11, a diode 12, a voltage amplifier 13, a current sense amplifier 14, a fifteenth resistor 15, a sixteenth resistor 16, a triode 17, an eighteenth resistor 18, a nineteenth resistor 19, and a MOSFET20. The data acquisition circuit is in communication connection with the singlechip 1 and comprises an on-off signal, a level signal and a current signal, and takes a load 1-0 control channel of the singlechip 1 as an example, the singlechip 1 issues an on-off signal instruction to control the gate voltage of the triode 17, so that the on-off of the triode 17 is realized, and further the on-off of the MOSFET20 is controlled, so that the on-off of a power supply of the load 2 is controlled; the single chip microcomputer 1 collects signal data of a load 1-0 control channel from an ADC1, the signal data comprises a level signal and a current signal, the level signal is a drain-source detection level which is output by a voltage amplifier 13 for collecting voltages at two ends of a drain electrode and a source electrode of a MOSFET20, the current signal is a load current which is output by a current sense amplifier 14 for collecting voltages at two ends of a fifteenth resistor 15 with a low resistance value;
one end of a sixteenth resistor 16 is used as a first communication interface, namely an on-off signal interface, the other end of the sixteenth resistor is connected with the base electrode of a triode 17, the collector electrode of the triode 17 is grounded, the emitter electrode of the triode 17 is connected with one end of an eighteenth resistor 18, the other end of the eighteenth resistor 18 is connected with one end of a nineteenth resistor 19, the other end of the eighteenth resistor is connected with the grid electrode of a MOSFET20, the drain electrode of the MOSFET20 is connected with one end of a fifteenth resistor 15, the other end of the fifteenth resistor 15 is connected with a power supply, and the source electrode of the MOSFET20 is connected with a load 2;
the other end of the nineteenth resistor 19 is connected with one input end of the voltage amplifier 13, the other input end of the voltage amplifier 13 is connected with the drain electrode of the MOSFET20, the output end of the voltage amplifier 13 is connected with one end of the ninth resistor 9, the other end of the ninth resistor 9 is used as a second communication interface, namely a level signal interface, and the output end of the voltage amplifier 13 is grounded through the tenth resistor 10;
the two input ends of the current sense amplifier 14 are respectively connected with the two ends of the fifteenth resistor (15), meanwhile, the output end of the current sense amplifier 14 is connected with one end of the eleventh resistor 11, the other end of the eleventh resistor 11 is used as a third communication interface, namely a current signal interface, the other end of the eleventh resistor 11 is connected with the cathode of the diode 12, and the anode of the diode 12 is grounded.
The ninth resistor 9, the tenth resistor 10, the eleventh resistor 11, the sixteenth resistor 16, the eighteenth resistor 18, the eleventh resistor 19 and the diode 12 are all used for adjusting the current and the potential of the data acquisition circuit.
Further, through the schematic circuit diagram shown in fig. 1, the functions that can be implemented by the present invention are specifically as follows:
1. data acquisition function:
according to the invention, the data acquisition of 4 channels is realized by adopting an ADC (analog to digital converter) with an STM32F103 singlechip, the complexity of a circuit is greatly simplified and the cost is reduced while the data acquisition function of a distribution device is realized, the requirements of working logic, data volume, precision requirements, acquisition frequency and the like are comprehensively considered, one ADC is selected to be responsible for the data acquisition of 4 channels, the ADC is triggered to start acquisition in a software triggering mode, a scanning mode and a single conversion mode are started, the left alignment data takes the high eight bits, and the acquisition flow of CH 0-3 of the ADC1 channel is as follows:
1) Starting the ADC1;
2) Starting to switch CH0;
3) After the conversion is completed, automatically starting to convert CH1;
4) After the conversion is completed, automatically starting to convert CH2;
5) After the conversion is completed, automatically starting to convert CH3;
6) Stopping after the conversion is completed, and waiting for the next start of the ADC1;
the sampling value of the ADC1 is 8 bits, and the actual sampling value calculation formula is (1):
wherein U is AD For the actual voltage, u is the register read value, V ref Is the reference voltage for AD.
After the singlechip 1 reads the sampling level signal, the drain-source detection level of the MOSFET20 can be obtained. When MOSFET20 is on, it is low; when MOSFET20 is off, it is high. After the singlechip 1 reads the sampling current signal, the current value of the overcurrent load can be calculated.
2. Data communication function:
as shown in fig. 1 and fig. 2, the singlechip communicates with the main control board 0 through the CAN bus, filters and receives a message of the main control board 0, identifies a remote control frame and a data frame, further, the data frame updates data of a channel on-off control register, a last period instruction, a channel current register and a rated current register and issues on-off commands, and replies on-off states, fault states and collected current values of all channels to the main control board 0; the remote control frame monitors the on-off state and the fault state of each channel, and sequentially feeds back the working state of each load channel, and sends a reply message to the main control board 0.
In the application of more than 4 paths of load channels, a plurality of acquisition modules CAN be used for realizing the expansion of the channels, as shown in fig. 1, the singlechips 1-n are circuit boards with the same principle, each singlechip controls the 4 paths of load channels, the singlechips 1-n are communicated with the main control board 0 by using a CAN bus, so that the rapid expansibility of the solid-state power distribution device is realized, and meanwhile, the point-to-point communication between the main control board and the acquisition modules is realized by a message filtering mechanism.
3. The on-off execution function:
as shown in fig. 1 and fig. 2, when the singlechip receives a channel on-off instruction of the main control board 0, or performs overcurrent protection and short-circuit protection, a high level is output to energize a load channel. Specifically, the on-off of the channel is realized by controlling the IO port of the singlechip 1 to output high level or low level, or the on-off of the channel is realized by controlling the channel relay to indirectly control the singlechip. When the control channel of the load 1-0 is connected, the IO port of the singlechip 1 outputs high level, the triode 17 is switched on, so that the voltage difference exists between the gate electrode and the source electrode of the MOSFET20, and the MOSFET20 is switched on to realize power supply to the load 2; when the control channel of the load 1-0 is turned off, the IO port of the singlechip 1 outputs a low level, the triode 17 is turned off, the MOSFET20 is turned off, and the load 2 is powered off.
4. Overcurrent protection mode:
and when the load channel current is 1.2 times or more of the rated working current and is 1.8 times or less of the rated working current, judging that the overcurrent fault exists. As shown in the flow chart 4 of the inverse time limit overcurrent protection algorithm, firstly, judging whether an instruction for turning off a load channel exists, if the instruction for turning off the load channel exists, stopping calculating the load of the channel, if the instruction for turning off the load channel does not exist, indicating that overcurrent occurs, starting calculating an inverse time limit overcurrent protection heat accumulation value according to a formula (2), wherein the relation between the inverse time limit tripping protection algorithm overcurrent multiple and tripping is shown in fig. 3. According to the engineering application environment condition, the heat is naturally radiated through the shell, and an extremely inverse time limit curve is selected. The left side of the formula (2) is the heat accumulation value measured by the nth time of the channel, and the right side is the heat threshold value born by the channel.
I is the real-time current of a load channel, namely the load current, and a current signal is acquired through the singlechip 1; i p Is rated current; delta T is sampling interval time, namely, counting from the end of calculating the inverse time limit overcurrent protection heat accumulation value to the end of counting the next calculation, and the interval of time in the middle is delta T; m is a constant with the value range of 0.05-2, and the value of M is required to be determined through experiments.
Specifically, when the load path has triggered a condition of 1.2 times the rated operating current, i.e. I.gtoreq.1.2I p Calculating a heat accumulation value, when the heat accumulation value of the channel is larger than or equal to the heat threshold value of the channel, immediately executing a shutdown instruction of the channel, and reporting an overcurrent fault code to the main control board 0 to realize overcurrent protection; when the heat accumulation value of the channel is smaller than the heat threshold value of the channel, the overcurrent protection is exited; when the real-time current I is more than or equal to 8I p When the device is in a short-circuit protection mode, the device directly enters the short-circuit protection mode; otherwise, the normal working mode is entered.
In addition, it should be noted that in the overcurrent protection process, the singlechip 1 immediately executes the channel turn-off instruction, and simultaneously shields the turn-on instruction.
And (3) calculating a single heat value and a threshold value according to the formula (2), and storing the comparison table into the memory of the singlechip 1. When the accumulated heat value is calculated, the single-chip microcomputer 1 can obtain a single heat value through table lookup without square operation, so that the calculation pressure of the single-chip microcomputer is greatly reduced; when an overcurrent fault occurs, the turn-off instruction is immediately executed, the turn-on instruction is shielded, the fault code is reported, and the operation is not required to be executed after the main control board 0 judges the fault, so that the response speed of the load overcurrent fault is improved; in general, the time interval is deltat which is a fixed interval time, so that calculation errors are easily caused by the working mechanism of the singlechip, such as interruption of other peripheral devices, while the interval time deltat in the inverse time-limit overcurrent protection calculation is actual interval time, so that the problem of calculation errors caused by interruption of other peripheral devices can be avoided, and the accuracy of overcurrent protection is improved; meanwhile, as can be seen from the formula (2), the invention supports setting different channel rated currents.
(5) Short circuit protection mode:
as shown in fig. 5, when the load path current is 8 times or more the rated operating current, it is determined that the short-circuit fault has occurred. When a short circuit occurs, the singlechip will execute the turn-off instruction of the channel preferentially. At the same time, in order to avoid short circuit caused by instant surge current of capacitive load when power is on, the acquisition module will turn on the load again after the first time delayJudging whether the load channel is short-circuit fault or not, if the load channel is still judged to be short-circuit fault after three times of delay, thoroughly turning off the load channel, and reporting a short-circuit fault code to the main control board 0; if I is less than 8I after the first time delay p And ending the short-circuit protection mode and entering a normal working mode or an overcurrent protection mode.
In addition, it should be noted that in the short-circuit protection process, the singlechip 1 immediately executes the channel turn-off instruction, and simultaneously shields the turn-on instruction.
Therefore, when a short circuit fault occurs, the singlechip 1 immediately executes the turn-off instruction, shields the turn-on instruction and reports the fault code, and does not need to wait for the main control board 0 to execute corresponding operation after judging the fault, thereby improving the response speed of the load short circuit fault.
(6) Fault detection function:
the invention judges the internal fault and the external fault through the on-off signal, the level signal and the current signal, and the circuit is shown in figure 1 and mainly comprises a ninth resistor 9, a tenth resistor 10, an eleventh resistor 11, a diode 12, a voltage amplifier 13 and a current sense amplifier 14. Specifically, the internal failure mainly refers to a failure of the transistor 17 or the MOSFET20.
The normal working state is as follows: the on-off signal is high level, and the level signal of the voltage amplifier 13 is detected to be low level; the on-off signal is low and the level signal of the voltage amplifier 13 is detected as high.
The internal fault states are: when the on-off signal is high level, which represents that the load is on, the detection that the level signal of the voltage amplifier 13 is high level indicates that the triode 17 or the MOSFET20 is in fault; when the on-off signal is low, which represents the switch-off of the load, the detection of the low level signal of the voltage amplifier 13 indicates that the transistor 17 or the MOSFET20 is malfunctioning. At this time, the singlechip 1 issues a turn-off instruction to the data acquisition module, and the data acquisition module turns off the channel and reports a fault code and a shielding turn-on instruction.
The external fault state is judged according to the current signal and the on-off signal collected by the singlechip 1.
In summary, the single chip microcomputer is combined with the data acquisition circuit, the data acquisition circuit is used for acquiring the level and current data of the load channel, the single chip microcomputer is used as the microcontroller to perform fault logic judgment and execution, so that the immediate execution of the turn-off instruction when the load circuit fails, the shielding of the turn-on instruction and the reporting of the fault code are realized, the corresponding operation is not required to be performed after the main control board judges the fault, and the fault response speed is greatly improved; secondly, by improving the time interval in inverse time-limit overcurrent protection, namely the time interval Deltat of each operation is the actual time instead of the fixed interval time, the accuracy of overcurrent protection is improved, the heat accumulation value is obtained through a table look-up method, complex calculation is not needed, and the operation resource of a singlechip is saved; finally, the single chip microcomputer is utilized to carry the ADC, so that the circuit complexity is greatly simplified, the hardware cost is reduced, the CAN bus is used for communication through the modularized data acquisition module, and the expansion performance is improved.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the invention.
Claims (7)
1. The acquisition module of the solid-state power distribution device is characterized by comprising a singlechip (1) and a data acquisition circuit, wherein the singlechip (1) is in communication connection with the data acquisition circuit; the intelligent control system also comprises a main control board (0), wherein the singlechip (1) is in communication connection with the main control board (0) through a CAN bus;
the data acquisition circuit comprises a ninth resistor (9), a tenth resistor (10), an eleventh resistor (11), a diode (12), a voltage amplifier (13), a current sense amplifier (14), a fifteenth resistor (15), a sixteenth resistor (16), a triode (17), an eighteenth resistor (18), a nineteenth resistor (19) and a MOSFET (20);
one end of the sixteenth resistor (16) is used as a first communication interface, the other end of the sixteenth resistor is connected with the base electrode of the triode (17), the collector electrode of the triode (17) is grounded, the emitter electrode of the triode (17) is connected with one end of the eighteenth resistor (18), the other end of the eighteenth resistor (18) is connected with one end of the nineteenth resistor (19), the other end of the eighteenth resistor is connected with the grid electrode of the MOSFET (20), the drain electrode of the MOSFET (20) is connected with one end of the fifteenth resistor (15), the other end of the fifteenth resistor (15) is connected with a power supply, and the source electrode of the MOSFET (20) is connected with the load (2);
the other end of the nineteenth resistor (19) is connected with one input end of the voltage amplifier (13), the other input end of the voltage amplifier (13) is connected with the drain electrode of the MOSFET (20), the output end of the voltage amplifier (13) is connected with one end of the ninth resistor (9), the other end of the ninth resistor (9) is used as a second communication interface, the output end of the voltage amplifier (13) is connected with one end of the tenth resistor (10), and the other end of the tenth resistor (10) is grounded;
the two input ends of the current sense amplifier (14) are connected with two ends of the fifteenth resistor (15), the output end of the current sense amplifier (14) is connected with one end of the eleventh resistor (11), the other end of the eleventh resistor (11) is used as a third communication interface, the other end of the eleventh resistor (11) is connected with the cathode of the diode (12), and the anode of the diode (12) is grounded.
2. The acquisition module of a solid-state power distribution device according to claim 1, further comprising a fourth resistor (4), a fifth resistor (5), a sixth resistor (6), a capacitor (7) and an eighth resistor (8), wherein a first pin of the single chip microcomputer (1) is connected with one end of the fourth resistor (4), and the other end of the fourth resistor (4) is grounded; the second pin of the singlechip (1) is connected with one end of the fifth resistor (5), and the other end of the fifth resistor (5) is connected with the other end of the fourth resistor (4); the third pin of the singlechip (1) is connected with one end of the sixth resistor (6) and one end of the capacitor (7), the other end of the sixth resistor (6) is connected with a power supply, and the other end of the capacitor (7) is grounded; and a fourth pin of the singlechip (1) is grounded through the eighth resistor (8).
3. The acquisition module of a solid-state power distribution device according to claim 1, wherein the single-chip microcomputer (1) is an STM32F103 single-chip microcomputer.
4. A collection module for a solid state power distribution device according to claim 1, comprising an isolated power supply (3) for generating 3.3v and 5v power supplies.
5. A control method of an acquisition module using a solid state power distribution device according to any one of claims 1 to 4, characterized by the specific steps of:
s1, the singlechip (1) filters and receives a message of the main control board (0), and identifies and obtains a remote control frame and a data frame;
s2, utilizing the data frame to update data and send on-off instructions to a channel on-off control register, a last period instruction, a channel current register and a rated current register;
s3, monitoring the data and the on-off instructions of the channel on-off control register, the last period instruction, the channel current register and the rated current register by using the remote control frame to obtain the on-off state, the fault state and the acquired current value of each channel;
s4, the singlechip (1) replies the on-off state, the fault state and the acquired current value of each channel to the main control board (0).
6. The method for controlling an acquisition module of a solid state power distribution device according to claim 5, wherein the method for determining a fault state comprises the steps of:
s11, the singlechip (1) collects on-off signals, level signals and current signals of the data acquisition circuit;
s22, performing fault judgment based on the on-off signal, the level signal and the current signal:
when the on-off signal and the level signal are at a high level or the on-off signal and the level signal are at a low level, the internal fault is generated;
when the on-off signal is in a high level, the current signal is larger than or equal to 1.2 times of rated working current, and is smaller than or equal to 8 times of rated working current, and is an overcurrent fault;
when the on-off signal is high level and the current signal is larger than 8 times of rated working current, the on-off signal is short circuit fault;
and when the on-off signal is at a high level and the level signal is at a low level, or the on-off signal is at a low level and the level signal is at a high level, the device is in a normal working state.
7. The method of claim 6, wherein the calculation of the heat accumulation value is started when an overcurrent fault occurs, and the formula is:
wherein I is load current, I p For rated current, deltaT is sampling interval time, N is the measurement times of heat accumulation value, M is a constant with the value range of 0.05-2.
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