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CN114567263A - Hybrid power amplifier based on heterogeneous transistor stacked structure - Google Patents

Hybrid power amplifier based on heterogeneous transistor stacked structure Download PDF

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Publication number
CN114567263A
CN114567263A CN202210207867.9A CN202210207867A CN114567263A CN 114567263 A CN114567263 A CN 114567263A CN 202210207867 A CN202210207867 A CN 202210207867A CN 114567263 A CN114567263 A CN 114567263A
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CN
China
Prior art keywords
transistor
power amplifier
voltage
hybrid power
gallium nitride
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Application number
CN202210207867.9A
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Chinese (zh)
Inventor
闫伟
黄飞
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Youga Technology Suzhou Co ltd
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Youga Technology Suzhou Co ltd
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Priority to CN202210207867.9A priority Critical patent/CN114567263A/en
Publication of CN114567263A publication Critical patent/CN114567263A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0288Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56Modifications of input or output impedances, not otherwise provided for
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/195High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/213Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only in integrated circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/451Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Amplifiers (AREA)

Abstract

The invention discloses a hybrid power amplifier based on a heterogeneous transistor stack structure, which comprises a first transistor and a second transistor, wherein the first transistor is a gallium nitride HEMT (high electron mobility transistor), the second transistor is a gallium arsenide HBT (heterojunction bipolar transistor), the source electrode of the first transistor is connected with the collector electrode of the second transistor, the grid electrode of the first transistor applies grid electrode bias voltage, and the drain electrode is connected with a power supply; the base of the second transistor is applied with a base bias voltage and the emitter thereof is grounded. The invention utilizes the stack of two hetero-transistors of gallium nitride HEMT and gallium arsenide HBT, and utilizes the voltage division characteristic of the stack of transistors to improve the grid voltage of the gallium nitride transistor, thereby eliminating the negative pressure. The turn-on threshold of the whole transistor is determined by the gallium arsenide HBT, the threshold voltage is stable, and meanwhile, the stacked transistor can improve the gain by about 3dB compared with the single transistor, so that the whole gallium nitride amplifier has higher gain.

Description

Hybrid power amplifier based on heterogeneous transistor stacked structure
Technical Field
The invention belongs to the technical field of microwave power amplifiers and integrated circuits, and particularly relates to a hybrid power amplifier based on a heterogeneous transistor stacked structure.
Background
The power amplifier is an important component of the communication base station system, and the current 5G communication technology requires that the power amplifier can work at a higher frequency, provide higher output power and efficiency. However, the power amplifier of the conventional base station is made of LDMOS material, which has limited power and low cut-off frequency, so the power capacity is larger and the gallium nitride material with higher operating frequency begins to become the mainstream of the power amplifier of the base station.
However, gan power amplifiers also have their own limitations: firstly, the grid threshold voltage of the gallium nitride power amplifier is negative voltage, so that the complexity of a power management system is improved, meanwhile, due to the existence of the negative voltage, the voltage application sequence of the gallium nitride power amplifier is strictly limited, otherwise, a tube core can be burnt, the complexity of the system is increased, and potential risks are also brought; secondly, due to the characteristics of the manufacturing process, the threshold voltage of the gallium nitride amplifier is not fixed, the threshold voltage drift often occurs, and extra adjustment is needed during actual work; in addition, the gain of gan is low, especially for the final amplifier of the output power, which leads to a deterioration of the overall performance.
Therefore, negative voltage, threshold voltage drift and low gain are two problems to be solved urgently by the gan power amplifier.
Disclosure of Invention
Aiming at the problems of negative voltage, threshold voltage drift and lower gain of the traditional gallium nitride power amplifier, the invention provides a hybrid power amplifier based on a hetero-transistor stacked structure.
In order to achieve the above object, a first aspect of the present invention provides a hybrid power amplifier based on a hetero-transistor stacked structure, including a first transistor and a second transistor, wherein the first transistor is a gallium nitride HEMT, the second transistor is a gallium arsenide HBT, a source of the first transistor is connected to a collector of the second transistor, a gate bias voltage is applied to a gate of the first transistor, and a drain of the first transistor is connected to a power supply; the base of the second transistor is applied with a base bias voltage, and the emitter thereof is grounded.
The hybrid power amplifier based on the heterogeneous transistor stacked structure in the embodiment of the invention can also have the following additional technical characteristics:
further, the base of the second transistor is also connected with a voltage-controlled current source, and the base bias voltage is applied to the voltage-controlled current source.
Further, the gate voltage of the first transistor is greater than zero as a control voltage and lower than a reference voltage at a connection between the source of the first transistor and the collector of the second transistor.
Further, the base voltage of the second transistor is used as a control voltage and works at 1-5V.
Furthermore, the gallium arsenide HBT and the gallium nitride HEMT are connected through a gold wire and are welded on the carrier plate together.
Further, the drain of the first transistor is connected with an output matching network, and the other end of the output matching network is connected with a load impedance; and the base electrode of the second transistor is connected with an input matching network, and the other end of the input matching network is connected with a source impedance.
Furthermore, the input matching network, the output matching network and the first transistor and the second transistor are integrated on a chip or integrated by a surface mount component or a passive device.
In a second aspect, the invention provides a Doherty power amplifier, which includes a main power amplifier and an auxiliary power amplifier, where the main power amplifier and/or the auxiliary power amplifier includes the hybrid power amplifier based on the heterogeneous transistor stacked structure in any one of the above technical solutions.
In a third aspect, the present invention provides a communication base station, including any one of the power amplifiers provided in the above technical solutions.
The invention uses the heterogeneous transistor stacking technology, eliminates the negative pressure problem of the traditional gallium nitride amplifier, reduces the threshold drift of the transistor and improves the gain of the gallium nitride power amplifier.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of a stacked structure of a hetero-transistor in a hybrid power amplifier based on a stacked structure of hetero-transistors according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a hybrid power amplifier based on a hetero-transistor stacked structure according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a Doherty power amplifier including the embodiment of fig. 1;
fig. 4 is a diagram of simulation results of the hybrid power amplifier of the embodiment of fig. 1.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover non-exclusive inclusions, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
An embodiment of the present invention provides a hybrid power amplifier based on a hetero-transistor stacked structure, as shown in fig. 1, including a first transistor and a second transistor, wherein the first transistor is a gallium nitride HEMT, the second transistor is a gallium arsenide HBT, and a source of the first transistor is connected to a collector of the second transistor. The grid electrode of the first transistor applies grid electrode bias voltage, and the drain electrode is connected with a power supply; the base of the second transistor is applied with a base bias voltage and the emitter thereof is grounded.
In the embodiment, the gallium nitride transistor and the gallium arsenide transistor are stacked by two heterogeneous transistors, and the grid voltage of the gallium nitride transistor can be improved by using the voltage division characteristic of the stacked transistors, so that negative pressure is eliminated. The turn-on threshold of the whole transistor is determined by the gallium arsenide HBT, the threshold voltage is stable, and meanwhile, theoretically, the gain of the stacked transistor is improved by about 3dB compared with that of a single transistor, so that the whole gallium nitride amplifier has higher gain. Compared with the traditional transistor stacking structure consisting of the same kind of transistors, the effect of doubling the working voltage can be realized.
Specifically, as a preferred embodiment, the second transistor located below in fig. 1 is a CE transistor and is implemented by using a gallium arsenide HBT, the first transistor located above is a CG transistor and is implemented by using a gallium nitride HEMT, and a collector of the gallium arsenide HBT is connected to a source of the gallium nitride HEMT. Assuming that the operating voltage of the entire stacked structure transistor is 28V, the distribution will be made specifically according to the characteristic impedance of the gallium arsenide HBT and the gallium nitride HEMT. The control voltage of the gallium arsenide HBT, i.e. the base voltage, is 1-5V higher than the reference voltage with 0V as the reference, i.e. the control voltage generally operates at 1-5V. The control voltage of the gallium nitride HEMT, namely the grid voltage, is lower than the reference voltage by 2-5V by taking the voltage at the connection of the two transistors as the reference, namely if the reference voltage is more than or equal to 5V, the control voltage of the gallium nitride HEMT has no negative voltage. Meanwhile, the gain of the stacked structure is the superposition of the gains of two transistors to a certain degree, and finally the gain of the structure is higher than that of any transistor of the component part, so that the structure solves the negative pressure problem of the gallium nitride HEMT and also solves the problem of low gain of the gallium nitride HEMT.
In addition, the control voltage of the whole stack structure is determined by the gallium arsenide HBT, the process of the gallium arsenide HBT is relatively mature, and the self turn-on voltage is relatively stable, so that the problem of threshold voltage drift similar to that in the gallium nitride HEMT does not exist, and the application defect of the gallium nitride HEMT is further overcome.
In some embodiments, the base of the second transistor is further connected to a voltage-controlled current source, and a base bias voltage is applied to the voltage-controlled current source, as shown in fig. 1.
Generally, the gallium arsenide HBT and the gallium nitride HEMT are connected by gold wires and are welded together on the carrier plate. The carrier board can adopt the packaging forms of LGA, QFN, DFN and the like.
In some power amplifiers formed by the heterogeneous transistor stacked structure, the drain electrode of the first transistor is connected with an output matching network, and the other end of the input matching network is connected with load impedance and then grounded; the base of the second transistor is connected with an input matching network, and the other end of the input matching network is connected with the source impedance and then grounded, as shown in fig. 2. The power amplifier of the structure of fig. 2 may be a class a, B, AB amplifier, etc. depending on the bias voltage.
In terms of process, the input matching network, the output matching network and the dies of the first transistor and the second transistor can be integrated on a chip or integrated by a surface mount component or a passive device.
The invention also provides an embodiment, which is a Doherty power amplifier, comprising a main power amplifier and an auxiliary power amplifier, wherein the main power amplifier and/or the auxiliary power amplifier comprise the hybrid power amplifier based on the heterogeneous transistor stacked structure in any technical scheme. The block diagram of the Doherty power amplifier is shown in fig. 3, a main power amplifier and an auxiliary power amplifier are respectively positioned on two parallel branches, the front of the two branches is connected with a power divider, and the back of the two branches is connected with a rear matching network. The main power amplifier branch also comprises a quarter-wave line TLMThe auxiliary power amplifier branch circuit also comprises a quarter-wave line TL after the main power amplifierAAnd the auxiliary power amplifier is positioned between the auxiliary power amplifier and the power divider.
The present embodiment also provides a communication base station, including any one of the power amplifiers provided in the above technical solutions.
Fig. 4 is an evaluation circuit simulation result of a gaas-gan hybrid power amplifier based on a hetero-transistor stack structure, which has been brought into practical losses. Under the same power level, the gain of the gallium nitride HEMT power amplifier in the frequency band of 2.5GHz to 2.7GHz is about 15-16dB generally, while the gallium arsenide gallium nitride hybrid power amplifier based on the heterojunction transistor stack structure can realize the gain of 19-20dB, and the gain performance is obviously improved.
On the whole, the gallium arsenide and gallium nitride hybrid power amplifier based on the heterojunction transistor stacked structure can solve the negative pressure problem of the gallium nitride power amplifier and can improve the gain of the gallium nitride power amplifier.
In the present application, the terms "upper", "lower", "front", "rear", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings. These terms are used primarily to better describe the present application and its embodiments, and are not used to limit the indicated devices, elements or components to a particular orientation or to be constructed and operated in a particular orientation. Moreover, some of the above terms may be used to indicate other meanings besides the orientation or positional relationship, for example, the term "on" may also be used to indicate some kind of attachment or connection relationship in some cases. The specific meaning of these terms in this application will be understood by those of ordinary skill in the art as appropriate.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims (9)

1. A hybrid power amplifier based on a hetero-transistor stacked structure is characterized by comprising a first transistor and a second transistor, wherein the first transistor is a gallium nitride HEMT (high electron mobility transistor), the second transistor is a gallium arsenide HBT (heterojunction bipolar transistor), the source electrode of the first transistor is connected with the collector electrode of the second transistor, the grid electrode of the first transistor is applied with grid bias voltage, and the drain electrode of the first transistor is connected with a power supply; the base of the second transistor is applied with a base bias voltage, and the emitter of the second transistor is grounded.
2. The hetero-transistor stack based hybrid power amplifier of claim 1, wherein the base of the second transistor is further connected to a voltage controlled current source, the base bias voltage being applied to the voltage controlled current source.
3. The heterogeneous transistor stack based hybrid power amplifier according to claim 1 or 2, wherein the gate voltage of the first transistor is greater than zero as a control voltage and lower than a reference voltage at a connection of the source of the first transistor and the collector of the second transistor.
4. The hybrid power amplifier based on the hetero-transistor stack structure according to claim 3, wherein the base voltage of the second transistor is used as a control voltage and is operated at 1-5V.
5. The hetero-transistor stack structure based hybrid power amplifier of claim 1, wherein the gallium arsenide HBT and the gallium nitride HEMT are connected by gold wires and co-soldered on a carrier plate.
6. The hybrid power amplifier based on the heterogeneous transistor stack structure according to claim 1, wherein an output matching network is connected to the drain of the first transistor, and the other end of the output matching network is connected to a load impedance; and the base electrode of the second transistor is connected with an input matching network, and the other end of the input matching network is connected with a source impedance.
7. The hetero-transistor stack structure based hybrid power amplifier of claim 6, wherein the input matching network, the output matching network and the dies of the first and second transistors are integrated on a chip or with a surface mount component or passive device integration process.
8. A Doherty power amplifier which is characterized by comprising a main power amplifier and an auxiliary power amplifier, wherein the main power amplifier and/or the auxiliary power amplifier comprise/comprises the hybrid power amplifier based on the heterogeneous transistor stacked structure in claims 1-5.
9. A communication base station comprising the power amplifier of any one of claims 6 to 8.
CN202210207867.9A 2022-03-03 2022-03-03 Hybrid power amplifier based on heterogeneous transistor stacked structure Pending CN114567263A (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5838031A (en) * 1996-03-05 1998-11-17 Trw Inc. Low noise-high linearity HEMT-HBT composite
US20100301944A1 (en) * 2009-05-26 2010-12-02 Mitsubishi Electric Corporation Power amplifier
US9768744B1 (en) * 2014-12-03 2017-09-19 Skyworks Solutions, Inc. Cascode power amplifier stage using HBT and FET
CN108768308A (en) * 2018-05-16 2018-11-06 清华大学 Asymmetric Doherty power amplifier based on transistor stack structure
US20190158044A1 (en) * 2017-11-20 2019-05-23 Murata Manufacturing Co., Ltd. Power amplifier and compound semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5838031A (en) * 1996-03-05 1998-11-17 Trw Inc. Low noise-high linearity HEMT-HBT composite
US20100301944A1 (en) * 2009-05-26 2010-12-02 Mitsubishi Electric Corporation Power amplifier
US9768744B1 (en) * 2014-12-03 2017-09-19 Skyworks Solutions, Inc. Cascode power amplifier stage using HBT and FET
US20190158044A1 (en) * 2017-11-20 2019-05-23 Murata Manufacturing Co., Ltd. Power amplifier and compound semiconductor device
CN108768308A (en) * 2018-05-16 2018-11-06 清华大学 Asymmetric Doherty power amplifier based on transistor stack structure

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