CN114554705B

CN114554705B - Circuit board and preparation method thereof

Info

Publication number: CN114554705B
Application number: CN202011331849.9A
Authority: CN
Inventors: 钟仕杰; 刘瑞武
Original assignee: Avary Holding Shenzhen Co Ltd; Qing Ding Precision Electronics Huaian Co Ltd
Current assignee: Avary Holding Shenzhen Co Ltd; Qing Ding Precision Electronics Huaian Co Ltd
Priority date: 2020-11-24
Filing date: 2020-11-24
Publication date: 2024-08-16
Anticipated expiration: 2040-11-24
Also published as: CN114554705A

Abstract

The application provides a circuit board and a preparation method thereof. The preparation method comprises the following steps: providing a double-sided copper-clad substrate, wherein the double-sided copper-clad substrate comprises a base layer, and a first copper foil and a second copper foil which are respectively arranged on two opposite surfaces of the base layer; etching a portion of the first copper foil to obtain a copper foil layer; electroplating a copper foil layer to form an electroplated layer, wherein the copper foil layer and the electroplated layer jointly form a reinforcing plate; pressing an adhesive layer, an insulating layer and a third copper foil on the surface of the base layer with the reinforcing plate; etching the third copper foil and the second copper foil to obtain a first conductive circuit layer and a second conductive circuit layer, wherein the first conductive circuit layer comprises a first welding pad, the second conductive circuit layer comprises a second welding pad, and the first welding pad and the second welding pad correspond to the reinforcing plate in position; and respectively mounting a first electronic element and a second electronic element on the first welding pad and the second welding pad. The application can mount electronic components on both sides of the same area of the circuit board.

Description

Circuit board and preparation method thereof

Technical Field

The application relates to the field of circuit board preparation, in particular to a circuit board with double-sided mounted electronic components and a preparation method thereof.

Background

Along with the increasing slimness, thinness and multifunctionality of electronic products, the integration level of flexible circuit boards is also higher, so that electronic components are often required to be welded on both sides of the flexible circuit boards.

However, if the electronic components are required to be welded on both sides of the same area of the flexible circuit board, the reinforcing plate cannot be installed on the surface of the area, so that the flatness and rigidity of the area are poor, and the problems of empty welding and the like easily occur during subsequent welding of the electronic components. On the other hand, if the requirements on flatness and rigidity of the circuit board are high, the electronic components cannot be welded on the two sides of the same area, and at this time, the electronic components need to be arranged on the surface of the circuit board in a staggered manner, so that the space utilization rate of the circuit board is reduced.

Disclosure of Invention

In order to solve at least one of the above disadvantages of the prior art, it is necessary to provide a method for manufacturing a circuit board and a circuit board manufactured by the method.

The application provides a preparation method of a circuit board, which comprises the following steps: providing a double-sided copper-clad substrate, wherein the double-sided copper-clad substrate comprises a base layer, and a first copper foil and a second copper foil which are respectively arranged on two opposite surfaces of the base layer; etching a portion of the first copper foil to obtain a copper foil layer; electroplating a copper foil layer to form an electroplated layer, wherein the copper foil layer and the electroplated layer jointly form a reinforcing plate; pressing an adhesive layer, an insulating layer and a third copper foil on the surface of the base layer with the reinforcing plate; etching the third copper foil and the second copper foil to obtain a first conductive circuit layer and a second conductive circuit layer, wherein the first conductive circuit layer comprises two first welding pads, the second conductive circuit layer comprises two second welding pads, and the first welding pads and the second welding pads correspond to the reinforcing plate in position; and respectively mounting a first electronic element and a second electronic element on the first welding pad and the second welding pad, thereby obtaining the circuit board.

In some possible implementations, before mounting the first electronic component and the second electronic component, the manufacturing method further includes the steps of: forming a first protective layer and a second protective layer on the first conductive circuit layer and the second conductive circuit layer respectively to obtain a circuit substrate; and part of the first conductive circuit layer is exposed out of the first protective layer to form the first welding pad, and part of the second conductive circuit layer is exposed out of the second protective layer to form the second welding pad.

In some possible implementations, the circuit substrate forms a first mounting area of the first electronic component in an area corresponding to two first bonding pads, forms a second mounting area of the second electronic component in an area corresponding to two second bonding pads, and a vertical projection of the first mounting area on the reinforcing plate and a vertical projection of the second mounting area on the reinforcing plate are all located within a range of the reinforcing plate.

In some possible implementations, the material of the electroplated layer is selected from one of copper, beryllium, molybdenum, tungsten and osmium, and the rigidity of each of the first mounting region and the second mounting region is greater than or equal to 3.2N/mm.

In some possible implementations, etching a portion of the first copper foil to obtain a copper foil layer specifically includes the steps of: a first dry film and a second dry film are respectively covered on the first copper foil and the second copper foil, the first dry film covers part of the surface of the first copper foil, and the second dry film covers the whole surface of the second copper foil; etching the first copper foil which is not covered by the first dry film in an exposure and development mode by taking the first dry film as a photomask to obtain the copper foil layer; and removing the first dry film and the second dry film.

The application also provides a circuit board which comprises a circuit substrate, wherein the circuit substrate comprises a first conductive circuit layer, an insulating layer, an adhesive layer, a base layer and a second conductive circuit layer which are sequentially stacked. The first conductive circuit layer comprises two first welding pads, and the second conductive circuit layer comprises two second welding pads. The circuit substrate further comprises a reinforcing plate arranged on the surface of the base layer, which is far away from the second conductive circuit layer, the reinforcing plate is coated by the adhesive layer, the reinforcing plate comprises a copper foil layer and an electroplated layer, and the copper foil layer is positioned between the electroplated layer and the base layer. The first welding pad and the second welding pad are corresponding to the reinforcing plate in position. The circuit board further comprises a first electronic element and a second electronic element, and the first electronic element and the second electronic element are respectively arranged on the first welding pad and the second welding pad.

In some possible implementations, the circuit substrate further includes a first protection layer and a second protection layer disposed on the first conductive circuit layer and the second conductive circuit layer, respectively, a portion of the first conductive circuit layer is exposed from the first protection layer to form the first bonding pad, and a portion of the second conductive circuit layer is exposed from the second protection layer to form the second bonding pad.

In some possible implementations, along the extending direction of the base layer, the difference between the width of the stiffener and the width of the first mounting region is greater than 80 microns, and the difference between the width of the stiffener and the width of the second mounting region is greater than 80 microns.

Compared with the prior art, the application has the advantages that the reinforcing plate consisting of the copper foil layer and the electroplated layer is embedded between the base layer and the adhesive layer, so that the flatness and rigidity of the circuit board corresponding to the reinforcing plate are improved. Moreover, the electronic components can be mounted on the two sides of the same area of the circuit board, so that the situation that the electronic components need to be arranged on the surface of the circuit board in a staggered manner due to the fact that the reinforcing plate is mounted on the surface of the circuit board is avoided, and the space utilization rate and the surface mounting density are improved.

Drawings

Fig. 1 is a schematic cross-sectional view of a double-sided copper-clad substrate according to an embodiment of the present application.

Fig. 2 is a schematic cross-sectional view of the double-sided copper-clad substrate shown in fig. 1 after the first dry film and the second dry film are coated thereon.

FIG. 3 is a schematic cross-sectional view of the first copper foil shown in FIG. 2 after etching to obtain a copper foil layer.

Fig. 4 is a schematic cross-sectional view of the copper foil layer and the second copper foil shown in fig. 3 after the third dry film and the fourth dry film are respectively coated thereon.

Fig. 5 is a schematic cross-sectional view of the copper foil layer shown in fig. 4 after a plating layer is formed thereon to obtain a reinforcing plate.

Fig. 6 is a schematic cross-sectional view of the reinforcing plate shown in fig. 5 after bonding an adhesive layer, an insulating layer and a third copper foil.

Fig. 7 is a schematic cross-sectional view of the third copper foil and the second copper foil shown in fig. 6 after the fifth dry film and the sixth dry film are respectively coated thereon.

Fig. 8 is a schematic cross-sectional view of the third copper foil and the second copper foil shown in fig. 7 after etching to obtain the first conductive trace layer and the second conductive trace layer.

Fig. 9 is a schematic cross-sectional view of the first conductive trace layer and the second conductive trace layer shown in fig. 8 after forming a first protective layer and a second protective layer, respectively.

Fig. 10 is a schematic cross-sectional view of a circuit board obtained after mounting a first electronic component and a second electronic component on the first conductive trace layer and the second conductive trace layer shown in fig. 9, respectively.

Description of the main reference signs

Double-sided copper-clad substrate 10

Base layer 11

First copper foil 12

Second copper foil 13

Copper foil layer 14

Electroplated layer 15

Reinforcing plate 16

First dry film 20

Second dry film 21

Third Dry film 30

Fourth Dry film 31

Adhesive layer 40

Insulating layer 41

Third copper foil 42

First conductive trace layer 50

Second conductive line layer 51

Fifth dry film 60

Sixth dry film 61

First protective layer 70

The second protective layer 71

First electronic component 80

Second electronic component 81

Conductive layer 82

Circuit board 100

Circuit board 101

Openings 300, 600, 610

First bonding pad 500

First mounting region 501

Second bonding pad 510

Second mounting region 511

First region 1010

Width W1, W2, W3, W4

Thickness H

The application will be further described in the following detailed description in conjunction with the above-described figures.

Detailed Description

The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

The application will be described in detail below with reference to the drawings and preferred embodiments thereof, in order to further explain the technical means and effects of the application to achieve the intended purpose.

The application provides a preparation method of a circuit board, which comprises the following steps:

S1, referring to FIG. 1, a double-sided copper-clad substrate 10 is provided. The double-sided copper-clad substrate 10 includes a base layer 11 and first and second copper foils 12 and 13 disposed on opposite surfaces of the base layer 11, respectively.

In one embodiment, the material of the base layer 11 is an insulating resin, and specifically, the material of the base layer 11 may be selected from one of epoxy resin (epoxy resin), polypropylene (PP), BT resin, polyphenylene oxide (polyphenylene Oxide, PPO), polypropylene (PP), polyimide (PI), polyethylene terephthalate (polyethylene terephthalate, PET), polyethylene naphthalate (polyethylene naphthalate, PEN), and the like.

S2, referring to FIGS. 2 and 3, a portion of the first copper foil 12 is etched to obtain a copper foil layer 14.

In one embodiment, as shown in fig. 2, first, the first dry film 20 and the second dry film 21 are respectively coated on the first copper foil 12 and the second copper foil 13. Wherein the first dry film 20 covers a part of the surface of the first copper foil 12, and the second dry film 21 covers the entire surface of the second copper foil 13.

As shown in fig. 3, the first dry film 20 is used as a photomask, and the first copper foil 12 not covered by the first dry film 20 is etched by an exposure and development method, so as to obtain the copper foil layer 14. Then, the first dry film 20 and the second dry film 21 are removed.

Specifically, since the first dry film 20 covers a part of the surface of the first copper foil 12 and the second dry film 21 covers the entire surface of the second copper foil 13, the covered part of the first copper foil 12 and the entire second copper foil 13 are left after the exposure development. While the remaining first copper foil 12 not covered by the first dry film 20 is removed after the exposure development.

In one embodiment, the number of copper foil layers 14 is one. It is to be understood that the number of copper foil layers 14 is not limited to one, and may be set according to the number of electronic components to be mounted later on the side of the base layer 11.

S3, referring to FIGS. 4 and 5, a plating layer 15 is formed on the copper foil layer 14 by electroplating, and the copper foil layer 14 and the plating layer 15 together form a reinforcing plate 16.

In one embodiment, as shown in fig. 4, first, the third dry film 30 is coated on the base layer 11 having the copper foil layer 14, and the fourth dry film 31 is coated on the second copper foil 13. Wherein the third dry film 30 has an opening 300 for exposing the copper foil, and the fourth dry film 31 covers the entire surface of the second copper foil 13. As shown in fig. 5, copper is then electroplated in the openings 300, thereby forming the electroplated layer 15. Since the fourth dry film 31 covers the entire surface of the second copper foil 13, the plating layer 15 is not formed on the second copper foil 13. Then, the third dry film 30 and the fourth dry film 31 are removed.

In an embodiment, the width W2 of the plating layer 15 may be equal to or slightly smaller than the width W1 of the copper foil layer 14 along the extending direction of the base layer 11. As shown in fig. 4, in the present embodiment, the width W2 of the plating layer 15 is slightly smaller than the width W1 of the copper foil layer 14, that is, the width of the opening 300 is slightly smaller than the width W1 of the copper foil layer 14.

Wherein the electroplated layer 15 is provided to increase the total thickness H of the stiffener 16. The cross-sectional shape of the plating layer 15 may be square. However, it is to be understood that in other embodiments, the cross-sectional shape of the plating layer 15 is not limited to a square shape, and may be correspondingly arranged according to the shape of the electronic component to be mounted later.

In another embodiment, the material of the plating layer 15 is not limited to copper, and may be obtained by plating a metal having a higher young's modulus. For example, the material of the plating layer 15 may include one of beryllium, molybdenum, tungsten, and osmium.

S4, referring to FIG. 6, an adhesive layer 40, an insulating layer 41 and a third copper foil 42 are laminated on the surface of the base layer 11 with the reinforcing plate 16. The insulating layer 41 is located between the adhesive layer 40 and the third copper foil 42.

In one embodiment, the material of the insulating layer 41 is an insulating resin, and specifically, the material of the insulating layer 41 may be one selected from epoxy resin, polypropylene, BT resin, polyphenylene oxide, polypropylene, polyimide, polyethylene terephthalate, and polyethylene naphthalate. The material of the insulating layer 41 may be the same as that of the base layer 11.

S5, referring to fig. 7 and 8, the third copper foil 42 and the second copper foil 13 are etched by an exposure and development process, thereby obtaining a first conductive trace layer 50 and a second conductive trace layer 51.

In one embodiment, as shown in fig. 7, first, the fifth dry film 60 and the sixth dry film 61 are respectively coated on the third copper foil 42 and the second copper foil 13. The fifth dry film 60 and the sixth dry film 61 have openings 600, 610 for exposing the third copper foil 42 and the second copper foil 13, respectively. Then, as shown in fig. 8, the third copper foil 42 and the second copper foil 13 are exposed and developed with the fifth dry film 60 and the sixth dry film 61 as a photomask, so that the third copper foil 42 exposed to the opening 600 of the fifth dry film 60 and the second copper foil 13 exposed to the opening 610 of the sixth dry film 61 are etched, thereby obtaining the first conductive trace layer 50 and the second conductive trace layer 51. Then, the fifth dry film 60 and the sixth dry film 61 are removed.

S6, referring to fig. 9, a first protective layer 70 and a second protective layer 71 are formed on the first conductive trace layer 50 and the second conductive trace layer 51, respectively, to obtain a trace substrate 101. Wherein, a portion of the first conductive trace layer 50 is exposed from the first protective layer 70 to form two first pads 500, and a portion of the second conductive trace layer 51 is exposed from the second protective layer 71 to form two second pads 510. The first bonding pad 500 and the second bonding pad 510 correspond to the positions of the stiffening plate 16. That is, in a direction perpendicular to the extending direction of the base layer 11, the first pads 500 and the second pads 510 are aligned with the reinforcing plate 16.

In an embodiment, the first protective layer 70 and the second protective layer 71 may be a solder resist or a cover film (CVL), for example, the first protective layer 70 and the second protective layer 71 may include solder resist ink. The first protective layer 70 and the second protective layer 71 serve to prevent oxidation or solder short of the first conductive line layer 50 and the second conductive line layer 51.

S7, referring to fig. 10, the first electronic component 80 and the second electronic component 81 are respectively mounted on the first pad 500 and the second pad 510 of the circuit board 101, thereby obtaining the circuit board 100.

The first electronic component 80 and the second electronic component 81 may be passive components such as resistors, capacitors, and the like. The first electronic component 80 and the second electronic component 81 may be mounted on the first pad 500 and the second pad 510 through the conductive layer 82. In an embodiment, the first electronic component 80 and the second electronic component 81 are mounted on the first bonding pad 500 and the second bonding pad 510 by soldering, i.e. the conductive layer 82 is solder.

The circuit board 101 has a first mounting region 501 of the first electronic component 80 formed in a region corresponding to the two first pads 500 and a second mounting region 511 of the second electronic component 81 formed in a region corresponding to the two second pads 510. When the total thickness H of the reinforcing plate 16 increases, the rigidity of the first mounting region 501 and the second mounting region 511 correspondingly increases. The required stiffness of the first mounting region 501 and the second mounting region 511 is in turn related to the kind or size of the electronic component to be mounted. Wherein when it is necessary to increase the rigidity of the first mounting region 501 and the second mounting region 511, the plating time can be appropriately prolonged, thereby increasing the thickness of the plating layer 15. In one embodiment, when the electroplated copper 15 is copper, the thickness of the electroplated layer 156 is greater than or equal to 59 microns. The second mounting region 511 of the first mounting region 501 has a stiffness of greater than or equal to 3.2N/mm.

In another embodiment, when the material of the plating layer 15 includes one of beryllium, molybdenum, tungsten, and osmium, since the young's modulus of the metals is higher, it is advantageous to reduce the thickness of the plating layer 15 in the case that the rigidity of the first mounting region 501 and the second mounting region 511 is constant. When the material of the electroplated layer 15 is beryllium, the thickness of the electroplated layer 15 is greater than or equal to 44 micrometers; when the material of the electroplated layer 15 is molybdenum, the thickness of the electroplated layer 15 is greater than or equal to 42 micrometers; when the material of the plating layer 15 is tungsten, the thickness of the plating layer 15 is 39 micrometers or more; when the material of the electroplated copper 15 is osmium, the thickness of the electroplated layer 15 is greater than or equal to 35 μm.

As shown in fig. 10, in an embodiment, the perpendicular projection of the first mounting region 501 onto the stiffener 16 and the perpendicular projection of the second mounting region 511 onto the stiffener 16 are all within the scope of the stiffener 16. In this way, the first mounting region 501 and the second mounting region 511 can be ensured to have high rigidity, and the first electronic component 80 and the second electronic component 81 can be ensured not to have the problem of empty soldering or the like when soldered. In the present embodiment, the difference between the width of the reinforcing plate 16 (the width W1 of the reinforcing plate 16 when the width W2 of the plating layer 15 is smaller than the width W1 of the copper foil layer 14) and the width W3 of the first mounting region 501 is greater than 80 micrometers, and the difference between the width of the reinforcing plate 16 and the width W4 of the second mounting region 511 is greater than 80 micrometers, along the extending direction of the base layer 11.

Referring to fig. 10, the present application further provides a circuit board 100 manufactured by the above manufacturing method, which includes a circuit substrate 101, and a first electronic component 80 and a second electronic component 81 mounted on the circuit substrate 101. The wiring substrate 101 includes a first protective layer 70, a first conductive wiring layer 50, an insulating layer 41, an adhesive layer 40, a base layer 11, a second conductive wiring layer 51, and a second protective layer 71, which are stacked in this order. Wherein, a portion of the first conductive trace layer 50 is exposed from the first protective layer 70 to form a first bonding pad 500, and a portion of the second conductive trace layer 51 is exposed from the second protective layer 71 to form a second bonding pad 510.

The circuit substrate 101 further includes a stiffener 16 disposed on a surface of the base layer 11 remote from the second conductive circuit layer 51. The adhesive layer 40 encapsulates the stiffening plate 16. The reinforcing plate 16 includes a copper foil layer 14 and a plating layer 15, the copper foil layer 14 being located between the plating layer 15 and the base layer 11. The first bonding pad 500 and the second bonding pad 510 correspond to the positions of the stiffening plate 16. The first electronic component 80 and the second electronic component 81 are mounted on the first pad 500 and the second pad 510, respectively.

The circuit substrate 101 is divided into a first region 1010 corresponding to the stiffener 16 and a second region (not shown) other than the first region. Due to the presence of the reinforcing plate 16, the thickness of the first region 1010 is greater than the thickness of the second region in a direction perpendicular to the extending direction of the wiring board 100.

In the present application, since the reinforcing plate 16 composed of the copper foil layer 14 and the plating layer 15 is buried between the base layer 11 and the adhesive layer 40, the flatness and rigidity of the region of the wiring board 100 corresponding to the reinforcing plate 16 are improved. In addition, the electronic components can be mounted on both sides of the same area of the circuit board 100, so that the situation that the electronic components need to be arranged on the surface of the circuit board 100 in a staggered manner due to the fact that the reinforcing plate 16 is mounted on the surface of the circuit board 100 is avoided, and the space utilization rate and the surface mounting density are improved.

It should be understood that various other corresponding changes and modifications can be made by one skilled in the art according to the technical concept of the present application, and all such changes and modifications should fall within the scope of the claims of the present application.

Claims

1. The preparation method of the circuit board is characterized by comprising the following steps:

Providing a double-sided copper-clad substrate, wherein the double-sided copper-clad substrate comprises a base layer, and a first copper foil and a second copper foil which are respectively arranged on two opposite surfaces of the base layer;

etching a portion of the first copper foil to obtain a copper foil layer;

electroplating a copper foil layer to form an electroplated layer, wherein the copper foil layer and the electroplated layer jointly form a reinforcing plate;

pressing an adhesive layer, an insulating layer and a third copper foil on the surface of the base layer with the reinforcing plate;

Etching the third copper foil and the second copper foil to obtain a first conductive circuit layer and a second conductive circuit layer, wherein the first conductive circuit layer comprises two first welding pads, the second conductive circuit layer comprises two second welding pads, and the first welding pads and the second welding pads correspond to the reinforcing plate in position;

And respectively mounting a first electronic element and a second electronic element on the first welding pad and the second welding pad, thereby obtaining the circuit board.

2. The method of manufacturing a circuit board according to claim 1, wherein before mounting the first electronic component and the second electronic component, the method further comprises the steps of:

Forming a first protective layer and a second protective layer on the first conductive circuit layer and the second conductive circuit layer respectively to obtain a circuit substrate;

And part of the first conductive circuit layer is exposed out of the first protective layer to form the first welding pad, and part of the second conductive circuit layer is exposed out of the second protective layer to form the second welding pad.

3. The method of manufacturing a circuit board according to claim 2, wherein the circuit board forms a first mounting region of the first electronic component in a region corresponding to two of the first pads, forms a second mounting region of the second electronic component in a region corresponding to two of the second pads, and a vertical projection of the first mounting region onto the reinforcing plate and a vertical projection of the second mounting region onto the reinforcing plate are all within a range of the reinforcing plate.

4. The method of manufacturing a circuit board according to claim 3, wherein the plating layer is made of one material selected from copper, beryllium, molybdenum, tungsten and osmium, and the rigidity of each of the first mounting region and the second mounting region is 3.2N/mm or more.

5. The method of manufacturing a circuit board according to claim 1, wherein etching a portion of the first copper foil to obtain a copper foil layer comprises the steps of:

A first dry film and a second dry film are respectively covered on the first copper foil and the second copper foil, the first dry film covers part of the surface of the first copper foil, and the second dry film covers the whole surface of the second copper foil;

Etching the first copper foil which is not covered by the first dry film in an exposure and development mode by taking the first dry film as a photomask to obtain the copper foil layer;

and removing the first dry film and the second dry film.

6. The circuit board comprises a circuit substrate, wherein the circuit substrate comprises a first conductive circuit layer, an insulating layer, an adhesive layer, a base layer and a second conductive circuit layer which are sequentially stacked, the first conductive circuit layer comprises two first welding pads, the second conductive circuit layer comprises two second welding pads, and the circuit board is characterized in that,

The circuit substrate further comprises a reinforcing plate arranged on the surface, far away from the second conductive circuit layer, of the base layer, the reinforcing plate is coated by the adhesive layer, the reinforcing plate comprises a copper foil layer and a plating layer, the copper foil layer is positioned between the plating layer and the base layer, and the first welding pad and the second welding pad correspond to the reinforcing plate in position;

the circuit board further comprises a first electronic element and a second electronic element, and the first electronic element and the second electronic element are respectively arranged on the first welding pad and the second welding pad.

7. The circuit board of claim 6, wherein the circuit substrate further comprises a first protective layer and a second protective layer disposed on the first conductive circuit layer and the second conductive circuit layer, respectively, a portion of the first conductive circuit layer is exposed from the first protective layer to form the first bonding pad, and a portion of the second conductive circuit layer is exposed from the second protective layer to form the second bonding pad.

8. The circuit board of claim 7, wherein the circuit substrate forms a first mounting region of the first electronic component in a region corresponding to two of the first pads and forms a second mounting region of the second electronic component in a region corresponding to two of the second pads, and a perpendicular projection of the first mounting region onto the stiffener and a perpendicular projection of the second mounting region onto the stiffener are all within a range of the stiffener.

9. The circuit board of claim 8, wherein the electroplated layer is one of copper, beryllium, molybdenum, tungsten, and osmium, and wherein the first and second mounting regions each have a stiffness of greater than or equal to 3.2N/mm.

10. The circuit board of claim 8, wherein a difference between a width of the stiffener and a width of the first mounting region along an extension direction of the base layer is greater than 80 microns, and a difference between a width of the stiffener and a width of the second mounting region is greater than 80 microns.