CN114551681A - LED chip structure and manufacturing method thereof - Google Patents

Abstract

The invention relates to an LED chip structure and a manufacturing method thereof. The LED chip structure is provided with a transparent conducting layer with a surface microstructure, the Ra value of the microstructure is in nm magnitude, light rays are reflected by the microstructure, the propagation direction can be effectively changed, the total reflection probability of a light-emitting surface is reduced, and the lighting effect of a device is finally improved.

Description

A kind of LED chip structure and its manufacturing method

technical field

The invention relates to the field of LED chip structures, in particular to an LED chip structure and a manufacturing method thereof.

Background technique

The light-emitting device relies on the photons emitted by the active layer to emit light. The photons emitted by the active layer are emitted with equal probability in all directions. Therefore, when the photons are emitted from the light-emitting direction, multiple reflections will occur inside the device. Therefore, how to improve the The reflection efficiency inside the light-emitting device, thereby increasing the luminous efficiency of the device, is a technical problem that needs to be solved.

SUMMARY OF THE INVENTION

In order to overcome the problems existing in the related art, the present invention provides an LED chip structure and a manufacturing method thereof, by forming a transparent conductive layer, such as an ITO layer, with a surface nanometer-scale microstructure. The light reflected by the microstructure can effectively change the propagation direction, reduce the total reflection probability of the light-emitting surface, and finally improve the light efficiency of the device.

According to a first aspect of the embodiments of the present invention, an LED chip structure is provided, including: a first semiconductor layer, a second semiconductor layer, an active layer located between the first semiconductor layer and the second semiconductor layer, and the The first semiconductor layer forms a transparent conductive layer in contact with at least a partial area, a first conductive layer is electrically connected to the transparent conductive layer, a second conductive layer is electrically connected to the first conductive layer, and is electrically connected to the second conductive layer. The conductive layer forms an electrode for electrical connection, wherein the first conductive layer, the second conductive layer and the electrode together form a first electrical connection layer, which runs through the first semiconductor layer and the active layer and extends to the second semiconductor layer An inner recess, a first insulating layer covering part of the surface of the first semiconductor layer and partially exposed to the outside of the light-emitting device, and a second insulating layer covering the sidewall of the recess and the side of the first electrical connection layer layer, a third conductive layer partially in contact with the surface of the second insulating layer and electrically connected to the second semiconductor layer, and a support substrate in contact with the third conductive layer, at least one of the transparent conductive layers The side surfaces have nanoscale microstructures.

Further, the microstructures are randomly distributed on the surface of the transparent conductive layer.

Further, the transparent conductive layer is a metal oxide material.

Further, the oxide contains In, Sn, and O elements.

Further, the first conductive layer, the second conductive layer, the third conductive layer and the electrode all comprise a multi-layer metal structure.

Further, when the support substrate is a non-conductive material, the third conductive layer is a second electrical connection layer, and when the support substrate is conductive, the third conductive layer and the support substrate together form an electrical connection layer .

According to a second aspect of the embodiments of the present invention, a method for fabricating an LED chip structure is provided, including:

fabricating an initial epitaxial structure, including sequentially growing a second semiconductor layer, an active layer and a first semiconductor layer on an epitaxial growth substrate;

forming at least one recess through the first semiconductor layer and the active layer and extending into the interior of the second semiconductor layer;

A transparent conductive layer and a first conductive layer are sequentially fabricated on a part of the surface of the first semiconductor layer, and at least part of the first conductive layer is in contact with the first semiconductor layer through the transparent conductive layer;

forming a microstructure on the surface of the transparent conductive layer by means of gas etching;

forming a first insulating layer on the surface of the first semiconductor layer outside the first conductive layer;

forming a second conductive layer on a part of the surface of the first insulating layer and the surface of the first conductive layer;

forming a second insulating layer on the remaining surface of the first insulating layer, the surface of the second conductive layer and the sidewall surface of the recess;

Making a third conductive layer on the surface of the second insulating layer;

Making a support substrate on the surface of the third conductive layer;

The epitaxial growth substrate is removed.

Further, using gas etching to form a microstructure on the surface of the transparent conductive layer, specifically comprising: bombarding the surface of the transparent conductive layer with a gas accelerated by an electric field, thereby obtaining a microstructure with a scale of nm;

Further, the atomic weight of the gas used to bombard the surface of the transparent conductive layer is more than 20 to obtain sufficient bombardment force, the voltage of the accelerating electric field is within 10-1000V, and the entire bombardment process is carried out under a vacuum of <0.1Pa.

The technical solutions provided by the embodiments of the present invention may include the following beneficial effects:

The LED chip structure has a transparent conductive layer with a surface microstructure. The Ra value of the microstructure is in the nm order. The light reflected by the microstructure can effectively change the propagation direction, reduce the total reflection probability of the light-emitting surface, and finally improve the device. light effect.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention.

Description of drawings

The above and other objects, features and advantages of the present invention will become more apparent from the more detailed description of the exemplary embodiments of the present invention in conjunction with the accompanying drawings, wherein the same reference numerals generally represent the exemplary embodiments of the present invention. same parts.

1 is a schematic cross-sectional structural diagram of an existing LED chip structure;

2 is a schematic cross-sectional structural diagram of an LED chip structure according to an exemplary embodiment of the present invention;

3 is a schematic diagram of a light reflection principle of an LED chip structure and an existing LED chip structure according to an exemplary embodiment of the present invention;

4 is a schematic diagram of the measured optical power data of the light-emitting device with the present invention and a known structure;

5 is a flowchart of a method for fabricating an LED chip structure according to an exemplary embodiment of the present invention;

6 is a schematic diagram of the initial epitaxial structure of the LED chip structure formed after step S501 is completed;

7 is a schematic structural diagram of an LED chip structure formed after step S502 is completed;

8 is a schematic structural diagram of an LED chip structure formed after step S503 is completed;

FIG. 9 is a schematic structural diagram of the LED chip structure formed after step S504 is completed.

DESCRIPTION OF REFERENCE NUMERALS, 1: first semiconductor layer, 2: second semiconductor layer, 3: active layer, 4: transparent conductive layer, 5: first conductive layer, 6: second conductive layer, 7: electrode, 8 : recess, 9: first insulating layer, 10: second insulating layer, 11: third conductive layer, 12: supporting substrate.

Detailed ways

Preferred embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. While preferred embodiments of the present invention are shown in the drawings, it should be understood that the present invention may be embodied in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present invention to those skilled in the art.

The terminology used in the present invention is for the purpose of describing particular embodiments only and is not intended to limit the present invention. As used in this specification and the appended claims, the singular forms "a," "the," and "the" are intended to include the plural forms as well, unless the context clearly dictates otherwise. It will also be understood that the term "and/or" as used herein refers to and includes any and all possible combinations of one or more of the associated listed items.

It should be understood that although the terms "first", "second", "third", etc. may be used in the present invention to describe various information, such information should not be limited by these terms. These terms are only used to distinguish the same type of information from each other. For example, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information, without departing from the scope of the present invention. Thus, a feature defined as "first" or "second" may expressly or implicitly include one or more of that feature. In the description of the present invention, "plurality" means two or more, unless otherwise expressly and specifically defined.

The technical solutions of the embodiments of the present invention are described in detail below with reference to the accompanying drawings.

FIG. 1 is a schematic cross-sectional structure diagram of an existing LED chip structure. As shown in FIG. 1 , the existing LED chip structure includes: a first semiconductor layer 1 , a second semiconductor layer 2 , and the first semiconductor layer 1 and the second semiconductor layer The active layer 3 between the semiconductor layers 2, the transparent conductive layer 4 that forms contact with at least part of the first semiconductor layer 1, the first conductive layer 5 that forms electrical connection with the transparent conductive layer 4, and the A conductive layer 5 forms a second conductive layer 6 that is electrically connected, and an electrode 7 that is electrically connected to the second conductive layer 6, wherein the first conductive layer 5, the second conductive layer 6 and the electrode 7 together form the first conductive layer 6. An electrical connection layer, further comprising a recess 8 penetrating the first semiconductor layer 1 and the active layer 3 and extending into the interior of the second semiconductor layer 2, covering part of the surface of the first semiconductor layer 1 and partially exposed to the The first insulating layer 9 outside the light-emitting device, the second insulating layer 10 covering the sidewall of the recess 8 and the side of the first electrical connection layer are partially in contact with the surface of the second insulating layer 10 and are in contact with the surface of the second insulating layer 10. The second semiconductor layer 2 forms a third conductive layer 11 that is electrically connected, and a support substrate 12 that is in contact with the third conductive layer 11 . The transparent conductive layer 4 is commonly a metal oxide material containing In, Sn, and O elements, such as ITO and the like.

FIG. 2 is a schematic cross-sectional structure diagram of an LED chip structure according to an exemplary embodiment of the present invention. On the basis of the existing LED chip structure, at least one surface of the transparent conductive layer 4 has nanometer-level microstructures. structure.

An LED chip structure shown in the embodiment of the present invention has a transparent conductive layer with a surface microstructure, and the Ra value of the microstructure is in the order of nm. The light reflected by the microstructure can effectively change the propagation direction, reduce the probability of total reflection on the light-emitting surface, and finally improve the light efficiency of the device.

FIG. 3 is a schematic diagram of a light reflection principle of an LED chip structure and an existing LED chip structure according to an exemplary embodiment of the present invention. As shown in Figure 3a, after the light is reflected on the reflective surface without the microstructure, the light is repeatedly reflected inside the device in a manner similar to a parallel array and cannot be emitted from the light-emitting surface. As shown in Figure 3b, after the light is reflected by the reflective surface with the microstructure, the direction of the light will change significantly, so the probability of total reflection will be effectively reduced on the light-emitting surface.

FIG. 4 shows the measured optical power data of the light-emitting device with the structure of the present invention and the known structure, and it can be seen that the light efficiency of the LED chip structure of the present invention is significantly improved.

Optionally, in this embodiment, the first conductive layer 5 , the second conductive layer 6 , the third conductive layer 11 and the electrode 7 all include a multi-layer metal structure.

Optionally, in this embodiment, when the supporting substrate 12 is a non-conductive material, the third conductive layer 11 is a second electrical connection layer, and when the supporting substrate 12 is conductive, the third conductive layer The layer 11 and the supporting substrate 12 together constitute an electrical connection layer.

An embodiment of the present invention also provides a method for fabricating an LED chip structure, as shown in FIG. 5 , the method includes:

S501, fabricating an initial epitaxial structure, including sequentially growing a second semiconductor layer 2, an active layer 3 and a first semiconductor layer 1 on an epitaxial growth substrate;

FIG. 6 is a schematic diagram of an initial epitaxial structure, and the specific process may adopt the prior art, which will not be repeated in this embodiment.

S502 , forming a recess 8 extending through the first semiconductor layer 1 and the active layer 3 and extending to the inside of the second semiconductor layer 2 ;

In this step, UV mask patterning and chemical etching can be used to obtain a recess 8 that penetrates the first semiconductor layer 1 and the active layer 3 and extends into the second semiconductor layer 2 , the specific structure of which is shown in FIG. 7 . Show. The specific process may adopt the prior art, which will not be repeated in this embodiment.

S503 , forming a transparent conductive layer 4 and a first conductive layer 5 in sequence on a part of the surface of the first semiconductor layer 1 . The first conductive layer 5 is at least connected to the first semiconductor layer 4 through the transparent conductive layer. contact in some areas;

In this step, in this step, the method of patterning, evaporation and peeling of the UV mask is used first to obtain the transparent conductive layer 4 and the first conductive layer 5. The specific structure is shown in FIG. 8, and the specific process can adopt the existing There is a technology, which is not repeated in this embodiment.

ITO is a commonly used transparent conductive material, which is generally deposited on the LED as a conductive layer by electron beam evaporation or magnetron sputtering. Due to process characteristics, the deposited ITO film has a smooth surface, and its Ra value is in the order of one thousandth of a nm.

S504, using gas etching to form a microstructure on the surface of the transparent conductive layer;

Specifically, in this step, a transparent conductive surface with a microstructure with an Ra value in the nm order can be obtained by gas etching. The surface with the microstructure can effectively increase the reflection angle distribution range of light, thereby reducing the total reflection phenomenon of the LED light emitting surface and improving the efficiency of primary light extraction.

The surface of the transparent conductive layer 4 can be bombarded by the plasma formed by the gas accelerated by the electric field, thereby obtaining a nanoscale microstructure. The rough surface of the microstructure is rough on at least one side, as shown in FIG.

S505, forming a first insulating layer 9 on the surface of the first semiconductor layer 1 outside the first conductive layer 5;

In this step, the well-known vapor deposition, UV mask patterning, and etching methods can be used to obtain the first insulating layer 9 .

S506, forming a second conductive layer 6 on a part of the surface of the first insulating layer 9 and the surface of the first conductive layer 5;

In this step, the second conductive layer 6 can be obtained by using the known methods of UV mask patterning, evaporation and stripping.

S507, forming a second insulating layer 10 on the remaining surface of the first insulating layer 9 and the surface of the second conductive layer 6;

S508, forming a third conductive layer 11 on the surface of the second insulating layer 10;

S509 , forming a support substrate 12 on the surface of the third conductive layer 11 ;

The specific process for fabricating the second insulating layer 10 , the third conductive layer 11 and the supporting substrate 12 can be made by using the prior art, which will not be repeated in this embodiment.

The finally formed LED chip structure is shown in FIG. 2 .

Optionally, in this embodiment, the method further includes:

S510, forming electrodes 7 on the surface of the second conductive layer 6;

S511 , removing the epitaxial growth substrate.

The specific structure is shown in FIG. 2 , and the specific process may adopt the prior art, which will not be repeated in this embodiment.

Optionally, in this embodiment, the atomic weight of the gas used to bombard the surface of the transparent conductive layer is above 20 to obtain sufficient bombardment force, the voltage of the accelerating electric field is within 10-1000V, and the entire bombardment process is within <0.1Pa under vacuum.

Various embodiments of the present invention have been described above, and the foregoing descriptions are exemplary, not exhaustive, and not limiting of the disclosed embodiments. Numerous modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen to best explain the principles of the various embodiments, the practical application or improvement over the technology in the marketplace, or to enable others of ordinary skill in the art to understand the various embodiments disclosed herein.

Claims (9)

1. An LED chip structure comprising:

a first semiconductor layer, a second semiconductor layer, an active layer between the first semiconductor layer and the second semiconductor layer, a transparent conductive layer in contact with at least a partial region of the first semiconductor layer,

a first conductive layer electrically connected with the transparent conductive layer, a second conductive layer electrically connected with the first conductive layer, and an electrode electrically connected with the second conductive layer, wherein the first conductive layer, the second conductive layer and the electrode jointly form a first electrical connection layer,

a recess penetrating the first semiconductor layer and the active layer and extending to the inside of the second semiconductor layer,

a first insulating layer covering part of the surface of the first semiconductor layer and partially exposed to the outside of the light emitting device, a second insulating layer covering the side wall of the recess and one side of the first electrical connection layer, a third conductive layer partially contacting the surface of the second insulating layer and electrically connected with the second semiconductor layer, and a supporting substrate contacting the third conductive layer,

the transparent conductive layer is characterized in that at least one side surface of the transparent conductive layer is provided with a nm-level microstructure.

2. The LED chip structure of claim 1, wherein the microstructures are randomly distributed on the surface of the transparent conductive layer.

3. The LED chip structure of claim 1, wherein said transparent conductive layer is a metal oxide material.

4. The LED chip structure of claim 3, wherein said oxide contains In, Sn, O elements.

5. The LED chip structure of claim 1, wherein said first conductive layer, said second conductive layer, said third conductive layer and said electrode comprise a multi-layer metal structure.

6. The LED chip structure of claim 1, wherein when said supporting substrate is made of a non-conductive material, said third conductive layer is a second electrical connection layer, and when said supporting substrate is conductive, said third conductive layer and said supporting substrate together form an electrical connection layer.

7. A manufacturing method of an LED chip structure is characterized by comprising the following steps:

manufacturing an initial epitaxial structure, wherein the initial epitaxial structure comprises a second semiconductor layer, an active layer and a first semiconductor layer which are sequentially grown on an epitaxial growth substrate;

manufacturing at least one recess penetrating through the first semiconductor layer and the active layer and extending into the second semiconductor layer;

sequentially manufacturing a transparent conducting layer and a first conducting layer on part of the surface of the first semiconductor layer, wherein the first conducting layer is in contact with at least part of the area of the first semiconductor layer through the transparent conducting layer;

forming a microstructure on the surface of the transparent conducting layer by using a gas etching mode;

manufacturing a first insulating layer on the surface of the first semiconductor layer on the outer side of the first conducting layer;

manufacturing a second conductive layer on part of the surface of the first insulating layer and the surface of the first conductive layer;

manufacturing a second insulating layer on the residual surface of the first insulating layer, the surface of the second conducting layer and the surface of the side wall of the recess;

manufacturing a third conducting layer on the surface of the second insulating layer;

manufacturing a supporting substrate on the surface of the third conducting layer;

and removing the epitaxial growth substrate.

8. The method according to claim 7, wherein forming a microstructure on the surface of the ITO layer by gas etching comprises:

and bombarding the surface of the transparent conductive layer by using gas accelerated by an electric field so as to obtain a microstructure in the nm scale.

9. The method according to claim 8, wherein the atomic weight of the gas for bombarding the surface of the transparent conductive layer is above 20 to obtain sufficient bombarding force, the voltage of the accelerating electric field is within 10-1000V, and the whole bombarding process is performed under vacuum of <0.1 Pa.

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