CN114501801A - Circuit board processing method and circuit board - Google Patents

Abstract

The application discloses a processing method of a circuit board and the circuit board, comprising: forming a through hole on a substrate, wherein the substrate comprises a first surface and a second surface which are arranged oppositely, and the through hole penetrates through the first surface and the second surface; forming a conductive layer on the first surface, the second surface and the inner wall of the through hole by the substrate; covering the first surface and/or the second surface of the substrate with a dry film; forming a plurality of openings on the dry film, wherein the conductive layer at the positions of the openings is exposed, and the vertical section of each opening is in an inverted trapezoid in the direction away from the substrate; forming a conductive block on the exposed conductive layer; and removing the dry film. Through the mode, the top layer line width and the bottom layer line width of the circuit board can be very close.

Description

A kind of processing method of circuit board and circuit board

technical field

The present application relates to the technical field of circuit board processing, and in particular, to a circuit board processing method and circuit board.

Background technique

Electronic products have been undergoing the evolution of precision and improved functions. In this process, the wiring of circuit boards is becoming more and more precise. Obviously, this puts forward higher requirements for the production process of circuit boards.

For the outer layers of multi-layer PCBs, the existing processing capacity is generally 3mil/3mil (line width/line spacing). However, in the traditional manufacturing process, due to the limitations of the resolution capability, dry film adhesion, and potion stability during the image transfer process, it is difficult for the existing process to make finer lines. Therefore, it is necessary to provide a new circuit board manufacturing process to solve the above problems.

SUMMARY OF THE INVENTION

The main technical problem to be solved by this application is to provide a method for processing a circuit board and a circuit board, which can make the line widths of the top and bottom layers of the circuit board very close.

In order to solve the above technical problems, a technical solution adopted in the present application is to provide a method for processing a circuit board, comprising: forming a through hole on a base material, wherein the base material includes a first surface and a second surface arranged opposite to each other , the through hole runs through the first surface and the second surface; the substrate forms a conductive layer on the first surface, the second surface and the inner wall of the through hole; the first surface and/or the second surface of the substrate is covered with a dry film; A plurality of openings are formed thereon, and the conductive layer at the opening position is exposed, wherein, in the direction away from the substrate, the vertical cross section of the opening is an inverted trapezoid; a conductive block is formed on the exposed conductive layer; and the dry film is removed.

Wherein, the ratio between the area of the first opening on the side of the opening close to the substrate and the area of the second opening on the side away from the substrate ranges from 0.6:1 to 1:1.

Wherein, in a direction parallel to the first surface, the length of the opening is less than or equal to 3 mil, and the length of the dry film between adjacent openings is less than or equal to 3 mil.

Wherein, the step of forming a plurality of openings on the dry film includes: using a laser to form a plurality of openings on the dry film.

Wherein, the step of forming a plurality of openings on the dry film by using a laser includes: using a laser to form a plurality of openings on the dry film corresponding to the position of the through hole and the dry film at the position of the non-through hole.

Wherein, the step of removing the dry film includes: removing the dry film by using a chemical reagent, wherein the chemical reagent includes sodium hydroxide.

Wherein, after the step of removing the dry film, the steps include: covering the protective film at the position of the through hole; micro-etching the conductive blocks and/or conductive layers exposed from the protective film; and removing the protective film.

In order to solve the above technical problem, another technical solution adopted in the present application is to provide a circuit board, comprising: a base material, including a first surface and a second surface arranged opposite to each other, and the base material is provided with through holes, The hole runs through the first surface and the second surface; the conductive layer covers the first surface, the second surface and the inner wall of the through hole; a plurality of conductive blocks are arranged on the conductive layer at intervals, and are located on the first surface in the direction away from the substrate. The vertical section of the conductive block on the surface and/or the second surface is an inverted trapezoid.

Wherein, for the inverted trapezoidal conductive block, the ratio between the area of the third surface on the side close to the substrate and the area of the fourth surface on the side away from the substrate ranges from 0.6:1 to 1:1.

Wherein, in a direction parallel to the first surface, the length of the conductive blocks is less than or equal to 3 mils, and the distance between adjacent conductive blocks is less than or equal to 3 mils.

Different from the situation in the prior art, the beneficial effect of the present application is that the processing method of the circuit board in the present application includes: forming a through hole on a base material, wherein the base material includes a first surface and a second surface arranged opposite to each other , the through hole runs through the first surface and the second surface; the base material forms a conductive layer on the first surface, the second surface and the inner wall of the through hole; the first surface and/or the second surface of the base material is covered with a dry film, and the The dry film is exposed to light; a plurality of openings are formed on the dry film, and the conductive layer at the opening position is exposed, wherein, in the direction away from the substrate, the vertical cross-section of the opening is an inverted trapezoid; a conductive block is formed on the exposed conductive layer; Remove dry film. Through the above-mentioned inverted trapezoid design, the line widths of the top and bottom layers of the circuit board can be very close, which is beneficial to the processing technology of high-precision circuits. The processing capacity of precision circuits can reach 20 μm/20 μm (line width/line spacing).

Description of drawings

In order to illustrate the technical solutions in the embodiments of the present application more clearly, the following briefly introduces the drawings that are used in the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can also be obtained from these drawings without creative effort. in:

1 is a schematic flowchart of an embodiment of a method for processing a circuit board of the present application;

FIG. 2 is a schematic structural diagram of an embodiment corresponding to step S1 in FIG. 1;

3 is a schematic structural diagram of an embodiment corresponding to step S2 in FIG. 1;

4 is a schematic structural diagram of an embodiment corresponding to step S3 in FIG. 1;

5 is a schematic structural diagram of an embodiment corresponding to step S4 in FIG. 1;

6 is a schematic structural diagram of an embodiment corresponding to step S5 in FIG. 1;

Fig. 7 is the enlarged schematic diagram of the opening in step S4 in Fig. 1;

8 is a schematic flowchart of an embodiment of a method for processing a circuit board after step S6 in FIG. 1;

FIG. 9 is a schematic structural diagram of an embodiment corresponding to step S12 in FIG. 8;

10 is a schematic structural diagram of an embodiment of the circuit board of the present application;

FIG. 11 is an enlarged schematic view of the conductive block in FIG. 10 .

Detailed ways

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

Please refer to FIG. 1 . FIG. 1 is a schematic flowchart of an embodiment of the processing method of the circuit board of the present application. The processing method of the circuit board provided by this application includes:

Step S1 : forming a through hole 16 on the base material 10 , wherein the base material 10 includes a first surface 12 and a second surface 14 opposite to each other, and the through hole 16 penetrates the first surface 12 and the second surface 14 .

Specifically, please refer to FIG. 2 , which is a schematic structural diagram of an embodiment corresponding to step S1 in FIG. 1 . The wiring board 1 includes a base material 10 . Specifically, the substrate 10 can be formed by stacking multiple layers of materials. For example, the base layer 10 includes a copper layer, an insulating layer, a copper layer, etc. that are stacked in sequence. The first surface 12 and the second surface 14 can be the outer surface of the copper layer. surface. The number of the through holes 16 on the substrate 10 may be one or more. The through holes 16 penetrate through the first surface 12 and the second surface 14 and may be formed by mechanical drilling. Of course, in other embodiments, the through hole 16 can also be formed by a method such as laser drilling, which is not limited in this application.

Step S2 : forming a conductive layer 11 on the first surface 12 , the second surface 14 and the inner wall 18 of the through hole 16 on the substrate 10 .

Specifically, please refer to FIG. 3 , which is a schematic structural diagram of an embodiment corresponding to step S2 in FIG. 1 . In this embodiment, the specific implementation process of the above step S2 may be: after the entire step S1 is activated, degummed, and neutralized in sequence, the first surface 12 , the second surface 14 and the inner wall of the through hole 16 A layer of copper is deposited on 18 , and the copper layer is the conductive layer 11 , so that the circuit board 1 can be energized. The application does not limit the deposition method.

Step S3: Covering the dry film 13 on the first surface 12 and/or the second surface 14 of the substrate 10 .

Specifically, in an embodiment, please refer to FIG. 4 , which is a schematic structural diagram of an embodiment corresponding to step S3 in FIG. 1 . In the circuit board 1 , the dry film 13 may cover the first surface 12 and the second surface 14 of the substrate 10 . Of course, in other embodiments, the dry film 13 may be covered only on the first surface 12 of the substrate 10 ; or the dry film 13 may be covered only on the first surface 12 of the substrate 10 . The dry film 13 can be a solvent-based dry film. Of course, the dry film 13 can also be a water-soluble dry film, a dry developing or peeling dry film, etc., which is not limited in this application.

In order to make the dry film 13 closely adhere to the conductive layer 11, after the above-mentioned step S3, the dry film 13 may also be subjected to exposure treatment.

Step S4 : forming a plurality of openings 15 on the dry film 13 to expose the conductive layer 11 at the positions of the openings 15 .

Specifically, please refer to FIG. 5 , which is a schematic structural diagram of an embodiment corresponding to step S4 in FIG. 1 . In the circuit board 1 , in the direction away from the base material 10 , the vertical section of the opening 15 is an inverted trapezoid. The specific implementation process of the above step S4 will be described in detail later.

Step S5 : forming conductive blocks 17 on the exposed conductive layer 11 .

In one embodiment, please refer to FIG. 6 , which is a schematic structural diagram of an embodiment corresponding to step S5 in FIG. 1 . The conductive block 17 is formed by electroplating, and the electroplating material can be copper or other materials, such as tin-lead alloy, gold, etc., which is not limited in this application, as long as the circuit board 1 can be formed into a loop and can conduct electricity That's it. The thickness of the material plated on the first surface 12 and the second surface 14 and the thickness of the material plated on the inner wall 18 of the through hole 16 may or may not be the same. The material thickness of the above electroplating can be made according to user requirements.

Step S6: the dry film 13 is removed.

Specifically, please continue to refer to FIG. 6 . In this embodiment, the above-mentioned step S6 specifically includes: removing the dry film 13 by using a chemical reagent. In this embodiment, the above chemical reagent includes sodium hydroxide. Of course, in other embodiments, the above chemical reagents may also be other chemical reagents, as long as the dry film 13 can be removed without damaging the first surface 12 and the second surface 14 .

In the present application, the vertical cross-sections of the openings 15 on the dry film 13 are designed to be inverted trapezoids, so that the line widths of the top and bottom layers of the circuit board 1 are very close, which is beneficial to the processing technology of high-precision circuits, and the processing capability of precision circuits can be Up to 20μm/20μm (line width/line spacing).

In one embodiment, please continue to refer to FIG. 5 , the above-mentioned step S4 specifically includes: forming a plurality of openings 15 on the dry film 13 by using a laser to expose the conductive layer 11 . The above-mentioned laser ablation of the dry film 13 can make the opening 15 present an inverted trapezoid, and the surface of the opening 15 is free of glue residue, foreign matter, and the like.

Further, please continue to refer to FIG. 5 , the above-mentioned step of using a laser to form a plurality of openings 15 on the dry film 13 specifically includes: using a laser to form the dry film 13 at the position corresponding to the through hole 16 and the dry film 13 at the non-through hole 16 position A plurality of openings 15 are formed thereon, so that the conductive layer 11 is exposed, and there is no glue residue, foreign matter, etc. on the surface. In this way, the conductive layer 11 in the subsequent through hole 16 can realize a closed circuit with the conductive layer 11 on the surface.

In addition, please refer to FIG. 7 , which is an enlarged schematic view of the opening in step S4 in FIG. 1 . The ratio between the area of the first opening 152 on the side of the opening 15 close to the substrate 10 and the area of the second opening 154 on the side away from the substrate 10 is in the range of 0.6:1-1:1, for example, 0.6:1, 0.7: 1, 0.8:1, 0.9:1, 1:1, etc. The lengths of the short sides of the first opening 152 and the second opening 154 are the same. Therefore, the lengths of the long sides of the first opening 152 and the second opening 154 are similar, so that the line widths of the top and bottom layers of the circuit board 1 are very similar. Specifically, in this embodiment, in the direction parallel to the first surface 12, the length of the opening 15 is less than or equal to 3 mil, for example, 1 mil, 2 mil, 3 mil, etc.; the length of the dry film 13 between adjacent openings 15 is less than or equal to Equal to 3mil, for example, 1mil, 2mil, 3mil, etc.

In addition, after the above step S6, the circuit board 1 can also be micro-etched to remove the conductive blocks 17 and/or the conductive layers 11 exposed from the protective film 19. Please refer to FIG. 8 for details. FIG. 8 shows the steps in FIG. 1. After S6, a schematic flowchart of an embodiment of the processing method of the circuit board, after the above-mentioned step S6, may further include:

Step S11 : covering the protective film 19 at the position of the through hole 16 .

Specifically, please refer to FIG. 9 , which is a schematic structural diagram of the circuit board after micro-etching of the present application. The protective film 19 is covered at the position of the through hole 16 to protect the plating material on the inner wall 18 of the through hole 16 . Optionally, the above protective film 19 can be a solvent-based dry film. Of course, in other embodiments, the protective film 19 can also be a water-soluble dry film, dry development or peel-off dry film, etc., which is not limited in this application, and only needs to be able to protect the through holes 16 to prevent the circuit board 1 from passing through. The plating material on the inner wall 18 of the hole 16 may be etched.

Step S12 : performing micro-etching on the conductive blocks 17 and/or the conductive layers 11 exposed from the protective film 19 .

In one embodiment, please continue to refer to FIG. 9 , micro-etch the conductive blocks 17 exposed from the protective film 19 to remove the conductive blocks 17 other than the inner walls 18 of the through holes 16 ; The conductive layer 11 is micro-etched to remove the conductive layer 11 other than the inner wall 18 of the through hole 16; or the conductive block 17 and the conductive layer 11 exposed from the protective film 19 are micro-etched to remove the inner wall 18 of the through hole 16. other than the conductive block 17 and the conductive layer 11 . Wherein, the chemical reagent used for the above-mentioned micro-etching can be ferric chloride. Of course, in other embodiments, ammonium persulfate or sodium persulfate, etc. can also be used for micro-etching, which is not limited in this application, as long as the conductive block 17 and/or the conductive layer 11 exposed from the protective film 19 can be etched Micro-etching can be removed.

Step S13 : removing the protective film 19 .

Specifically, please continue to refer to FIG. 9. In this embodiment, chemical reagents can be used to remove the protective film 19, and the above-mentioned chemical reagents include sodium hydroxide. In other embodiments, the chemical reagents also include other chemical reagents. It is not limited, as long as the protective film 19 can be removed without damaging other required parts. Of course, in other embodiments, the protective film 19 may also be removed in other ways, which is not limited in this application, as long as the protective film 19 can be removed without damaging other required parts.

Please refer to FIG. 10 , which is a schematic structural diagram of an embodiment of the circuit board of the present application. The circuit board 2 can be formed by the processing method in the above-mentioned embodiment, and mainly includes a base material 20 , a conductive layer 28 and a plurality of conductive blocks 23 .

Specifically, the base material 20 can be formed by stacking multiple layers of materials. For example, the base layer 20 includes a copper layer, an insulating layer, a copper layer, etc. that are stacked in sequence. The first surface 22 and the second surface 24 can be the outer surfaces of the copper layers. . The number of the through holes 26 on the substrate 20 may be one or more. The through holes 26 penetrate through the first surface 22 and the second surface 24 and may be formed by mechanical drilling. Of course, in other embodiments, the through hole 26 can also be formed by a method such as laser drilling, which is not limited in this application. The conductive layer 28 covers the first surface 22 , the second surface 24 and the inner wall 21 of the through hole 26 . The plurality of conductive blocks 23 are disposed on the conductive layer 28 at intervals, and in the direction away from the substrate 20 , the vertical cross-sections of the conductive blocks 23 on the first surface 22 and/or the second surface 24 are inverted trapezoids.

Please refer to FIG. 10 and FIG. 11 , FIG. 11 is an enlarged schematic view of the conductive block in FIG. 10 . In one embodiment, for the inverted trapezoidal conductive block 23, the ratio between the area of the third surface 25 on the side close to the substrate 20 and the area of the fourth surface 27 on the side away from the substrate 20 is 0.6: 1-1:1, for example, 0.6:1, 0.7:1, 0.8:1, 0.9:1, 1:1, etc. The lengths of the short sides of the third surface 25 and the fourth surface 27 are the same. Therefore, the lengths of the long sides of the third surface 25 and the fourth surface 27 are similar, so that the line widths of the top and bottom layers of the circuit board 2 are very similar.

In another embodiment, please continue to refer to FIG. 10 , in the direction parallel to the first surface 22 , the length of the conductive blocks 23 is less than or equal to 3 mil, for example, 1 mil, 2 mil, 3 mil, etc.; The distance is less than or equal to 3mil, for example, 1mil, 2mil, 3mil, etc.

In the circuit board 2 provided in this embodiment, the vertical section of the conductive block 23 located on the first surface 22 and/or the second surface 24 is designed as an inverted trapezoid, and the conductive block 23 is close to the third surface 25 of the substrate 20 side. The area is close to the area of the fourth surface 27 on the side away from the substrate 20, and the lengths of the short sides of the third surface 25 and the fourth surface 27 are the same. Therefore, the length of the long sides of the third surface 25 and the fourth surface 27 The lengths are close, so the line widths of the top and bottom layers of the circuit board 2 are very close, which is beneficial to the processing technology of high-precision circuits, and the processing capacity of precision circuits can reach 20 μm/20 μm (line width/line spacing).

All in all, different from the situation in the prior art, in the present application, a laser is used to ablate the dry film corresponding to the through-hole position and the dry film at the non-through-hole position to form a plurality of openings, and the vertical cross-section of the above-mentioned openings is an inverted trapezoid, A conductive block is formed on the exposed conductive layer. Therefore, the vertical cross-section of the conductive block on the first surface and/or the second surface is also an inverted trapezoid, and the area of the third surface of the conductive block on the side close to the substrate is the same as that on the side away from the substrate. The area of the fourth surface on the side of the material is close, so the length of the long side of the third surface and the fourth surface is close, so the line width of the top and bottom layers of the circuit board is very close, which is conducive to the processing technology of high-precision circuits, and the precision The processing capability of the circuit can reach 20μm/20μm (line width/line spacing).

The above description is only an embodiment of the present application, and is not intended to limit the scope of the patent of the present application. Any equivalent structure or equivalent process transformation made by using the contents of the description and drawings of the present application, or directly or indirectly applied to other related technologies Fields are similarly included within the scope of patent protection of this application.

Claims (10)

1. a processing method of circuit board, is characterized in that, comprises: forming a through hole on the base material, wherein the base material includes a first surface and a second surface opposite to each other, and the through hole penetrates the first surface and the second surface; forming a conductive layer on the first surface, the second surface and the inner wall of the through hole of the substrate; Covering the first surface and/or the second surface of the substrate with a dry film; A plurality of openings are formed on the dry film, and the conductive layer at the position of the openings is exposed, wherein, in the direction away from the substrate, the vertical cross-section of the openings is an inverted trapezoid; forming conductive blocks on the exposed conductive layer; The dry film is removed. 2 . The processing method according to claim 1 , wherein the ratio between the area of the first opening on the side of the opening close to the substrate and the area of the second opening on the side away from the substrate is 2 . 0.6:1-1:1. 3. The processing method according to claim 1, wherein, in a direction parallel to the first surface, the length of the opening is less than or equal to 3 mil, and the length of the dry film between adjacent openings Less than or equal to 3mil. 4. The processing method according to claim 1, wherein the step of forming a plurality of openings on the dry film comprises: A plurality of openings are formed on the dry film using a laser. 5. The processing method according to claim 4, wherein the step of forming a plurality of openings on the dry film by using a laser comprises: A plurality of openings are formed on the dry film corresponding to the position of the through hole and the dry film at the position of the non-through hole by using a laser. 6. The processing method according to claim 1, wherein the step of removing the dry film comprises: The dry film is removed using a chemical agent, wherein the chemical agent includes sodium hydroxide. 7. The processing method according to claim 1, characterized in that, after the step of removing the dry film, comprising: covering a protective film at the position of the through hole; micro-etching the conductive block and/or the conductive layer exposed from the protective film; Remove the protective film. 8. A circuit board, characterized in that, comprising: a base material, comprising a first surface and a second surface arranged opposite to each other, and a through hole is arranged on the base material, and the through hole penetrates the first surface and the second surface; a conductive layer covering the first surface, the second surface and the inner wall of the through hole; A plurality of conductive blocks are arranged on the conductive layer at intervals, and in the direction away from the substrate, the vertical cross-section of the conductive blocks located on the first surface and/or the second surface is an inverted trapezoid . 9. The circuit board according to claim 8, characterized in that, For the inverted trapezoidal conductive block, the ratio between the area of the third surface on the side close to the substrate and the area of the fourth surface on the side away from the substrate ranges from 0.6:1 to 1:1 . 10 . The circuit board according to claim 8 , wherein, in a direction parallel to the first surface, the length of the conductive blocks is less than or equal to 3 mils, and the distance between adjacent conductive blocks is less than or equal to 3 mils. 11 . .

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