CN114497104B - Display module and display device - Google Patents
Display module and display device Download PDFInfo
- Publication number
- CN114497104B CN114497104B CN202011263234.7A CN202011263234A CN114497104B CN 114497104 B CN114497104 B CN 114497104B CN 202011263234 A CN202011263234 A CN 202011263234A CN 114497104 B CN114497104 B CN 114497104B
- Authority
- CN
- China
- Prior art keywords
- color conversion
- light
- sub
- electrode
- pads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 claims description 98
- 238000006243 chemical reaction Methods 0.000 claims description 64
- 239000010410 layer Substances 0.000 claims description 59
- 239000000463 material Substances 0.000 claims description 39
- 239000000758 substrate Substances 0.000 claims description 38
- 239000012790 adhesive layer Substances 0.000 claims description 21
- 239000002096 quantum dot Substances 0.000 claims description 14
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 4
- 238000000034 method Methods 0.000 description 17
- 230000008569 process Effects 0.000 description 15
- 239000000853 adhesive Substances 0.000 description 11
- 230000001070 adhesive effect Effects 0.000 description 11
- 238000010586 diagram Methods 0.000 description 11
- 239000003086 colorant Substances 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 8
- 229910000679 solder Inorganic materials 0.000 description 8
- 230000009286 beneficial effect Effects 0.000 description 6
- 238000005476 soldering Methods 0.000 description 5
- 239000002245 particle Substances 0.000 description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 3
- 101001121408 Homo sapiens L-amino-acid oxidase Proteins 0.000 description 3
- 102100026388 L-amino-acid oxidase Human genes 0.000 description 3
- FTWRSWRBSVXQPI-UHFFFAOYSA-N alumanylidynearsane;gallanylidynearsane Chemical compound [As]#[Al].[As]#[Ga] FTWRSWRBSVXQPI-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000005259 measurement Methods 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- 238000001029 thermal curing Methods 0.000 description 3
- 229910002601 GaN Inorganic materials 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 229910005540 GaP Inorganic materials 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 101000827703 Homo sapiens Polyphosphoinositide phosphatase Proteins 0.000 description 1
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- 102100023591 Polyphosphoinositide phosphatase Human genes 0.000 description 1
- 101100012902 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) FIG2 gene Proteins 0.000 description 1
- 101100233916 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) KAR5 gene Proteins 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 230000014509 gene expression Effects 0.000 description 1
- 229910000041 hydrogen chloride Inorganic materials 0.000 description 1
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000003446 ligand Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- -1 that is Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 238000009281 ultraviolet germicidal irradiation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
- H10H29/10—Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00
- H10H29/14—Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00 comprising multiple light-emitting semiconductor components
- H10H29/142—Two-dimensional arrangements, e.g. asymmetric LED layout
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/851—Wavelength conversion means
- H10H20/8511—Wavelength conversion means characterised by their material, e.g. binder
- H10H20/8512—Wavelength conversion materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/851—Wavelength conversion means
- H10H20/8511—Wavelength conversion means characterised by their material, e.g. binder
- H10H20/8512—Wavelength conversion materials
- H10H20/8513—Wavelength conversion materials having two or more wavelength conversion materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
Landscapes
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Led Device Packages (AREA)
Abstract
Description
技术领域Technical Field
本发明涉及显示技术领域,尤其涉及一种显示模组及显示装置。The present invention relates to the field of display technology, and in particular to a display module and a display device.
背景技术Background Art
发光二极管(Light Emitting Diode,简称LED)因具有高效率、高亮度、高可靠度、节能及反应速度快等诸多优点,且LED显示装置相比于液晶显示装置(Liquid CrystalDisplay,简称LCD)和有机发光二极管(Organic Light Emitting Diode,简称OLED)显示装置,在画质、刷新频率、功耗和亮度上有较为明显的优势,使得LED被较为广泛的应用至显示领域中。Light emitting diodes (LEDs) have many advantages such as high efficiency, high brightness, high reliability, energy saving and fast response speed. In addition, LED display devices have obvious advantages over liquid crystal display devices (LCDs) and organic light emitting diode (OLEDs) display devices in terms of image quality, refresh rate, power consumption and brightness, making LEDs widely used in the display field.
目前,在LED显示装置中,通常设置有背板,以及与该背板绑定的多个LED。其中,该多个LED一般通过巨量转移技术(Mass Transfer Technology)转移至背板上。但是,受到巨量转移技术自身的限制,LED的转移效率较低。At present, in LED display devices, a backplane and a plurality of LEDs bound to the backplane are usually provided. The plurality of LEDs are generally transferred to the backplane through mass transfer technology. However, due to the limitation of mass transfer technology itself, the transfer efficiency of LED is low.
发明内容Summary of the invention
本发明实施例的目的在于提供一种显示模组及显示装置,用于提高转移效率。An object of the embodiments of the present invention is to provide a display module and a display device for improving transfer efficiency.
为达到上述目的,本发明实施例提供了如下技术方案:To achieve the above objectives, the embodiments of the present invention provide the following technical solutions:
本发明实施例提供了一种显示模组。所述显示模组具有多个子像素区域。所述显示模组包括:背板;以及,设置在所述背板一侧的多个发光二极管芯片。其中,每个发光二极管芯片包括多个外延结构,所述多个外延结构中任意相邻的两个外延结构之间具有间隙。所述发光二极管芯片位于至少两个子像素区域内;一个子像素区域内设置有至少两个外延结构。An embodiment of the present invention provides a display module. The display module has multiple sub-pixel regions. The display module includes: a backplane; and multiple light-emitting diode chips arranged on one side of the backplane. Each light-emitting diode chip includes multiple epitaxial structures, and there is a gap between any two adjacent epitaxial structures in the multiple epitaxial structures. The light-emitting diode chip is located in at least two sub-pixel regions; at least two epitaxial structures are arranged in one sub-pixel region.
本发明的一些实施例所提供的显示模组,通过设置包括多个外延结构的LED芯片,并使得每个LED芯片位于至少两个每个子像素区域,且在每个子像素区域内设置至少两个外延结构,可以在确保一个LED芯片与至少两个每个子像素区域相对应的同时,利用位于每个子像素区域内的至少两个外延结构实现图像显示。The display module provided by some embodiments of the present invention, by arranging an LED chip including a plurality of epitaxial structures, and making each LED chip located in at least two sub-pixel regions, and arranging at least two epitaxial structures in each sub-pixel region, can realize image display by utilizing at least two epitaxial structures located in each sub-pixel region while ensuring that one LED chip corresponds to at least two sub-pixel regions.
在利用巨量转移技术将LED芯片转移至背板上的过程中,转移一个LED芯片就可以对应多个子像素区域,相比于相关技术中每个LED对应一个子像素区域,可以有效提高转移效率。In the process of transferring LED chips to the backplane using mass transfer technology, transferring one LED chip can correspond to multiple sub-pixel areas. Compared with the related technology in which each LED corresponds to one sub-pixel area, the transfer efficiency can be effectively improved.
在一些实施例中,每个外延结构包括依次层叠设置的第一半导体图案、发光图案和第二半导体图案;所述多个外延结构中的至少两个外延结构的第一半导体图案相互连通形成第一半导体层。所述发光二极管芯片还包括至少一个第一电极和多个第二电极;所述第一电极与所述第一半导体层电连接的第一电极,每个第二电极与所述外延结构的所述第二半导体图案电连接。所述背板包括衬底,以及设置在所述衬底靠近所述发光二极管芯片的一侧且与所述发光二极管芯片电连接的多个连接焊盘;所述多个连接焊盘包括多个第一焊盘和多个第二焊盘。其中,所述第一电极与多个第一焊盘电连接,至少两个所述第二电极与一个第二焊盘电连接。In some embodiments, each epitaxial structure includes a first semiconductor pattern, a light-emitting pattern, and a second semiconductor pattern stacked in sequence; the first semiconductor patterns of at least two of the multiple epitaxial structures are interconnected to form a first semiconductor layer. The light-emitting diode chip also includes at least one first electrode and a plurality of second electrodes; the first electrode is a first electrode electrically connected to the first semiconductor layer, and each second electrode is electrically connected to the second semiconductor pattern of the epitaxial structure. The backplane includes a substrate, and a plurality of connecting pads arranged on a side of the substrate close to the light-emitting diode chip and electrically connected to the light-emitting diode chip; the plurality of connecting pads include a plurality of first pads and a plurality of second pads. The first electrode is electrically connected to a plurality of first pads, and at least two of the second electrodes are electrically connected to a second pad.
在一些实施例中,与所述发光二极管芯片的所述多个第二电极电连接的所述多个第二焊盘,呈阵列状排布;或者,所述多个第二焊盘沿第一方向排列成一排,依次间隔设置。与所述发光二极管的所述第一电极电连接的所述多个第一焊盘,设置在所述多个第二焊盘所确定的区域的至少一侧。In some embodiments, the plurality of second pads electrically connected to the plurality of second electrodes of the light-emitting diode chip are arranged in an array; or the plurality of second pads are arranged in a row along the first direction and are arranged in sequence at intervals. The plurality of first pads electrically connected to the first electrode of the light-emitting diode are arranged on at least one side of the area determined by the plurality of second pads.
在一些实施例中,所述多个第一焊盘在所述衬底上的正投影形状包括圆形、椭圆形和多边形中的至少一种。In some embodiments, an orthographic projection shape of the plurality of first pads on the substrate includes at least one of a circle, an ellipse, and a polygon.
在一些实施例中,每个第一焊盘在所述衬底上的正投影的尺寸的范围为1μm~10μm。In some embodiments, a size of an orthographic projection of each first pad on the substrate ranges from 1 μm to 10 μm.
在一些实施例中,所述第二半导体图案位于所述第一半导体图案靠近所述背板的一侧。所述第一电极位于所述第一半导体层靠近所述背板的一侧。所述第二电极位于所述第二半导体图案靠近所述背板的一侧。In some embodiments, the second semiconductor pattern is located on a side of the first semiconductor pattern close to the back plate. The first electrode is located on a side of the first semiconductor layer close to the back plate. The second electrode is located on a side of the second semiconductor pattern close to the back plate.
在一些实施例中,所述显示模组还包括:设置在所述背板和所述多个发光二极管芯片之间的非导电胶层;所述非导电胶层被配置为,对所述背板和所述多个发光二极管芯片进行固定。其中,所述第一电极穿过所述非导电胶层与相应的多个第一焊盘直接接触,所述第二电极穿过所述非导电胶层与相应的第二焊盘直接接触。In some embodiments, the display module further comprises: a non-conductive adhesive layer disposed between the back plate and the plurality of light-emitting diode chips; the non-conductive adhesive layer is configured to fix the back plate and the plurality of light-emitting diode chips. The first electrode passes through the non-conductive adhesive layer to directly contact the corresponding plurality of first pads, and the second electrode passes through the non-conductive adhesive layer to directly contact the corresponding second pads.
在一些实施例中,所述显示模组还包括:设置在所述多个发光二极管芯片远离所述背板一侧的色转换层。所述色转换层包括:设置在所述多个发光二极管芯片远离所述背板一侧的界定层;所述界定层具有多个开口,每个开口位于一个子像素区域内;以及,多个色转换单元;每个色转换单元设置在一个开口内,所述色转换单元包括量子点材料或荧光粉材料中的至少一种。In some embodiments, the display module further comprises: a color conversion layer disposed on a side of the plurality of light-emitting diode chips away from the backplane. The color conversion layer comprises: a defining layer disposed on a side of the plurality of light-emitting diode chips away from the backplane; the defining layer has a plurality of openings, each opening being located in a sub-pixel region; and a plurality of color conversion units; each color conversion unit is disposed in an opening, and the color conversion unit comprises at least one of a quantum dot material or a phosphor material.
在一些实施例中,所述多个色转换单元包括多个红色色转换单元和多个绿色色转换单元;所述多个开口包括多个第一开口和多个第二开口。每个红色色转换单元设置在一个第一开口内,每个绿色色转换单元设置在一个第二开口内。其中,所述多个色转换单元还包括多个蓝色色转换单元,所述多个开口还包括多个第三开口;每个蓝色色转换单元设置在一个第三开口内;或者,所述色转换层还包括多个蓝色滤光部,所述多个开口还包括多个第四开口;每个蓝色滤光部设置在一个第四开口内;所述多个蓝色滤光部包括有机树脂材料。In some embodiments, the plurality of color conversion units include a plurality of red color conversion units and a plurality of green color conversion units; the plurality of openings include a plurality of first openings and a plurality of second openings. Each red color conversion unit is disposed in a first opening, and each green color conversion unit is disposed in a second opening. The plurality of color conversion units also include a plurality of blue color conversion units, the plurality of openings also include a plurality of third openings; each blue color conversion unit is disposed in a third opening; or the color conversion layer also includes a plurality of blue filter portions, the plurality of openings also include a plurality of fourth openings; each blue filter portion is disposed in a fourth opening; the plurality of blue filter portions include an organic resin material.
另一方面,本发明实施例提供了一种显示装置。所述显示装置包括:如上述任一实施例中任一项所述的显示模组。In another aspect, an embodiment of the present invention provides a display device, which includes: a display module as described in any one of the above embodiments.
上述显示装置所包括的显示模组,具有与上述一些实施例中提供的显示模组相同的结构和有益技术效果,在此不再赘述。The display module included in the above-mentioned display device has the same structure and beneficial technical effects as the display modules provided in some of the above-mentioned embodiments, which will not be described in detail here.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
为了更清楚地说明本公开中的技术方案,下面将对本公开一些实施例中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本公开的一些实施例的附图,对于本领域普通技术人员来讲,还可以根据这些附图获得其他的附图。此外,以下描述中的附图可以视作示意图,并非对本公开实施例所涉及的产品的实际尺寸、方法的实际流程等的限制。In order to more clearly illustrate the technical solutions in the present disclosure, the following briefly introduces the drawings required to be used in some embodiments of the present disclosure. Obviously, the drawings described below are only drawings of some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can also be obtained based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams, and are not limitations on the actual size of the products involved in the embodiments of the present disclosure, the actual process of the method, etc.
图1为根据本发明一些实施例中的一种显示模组的结构图;FIG1 is a structural diagram of a display module according to some embodiments of the present invention;
图2为根据本发明一些实施例中的一种背板的结构图;FIG2 is a structural diagram of a backplane according to some embodiments of the present invention;
图3为根据本发明一些实施例中的另一种背板的结构图;FIG3 is a structural diagram of another backplane according to some embodiments of the present invention;
图4为根据本发明一些实施例中的一种发光二极管芯片的结构图;FIG4 is a structural diagram of a light emitting diode chip according to some embodiments of the present invention;
图5为根据本发明一些实施例中的另一种发光二极管芯片的结构图;FIG5 is a structural diagram of another light emitting diode chip according to some embodiments of the present invention;
图6为根据本发明一些实施例中的另一种显示模组的结构图;FIG6 is a structural diagram of another display module according to some embodiments of the present invention;
图7为根据本发明一些实施例中的又一种显示模组的结构图;FIG7 is a structural diagram of another display module according to some embodiments of the present invention;
图8为根据本发明一些实施例中的又一种显示模组的结构图;FIG8 is a structural diagram of another display module according to some embodiments of the present invention;
图9为根据本发明一些实施例中的又一种显示模组的结构图;FIG9 is a structural diagram of another display module according to some embodiments of the present invention;
图10为根据本发明一些实施例中的一种显示装置的结构图。FIG. 10 is a structural diagram of a display device according to some embodiments of the present invention.
具体实施方式DETAILED DESCRIPTION
下面将结合附图,对本公开一些实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本公开一部分实施例,而不是全部的实施例。基于本公开所提供的实施例,本领域普通技术人员所获得的所有其他实施例,都属于本公开保护的范围。The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by ordinary technicians in this field belong to the scope of protection of the present disclosure.
除非上下文另有要求,否则,在整个说明书和权利要求书中,术语“包括”被解释为开放、包含的意思,即为“包含,但不限于”。在说明书的描述中,术语“一个实施例”、“一些实施例”、“示例性实施例”、“示例”或“一些示例”等旨在表明与该实施例或示例相关的特定特征、结构、材料或特性包括在本公开的至少一个实施例或示例中。上述术语的示意性表示不一定是指同一实施例或示例。此外,所述的特定特征、结构、材料或特点可以以任何适当方式包括在任何一个或多个实施例或示例中。Unless the context requires otherwise, throughout the specification and claims, the term "including" is to be interpreted as an open, inclusive meaning, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "examples" or "some examples" and the like are intended to indicate that specific features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the specific features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner.
以下,术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本公开实施例的描述中,除非另有说明,“多个”的含义是两个或两个以上。In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.
在描述一些实施例时,可能使用了“连接”及其衍伸的表达。例如,描述一些实施例时可能使用了术语“连接”以表明两个或两个以上部件彼此间有直接物理接触或电接触。这里所公开的实施例并不必然限制于本文内容。When describing some embodiments, the term "connected" and its derivative expressions may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components are in direct physical or electrical contact with each other. The embodiments disclosed herein are not necessarily limited to the contents of this document.
“A、B和C中的至少一个”与“A、B或C中的至少一个”具有相同含义,均包括以下A、B和C的组合:仅A,仅B,仅C,A和B的组合,A和C的组合,B和C的组合,及A、B和C的组合。“At least one of A, B, and C” has the same meaning as “at least one of A, B, or C” and both include the following combinations of A, B, and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B, and C.
“A和/或B”,包括以下三种组合:仅A,仅B,及A和B的组合。“A and/or B” includes the following three combinations: A only, B only, and a combination of A and B.
另外,“基于”的使用意味着开放和包容性,因为“基于”一个或多个所述条件或值的过程、步骤、计算或其他动作在实践中可以基于额外条件或超出所述的值。Additionally, the use of “based on” is meant to be open and inclusive, as a process, step, calculation, or other action “based on” one or more stated conditions or values may, in practice, be based on additional conditions or values beyond those stated.
如本文所使用的那样,“约”或“近似”包括所阐述的值以及处于特定值的可接受偏差范围内的平均值,其中所述可接受偏差范围如由本领域普通技术人员考虑到正在讨论的测量以及与特定量的测量相关的误差(即,测量系统的局限性)所确定。As used herein, "about" or "approximately" includes the stated value and the average value that is within an acceptable range of deviation from the particular value, where the acceptable range of deviation is determined by one of ordinary skill in the art taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).
本文参照作为理想化示例性附图的剖视图和/或平面图描述了示例性实施方式。在附图中,为了清楚,放大了层和区域的厚度。因此,可设想到由于例如制造技术和/或公差引起的相对于附图的形状的变动。因此,示例性实施方式不应解释为局限于本文示出的区域的形状,而是包括因例如制造而引起的形状偏差。例如,示为矩形的蚀刻区域通常将具有弯曲的特征。因此,附图中所示的区域本质上是示意性的,且它们的形状并非旨在示出设备的区域的实际形状,并且并非旨在限制示例性实施方式的范围。Exemplary embodiments are described herein with reference to cross-sectional views and/or plan views that are idealized exemplary drawings. In the drawings, the thickness of layers and regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and/or tolerances are conceivable. Therefore, the exemplary embodiments should not be interpreted as being limited to the shapes of the regions shown herein, but include shape deviations due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device, and are not intended to limit the scope of the exemplary embodiments.
本发明的一些实施例提供了一种显示模组100。如图1所示,该显示模组100具有多个子像素区域P。Some embodiments of the present invention provide a display module 100. As shown in FIG1 , the display module 100 has a plurality of sub-pixel regions P.
在一些示例中,每个子像素区域P能够显示一种颜色的光。In some examples, each sub-pixel region P is capable of displaying light of one color.
示例性的,多个子像素区域P所能显示的光的颜色可以包括三原色。该三原色例如可以为红色、绿色和蓝色,或者,该三原色例如可以为品红色、黄色和青色。Exemplarily, the colors of light that can be displayed by the plurality of sub-pixel regions P may include three primary colors, which may be, for example, red, green, and blue, or, for example, magenta, yellow, and cyan.
此处,以多个子像素区域P所能显示的光的颜色包括红色、绿色和蓝色为例,上述多个子像素区域P则可以包括多个红色子像素区域、多个绿色子像素区域和多个蓝色子像素区域。Here, taking the example that the colors of light that can be displayed by the multiple sub-pixel regions P include red, green and blue, the multiple sub-pixel regions P may include multiple red sub-pixel regions, multiple green sub-pixel regions and multiple blue sub-pixel regions.
上述多个子像素区域P的排列方式包括多种,可以根据实际需要选择设置。当然,该多个子像素区域P的排列方式并不局限于下面举例的三种。There are many ways to arrange the above-mentioned multiple sub-pixel regions P, which can be selected and set according to actual needs. Of course, the arrangement of the multiple sub-pixel regions P is not limited to the three examples below.
示例性的,沿第一方向X,每一行的多个子像素区域P中,红色子像素区域、绿色子像素区域和蓝色子像素区域周期性排布。沿第二方向Y,每一列的多个子像素区域P中,红色子像素区域、绿色子像素区域和蓝色子像素区域周期性排布。Exemplarily, along the first direction X, in the multiple sub-pixel regions P of each row, the red sub-pixel regions, the green sub-pixel regions, and the blue sub-pixel regions are periodically arranged. Along the second direction Y, in the multiple sub-pixel regions P of each column, the red sub-pixel regions, the green sub-pixel regions, and the blue sub-pixel regions are periodically arranged.
示例性的,如图1所示,沿第一方向X,每一行的多个子像素区域P包括依次排列的多个红色子像素区域,或者依次排列的多个绿色子像素区域,或者依次排列的多个蓝色子像素区域。沿第二方向Y,由多个红色子像素区域排列而成的红色子像素区域行、由多个绿色子像素区域排列而成的绿色子像素区域行以及由多个蓝色子像素区域排列而成的蓝色子像素区域行周期性排布。Exemplarily, as shown in FIG1 , along the first direction X, each row of multiple sub-pixel regions P includes multiple red sub-pixel regions arranged in sequence, or multiple green sub-pixel regions arranged in sequence, or multiple blue sub-pixel regions arranged in sequence. Along the second direction Y, a red sub-pixel region row formed by a plurality of red sub-pixel regions, a green sub-pixel region row formed by a plurality of green sub-pixel regions, and a blue sub-pixel region row formed by a plurality of blue sub-pixel regions are periodically arranged.
示例性的,将一个红色子像素区域和两个绿色子像素区域称为第一像素区域,将一个蓝色子像素区域和两个绿色子像素区域称为第二像素区域。沿第一方向X,第一像素区域和第二像素区域交替排布。沿第二方向,第一像素区域和第二像素区域交替排布,其中,各第一像素区域中的绿色子像素区域和各第二像素区域中的绿色子像素区域排列成一列,各第一像素区域中的红色子像素区域和各第二像素区域中的蓝色子像素区域排列成一列。Exemplarily, one red sub-pixel region and two green sub-pixel regions are referred to as first pixel regions, and one blue sub-pixel region and two green sub-pixel regions are referred to as second pixel regions. The first pixel regions and the second pixel regions are arranged alternately along the first direction X. The first pixel regions and the second pixel regions are arranged alternately along the second direction, wherein the green sub-pixel regions in each first pixel region and the green sub-pixel regions in each second pixel region are arranged in a row, and the red sub-pixel regions in each first pixel region and the blue sub-pixel regions in each second pixel region are arranged in a row.
上述第一方向X和第二方向Y相互交叉。其中,两者之间的夹角可以根据实际需要选择设置。示例性的,第一方向X和第二方向Y之间可以相互垂直。The first direction X and the second direction Y intersect each other. The angle between the two can be set according to actual needs. For example, the first direction X and the second direction Y can be perpendicular to each other.
在一些示例中,如图6~图9所示,上述显示模组100可以包括背板1以及设置在该背板1的一侧的多个发光二极管芯片(也即LED芯片)2。In some examples, as shown in FIGS. 6 to 9 , the display module 100 may include a back panel 1 and a plurality of light emitting diode chips (ie, LED chips) 2 disposed on one side of the back panel 1 .
示例性的,上述背板1被配置为,为上述多个LED芯片2提供驱动电压,控制该多个LED芯片2的发光状态。Exemplarily, the back plate 1 is configured to provide a driving voltage for the plurality of LED chips 2 to control the light emitting state of the plurality of LED chips 2 .
在一些示例中,如图6~图9所示,每个LED芯片2包括多个外延结构21。该多个外延结构21中任意相邻的两个外延结构21之间具有间隙,也即,该多个外延结构21相互间隔设置。In some examples, as shown in Fig. 6 to Fig. 9, each LED chip 2 includes a plurality of epitaxial structures 21. There is a gap between any two adjacent epitaxial structures 21 in the plurality of epitaxial structures 21, that is, the plurality of epitaxial structures 21 are spaced apart from each other.
示例性的,如图6~图9所示,每个外延结构21包括依次层叠设置的第一半导体图案211、发光图案212和第二半导体图案213。Exemplarily, as shown in FIGS. 6 to 9 , each epitaxial structure 21 includes a first semiconductor pattern 211 , a light emitting pattern 212 , and a second semiconductor pattern 213 which are sequentially stacked.
可选的,发光图案212可以为多量子阱层(Multiple Quantum Well,简称MQW)。发光图案212的材料例如可以为氮化镓(GaN)。Optionally, the light emitting pattern 212 may be a multiple quantum well layer (Multiple Quantum Well, MQW for short). The material of the light emitting pattern 212 may be, for example, gallium nitride (GaN).
可选的,第一半导体图案211的材料可以为P型半导体材料,相应的,第二半导体图案213的材料可以为N型半导体材料。或者,第一半导体图案211的材料可以为N型半导体材料,相应的,第二半导体图案213的材料可以为P型半导体材料。Optionally, the material of the first semiconductor pattern 211 may be a P-type semiconductor material, and correspondingly, the material of the second semiconductor pattern 213 may be an N-type semiconductor material. Alternatively, the material of the first semiconductor pattern 211 may be an N-type semiconductor material, and correspondingly, the material of the second semiconductor pattern 213 may be a P-type semiconductor material.
第一半导体图案211和第二半导体图案213的本征半导体材料包括多种,可以根据实际需要选择设置。例如,第一半导体图案211和第二半导体图案213中的本征半导体材料相同,可以为GaN、磷化镓(GaP)、砷化铝镓(AlGaAs)和磷化铝镓铟(AlGaInP)中的任一种。The intrinsic semiconductor material of the first semiconductor pattern 211 and the second semiconductor pattern 213 includes multiple materials, which can be selected and set according to actual needs. For example, the intrinsic semiconductor material in the first semiconductor pattern 211 and the second semiconductor pattern 213 is the same, which can be any one of GaN, gallium phosphide (GaP), aluminum gallium arsenide (AlGaAs) and aluminum gallium indium phosphide (AlGaInP).
需要说明的是,在向第一半导体图案211和第二半导体图案213分别施加不同电压,以在两者之间形成电场(也即在第一半导体图案211和第二半导体图案213之间形成具有势垒的PN结)的情况下,少数载流子与多数载流子可以在发光图案212中复合,并把多余的能量以光的形式释放出来,从而实现电能与光能之间的转换。It should be noted that when different voltages are applied to the first semiconductor pattern 211 and the second semiconductor pattern 213 respectively to form an electric field therebetween (that is, a PN junction with a potential barrier is formed between the first semiconductor pattern 211 and the second semiconductor pattern 213), minority carriers and majority carriers can recombine in the light-emitting pattern 212 and release excess energy in the form of light, thereby realizing the conversion between electrical energy and light energy.
基于此,每个LED芯片2的多个外延结构21能够在背板1提供的驱动电压的作用下发光。通过将该多个外延结构21相互间隔设置,可以避免相邻两个外延结构21发出的光产生串扰。Based on this, the multiple epitaxial structures 21 of each LED chip 2 can emit light under the driving voltage provided by the back plate 1. By arranging the multiple epitaxial structures 21 at intervals from each other, crosstalk between the lights emitted by two adjacent epitaxial structures 21 can be avoided.
在一些示例中,如图6所示,每个LED芯片2位于至少两个子像素区域P内,一个子像素区域P内设置有至少两个外延结构21。In some examples, as shown in FIG. 6 , each LED chip 2 is located in at least two sub-pixel regions P, and at least two epitaxial structures 21 are disposed in one sub-pixel region P.
这也就是说,每个LED芯片2所包括的多个外延结构21可以位于至少两个子像素区域P内(也即每个LED芯片2可以与至少两个子像素区域P相对应),且该至少两个子像素区域P中的每个子像素区域P内可以设置有至少两个外延结构21。This means that the multiple epitaxial structures 21 included in each LED chip 2 can be located in at least two sub-pixel areas P (that is, each LED chip 2 can correspond to at least two sub-pixel areas P), and at least two epitaxial structures 21 can be arranged in each of the at least two sub-pixel areas P.
此处,每个LED芯片2与子像素区域P之间的对应关系,以及每个子像素区域P与外延结构21之间的对应关系,包括多种,可以根据实际需要选择设置。Here, the corresponding relationship between each LED chip 2 and the sub-pixel region P, and the corresponding relationship between each sub-pixel region P and the epitaxial structure 21 include multiple ones, which can be selected and set according to actual needs.
示例性的,每个LED芯片2所包括的多个外延结构21可以位于三个、五个、六个或九个子像素区域P内。每个子像素区域P内可以设置有十个、三十个、五十个或一百个外延结构21。Exemplarily, the plurality of epitaxial structures 21 included in each LED chip 2 may be located in three, five, six or nine sub-pixel regions P. Ten, thirty, fifty or one hundred epitaxial structures 21 may be disposed in each sub-pixel region P.
在利用背板1所提供的驱动电压驱动LED芯片2发光的过程中,可以分别独立地对位于每个子像素区域P内的至少两个外延结构21的发光状态进行控制。例如可以控制上述至少两个子像素区域P中的一个子像素区域P内的至少两个外延结构21发光,并控制上述至少两个子像素区域P中的另一个子像素区域P内的至少两个外延结构21不发光。这样可以通过控制不同子像素区域P内的至少两个外延结构21的发光状态,也即,控制不同子像素区域P的显示状态,使得显示模组100能够进行图像显示。In the process of driving the LED chip 2 to emit light using the driving voltage provided by the backplane 1, the light-emitting state of at least two epitaxial structures 21 located in each sub-pixel region P can be controlled independently. For example, at least two epitaxial structures 21 in one of the at least two sub-pixel regions P can be controlled to emit light, and at least two epitaxial structures 21 in another of the at least two sub-pixel regions P can be controlled not to emit light. In this way, by controlling the light-emitting state of at least two epitaxial structures 21 in different sub-pixel regions P, that is, controlling the display state of different sub-pixel regions P, the display module 100 can display images.
需要说明的是,相关技术中的LED显示装置中,每个子像素区域内需要设置一个LED。在利用巨量转移技术对LED进行转移的过程中,LED的转移效率较低。It should be noted that in the LED display device in the related art, one LED needs to be arranged in each sub-pixel region. In the process of transferring LEDs using the mass transfer technology, the transfer efficiency of the LEDs is low.
本发明的一些实施例所提供的显示模组100,通过设置包括多个外延结构21的LED芯片2,并使得每个LED芯片2位于至少两个每个子像素区域P,且在每个子像素区域P内设置至少两个外延结构21,可以在确保一个LED芯片2与至少两个每个子像素区域P相对应的同时,利用位于每个子像素区域P内的至少两个外延结构21实现图像显示。The display module 100 provided by some embodiments of the present invention, by providing an LED chip 2 including a plurality of epitaxial structures 21, and making each LED chip 2 located in at least two sub-pixel regions P, and providing at least two epitaxial structures 21 in each sub-pixel region P, can realize image display by utilizing at least two epitaxial structures 21 located in each sub-pixel region P while ensuring that one LED chip 2 corresponds to at least two sub-pixel regions P.
在利用巨量转移技术将LED芯片2转移至背板1上的过程中,转移一个LED芯片2就可以对应多个子像素区域P,相比于相关技术中每个LED对应一个子像素区域,可以有效提高转移效率。In the process of transferring the LED chip 2 to the back panel 1 using the mass transfer technology, transferring one LED chip 2 can correspond to multiple sub-pixel areas P. Compared with the related technology in which each LED corresponds to one sub-pixel area, the transfer efficiency can be effectively improved.
在一些实施例中,如图6~图9所示,每个LED芯片2中的多个外延结构21中,至少两个外延结构21的第一半导体图案211相互连通形成第一半导体层211a。In some embodiments, as shown in FIGS. 6 to 9 , among the multiple epitaxial structures 21 in each LED chip 2 , the first semiconductor patterns 211 of at least two epitaxial structures 21 are interconnected to form a first semiconductor layer 211 a .
示例性的,该多个外延结构21中,相邻的两个、三个或四个外延结构21的第一半导体图案211相互连通形成第一半导体层211a。此时,LED芯片2可以包括多个第一半导体层211a。Exemplarily, among the plurality of epitaxial structures 21, the first semiconductor patterns 211 of two, three or four adjacent epitaxial structures 21 are interconnected to form a first semiconductor layer 211a. In this case, the LED chip 2 may include a plurality of first semiconductor layers 211a.
示例性的,如图4~图5所示,该多个外延结构21中属于不同外延结构21的多个第一半导体图案211相互连通形成第一半导体层211a。此时,LED芯片2可以具有一个第一半导体层211a。4 and 5 , the plurality of first semiconductor patterns 211 belonging to different epitaxial structures 21 in the plurality of epitaxial structures 21 are interconnected to form a first semiconductor layer 211a. In this case, the LED chip 2 may have one first semiconductor layer 211a.
在一些示例中,第一半导体层211a中用于连通至少两个第一半导体图案211的部分,可以与第一半导体图案211采用相同的材料。如图6~图9所示,该部分不仅可以位于该至少两个第一半导体图案211之间的间隙内,还可以位于该至少两个第一半导体图案211整体所确定的区域的旁侧。In some examples, the portion of the first semiconductor layer 211a used to connect at least two first semiconductor patterns 211 can be made of the same material as the first semiconductor pattern 211. As shown in FIGS. 6 to 9, the portion can be located not only in the gap between the at least two first semiconductor patterns 211, but also beside the area determined by the at least two first semiconductor patterns 211 as a whole.
示例性的,上述至少两个外延结构21的第一半导体图案211以及用于连通该至少两个第一半导体图案211的部分,可以采用同一薄膜在同一次构图工艺中形成。这样有利于简化LED芯片2的制备工艺。Exemplarily, the first semiconductor patterns 211 of the at least two epitaxial structures 21 and the portion for connecting the at least two first semiconductor patterns 211 can be formed by using the same film in the same patterning process, which is conducive to simplifying the preparation process of the LED chip 2 .
值得一提的是,每个LED芯片2中的多个外延结构21中,至少两个外延结构21的发光图案212可以相互连通形成发光层。例如,属于不同外延结构21的多个发光图案212可以相互连通形成发光层。此时,LED芯片2可以具有一个发光层。It is worth mentioning that among the multiple epitaxial structures 21 in each LED chip 2, the light-emitting patterns 212 of at least two epitaxial structures 21 can be interconnected to form a light-emitting layer. For example, multiple light-emitting patterns 212 belonging to different epitaxial structures 21 can be interconnected to form a light-emitting layer. In this case, the LED chip 2 can have one light-emitting layer.
这样在制备形成LED芯片2的过程中,可以避免对发光层进行刻蚀,进而可以避免影响发光层的材料晶体质量,确保LED芯片2可以具有良好的发光性能。In this way, during the process of preparing the LED chip 2, etching of the light-emitting layer can be avoided, thereby avoiding affecting the material crystal quality of the light-emitting layer, thereby ensuring that the LED chip 2 can have good light-emitting performance.
下面,本发明的一些实施例以第一半导体图案211的材料可以为N型半导体材料、第二半导体图案213的材料可以为P型半导体材料为例,对显示模组100的结构进行示意性说明。In the following, some embodiments of the present invention take the example that the material of the first semiconductor pattern 211 may be an N-type semiconductor material and the material of the second semiconductor pattern 213 may be a P-type semiconductor material to schematically illustrate the structure of the display module 100 .
在一些实施例中,如图4~图9所示,每个LED芯片2还可以包括:至少一个第一电极22和多个第二电极23。如图6~图9所示,每个第一电极22可以与一个第一半导体层211a电连接,每个第二电极23可以与一个外延结构21中的第二半导体图案213电连接。其中,每个第一电极22以及与其电连接的第一半导体层211a之间例如可以直接接触,每个第二电极23以及与其电连接的第二半导体图案213之间例如可以直接接触。In some embodiments, as shown in FIGS. 4 to 9 , each LED chip 2 may further include: at least one first electrode 22 and a plurality of second electrodes 23. As shown in FIGS. 6 to 9 , each first electrode 22 may be electrically connected to a first semiconductor layer 211a, and each second electrode 23 may be electrically connected to a second semiconductor pattern 213 in an epitaxial structure 21. Each first electrode 22 and the first semiconductor layer 211a electrically connected thereto may be in direct contact with each other, and each second electrode 23 and the second semiconductor pattern 213 electrically connected thereto may be in direct contact with each other.
在此情况下,第一电极22可以称为N电极,第二电极23可以称为P电极。背板1可以通过第一电极22向第一半导体层211a中注入电子,可以通过第二电极23向第二半导体图案213中注入空穴,使得该电子和空穴能够在发光图案212中进行复合发光。In this case, the first electrode 22 can be called an N electrode, and the second electrode 23 can be called a P electrode. The backplane 1 can inject electrons into the first semiconductor layer 211a through the first electrode 22, and can inject holes into the second semiconductor pattern 213 through the second electrode 23, so that the electrons and holes can be recombined and emit light in the light-emitting pattern 212.
在一些示例中,如图4~图9所示,每个第一电极22与一个第一半导体层211a电连接指的是,该第一电极22与该第一半导体层211a中用于连通至少两个外延结构21的第一半导体图案211的部分电连接。第一电极22与外延结构21之间未形成直接接触。In some examples, as shown in FIGS. 4 to 9 , each first electrode 22 being electrically connected to a first semiconductor layer 211 a means that the first electrode 22 is electrically connected to a portion of the first semiconductor pattern 211 in the first semiconductor layer 211 a for connecting at least two epitaxial structures 21. No direct contact is formed between the first electrode 22 and the epitaxial structure 21.
在一些示例中,第一电极22的数量可以根据第一半导体层211a的数量而定。也即,第一电极22的数量可以和第一半导体层211a的数量相同。In some examples, the number of the first electrodes 22 may be determined according to the number of the first semiconductor layers 211 a. That is, the number of the first electrodes 22 may be the same as the number of the first semiconductor layers 211 a.
基于此,与第一半导体层211a相对应的至少两个外延结构21可以共用一个第一电极22。这样在通过第一电极22向第一半导体层211a注入电子的情况下,可以使得注入该至少两个外延结构21中的电子的量相同或大约相同,进而有利于降低该至少两个外延结构21中电流的差异,提高该至少两个外延结构21的电流均匀性。Based on this, at least two epitaxial structures 21 corresponding to the first semiconductor layer 211a can share a first electrode 22. In this way, when electrons are injected into the first semiconductor layer 211a through the first electrode 22, the amounts of electrons injected into the at least two epitaxial structures 21 can be the same or approximately the same, which is beneficial to reduce the difference in current in the at least two epitaxial structures 21 and improve the current uniformity of the at least two epitaxial structures 21.
例如,每个LED芯片2具有一个第一半导体层211a,与该第一半导体层211a电连接的第一电极22的数量则可以为一个。这样可以使得注入至所有外延结构21中的电子的量相同或大约相同,有利于进一步提升不同外延结构21的电流均匀性。For example, each LED chip 2 has a first semiconductor layer 211a, and the number of first electrodes 22 electrically connected to the first semiconductor layer 211a can be one. This can make the amount of electrons injected into all epitaxial structures 21 the same or approximately the same, which is conducive to further improving the current uniformity of different epitaxial structures 21.
在一些示例中,如图4~图9所示,每个第二电极23在第一半导体层211a上的正投影,以及与该第二电极23电连接的第二半导体图案213在第一半导体层211a上的正投影重合。In some examples, as shown in FIGS. 4 to 9 , the orthographic projection of each second electrode 23 on the first semiconductor layer 211 a and the orthographic projection of the second semiconductor pattern 213 electrically connected to the second electrode 23 on the first semiconductor layer 211 a coincide with each other.
此处,考虑到外延结构21的制备工艺,也即每个LED芯片2的多个外延结构21是以多个第二电极23为掩膜图案化后形成的,每个第二电极23在第一半导体层211a上的正投影的图案,以及与该第二电极23电连接的第二半导体图案213在第一半导体层211a上的正投影的图案可以是相同且重叠的。这样可以确保每个第二电极23以及与该第二电极23电连接的第二半导体图案213之间具有较大的接触面积,确保两者之间能够良好的电连接。Here, considering the preparation process of the epitaxial structure 21, that is, the multiple epitaxial structures 21 of each LED chip 2 are formed after patterning using the multiple second electrodes 23 as masks, the orthographic projection pattern of each second electrode 23 on the first semiconductor layer 211a and the orthographic projection pattern of the second semiconductor pattern 213 electrically connected to the second electrode 23 on the first semiconductor layer 211a can be the same and overlap. In this way, it can be ensured that each second electrode 23 and the second semiconductor pattern 213 electrically connected to the second electrode 23 have a large contact area, ensuring good electrical connection between the two.
在一些实施例中,如图2、图3及图6~图9所示,上述背板1包括衬底11,以及设置在该衬底11靠近LED芯片2一侧、且与每个LED芯片2电连接的多个连接焊盘12。In some embodiments, as shown in FIG. 2 , FIG. 3 and FIG. 6 to FIG. 9 , the back plate 1 includes a substrate 11 and a plurality of connection pads 12 disposed on a side of the substrate 11 close to the LED chip 2 and electrically connected to each LED chip 2 .
在一些示例中,背板1还包括设置在衬底11和上述多个连接焊盘12之间、且与各连接焊盘12电连接的电路结构。该电路结构能够生成驱动电压,并通过该多个连接焊盘12将驱动电压传输至与该多个连接焊盘12电连接的LED芯片2,控制LED芯片2的发光状态。In some examples, the back plate 1 further includes a circuit structure disposed between the substrate 11 and the plurality of connection pads 12 and electrically connected to each connection pad 12. The circuit structure is capable of generating a driving voltage, and transmitting the driving voltage to the LED chip 2 electrically connected to the plurality of connection pads 12 through the plurality of connection pads 12, thereby controlling the light emitting state of the LED chip 2.
本发明不对电路结构的组成进行限定,能够生成用于控制LED芯片2的发光状态的驱动电压即可。The present invention is not limited to the composition of the circuit structure, and it only needs to be able to generate a driving voltage for controlling the light-emitting state of the LED chip 2 .
在一些示例中,如图2、图3及图6~图9所示,上述多个焊盘12包括多个第一焊盘121和多个第二焊盘122。其中,每个LED芯片2的第一电极22可以与多个第一焊盘121电连接,至少两个第二电极23可以与一个第二焊盘122电连接。In some examples, as shown in FIG. 2 , FIG. 3 , and FIG. 6 to FIG. 9 , the plurality of pads 12 include a plurality of first pads 121 and a plurality of second pads 122 . The first electrode 22 of each LED chip 2 may be electrically connected to the plurality of first pads 121 , and at least two second electrodes 23 may be electrically connected to one second pad 122 .
例如,每个第一电极22可以与十个第一焊盘121相对应,且形成电连接;每三个第二电极23(也即三个外延结构21)与一个第二焊盘122可以相对应,且形成电连接。For example, each first electrode 22 may correspond to ten first pads 121 and form an electrical connection therewith; and every three second electrodes 23 (ie, three epitaxial structures 21 ) may correspond to one second pad 122 and form an electrical connection therewith.
此时,在背板1向各LED芯片2提供驱动电压的过程中,电子可以通过多个第一焊盘121传输至与该多个第一焊盘121电连接的第一电极22内,空穴可以通过各第二焊盘122传输至与该第二焊盘122电连接的至少两个第二电极23内。通过控制空穴的传输的状态,控制与各第二焊盘122电连接的外延结构21的发光状态,进而实现对与各第二焊盘122电连接的外延结构21的独立控制。At this time, when the back plate 1 provides the driving voltage to each LED chip 2, electrons can be transmitted through the multiple first pads 121 to the first electrodes 22 electrically connected to the multiple first pads 121, and holes can be transmitted through the second pads 122 to at least two second electrodes 23 electrically connected to the second pads 122. By controlling the state of hole transmission, the light-emitting state of the epitaxial structure 21 electrically connected to each second pad 122 is controlled, thereby achieving independent control of the epitaxial structure 21 electrically connected to each second pad 122.
此处,每个第二焊盘122例如可以位于一个子像素区域P内。这样可以实现对各子像素区域P的显示状态的独立控制。Here, each second pad 122 may be located in, for example, a sub-pixel region P. In this way, independent control of the display state of each sub-pixel region P may be achieved.
示例性的,每个第一电极22以及与该第一电极22电连接的多个第一焊盘121中,第一焊盘121在衬底11上的正投影面积小于该第一电极22在衬底11上的正投影面积,第一焊盘121在衬底11上的正投影位于该第一电极22在衬底11上的正投影范围内,或者,第一焊盘121在衬底11上的正投影与该第一电极22在衬底11上的正投影之间有部分交叠。Exemplarily, in each first electrode 22 and a plurality of first pads 121 electrically connected to the first electrode 22, an orthographic projection area of the first pad 121 on the substrate 11 is smaller than an orthographic projection area of the first electrode 22 on the substrate 11, and the orthographic projection of the first pad 121 on the substrate 11 is located within the orthographic projection range of the first electrode 22 on the substrate 11, or, there is a partial overlap between the orthographic projection of the first pad 121 on the substrate 11 and the orthographic projection of the first electrode 22 on the substrate 11.
示例性的,每个第二焊盘122以及与该第二焊盘122电连接的至少两个第二电极23中,第二电极23在衬底11上的正投影面积小于该第二焊盘122在衬底11上的正投影面积,第二电极23在衬底11上的正投影位于该第二焊盘122在衬底11上的正投影范围内,或者,第二电极23在衬底11上的正投影与该第二焊盘122在衬底11上的正投影之间有部分交叠。Exemplarily, in each second pad 122 and at least two second electrodes 23 electrically connected to the second pad 122, the orthographic projection area of the second electrode 23 on the substrate 11 is smaller than the orthographic projection area of the second pad 122 on the substrate 11, the orthographic projection of the second electrode 23 on the substrate 11 is located within the orthographic projection range of the second pad 122 on the substrate 11, or, there is a partial overlap between the orthographic projection of the second electrode 23 on the substrate 11 and the orthographic projection of the second pad 122 on the substrate 11.
需要说明的是,在相关技术中,每个LED具有一个N电极和一个P电极,LED显示装置中的背板具有与每个LED的N电极绑定的N焊盘以及与每个LED的P电极绑定的P焊盘。在对LED与背板进行绑定的过程中,由于一个LED与一个子像素区域相对应,且每个N电极与一个N焊盘相对应,每个P电极与一个P焊盘相对应,会导致LED与背板之间的绑定键合的精度的要求较高,进而容易降低LED与背板之间的绑定键合的良率。It should be noted that in the related art, each LED has an N electrode and a P electrode, and the backplane in the LED display device has an N pad bound to the N electrode of each LED and a P pad bound to the P electrode of each LED. In the process of binding the LED to the backplane, since one LED corresponds to one sub-pixel area, and each N electrode corresponds to one N pad, and each P electrode corresponds to one P pad, the binding bonding accuracy between the LED and the backplane is required to be high, which can easily reduce the yield of the binding bonding between the LED and the backplane.
而本发明中的每个LED芯片2包括多个外延结构21,每个LED芯片2可以与多个子像素区域P相对应,且每个第一电极22可以与多个第一焊盘121电连接,至少两个第二电极23可以与一个第二焊盘122电连接,这样在将LED芯片2绑定键合至背板1上的过程中,即使LED芯片2与背板1之间出现较大的对位误差,也可以使得每个第一电极22与一部分第一焊盘121形成电连接,使得至少一个第二电极23与一个第二焊盘122形成电连接。也就是说,本发明可以有效降低LED芯片2与背板1之间的绑定键合的精度,有效提高LED芯片2与背板1之间的绑定键合的良率。Each LED chip 2 in the present invention includes a plurality of epitaxial structures 21, each LED chip 2 may correspond to a plurality of sub-pixel regions P, and each first electrode 22 may be electrically connected to a plurality of first pads 121, and at least two second electrodes 23 may be electrically connected to one second pad 122, so that in the process of bonding the LED chip 2 to the back plate 1, even if a large alignment error occurs between the LED chip 2 and the back plate 1, each first electrode 22 may be electrically connected to a portion of the first pads 121, and at least one second electrode 23 may be electrically connected to one second pad 122. In other words, the present invention may effectively reduce the bonding accuracy between the LED chip 2 and the back plate 1, and effectively improve the bonding yield between the LED chip 2 and the back plate 1.
值得一提的是,背板1中与每个LED芯片2电连接的多个第一焊盘121和多个第二焊盘122的排布方式包括多种,可以根据实际需要选择设置。It is worth mentioning that there are various arrangements of the plurality of first solder pads 121 and the plurality of second solder pads 122 in the back plate 1 that are electrically connected to each LED chip 2, and these arrangements can be selected according to actual needs.
在一些示例中,第一焊盘121和第二焊盘122的排布方式,可以与LED芯片2中的第一电极22和第二电极23的排布方式相关。In some examples, the arrangement of the first solder pads 121 and the second solder pads 122 may be related to the arrangement of the first electrodes 22 and the second electrodes 23 in the LED chip 2 .
示例性的,LED芯片2中的多个外延结构21可以呈阵列状排布。此时,如图4和图5所示,与各外延结构21的第二半导体图案213电连接的多个第二电极23则可以呈阵列状排布。Exemplarily, the multiple epitaxial structures 21 in the LED chip 2 may be arranged in an array. At this time, as shown in FIG. 4 and FIG. 5 , the multiple second electrodes 23 electrically connected to the second semiconductor patterns 213 of each epitaxial structure 21 may be arranged in an array.
基于此,例如,如图3所示,与上述多个第二电极23电连接的多个第二焊盘122可以呈阵列状排布。也即,沿第一方向X,该多个第二焊盘122排列成多行;沿第二方向,该多个第二焊盘122排列成多列。Based on this, for example, as shown in Fig. 3, the plurality of second pads 122 electrically connected to the plurality of second electrodes 23 may be arranged in an array, that is, along the first direction X, the plurality of second pads 122 are arranged in a plurality of rows; along the second direction, the plurality of second pads 122 are arranged in a plurality of columns.
此时,可以将每个LED芯片2的多个外延结构21划分为多份外延结构21,每一份外延结构21与一个第二焊盘122相对应。该多份外延结构21可以沿第一方向X排列成多行,沿第二方向排列成多列。在一个焊盘122位于一个子像素区域P内的情况下,每一份外延结构21则位于一个子像素区域P内,该LED芯片2则与呈阵列状排布的多个子像素区域P相对应。该多个子像素区域P例如可以包括多组子像素区域(一组子像素区域包括一个红色子像素区域、绿色子像素区域和蓝色子像素区域)。At this time, the multiple epitaxial structures 21 of each LED chip 2 can be divided into multiple epitaxial structures 21, and each epitaxial structure 21 corresponds to a second pad 122. The multiple epitaxial structures 21 can be arranged in multiple rows along the first direction X and in multiple columns along the second direction. When a pad 122 is located in a sub-pixel area P, each epitaxial structure 21 is located in a sub-pixel area P, and the LED chip 2 corresponds to multiple sub-pixel areas P arranged in an array. The multiple sub-pixel areas P may include, for example, multiple groups of sub-pixel areas (a group of sub-pixel areas includes a red sub-pixel area, a green sub-pixel area, and a blue sub-pixel area).
又如,如图2所示,与上述多个第二电极23电连接的多个第二焊盘122可以沿第一方向X排列成一排,且依次间隔设置。例如该多个第二焊盘122可以等间隔设置。2 , the plurality of second pads 122 electrically connected to the plurality of second electrodes 23 may be arranged in a row along the first direction X and arranged in sequence at intervals. For example, the plurality of second pads 122 may be arranged at equal intervals.
此时,可以将每个LED芯片2的多个外延结构21划分为多份外延结构21,每一份外延结构21与一个第二焊盘122相对应。该多份外延结构21可以沿第一方向X排列成一排,且依次间隔设置。在一个焊盘122位于一个子像素区域P内的情况下,每一份外延结构21则位于一个子像素区域P内,该LED芯片2则与沿第一方向X排列成一排的多个子像素区域P相对应。该多个子像素区域P例如可以包括至少一组子像素区域。At this time, the multiple epitaxial structures 21 of each LED chip 2 can be divided into multiple epitaxial structures 21, and each epitaxial structure 21 corresponds to a second solder pad 122. The multiple epitaxial structures 21 can be arranged in a row along the first direction X and arranged in sequence. When a solder pad 122 is located in a sub-pixel area P, each epitaxial structure 21 is located in a sub-pixel area P, and the LED chip 2 corresponds to multiple sub-pixel areas P arranged in a row along the first direction X. The multiple sub-pixel areas P may include, for example, at least one group of sub-pixel areas.
示例性的,如图4和图5所示,LED芯片2中的第一电极22可以位于多个外延结构21所确定的区域的至少一侧(例如一侧、两侧或周侧等)。For example, as shown in FIG. 4 and FIG. 5 , the first electrode 22 in the LED chip 2 may be located on at least one side (eg, one side, two sides, or a peripheral side, etc.) of a region defined by the plurality of epitaxial structures 21 .
基于此,与第一电极22电连接的多个第一焊盘121可以设置在,与LED芯片2的多个第二电极23电连接的多个第二焊盘122所确定的区域的至少一侧。Based on this, the plurality of first pads 121 electrically connected to the first electrodes 22 may be disposed on at least one side of a region defined by the plurality of second pads 122 electrically connected to the plurality of second electrodes 23 of the LED chip 2 .
例如,如图2所示,第一电极22位于多个外延结构21所确定的区域的一侧。此时,上述多个第一焊盘121可以位于多个第二焊盘122所确定的区域的一侧。进一步地,该多个第一焊盘121可以呈阵列状排布。For example, as shown in Fig. 2, the first electrode 22 is located on one side of the region defined by the plurality of epitaxial structures 21. At this time, the plurality of first pads 121 may be located on one side of the region defined by the plurality of second pads 122. Further, the plurality of first pads 121 may be arranged in an array.
又如,如图3所示,第一电极22位于多个外延结构21所确定的区域的周侧,也即,第一电极22为多个外延结构21形成围绕。此时,上述多个第一焊盘121可以位于多个第二焊盘122所确定的区域的周侧。3 , the first electrode 22 is located around the region defined by the plurality of epitaxial structures 21 , that is, the first electrode 22 is surrounded by the plurality of epitaxial structures 21 . At this time, the plurality of first pads 121 may be located around the region defined by the plurality of second pads 122 .
这样有利于确保第一电极22与第一焊盘121之间的有效电连接。This helps to ensure effective electrical connection between the first electrode 22 and the first pad 121 .
在一些实施例中,各第一焊盘121在衬底11上的正投影形状包括多种,可以根据实际需要选择设置。In some embodiments, the orthographic projection shapes of each first pad 121 on the substrate 11 include various shapes, which can be selected and set according to actual needs.
在一些示例中,各第一焊盘121在衬底11上的正投影形状可以包括圆形(如图2和图3所示)、椭圆形和多边形(例如矩形)中的至少一种。In some examples, the orthographic projection shape of each first pad 121 on the substrate 11 may include at least one of a circle (as shown in FIGS. 2 and 3 ), an ellipse, and a polygon (eg, a rectangle).
在一些示例中,每个第一焊盘121在衬底11上的正投影的尺寸的范围可以为1μm~10μm。此处,正投影的尺寸例如指的是,经过该正投影的形状的中心的直线,与该正投影的边界的两交点之间的间距的最大值、最小值或平均值。In some examples, the size of the orthographic projection of each first pad 121 on the substrate 11 may range from 1 μm to 10 μm. Here, the size of the orthographic projection refers to, for example, the maximum value, minimum value or average value of the distance between two intersection points of a straight line passing through the center of the orthographic projection and the boundary of the orthographic projection.
示例性的,以最大值为例,在第一焊盘121在衬底11上的正投影形状为圆形的情况下,该尺寸指的是该圆形的直径。在第一焊盘121在衬底11上的正投影形状为矩形的情况下,该尺寸指的是该矩形的对角线长度。Exemplarily, taking the maximum value as an example, when the orthographic projection shape of the first pad 121 on the substrate 11 is a circle, the size refers to the diameter of the circle. When the orthographic projection shape of the first pad 121 on the substrate 11 is a rectangle, the size refers to the diagonal length of the rectangle.
可选的,每个第一焊盘121在衬底11上的正投影的尺寸的范围可以为2μm~5μm。Optionally, the size of the orthographic projection of each first pad 121 on the substrate 11 may be in the range of 2 μm to 5 μm.
这样有利于匹配第一焊盘121与第一电极22之间的绑定键合。This is beneficial to matching the binding bonding between the first pad 121 and the first electrode 22 .
在一些示例中,各第二电极23在衬底11上的正投影的尺寸的范围可以为0.1μm~20μm。各第二电极23在衬底11上的正投影之间的间隙(也即任意相邻两个外延结构21之间的间隙)的尺寸的范围可以为0.1μm~20μm。In some examples, the size of the orthographic projection of each second electrode 23 on the substrate 11 may range from 0.1 μm to 20 μm. The size of the gap between the orthographic projections of each second electrode 23 on the substrate 11 (that is, the gap between any two adjacent epitaxial structures 21) may range from 0.1 μm to 20 μm.
这样有利于匹配第二电极23与第二焊盘122之间的绑定键合。This is beneficial to matching the binding bonding between the second electrode 23 and the second pad 122 .
在一些实施例中,如图7~图9所示,显示模组100还可以包括:设置在背板1和上述多个LED芯片2之间的非导电胶层3。该非导电胶层3被配置为,对背板1和该多个LED芯片2进行固定。其中,第一电极22穿过该非导电胶层3与相应的多个第一焊盘121直接接触,第二电极23穿过非导电胶层3与相应的第二焊盘122直接接触。In some embodiments, as shown in FIGS. 7 to 9 , the display module 100 may further include: a non-conductive adhesive layer 3 disposed between the back plate 1 and the plurality of LED chips 2. The non-conductive adhesive layer 3 is configured to fix the back plate 1 and the plurality of LED chips 2. The first electrode 22 passes through the non-conductive adhesive layer 3 and directly contacts the corresponding plurality of first pads 121, and the second electrode 23 passes through the non-conductive adhesive layer 3 and directly contacts the corresponding second pads 122.
在一些示例中,上述非导电胶层3的材料例如可以包括UV胶或热固化胶等。In some examples, the material of the non-conductive adhesive layer 3 may include, for example, UV adhesive or thermal curing adhesive.
在一些示例中,在背板1和上述多个LED芯片2之间设置非导电胶层3的过程中,例如可以在背板1或LED芯片2上涂覆(例如整面涂覆或点涂)非导电胶,然后将该多个LED芯片2转移至背板1上,并对非导电胶进行固化处理,使得背板1和该多个LED芯片2固定在一起。In some examples, in the process of setting the non-conductive adhesive layer 3 between the back panel 1 and the above-mentioned multiple LED chips 2, for example, the non-conductive adhesive can be coated on the back panel 1 or the LED chip 2 (for example, coated on the entire surface or dotted), and then the multiple LED chips 2 are transferred to the back panel 1, and the non-conductive adhesive is cured, so that the back panel 1 and the multiple LED chips 2 are fixed together.
其中,在非导电胶层3的材料包括UV胶的情况下,可以采用UV照射的方式对UV胶进行固化处理。在非导电胶层3的材料包括热固化胶的情况下,可以在一定的压力和温度(压力例如为0.5MPa~40MPa,温度例如为100℃~300℃)下,对热固化胶进行固化处理。Wherein, when the material of the non-conductive adhesive layer 3 includes UV adhesive, the UV adhesive can be cured by UV irradiation. When the material of the non-conductive adhesive layer 3 includes thermal curing adhesive, the thermal curing adhesive can be cured under a certain pressure and temperature (pressure is, for example, 0.5 MPa to 40 MPa, and temperature is, for example, 100° C. to 300° C.).
需要说明的是,由于非导电胶层3具有较高的绝缘性能,在利用非导电胶层3对背板1和多个LED芯片2进行固定的情况下,由于第一焊盘121的尺寸和第二电极23的尺寸较小,在制备形成第一焊盘121和第二电极23的过程中,可以使得第一焊盘121的远离衬底11的端部和第二电极23远离第二半导体图案213的端部的面积较小,进而在进行绑定键合的过程中,避免在第一电极22与相应的第一焊盘121之间残留较多的非导电胶导致两者之间形成断路,避免在第二电极23与相应的第二焊盘122之间残留较多的非导电胶导致两者之间形成断路。It should be noted that since the non-conductive adhesive layer 3 has high insulation performance, when the back panel 1 and the multiple LED chips 2 are fixed by using the non-conductive adhesive layer 3, since the size of the first soldering pad 121 and the size of the second electrode 23 are relatively small, in the process of preparing the first soldering pad 121 and the second electrode 23, the area of the end of the first soldering pad 121 away from the substrate 11 and the end of the second electrode 23 away from the second semiconductor pattern 213 can be made smaller, and then in the process of binding bonding, it is avoided that a large amount of non-conductive adhesive remains between the first electrode 22 and the corresponding first soldering pad 121, resulting in a short circuit between the two, and it is avoided that a large amount of non-conductive adhesive remains between the second electrode 23 and the corresponding second soldering pad 122, resulting in a short circuit between the two.
值得一提的是,上述第一焊盘121和非导电胶层3的组合或者第二电极23和非导电胶层3的组合,可以构成类似于各向异性导电胶(Anisotropic Conductive Film,简称ACF)的结构,其中,第一焊盘121或第二电极23可以相当于ACF中的导电粒子。由此,本公开采用非导电胶层3对背板1和LED芯片2进行绑定键合,工艺简单易实现,且有利于降低显示模组100的制备成本。It is worth mentioning that the combination of the first pad 121 and the non-conductive adhesive layer 3 or the combination of the second electrode 23 and the non-conductive adhesive layer 3 can form a structure similar to anisotropic conductive film (ACF), wherein the first pad 121 or the second electrode 23 can be equivalent to the conductive particles in the ACF. Therefore, the present disclosure uses the non-conductive adhesive layer 3 to bind and bond the back plate 1 and the LED chip 2, the process is simple and easy to implement, and it is conducive to reducing the preparation cost of the display module 100.
在一些实施例中,如图6~图9所示,在上述各LED芯片2中,第二半导体图案213可以位于第一半导体图案211靠近背板1的一侧,第一电极22可以位于第一半导体层211a靠近背板1的一侧,第二电极23可以位于第二半导体图案213靠近背板1的一侧。In some embodiments, as shown in Figures 6 to 9, in each of the above-mentioned LED chips 2, the second semiconductor pattern 213 can be located on the side of the first semiconductor pattern 211 close to the back panel 1, the first electrode 22 can be located on the side of the first semiconductor layer 211a close to the back panel 1, and the second electrode 23 can be located on the side of the second semiconductor pattern 213 close to the back panel 1.
此时,可以呈LED芯片2的结构为倒装结构,LED芯片2中的发光图案212可以向远离背板1的一侧出光。在将LED芯片2转移至背板1上后,LED芯片2可以与连接焊盘12直接绑定键合,而无需通过其他的线路进行连接,这样有利于简化显示模组100的线路结构。At this time, the structure of the LED chip 2 can be a flip-chip structure, and the light-emitting pattern 212 in the LED chip 2 can emit light to the side away from the back plate 1. After the LED chip 2 is transferred to the back plate 1, the LED chip 2 can be directly bonded to the connecting pad 12 without being connected through other circuits, which is conducive to simplifying the circuit structure of the display module 100.
在一些示例中,在将该多个LED芯片2转移至背板1之前,每个LED芯片2中还具有设置在第一半导体图案211远离第二半导体图案213一侧的缓冲层、和基底(例如蓝宝石基底),在将LED芯片2与背板1进行固定后,例如可以采用激光剥离技术(Laser Lift-off,简称LLO)对基底进行剥离,并保留缓冲层,然后采用氯化氢溶液、稀硫酸溶液或稀磷酸溶液等进行清洗,去除残留的物质(例如镓金属)。通过去除基底,有利于提高LED芯片2的出光效率。In some examples, before the multiple LED chips 2 are transferred to the back plate 1, each LED chip 2 also has a buffer layer and a substrate (such as a sapphire substrate) arranged on the side of the first semiconductor pattern 211 away from the second semiconductor pattern 213. After the LED chip 2 is fixed to the back plate 1, for example, the substrate can be peeled off by laser lift-off (Laser Lift-off, LLO for short), and the buffer layer is retained, and then washed with hydrogen chloride solution, dilute sulfuric acid solution or dilute phosphoric acid solution to remove residual substances (such as gallium metal). By removing the substrate, it is beneficial to improve the light extraction efficiency of the LED chip 2.
在一些实施例中,如图8和图9所示,显示模组100还可以包括:设置在上述多个LED芯片2远离背板1一侧的色转换层4。其中,该多个LED芯片2和色转换层4之间例如可以采用光学透明胶(Optically Clear Adhesive,简称OCA)进行粘接。In some embodiments, as shown in Figures 8 and 9, the display module 100 may further include: a color conversion layer 4 disposed on a side of the plurality of LED chips 2 away from the back plate 1. The plurality of LED chips 2 and the color conversion layer 4 may be bonded, for example, with an optically clear adhesive (OCA for short).
在一些示例中,如图8和图9所示,色转换层4可以包括:界定层41和多个色转换单元42。In some examples, as shown in FIGS. 8 and 9 , the color conversion layer 4 may include: a defining layer 41 and a plurality of color conversion units 42 .
在一些示例中,如图8和图9所示,界定层41设置在上述多个LED芯片2远离背板1一侧,且该界定层41具有多个开口K。每个开口K位于一个子像素区域P内。In some examples, as shown in FIG8 and FIG9 , the defining layer 41 is disposed on a side of the plurality of LED chips 2 away from the back plate 1 , and the defining layer 41 has a plurality of openings K. Each opening K is located in a sub-pixel region P.
上述开口K在衬底11上的正投影的形状可以包括多种。示例性的,开口K在衬底11上的正投影形状可以为圆形或矩形等。The orthographic projection of the opening K on the substrate 11 may have various shapes. For example, the orthographic projection of the opening K on the substrate 11 may be circular or rectangular.
在一些示例中,如图8和图9所示,上述多个色转换单元42中,每个色转换单元42可以设置在一个开口K内,也即,每个色转换单元42可以与一个子像素区域P相对应。In some examples, as shown in FIG. 8 and FIG. 9 , among the plurality of color conversion units 42 , each color conversion unit 42 may be disposed in one opening K, that is, each color conversion unit 42 may correspond to one sub-pixel region P.
示例性的,每个色转换单元42包括量子点材料或荧光粉材料中的至少一种。Exemplarily, each color conversion unit 42 includes at least one of a quantum dot material or a phosphor material.
其中,荧光粉材料是一种光致发光材料,可以在单色光激发下发出不同颜色的光。Among them, the phosphor material is a photoluminescent material that can emit light of different colors under the excitation of monochromatic light.
而量子点材料包括多个量子点,以及与该多个量子点分别结合的配体。量子点在来自外部的光线的激发下,其中的电子会发生跃迁,使得量子点发射出光线。因此,入射至色转换单元42的光线,会激发色转换单元42中的量子点,使其发出具有颜色的光线。另外,由于量子点存在量子限域效应,其所发出的光线的波长会随量子点的粒径的变化而变化,也即,不同粒径的量子点能够被激发出不同颜色的光线。这样在使用相同材料的量子点的情况下,可以通过调整量子点的粒径,使得多个色转换单元42发出不同颜色的光。The quantum dot material includes a plurality of quantum dots and ligands respectively bound to the plurality of quantum dots. When the quantum dots are excited by light from the outside, the electrons therein will undergo transitions, causing the quantum dots to emit light. Therefore, the light incident on the color conversion unit 42 will excite the quantum dots in the color conversion unit 42, causing it to emit colored light. In addition, due to the quantum confinement effect of quantum dots, the wavelength of the light emitted by them will change with the change of the particle size of the quantum dots, that is, quantum dots of different particle sizes can be excited to emit light of different colors. In this way, when using quantum dots of the same material, the particle size of the quantum dots can be adjusted to make the multiple color conversion units 42 emit light of different colors.
这样在多个LED芯片2中发出的光在入射至不同子像素区域P中的色转换单元42后,可以使得不同色转换单元42发出不同颜色的光,该不同颜色的光可以相互配合使得显示模组100实现彩色化的图像显示。In this way, after the light emitted from the multiple LED chips 2 is incident on the color conversion units 42 in different sub-pixel areas P, different color conversion units 42 can emit light of different colors, and the different colors of light can cooperate with each other to enable the display module 100 to achieve colored image display.
示例性的,上述界定层41可以采用深色树脂制作,通过设置界定层41,可以避免出现漏光及光串扰的情况。Exemplarily, the defining layer 41 may be made of dark resin. By providing the defining layer 41 , light leakage and light crosstalk may be avoided.
需要说明的是,在相关技术中,由于LED在转移过程中存在精度较低且高度和位置均一性差的问题,采用色转换层实现LED显示装置彩色化的显示时,容易出现漏光的现象。而本发明中,一个子像素区域P内包括一个第二焊盘122,而色转换层4中的色转换单元42与一个子像素区域P相对应,位于同一LED芯片2中的部分外延结构21与背板1的第二焊盘122相对应设置,如此,可以提高色转换层4与LED芯片2之间的对位准确率,避免出现漏光问题。It should be noted that in the related art, due to the low precision and poor uniformity of height and position of LED in the transfer process, light leakage is prone to occur when the color conversion layer is used to realize the color display of the LED display device. In the present invention, a second solder pad 122 is included in a sub-pixel area P, and the color conversion unit 42 in the color conversion layer 4 corresponds to a sub-pixel area P, and part of the epitaxial structure 21 located in the same LED chip 2 is arranged corresponding to the second solder pad 122 of the back plate 1. In this way, the alignment accuracy between the color conversion layer 4 and the LED chip 2 can be improved to avoid light leakage.
值得一提的是,LED芯片2中各外延结构21所发出的光的颜色与第一半导体图案211和第二半导体图案213的本征半导体材料相关。示例性的,如果第一半导体图案211和第二半导体图案213的本征半导体材料均为GaN,则外延结构21可以发出绿色光或蓝色光;如果第一半导体图案211和第二半导体图案213的本征半导体材料均为GaP、AlGaAs或AlGaInP,则外延结构21可以发出红色光。当然,外延结构21还可以发出紫外光。It is worth mentioning that the color of the light emitted by each epitaxial structure 21 in the LED chip 2 is related to the intrinsic semiconductor material of the first semiconductor pattern 211 and the second semiconductor pattern 213. For example, if the intrinsic semiconductor materials of the first semiconductor pattern 211 and the second semiconductor pattern 213 are both GaN, the epitaxial structure 21 can emit green light or blue light; if the intrinsic semiconductor materials of the first semiconductor pattern 211 and the second semiconductor pattern 213 are both GaP, AlGaAs or AlGaInP, the epitaxial structure 21 can emit red light. Of course, the epitaxial structure 21 can also emit ultraviolet light.
在一些示例中,LED芯片2为可以发出蓝色光或紫外光的LED芯片,这样有利于降低成本,提高发光效率。In some examples, the LED chip 2 is an LED chip that can emit blue light or ultraviolet light, which is helpful to reduce costs and improve luminous efficiency.
在一些示例中,如图8所示,在LED芯片2发出的光为紫外光的情况下,上述多个色转换单元42可以包括多个红色色转换单元421、多个绿色色转换单元422和多个蓝色色转换单元423。上述多个开口K包括多个第一开口K1、多个第二开口K2和多个第三开口K3。其中,每个红色色转换单元421设置在一个第一开口K1内,每个绿色色转换单元422设置在一个第二开口K2内,每个蓝色色转换单元423设置在一个第三开口K3内。In some examples, as shown in FIG8 , when the light emitted by the LED chip 2 is ultraviolet light, the plurality of color conversion units 42 may include a plurality of red color conversion units 421, a plurality of green color conversion units 422, and a plurality of blue color conversion units 423. The plurality of openings K include a plurality of first openings K1, a plurality of second openings K2, and a plurality of third openings K3. Each red color conversion unit 421 is disposed in a first opening K1, each green color conversion unit 422 is disposed in a second opening K2, and each blue color conversion unit 423 is disposed in a third opening K3.
这样上述红色色转换单元421在受到LED芯片2发出的紫外光的激发的情况下,可以发出红色光;绿色色转换单元422在受到LED芯片2发出的紫外光的激发的情况下,可以发出绿色光;蓝色色转换单元423在受到LED芯片2发出的紫外光的激发的情况下,可以发出蓝色光。In this way, the red color conversion unit 421 can emit red light when excited by the ultraviolet light emitted by the LED chip 2; the green color conversion unit 422 can emit green light when excited by the ultraviolet light emitted by the LED chip 2; and the blue color conversion unit 423 can emit blue light when excited by the ultraviolet light emitted by the LED chip 2.
在另一些示例中,如图9所示,在LED芯片2发出的光为蓝色光的情况下,上述多个色转换单元42可以包括多个红色色转换单元421和多个绿色色转换单元422。上述多个开口K包括多个第一开口K1和多个第二开口K2。其中,每个红色色转换单元421设置在一个第一开口K1内,每个绿色色转换单元422设置在一个第二开口K2内。In other examples, as shown in FIG9 , when the light emitted by the LED chip 2 is blue light, the plurality of color conversion units 42 may include a plurality of red color conversion units 421 and a plurality of green color conversion units 422. The plurality of openings K include a plurality of first openings K1 and a plurality of second openings K2. Each red color conversion unit 421 is disposed in a first opening K1, and each green color conversion unit 422 is disposed in a second opening K2.
这样上述红色色转换单元421在受到LED芯片2发出的蓝色光的激发的情况下,可以发出红色光;绿色色转换单元422在受到LED芯片2发出的蓝色光的激发的情况下,可以发出绿色光。In this way, the red color conversion unit 421 can emit red light when excited by the blue light emitted by the LED chip 2; and the green color conversion unit 422 can emit green light when excited by the blue light emitted by the LED chip 2.
在此情况下,色转换层4还包括多个蓝色滤光部424,上述多个开口K包括多个第四开口K4。每个蓝色滤光部424设置在一个第四开口K4内。其中,该多个蓝色滤光部424包括有机树脂材料。In this case, the color conversion layer 4 further includes a plurality of blue filter portions 424, and the plurality of openings K include a plurality of fourth openings K4. Each blue filter portion 424 is disposed in one fourth opening K4. The plurality of blue filter portions 424 include organic resin material.
这样可以利用蓝色滤光部424对LED芯片2发出的蓝色光进行过滤。In this way, the blue light emitted by the LED chip 2 can be filtered by the blue light filter 424 .
本发明的一些实施例还提供了一种显示装置1000。如图10所示,该显示装置包括如上述任一实施例中所述的显示模组100。Some embodiments of the present invention further provide a display device 1000. As shown in FIG10 , the display device includes a display module 100 as described in any of the above embodiments.
上述显示装置1000所包括的显示模组100,具有与上述一些实施例中提供的显示模组100相同的结构和有益技术效果,在此不再赘述。The display module 100 included in the display device 1000 has the same structure and beneficial technical effects as the display module 100 provided in some of the above embodiments, which will not be described in detail herein.
在一些实施例中,上述显示装置1000可以为手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。In some embodiments, the display device 1000 may be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, or the like.
以上所述,仅为本公开的具体实施方式,但本公开的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本公开揭露的技术范围内,想到变化或替换,都应涵盖在本公开的保护范围之内。因此,本公开的保护范围应以所述权利要求的保护范围为准。The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any changes or substitutions that can be thought of by any person skilled in the art within the technical scope disclosed in the present disclosure should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.
Claims (8)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202011263234.7A CN114497104B (en) | 2020-11-12 | 2020-11-12 | Display module and display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202011263234.7A CN114497104B (en) | 2020-11-12 | 2020-11-12 | Display module and display device |
Publications (2)
Publication Number | Publication Date |
---|---|
CN114497104A CN114497104A (en) | 2022-05-13 |
CN114497104B true CN114497104B (en) | 2024-08-30 |
Family
ID=81490901
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202011263234.7A Active CN114497104B (en) | 2020-11-12 | 2020-11-12 | Display module and display device |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN114497104B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN118472149A (en) * | 2023-02-07 | 2024-08-09 | 华为技术有限公司 | Light emitting device, display module and electronic device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103119735A (en) * | 2010-09-24 | 2013-05-22 | 首尔半导体株式会社 | Wafer level light emitting diode package and manufacturing method thereof |
CN106062858A (en) * | 2014-03-05 | 2016-10-26 | Lg 电子株式会社 | Display device using semiconductor light emitting device |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN202178258U (en) * | 2011-06-30 | 2012-03-28 | 四川虹视显示技术有限公司 | OLED display, OLED display module group, and splicing structure of OLED display module group |
US10700121B2 (en) * | 2017-02-13 | 2020-06-30 | Sct Ltd. | Integrated multilayer monolithic assembly LED displays and method of making thereof |
US10784240B2 (en) * | 2018-01-03 | 2020-09-22 | Seoul Viosys Co., Ltd. | Light emitting device with LED stack for display and display apparatus having the same |
CN110400861B (en) * | 2019-07-30 | 2020-11-20 | 上海天马有机发光显示技术有限公司 | Manufacturing method of display panel, display panel and display device |
CN110867528B (en) * | 2019-12-18 | 2022-07-29 | 京东方科技集团股份有限公司 | A display panel, method of making the same, and display device |
CN111596485A (en) * | 2020-06-08 | 2020-08-28 | 武汉华星光电技术有限公司 | A color filter substrate, a display panel, and a display device |
-
2020
- 2020-11-12 CN CN202011263234.7A patent/CN114497104B/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103119735A (en) * | 2010-09-24 | 2013-05-22 | 首尔半导体株式会社 | Wafer level light emitting diode package and manufacturing method thereof |
CN106062858A (en) * | 2014-03-05 | 2016-10-26 | Lg 电子株式会社 | Display device using semiconductor light emitting device |
Also Published As
Publication number | Publication date |
---|---|
CN114497104A (en) | 2022-05-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11269215B2 (en) | Method of manufacturing light emitting module and light emitting module | |
CN111029453B (en) | Light emitting device, method for manufacturing the light emitting device, and display device | |
EP3487266B1 (en) | Micro led array display device | |
US12113161B2 (en) | Display device using micro LED and method for manufacturing same | |
US10720086B2 (en) | Display device using semiconductor light-emitting diode | |
CN111725251A (en) | High-resolution full-color MicroLED display | |
WO2017150257A1 (en) | Display device and method for manufacturing same, and light-emitting device and method for manufacturing same | |
CN113424315B (en) | Method for transferring light-emitting element for display and display device | |
US12107205B2 (en) | Method for manufacturing display device using semiconductor light-emitting elements and display device | |
CN108922899A (en) | pixel array substrate and driving method thereof | |
CN102931330A (en) | Preparation method of LED (light-emitting diode) flat-panel display unit | |
TWI627740B (en) | Micro light emitting diode display module and manufacturing method thereof | |
CN113380929B (en) | Display panel manufacturing method, display panel and display device | |
TWI611573B (en) | Method for manufacturing micro light emitting diode display module | |
CN114497104B (en) | Display module and display device | |
CN114667554B (en) | Display substrate and display device | |
KR20200026677A (en) | Display device using micro led | |
CN109037262A (en) | The manufacturing method of micro- light-emitting diode display module | |
CN113314654B (en) | Light-emitting substrate, its preparation method, and display device | |
CN115606011B (en) | Light-emitting diode chip, display substrate and manufacturing method thereof | |
US20240014346A1 (en) | Transfer substrate used in manufacture of display device, display device, and manufacturing method for display device | |
US20240421247A1 (en) | Display device using light-emitting element, and manufacturing method therefor | |
US20230275181A1 (en) | Transfer substrate used for manufacturing display device, display device, and method for manufacturing display device | |
CN109037260A (en) | Micro- light-emitting diode display module and its manufacturing method | |
WO2024145751A1 (en) | Chip structure and manufacturing method therefor, display substrate, and display device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |