CN114446919B

CN114446919B - MCM packaging structure and manufacturing method thereof

Info

Publication number: CN114446919B
Application number: CN202011218426.6A
Authority: CN
Inventors: 周辉星
Original assignee: SIPLP Microelectronics Chongqing Ltd
Current assignee: SIPLP Microelectronics Chongqing Ltd
Priority date: 2020-11-04
Filing date: 2020-11-04
Publication date: 2024-11-22
Anticipated expiration: 2040-11-04
Also published as: CN114446919A

Abstract

The present invention provides an MCM packaging structure and a manufacturing method thereof, wherein the packaging structure comprises: a pre-wiring substrate, a first bare chip assembly/bare chip, a passive device, a plastic layer, a first conductive trace, a second conductive trace, a conductive bump, a first dielectric layer and a second dielectric layer. The pre-wiring substrate can transfer the wiring layer that needs to be formed on the active surface of the bare chip to the pre-wiring substrate, and the pre-wiring substrate includes complex multi-circuits, which are embedded in the packaging structure by being electrically connected to the pads on the active surface of the bare chip, thereby improving the performance of the entire MCM packaging structure. Passive devices can also be incorporated into the MCM packaging structure through the pre-wiring substrate. The pre-wiring substrate can be tested before packaging to avoid using a known bad pre-wiring substrate. The pre-wiring substrate is a prefabricated substrate, and its manufacturing process is independent of the packaging process, thereby saving the packaging time of the entire packaging process.

Description

MCM packaging structure and manufacturing method thereof

Technical Field

The invention relates to the technical field of chip packaging, in particular to an MCM packaging structure and a manufacturing method thereof.

Background

In the packaging process, dies with different functions are often packaged in a package structure to form a specific function, which is called Multi-Chip Module (MCM), and has advantages of small volume, high reliability, high performance, multifunction, and the like.

With miniaturization and weight reduction of electronic devices, chip packages having a compact structure and a small volume are increasingly favored in the market.

In MCM, the internal circuit structure of the chip is often complex, and the wiring density in the rewiring layer is high, so that wiring difficulty is caused because the surface area of the chip is too small. In addition, because the wirings are too dense, the fine wirings are easy to generate short circuits, thereby influencing the yield of products, and the service life of the chip is also lower; particularly in the case where a plurality of wiring layers need to be formed, the process is difficult to control due to the complexity of the process.

Disclosure of Invention

The invention aims to provide an MCM packaging structure and a manufacturing method thereof, which are used for solving the problems in the related art.

To achieve the above object, a first aspect of the present invention provides an MCM package structure, including:

A pre-wiring substrate having a first through opening and a second through opening; a pre-wiring circuit is arranged in the pre-wiring substrate, the pre-wiring circuit comprises a front-side electric connection point and a back-side electric connection point, the front-side electric connection point is exposed on the front side of the pre-wiring substrate, and the back-side electric connection point is exposed on the back side of the pre-wiring substrate;

A first die assembly located within the first through opening; the first die assembly includes at least: a first die and a second die, the first die including a plurality of first pads, the first pads being located on an active side of the first die, the second die including a plurality of second pads, the second pads being located on an active side of the second die; the active surface of the second die is covered with a second protective layer, and the second protective layer exposes the second bonding pad; the active face of the first die is opposite to the active face of the second die;

a passive device located within the second through opening; the passive device comprises an electric connection end, and the electric connection end is positioned on the active surface of the passive device;

A plastic layer covering the pre-wiring substrate, the first die assembly and the passive device, wherein the back surface of the plastic layer exposes the second protective layer, the second bonding pad and the back surface of the pre-wiring substrate, and the front surface of the plastic layer exposes the active surface of the first die, the active surface of the passive device and the front surface of the pre-wiring substrate;

a first conductive trace on the first pad, the electrical connection terminal, the front side electrical connection point, and the front side of the plastic layer for electrically connecting the first die, the passive device, and the pre-wiring line;

a second conductive trace on the second pad, the backside electrical connection point, and the backside of the plastic layer for electrically connecting the second die with the pre-wiring line;

A conductive bump connected to the first conductive trace;

A first dielectric layer embedding the first conductive trace and the conductive bump, the conductive bump exposed outside the first dielectric layer; and

A second dielectric layer embedding the second conductive trace.

Optionally, the first die assembly is a die stack structure.

Optionally, the conductive bump connection to the first conductive trace is replaced with: the conductive bump is connected to the second conductive trace; correspondingly, the second dielectric layer embeds the second conductive trace and the conductive bump, the conductive bump is exposed outside the second dielectric layer, and the first dielectric layer embeds the first conductive trace.

Optionally, a third dielectric layer located on the active surface of the first die, the active surface of the passive device, the front surface of the pre-wiring substrate, and the front surface of the plastic sealing layer; the third dielectric layer exposes the first bonding pad, the electric connection end and the front electric connection point; the first conductive trace is located on the first pad, the electrical connection terminal, the front side electrical connection point, and the third dielectric layer.

Optionally, the method further comprises: a first protection layer covering the active surface of the first die, the first protection layer exposing the first bonding pad; the front surface of the plastic layer exposes the first protective layer and the first bonding pad.

Optionally, the material of the second protective layer is an organic high polymer insulating material, an inorganic insulating material or a composite material; and/or the material of the first dielectric layer is an organic high polymer insulating material, an inorganic insulating material or a composite material; and/or the material of the second dielectric layer is an organic high polymer insulating material, an inorganic insulating material or a composite material.

Optionally, the first conductive trace includes a metal pattern layer; and/or the second conductive trace comprises a metal pattern layer.

A second aspect of the present invention provides a method for manufacturing an MCM package structure, including:

Providing a carrier plate and a plurality of groups of to-be-packaged components carried on the carrier plate, wherein each group of to-be-packaged components comprises: a pre-wiring substrate having a first through opening and a second through opening, a first die assembly located within the first through opening, and a passive device located within the second through opening; a pre-wiring circuit is arranged in the pre-wiring substrate, the pre-wiring circuit comprises a front-side electric connection point and a back-side electric connection point, the front-side electric connection point is exposed on the front side of the pre-wiring substrate, and the back-side electric connection point is exposed on the back side of the pre-wiring substrate; the first die assembly includes at least: a first die and a second die, the first die including a plurality of first pads, the first pads being located on an active side of the first die, the second die including a plurality of second pads, the second pads being located on an active side of the second die; the active surface of the second die is covered with a second protective layer; the active face of the first die is opposite to the active face of the second die; the passive device comprises an electric connection end, and the electric connection end is positioned on the active surface of the passive device; the front surface of the pre-wiring substrate, the active surface of the passive device and the active surface of the first die face the carrier plate;

forming plastic sealing layers for embedding the groups of to-be-packaged parts on the surface of the carrier plate; thinning the plastic sealing layer until the second protective layer and the back surface of the pre-wiring substrate are exposed;

Forming a second opening in the second protection layer to expose the second bonding pad; forming second conductive traces on the second protective layer, the second pads, the backside electrical connection points, and the backside of the molding layer to electrically connect the second die within the group with the pre-wiring lines; forming a second dielectric layer embedding the second conductive trace;

Removing the carrier plate, and exposing the active surface of the first bare chip, the active surface of the passive device, the front surface of the pre-wiring substrate and the front surface of the plastic sealing layer; forming first conductive traces on the first pads, the electrical connection terminals, the front side electrical connection points, and the front side of the molding layer to electrically connect the first die, the passive devices, and the pre-routed lines within a group;

Forming a conductive bump on the first conductive trace and forming a first dielectric layer embedding the first conductive trace and the conductive bump, the conductive bump being exposed outside the first dielectric layer;

and cutting to form a plurality of MCM packaging structures, wherein each MCM packaging structure comprises a group of to-be-packaged parts.

Optionally, after the step of forming a second conductive trace, forming a conductive bump on the second conductive trace and forming a second dielectric layer embedding the second conductive trace and the conductive bump, wherein the conductive bump is exposed outside the second dielectric layer; forming a conductive bump on the first conductive trace and forming a first dielectric layer embedding the first conductive trace and the conductive bump, wherein the conductive bump is exposed outside the first dielectric layer and replaced by: a first dielectric layer is formed embedding the first conductive trace.

Optionally, removing the carrier to form the first conductive trace, the conductive bump, and the first dielectric layer embedding the first conductive trace and the conductive bump; and then, a supporting plate is arranged on the first dielectric layer and the conductive bump, and the plastic sealing layer is thinned to form the second conductive trace and the second dielectric layer.

Optionally, after removing the carrier, forming a third dielectric layer on the exposed active surface of the first die, the active surface of the passive device, the front surface of the pre-wiring substrate, and the front surface of the molding layer; forming a plurality of fourth openings in the third dielectric layer, wherein the fourth openings expose the first bonding pads, the electric connection ends and the front surface electric connection points; the first conductive trace is formed on the first pad, the electrical connection terminal, the front side electrical connection point, and the third dielectric layer.

Optionally, in the first die assembly, an active face of the first die is covered with a first protective layer; the first protection layer faces the carrier plate; the first protective layer is provided with a first opening exposing the first bonding pad, or after the step of removing the carrier plate and before the step of forming the first conductive trace, a first opening is formed in the first protective layer so as to expose the first bonding pad;

and/or the active surface of the passive device is covered with a third protective layer; the third protection layer faces the carrier plate; and the third protection layer in the to-be-packaged piece is provided with a third opening exposing the electric connection end, or after the step of removing the carrier plate and before the step of forming the first conductive trace, a third opening is formed in the third protection layer so as to expose the electric connection end.

Optionally, the pre-wiring substrates of each group of the packages to be packaged are connected together, and the dicing is performed in a step of forming a plurality of MCM package structures.

A third aspect of the present invention provides an MCM package structure comprising:

a die located within the first through opening; the bare chip comprises a plurality of bonding pads, and the bonding pads are positioned on the active surface of the bare chip;

A plastic layer, which is used for coating the pre-wiring substrate, the bare chip and the passive device, wherein the back surface of the plastic layer is exposed to the back surface of the pre-wiring substrate, and the front surface of the plastic layer is exposed to the active surface of the bare chip, the active surface of the passive device and the front surface of the pre-wiring substrate;

conductive traces on the pads, the electrical connection terminals, the front electrical connection points, and the front side of the molding layer for electrically connecting the die, the passive device, and the pre-wiring lines;

a conductive bump connected to the back electrical connection point;

a first dielectric layer embedding the first conductive trace; and

And the second dielectric layer is used for embedding the conductive bump, and the conductive bump is exposed outside the second dielectric layer.

Optionally, a second die assembly replaces the die, the second die assembly comprising a plurality of dies, the active faces of the plurality of dies being the same.

A fourth aspect of the present invention provides a method for manufacturing an MCM package structure, including:

Providing a carrier plate and a plurality of groups of to-be-packaged components carried on the carrier plate, wherein each group of to-be-packaged components comprises: a pre-wiring substrate having a first through opening and a second through opening, a die located within the first through opening, and a passive device located within the second through opening; a pre-wiring circuit is arranged in the pre-wiring substrate, the pre-wiring circuit comprises a front-side electric connection point and a back-side electric connection point, the front-side electric connection point is exposed on the front side of the pre-wiring substrate, and the back-side electric connection point is exposed on the back side of the pre-wiring substrate; the bare chip comprises a plurality of bonding pads, and the bonding pads are positioned on the active surface of the bare chip; the passive device comprises an electric connection end, and the electric connection end is positioned on the active surface of the passive device; the front surface of the pre-wiring substrate, the active surface of the passive device and the active surface of the bare chip face the carrier plate;

Forming plastic sealing layers for embedding the groups of to-be-packaged parts on the surface of the carrier plate; thinning the plastic sealing layer until the back surface of the pre-wiring substrate is exposed;

Removing the carrier plate, and exposing the active surface of the bare chip, the active surface of the passive device, the front surface of the pre-wiring substrate and the front surface of the plastic sealing layer; forming conductive traces on the pads, the electrical connection terminals, the front side electrical connection points, and the front side of the molding layer to electrically connect the die, the passive devices, and the pre-wiring lines within a group; forming a first dielectric layer embedding the conductive trace;

Forming a conductive bump on the back side electrical connection point and forming a second dielectric layer embedding the conductive bump, the conductive bump being exposed outside the second dielectric layer;

Compared with the prior art, the invention has the beneficial effects that:

first, the pre-wiring substrate may transfer the wiring layers that need to be formed on the active side of the die into the pre-wiring substrate, which includes complex multi-circuits that are embedded in the package structure by being electrically connected to pads on the active side of the die and electrical connections of the passive devices, which may improve the performance of the overall MCM package structure. Second, the transfer of fine wires in the rewiring layer to the pre-wiring substrate is performed, so that the probability of short circuit is reduced, the product yield is increased, the number of layers of the first conductive trace and/or the second conductive trace can be reduced, and the process complexity is reduced. Third, a pre-formed pre-wiring substrate is provided, which can be tested before packaging, avoiding the use of known bad pre-wiring substrates. Fourth, the pre-wiring substrate is a pre-fabricated substrate, and the manufacturing process is independent of the packaging process, so that the packaging time of the whole packaging process can be saved.

In addition, the bare chip assemblies with the same or opposite active surfaces can realize the effects of small size and compact structure of the MCM packaging structure. For the die assembly with the active surfaces facing away from each other, the electrical connection between the first die, the second die and the passive device is realized through the pre-wiring substrate, and the wiring on the front surface and the back surface of the plastic sealing layer is also realized.

Drawings

FIG. 1 is a schematic cross-sectional structure of an MCM package according to a first embodiment of the invention;

FIG. 2 is a flow chart of a method of fabricating the MCM package of FIG. 1;

Fig. 3 to 9 are schematic views of intermediate structures corresponding to the flow in fig. 2;

FIG. 10 is a flow chart of a method for fabricating an MCM package structure according to a second embodiment of the invention;

fig. 11 and 12 are schematic views of intermediate structures corresponding to the flow in fig. 10;

fig. 13 is a schematic cross-sectional structure of an MCM package structure according to a third embodiment of the present invention;

fig. 14 is a schematic cross-sectional structure of an MCM package structure according to a fourth embodiment of the present invention;

Fig. 15 is a schematic cross-sectional structure of an MCM package structure according to a fifth embodiment of the present invention.

To facilitate an understanding of the present invention, all reference numerals appearing in the present invention are listed below:

MCM package structure 1, 6, 7, 8 pre-wiring substrate 10

Front side electrical connection point 101 of pre-wiring line 100

Rear electrical connection point 102 pre-wiring front side 10a of substrate

The back surface 10b of the pre-wiring substrate has a first through opening 103

Second through opening 104 first die assembly 20

First protective layer 110 of first die 11

First pad 111 back surface 11b of first die

Active surface 11a of first die second die 12

Second protective layer 120 second pad 121

Backside 12b of second die active side 12a of second die

Passive device 13 passive device active surface 13a

The third protection layer 130 of the electrical connection terminal 131

Plastic layer 14 Plastic layer front face 14a

Backside 14b of the molding layer first conductive trace 15

Second conductive trace 16 conductive bump 17

First dielectric layer 18 second dielectric layer 19

First opening 110a second opening 120a

Third openings 130a metal pattern blocks 15a, 16a

Carrier plate 2 to-be-packaged piece 3

First support plate 4 second support plate 5

Fourth opening 21a third dielectric layer 21

Detailed Description

In order that the above objects, features and advantages of the invention will be readily understood, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings.

Fig. 1 is a schematic cross-sectional structure of an MCM package structure according to a first embodiment of the present invention.

Referring to fig. 1, an MCM package structure 1 includes:

A pre-wiring substrate 10 having a first through opening 103 and a second through opening 104 (see fig. 3 and 4); the pre-wiring substrate 10 is provided with a pre-wiring line 100, the pre-wiring line 100 comprises a front electrical connection point 101 and a back electrical connection point 102, the front electrical connection point 101 is exposed on the front surface 10a of the pre-wiring substrate 10, and the back electrical connection point 102 is exposed on the back surface 10b of the pre-wiring substrate 10;

A first die assembly 20 located within the first through opening 103; the first die assembly 20 includes at least: the first die 11 and the second die 12, the first die 11 includes a plurality of first pads 111, the first pads 111 are located on the active surface 11a of the first die 11, the second die 12 includes a plurality of second pads 121, and the second pads 121 are located on the active surface 12a of the second die 12; the active surface 12a of the second die 12 is covered with a second protection layer 120, and the second protection layer 120 exposes the second pad 121; the active face 11a of the first die 11 is facing away from the active face 12a of the second die 12;

A passive device 13 located within the second through opening 104; the passive device 13 includes an electrical connection 131, the electrical connection 131 being located on the active face 13a of the passive device 13;

a molding layer 14 covering the pre-wiring substrate 10, the first die assembly 20, and the passive device 13, a back surface 14b of the molding layer 14 exposing the second protective layer 120, the second pad 121, and the back surface 10b of the pre-wiring substrate 10, and a front surface 14a of the molding layer 14 exposing the active surface 11a of the first die 11, the active surface 13a of the passive device 13, and the front surface 10a of the pre-wiring substrate 10;

A first conductive trace 15, located on the first pad 111, the electrical connection terminal 131, the front electrical connection point 101, and the front surface 14a of the molding layer 14, for electrically connecting the first die 11, the passive device 13, and the pre-wiring line 100;

A second conductive trace 16 on the second pad 121, the backside electrical connection point 102 and the backside 14b of the molding layer 14 for electrically connecting the second die 12 and the pre-wiring line 100;

A conductive bump 17 connected to the first conductive trace 15;

A first dielectric layer 18 embedding the first conductive trace 15 and the conductive bump 17, the conductive bump 17 being exposed outside the first dielectric layer 18; and

A second dielectric layer 19, embedding the second conductive trace 16.

The first die 11 and the second die 12 may be die that need to be electrically interconnected, and the respective functions are not limited. In some embodiments, the first DIE 11 and the second DIE 12 may be POWER DIE (POWER DIE), MEMORY DIE (MEMORY DIE), sense DIE (SENSOR DIE), or radio frequency DIE (RADIO FREQUENCE DIE) or corresponding control chips.

Referring to fig. 1, the first die 11 includes opposite active and back surfaces 11a and 11b. The first pads 111 are exposed to the active face 11a. The first die 11 may contain various devices formed on a semiconductor substrate and electrical interconnect structures electrically connected to the respective devices. The first pads 111 are connected to the electrical interconnection structure for inputting/outputting electrical signals of the respective devices.

In the present invention, "/" means "or".

The second die 12 includes opposing active and back surfaces 12a and 12b. The second pads 121 are exposed to the active face 12a. The second die 12 may contain a variety of devices formed on a semiconductor substrate and electrical interconnect structures electrically connected to the respective devices. The second pads 121 are connected to the electrical interconnection structure for inputting/outputting electrical signals of the respective devices.

With continued reference to fig. 1, in the present embodiment, the first die assembly 20 is a die stack structure, i.e., the first die 11 and the second die 12 are disposed back-to-back. The back-to-back arrangement of the first die 11 and the second die 12 means that: the back surface 11b of the first die 11 is bonded to the back surface 12b of the second die 12.

In other embodiments, the first die assembly 20 may include a first or more first dies 11 and may also include one or more second dies 12. The first die 11 and the second die 12 may be arranged in a staggered or even side-by-side arrangement, i.e. the front side 14a of the plastic layer 14 also exposes the back side 12b of the second die 12.

In the present embodiment, the area of the first die 11 is larger than the area of the second die 12. In other embodiments, the area of the second die 12 may also be larger than the area of the first die 11.

The passive devices 13 may include resistive, inductive, and capacitive elements, which have the common feature of operating in the presence of a signal without the need for a power supply in the circuit. The passive device 13 includes electrical connections 131 to enable electrical signal in/out of the passive device 13.

In the present embodiment, the active surface 11a of the first die 11 is provided with the first protective layer 110, and the active surface 13a of the passive device 13 is provided with the third protective layer 130. In some embodiments, the active surface 11a of the first die 11 may also omit the first protective layer 110 and/or the active surface 13a of the passive device 13 omit the third protective layer 130.

The first protective layer 110 and/or the second protective layer 120 and/or the third protective layer 130 are/is an insulating material, specifically may be an organic high polymer insulating material, or may be an inorganic insulating material or a composite material. The organic high molecular polymer insulating material is polyimide, epoxy resin, ABF (Ajinomoto buildup film), PBO (Polybenzoxazole), organic polymer film or other organic material with similar insulating property, etc. The inorganic insulating material is, for example, at least one of silicon dioxide and silicon nitride. The composite material is an inorganic-organic composite material, and can be an inorganic-organic polymer composite material, such as SiO ₂/resin polymer composite material.

There may be a plurality of first through openings 103 and second through openings 104 in the pre-wiring substrate 10, and elements to be electrically connected may be placed in each through opening 103, 104. The pre-wiring substrate 10 includes pre-wiring lines 100 and an insulating material layer filled between the pre-wiring lines 100. Compared with the scheme of manufacturing a rewiring layer on the plastic package body of the first die 11 and the second die 12, the pre-wiring substrate 10 has the following advantages: first, transferring fine wires in the rewiring layer to the pre-wiring substrate 10 reduces the probability of shorting, increases product yield, and reduces the number of layers of the first conductive trace 15 and/or the second conductive trace 16, reducing process complexity. Second, providing a pre-formed pre-wiring substrate 10 allows testing of the pre-wiring substrate 10 prior to packaging, avoiding the use of a known defective pre-wiring substrate 10. Third, the pre-wiring substrate 10 is a pre-fabricated substrate, and the manufacturing process is performed independently of the packaging process, so that the packaging time of the whole packaging process can be saved.

Further, transferring the wiring layers that need to be formed on the die active surfaces 11a, 12a into the pre-wiring substrate 10, the pre-wiring substrate 10 includes complex multi-circuits that are embedded in the package structure 1 by being electrically connected to the pads 111, 121 on the die active surfaces 11a, 12a and the electrical connection terminals 131 of the passive devices 13, which can improve the performance of the entire package structure 1.

The pre-wiring substrate 10 may be a single piece or a plurality of pieces disposed around the first die assembly 20/passive device 13.

The pre-wiring substrate 10 may include opposite front and back surfaces 10a and 10b. In the present embodiment, the front surface 10a of the pre-wiring substrate 10 is flush with both the first protective layer 110 and the third protective layer 130, and the back surface 10b of the pre-wiring substrate 10 is flush with the second protective layer 120. In other words, the thickness of the passive device 13 is smaller than the thickness of each of the pre-wiring substrate 10 and the first die assembly 20.

There may be a plurality of front-side electrical connection points 101 exposed on the front side 10a of the pre-wiring substrate, and there may be a plurality of back-side electrical connection points 102 exposed on the back side 10b of the pre-wiring substrate.

The material of the plastic layer 14 may be epoxy resin, polyimide resin, benzocyclobutene resin, polybenzoxazole resin, polybutylene terephthalate, polycarbonate, polyethylene terephthalate, polyethylene, polypropylene, polyolefin, polyurethane, polyolefin, polyethersulfone, polyamide, polyurethane, ethylene-vinyl acetate copolymer, polyvinyl alcohol, or the like. The material of the plastic layer 14 may also be various polymers or a composite of resin and polymer.

The molding layer 14 includes opposite front and back surfaces 14a and 14b. In this embodiment, the front surface 14a of the molding layer 14 exposes the first protective layer 110, the first pad 111, the third protective layer 130, the electrical connection terminal 131, and the front surface 10a of the pre-wiring substrate 10, and the back surface 14b of the molding layer 14 exposes the second protective layer 120, the second pad 121, and the back surface 10b of the pre-wiring substrate 10.

In the embodiment shown in fig. 1, the first conductive trace 15 comprises a number of metal pattern blocks 15a, having one layer. A partial number of metal pattern blocks 15a selectively electrically connect the front-side electrical connection points 101 with the first pads 111 to achieve electrical connection of the pre-wiring substrate 10 with the first die 11; a partial number of metal pattern blocks 15a selectively electrically connect the front-side electrical connection points 101 with the electrical connection terminals 131 to achieve electrical connection of the pre-wiring substrate 10 with the passive devices 13; a partial number of the metal pattern blocks 15a are selectively electrically connected to the front-side electrical connection points 101 to draw out the front-side electrical connection points 101 through the conductive bumps 17. In addition, a part of the metal pattern blocks 15a can be selectively and electrically connected with a plurality of front-side electrical connection points 101, so as to realize the circuit layout or electrical conduction of the front-side electrical connection points 101; there may also be a partial number of metal pattern blocks 15a selectively electrically connecting a plurality of first pads 111 to realize circuit layout or electrical conduction of the first pads 111.

The layout of the first conductive trace 15 may be determined according to a predetermined circuit layout.

In some embodiments, the first conductive trace 15 may also include two or more layers, i.e., have two or more metal pattern layers.

In the embodiment shown in fig. 1, the second conductive trace 16 includes a number of metal pattern blocks 16a having one layer. A partial number of the metal pattern blocks 16a selectively electrically connect the backside electrical connection points 102 with the second pads 121 to achieve electrical connection of the pre-wiring substrate 10 with the second die 12. In addition, there may be a partial number of metal pattern blocks 16a selectively electrically connected to a plurality of back side electrical connection points 102 to realize circuit layout or electrical conduction of the back side electrical connection points 102; there may also be a partial number of metal pattern blocks 16a selectively electrically connecting a plurality of second pads 121 to achieve circuit layout or electrical conduction of the second pads 121.

The layout of the second conductive trace 16 may be based on a predetermined circuit layout.

In some embodiments, the second conductive trace 16 may also include two or more layers, i.e., have two or more metal pattern layers.

Referring to fig. 1, in the present embodiment, the conductive bump 17 on the first conductive trace 15 serves as an external connection terminal of the MCM package structure 1.

In some embodiments, the conductive bump 17 may also have an oxidation resistant layer thereon.

The oxidation resistant layer may include: b1 Tin layer, or b 2) nickel layer and gold layer stacked from bottom to top, or b 3) nickel layer, palladium layer and gold layer stacked from bottom to top. The material of the conductive bump 17 may be copper, and the oxidation-resistant layer may prevent oxidation of copper, thereby preventing deterioration of electrical connection performance due to oxidation of copper.

In some embodiments, the conductive bumps 17 may also have solder balls thereon for flip-chip mounting of the MCM package structure 1.

The materials of the first dielectric layer 18 and the second dielectric layer 19 may be organic polymer insulating materials, inorganic insulating materials or composite materials. The organic high molecular polymer insulating material is polyimide, epoxy resin, ABF (Ajinomoto buildup film), PBO (Polybenzoxazole), organic polymer film or other organic material with similar insulating property, etc. The inorganic insulating material is, for example, at least one of silicon dioxide and silicon nitride. The composite material is an inorganic-organic composite material, and can be an inorganic-organic polymer composite material, such as SiO ₂/resin polymer composite material. Compared with inorganic insulating materials, the organic high-molecular polymer insulating materials and the composite materials have smaller tensile stress, and can prevent the surface of the MCM packaging structure 1 from warping.

In the MCM package structure 1, on the one hand, the first die assemblies 20 with the active surfaces facing away from each other achieve the effect of small size and compact structure of the MCM package structure 1. On the other hand, by the pre-wiring substrate 10, not only the electrical connection between the first die 11, the second die 12 and the passive device 13 is realized, but also the wiring on both sides of the front surface 14a and the back surface 14b of the molding layer 14 is realized, and the wiring density can be improved compared with the wiring on only one side, so that the MCM package structure 1 with more complicated wiring and smaller volume can be formed.

An embodiment of the present invention provides a method for manufacturing the MCM package structure 1 in fig. 1. Fig. 2 is a flow chart of a method of fabrication. Fig. 3 to 9 are schematic views of intermediate structures corresponding to the flow in fig. 2.

First, referring to step S1 in fig. 2, fig. 3 and fig. 4, a carrier 2 and a plurality of groups of packages 3 carried on the carrier 2 are provided, wherein each group of packages 3 includes: a pre-wiring substrate 10 having a first through opening 103 and a second through opening 104, a first die assembly 20 located within the first through opening 103, and a passive device 13 located within the second through opening 104; the pre-wiring substrate 10 is provided with a pre-wiring line 100, the pre-wiring line 100 comprises a front electrical connection point 101 and a back electrical connection point 102, the front electrical connection point 101 is exposed on the front surface 10a of the pre-wiring substrate 10, and the back electrical connection point 102 is exposed on the back surface 10b of the pre-wiring substrate 10; the first die assembly 20 includes at least: the first die 11 and the second die 12, the first die 11 includes a plurality of first pads 111, the first pads 111 are located on the active surface 11a of the first die 11, the second die 12 includes a plurality of second pads 121, and the second pads 121 are located on the active surface 12a of the second die 12; the active surface 12a of the second die 12 is covered with a second protective layer 120; the active face 11a of the first die 11 is oriented opposite to the active face 12a of the second die 12; the passive device 13 includes an electrical connection 131, the electrical connection 131 being located on the active face 13a of the passive device 13; the front surface 10a of the pre-wiring substrate 10, the active surface 13a of the passive device 13, and the active surface 11a of the first die 11 face the carrier plate 2. Wherein, fig. 3 is a top view of the carrier plate and the plurality of groups of packages to be packaged; fig. 4 is a cross-sectional view taken along line AA in fig. 3.

Referring to fig. 4, the first die 11 includes opposite active and back surfaces 11a and 11b. The first die 11 may contain various devices formed on a semiconductor substrate and electrical interconnect structures electrically connected to the respective devices. The first pads 111 exposed to the active face 11a of the first die 11 are connected to the electrical interconnect structure for inputting/outputting electrical signals of the respective devices.

The second die 12 includes opposing active and back surfaces 12a and 12b. The second pads 121 are exposed to the active face 12a. The second die 12 may also contain a variety of devices formed on the semiconductor substrate and electrical interconnect structures electrically connected to the various devices. The second pads 121 exposed to the active face 12a of the second die 12 are connected to the electrical interconnect structure for inputting/outputting electrical signals of the respective devices.

With continued reference to fig. 4, in the present embodiment, the first die assembly 20 is a die stack structure, i.e., the first die 11 and the second die 12 are disposed back-to-back. The back-to-back arrangement of the first die 11 and the second die 12 means that: the back surface 11b of the first die 11 is bonded to the back surface 12b of the second die 12.

The second protective layer 120 covers the second pad 121 to protect the second pad 121 when the plastic layer 14 is thinned.

In this embodiment, the active surface 11a of the first die 11 is also provided with a first protection layer 110 to buffer the stress of the first pad 111 when the plastic layer 14 is thinned. In some embodiments, the active surface 11a of the first die 11 may also omit the first protective layer 110.

The first die 11 and the second die 12 are both formed as divided wafers. Taking the first die 11 as an example, the wafer includes a wafer active surface and a wafer back surface, the wafer active surface exposing the first pads 111 and an insulating layer (not shown) protecting the first pads 111. The wafer is diced to form a first die 11, and accordingly, the first die 11 includes an active surface 11a and a backside surface 11b, and the first pads 111 and the insulating layer electrically insulating adjacent first pads 111 are exposed to the die active surface 11a.

The first protective layer 110 is applied on the active surface 11a of the first die 11, and the first protective layer 110 may be applied by: applying the first protection layer 110 on the wafer active surface before dicing the wafer into the first die 11, dicing the wafer with the first protection layer 110 into the first die 11 with the first protection layer 110 may also be: after the wafer is diced into the first dies 11, a first protective layer 110 is applied on the active face 11a of the first dies 11.

In this embodiment, the active surface 13a of the passive device 13 is also provided with a third protection layer 130 to buffer the stress of the electrical connection terminal 131 when the plastic layer 14 is thinned. In some embodiments, the active surface 13a of the passive device 13 may also omit the third protective layer 130.

The first protective layer 110 and/or the second protective layer 120 and/or the third protective layer 130 are/is an insulating material, specifically may be an organic high polymer insulating material, or may be an inorganic insulating material or a composite material. The organic high molecular polymer insulating material is polyimide, epoxy resin, ABF (Ajinomoto buildup film), PBO (Polybenzoxazole), organic polymer film or other organic material with similar insulating property, etc. The composite material is an inorganic-organic composite material, and can be an inorganic-organic polymer composite material, such as SiO ₂/resin polymer composite material.

The organic high molecular polymer insulating material may be pressed on the insulating layer between the first pads 111 and the adjacent first pads 111/on the insulating layer between the second pads 121 and the adjacent second pads 121/on the insulating layer between the adjacent first pads 111/on the insulating layer between the adjacent second pads 131, or b) coated or printed on the insulating layer between the first pads 111 and the insulating layer between the first pads 111/on the insulating layer between the second pads 121 and the insulating layer between the adjacent first pads 121/on the insulating layer between the adjacent first pads 131/the insulating layer between the adjacent second pads 131 and the insulating layer between the adjacent electric connection 131, post-cured, or c) cured on the insulating layer between the first pads 111 and the insulating layer between the adjacent first pads 111/on the insulating layer between the adjacent second pads 121 and the insulating layer between the adjacent second pads 131 and the insulating layer between the adjacent electric connection terminals 131 by an injection molding process.

When the material of the first protective layer 110 and/or the second protective layer 120 and/or the third protective layer 130 is an inorganic material such as silicon dioxide or silicon nitride, the insulating layer between the first pads 111 and the adjacent first pads 111/the insulating layer between the second pads 121 and the adjacent second pads 121/the insulating layer between the electrical connection terminals 131 and the insulating layer between the adjacent electrical connection terminals 131 may be formed by a deposition process.

The first protective layer 110, and/or the second protective layer 120, and/or the third protective layer 130 may include one or more layers.

The wafer may be thinned from the back side prior to dicing to reduce the thickness of the first die 11 and/or the second die 12.

There may be a plurality of first through openings 103 and second through openings 104 in the pre-wiring substrate 10, and elements to be electrically connected may be placed in each through opening 103, 104.

The pre-wiring substrate 10 includes pre-wiring lines 100 and an insulating material filled between the pre-wiring lines 100.

In this embodiment, referring to fig. 3, the pre-wiring substrates 10 of the groups of packages 3 are separated, and in some embodiments, the pre-wiring substrates 10 of the groups of packages 3 may be connected together.

The carrier plate 2 is a hard plate and may include a plastic plate, a glass plate, a ceramic plate, a metal plate, or the like.

The thickness of the passive device 13 is generally less than the thickness of the first die 11, and thus the thickness of the passive device 13 is less than the thickness of each of the pre-wiring substrate 10 and the first die assembly 20.

In some embodiments, the thickness of the pre-wiring substrate 10 is less than the thickness of the die stack. When the plurality of groups of to-be-packaged components 3 are arranged on the surface of the carrier plate 2, one scheme may include:

a) The active surfaces 13a of the passive devices 13 face the carrier plate 2, and the passive devices 13 are arranged on the carrier plate 2; specifically, an entire adhesive layer may be coated on the surface of the carrier plate 2, and a plurality of passive devices 13 may be disposed on the adhesive layer;

b) The front face 10a of the plurality of pre-wiring substrates 10 faces the carrier plate 2, the second through opening 104 of each pre-wiring substrate 10 is aligned with one passive device 13, and then the plurality of pre-wiring substrates 10 are arranged on the carrier plate 2;

c) The first protection layers 110 on the first dies 11 face another carrier, the first dies 11 are arranged on the other carrier, the second protection layers 120 on the second dies 12 face another carrier, the second dies 12 are arranged on the other carrier, and specifically, a whole adhesive layer can be coated on the surfaces of the two carriers; an adhesive layer is arranged on the back surfaces 11b of the first bare chips 11 and/or the back surfaces 12b of the second bare chips 12, the two carrier plates are combined, and the back surfaces 11b of the first bare chips 11 and the back surfaces 12b of the second bare chips 12 are adhered together to form a bare chip stacking structure; removing the other carrier plate;

d) The die stacking structure faces the first through opening 103 of the pre-wiring substrate 10, the carrier plate is combined with the carrier plate 2, and the die stacking structure is fixed on the carrier plate 2 at the bottom of the through opening 103; the further carrier plate is removed.

C) The step and the step a) are not sequential, and can be performed simultaneously; c) The steps are not sequential, and can be performed simultaneously.

The bonding layer on the surface of each carrier plate can be made of easily-stripped materials so as to strip the corresponding carrier plate. For example, a thermal separation material which can be made to lose tackiness by heating or a UV separation material which can be made to lose tackiness by ultraviolet irradiation can be used.

In another scheme, the steps a) and b) are performed first; next, in the step c), the first protection layers 110 on the first dies 11 are first fixed on the carrier 2 toward the first through openings 103 of the pre-wiring substrate 10; then, the carrier plate with the plurality of second bare chips 12 arranged thereon is combined with the carrier plate 2, and the back surface 11b of the first bare chip 11 is bonded with the back surface 12b of the second bare chip 12 to form a bare chip stacking structure; the carrier plate carrying the plurality of second dies 12 is removed.

In yet another embodiment, step a) is performed first; next, the first protection layers 110 on the first dies 11 face the carrier 2, and the first dies 11 are arranged on the carrier 2; next, the front surfaces 10a of the plurality of pre-wiring substrates 10 face the carrier plate 2, the first through opening 103 of each pre-wiring substrate 10 is aligned with one first die 11, the second through opening 104 is aligned with one passive device 13, and the plurality of pre-wiring substrates 10 are arranged on the carrier plate 2; then, the carrier plate with the plurality of second bare chips 12 arranged thereon is combined with the carrier plate 2, and the back surface 11b of the first bare chip 11 is bonded with the back surface 12b of the second bare chip 12 to form a bare chip stacking structure; the carrier plate carrying the plurality of second dies 12 is removed.

In some embodiments, the thickness of the pre-wiring substrate 10 is greater than the thickness of the die stack. When the plurality of groups of to-be-packaged components 3 are arranged on the surface of the carrier plate 2, one scheme may include: firstly, carrying out the step a) and the step c), after the step c), leading the die stacking structure to face the carrier plate 2, enabling the carrier plate carrying the die stacking structure to be combined with the carrier plate 2, arranging the die stacking structure on the carrier plate 2, and removing the carrier plate carrying the die stacking structure originally; next, the first through opening 103 of the pre-wiring substrate 10 is aligned with the die stack structure, the second through opening 104 is aligned with the passive device 13, and the pre-wiring substrate 10 is fixed to the carrier plate 2.

The group of to-be-packaged components 3 are positioned in a region on the surface of the carrier plate 2, so that the subsequent cutting is facilitated. The carrier plate 2 is fixed with a plurality of groups of to-be-packaged components 3 on the surface so as to manufacture a plurality of MCM packaging structures 1 at the same time, thereby being beneficial to mass production and cost reduction.

Next, referring to step S2 in fig. 2 and fig. 5, a plastic layer 14 is formed on the surface of the carrier 2 to embed each group of the packages 3; referring to fig. 6, the plastic layer 14 is thinned until the second protective layer 120 and the back surface 10b of the pre-wiring substrate 10 are exposed.

The material of the plastic layer 14 may be epoxy resin, polyimide resin, benzocyclobutene resin, polybenzoxazole resin, polybutylene terephthalate, polycarbonate, polyethylene terephthalate, polyethylene, polypropylene, polyolefin, polyurethane, polyolefin, polyethersulfone, polyamide, polyurethane, ethylene-vinyl acetate copolymer, polyvinyl alcohol, or the like. The material of the plastic layer 14 may also be various polymers or a composite of resin and polymer. Correspondingly, the packaging can be performed by filling liquid plastic packaging material among each first die assembly 20, each passive device 13 and each pre-wiring substrate 10, and then curing the liquid plastic packaging material at a high temperature through a plastic packaging mold. In some embodiments, the plastic layer 14 may be formed by molding a plastic material such as hot press molding or transfer molding.

The molding layer 14 may include opposite front and back faces 14a, 14b.

Referring to fig. 6, the plastic layer 14 is thinned from the back surface 14b, and may be mechanically polished, for example, by grinding with a grinding wheel.

Specifically, when the thickness of the pre-wiring substrate 10 is smaller than the thickness of the first die assembly 20 while the plastic sealing layer 14 is thinned, the second protective layer 120 has been removed by a partial height when the back surface 10b of the pre-wiring substrate 10 is exposed; when the thickness of the pre-wiring substrate 10 is greater than the thickness of the first die assembly 20, the back surface 10b of the pre-wiring substrate 10 has been removed by a partial height when the second protective layer 120 is exposed.

The second protective layer 120 may prevent the second pad 121, the second die 12, and the electrical interconnect structures and devices within the first die 11 from being damaged during the formation of the molding layer 14 and the grinding of the molding layer 14; the first protection layer 110 may stress buffer the first pad 111; the third protection layer 130 may stress buffer the electrical connection terminal 131.

This step forms a plastic package of each group of packages 3.

Next, referring to step S3 in fig. 2 and fig. 7, a second opening 120a is formed in the second protection layer 120 to expose the second pad 121; forming second conductive traces 16 on the second protective layer 120, the second pads 121, the backside electrical connection points 102, and the backside 14b of the molding layer 14 to electrically connect the second die 12 in the group with the pre-routing lines 100; a second dielectric layer 19 is formed embedding the second conductive trace 16.

In this embodiment, the second conductive trace 16 comprises a layer. Forming the second conductive trace 16 includes the following steps S31-S38.

Step S31: a photoresist layer is formed on the second protective layer 120 of each second die 12, the back surface 10b of each pre-wiring substrate 10, and the back surface 14b of the molding layer 14.

In this step S31, in an alternative, the photoresist layer formed may be a photosensitive film. The photosensitive film may be peeled off from the adhesive tape and applied on the second protective layer 120 of each second die 12, the back surface 10b of each pre-wiring substrate 10, and the back surface 14b of the plastic sealing layer 14. Alternatively, the photoresist layer may be formed by coating a liquid photoresist and then curing by heating.

Step S32: the photoresist layer is exposed and developed to form a patterned photoresist layer.

This step S32 patterns the photoresist layer. In other alternatives, other easily removable sacrificial materials may be used in place of the photoresist layer.

Step S33: the second protective layer 120 is dry etched or wet etched using the patterned photoresist layer as a mask to form a plurality of second openings 120a to expose a partial region of each second pad 121. A second opening 120a may expose a partial region of a second pad 121. In other embodiments, one second opening 120a may also expose a partial area of two or more second pads 121.

The material of the second protective layer 120 is a laser-reactive material, such as epoxy, and the second opening 120a can be formed by denaturing the material by laser irradiation. For the second protection layer 120 made of a photosensitive material, such as polyimide, the second opening 120a may be formed by exposing and developing. As for the material of the second protective layer 120, a material that can be dry-etched or wet-etched, such as silicon dioxide, silicon nitride, or the like, the second opening 120a can be formed by dry-etchable or wet-etchable.

Step S34: ashing removes the remaining photoresist layer.

Step S35: a photoresist layer is formed on the second protective layer 120 of each second die 12, the second pads 121 exposed by the second protective layer 120, the back surface 10b of each pre-wiring substrate 10, and the back surface 14b of the molding layer 14.

The method of forming the photoresist layer may refer to the method of forming the photoresist layer in step S31.

Step S36: the photoresist layer is exposed and developed, and the photoresist layer is maintained in a first predetermined area, which is complementary to the area where the metal pattern block 16a of the second conductive trace 16 to be formed is located.

Step S37: the metal layer is filled in the complementary region of the first predetermined region to form a metal pattern block 16a of the second conductive trace 16.

The partial number of metal pattern blocks 16a are positioned so as to electrically connect the backside electrical connection points 102 with the second pads 121 to achieve electrical connection of the pre-wiring substrate 10 with the second die 12. The partial number of metal pattern blocks 16a are positioned so as to electrically connect a plurality of back side electrical connection points 102 to achieve a circuit layout or electrical conduction of the back side electrical connection points 102. In addition, there may be a partial number of metal pattern blocks 16a positioned so as to electrically connect a plurality of second pads 121 to realize circuit layout or electrical conduction of the second pads 121.

This step S37 may be accomplished using an electroplating process. The copper or aluminum electroplating process is mature.

Specifically, before forming the photoresist layer in step S35, a seed layer (SEED LAYER) may be formed on the second protection layer 120 of each second die 12, the second pad 121 exposed by the second protection layer 120, the back surface 10b of each pre-wiring substrate 10, and the back surface 14b of the plastic layer 14 by physical vapor deposition or chemical vapor deposition. The seed layer may serve as a power supply layer for electroplating copper or aluminum.

Electroplating may include electrolytic plating or electroless plating. In the electrolytic plating, a piece to be plated is taken as a cathode, and the electrolyte is electrolyzed, so that a layer of metal is formed on the piece to be plated. Electroless plating is a method of forming a metal layer on a member to be plated by reducing and precipitating metal ions in a solution. In some embodiments, the metal pattern block 16a may be formed by sputtering and etching.

Step S38: ashing removes the photoresist layer remaining in the first predetermined area.

And after ashing, removing the seed crystal layer in the first preset area through dry etching or wet etching.

The metal pattern block 16a of the second conductive trace 16 may be planarized on the upper surface by a polishing process, such as chemical mechanical polishing.

It should be noted that, in the present step S3, the metal pattern blocks 16a of the second conductive traces 16 are arranged according to design requirements, and the distributions of the second conductive traces 16 in the different groups of packages 3 may be the same or different.

Furthermore, in some embodiments, the second conductive trace 16 may also include two or more layers, i.e., have two or more metal pattern layers.

In the step of forming the second dielectric layer 19, in order to prevent the process from scratching the molding layer 14, the second dielectric layer 19 may be formed on the back surface 14b of the molding layer 14.

The second dielectric layer 19 is an insulating material, and may be an organic polymer insulating material, an inorganic insulating material, or a composite material. The organic high molecular polymer insulating material is polyimide, epoxy resin, ABF (Ajinomoto buildup film), PBO (Polybenzoxazole), organic polymer film or other organic material with similar insulating property, etc. The composite material is an inorganic-organic composite material, and can be an inorganic-organic polymer composite material, such as SiO ₂/resin polymer composite material.

The organic high molecular polymer insulating material may be laminated on the second conductive trace 16 and the second protective layer 120 not covered with the second conductive trace 16, the back surface 10b of the pre-wiring substrate 10, and the back surface 14b of the molding layer 14 by a) lamination process, or b) coated on the second conductive trace 16 and the second protective layer 120 not covered with the second conductive trace 16, the back surface 10b of the pre-wiring substrate 10, and the back surface 14b of the molding layer 14 first, post-cured, or c) cured on the second conductive trace 16 and the second protective layer 120 not covered with the second conductive trace 16, the back surface 10b of the pre-wiring substrate 10, and the back surface 14b of the molding layer 14 by an injection molding process.

When the material of the second dielectric layer 19 is an inorganic insulating material such as silicon dioxide or silicon nitride, the second conductive trace 16 and the second protective layer 120 not covering the second conductive trace 16, the back surface 10b of the pre-wiring substrate 10, and the back surface 14b of the molding layer 14 may be formed by a deposition process.

Compared with the inorganic insulating material, the organic high polymer insulating material has smaller tensile stress, and can prevent the plastic package from warping when the second dielectric layer 19 is formed in a large area.

The second dielectric layer 19 may include one or more layers.

Thereafter, referring to step S4 in fig. 2 and fig. 8, the carrier 2 is removed, exposing the active surface 11a of the first die 11, the active surface 13a of the passive device 13, the front surface 10a of the pre-wiring substrate 10, and the front surface 14a of the molding layer 14; first conductive traces 15 are formed on the first pads 111, the electrical connection terminals 131, the front side electrical connection points 101, and the front side 14a of the molding layer 14 to electrically connect the first die 11, the passive devices 13, and the pre-wiring lines 100 within the group.

Referring to fig. 8, after removing the carrier plate 2, the first support plate 4 may be disposed on the second dielectric layer 19.

The carrier plate 2 may be removed by conventional removal methods such as laser lift-off and UV irradiation.

The first support plate 4 may serve as a support during subsequent steps of forming the first conductive tracks 15, and/or forming the conductive bumps 17, and/or forming the first dielectric layer 18.

The first support plate 4 is a hard plate and may include a glass plate, a ceramic plate, a metal plate, etc.

In this embodiment, since the active surface 11a exposing the first die 11 is provided with the first protection layer 110, and the active surface 13a of the passive device 13 is provided with the third protection layer 130, the first protection layer 110 and the third protection layer 130 are exposed after the carrier 2 is removed. Before the first conductive trace 15 is fabricated, a first opening 110a is formed in the first protection layer 110 to expose the first pad 111, and a third opening 130a is formed in the third protection layer 130 to expose the electrical connection terminal 131.

The first protection layer 110/the third protection layer 130 is made of a laser-reactive material, such as epoxy, and the first opening 110 a/the third opening 130a can be formed by laser irradiation to be denatured. For the first protection layer 110/third protection layer 130, which is made of a photosensitive material, such as polyimide, the first opening 110 a/third opening 130a may be formed by exposing and then developing. As for the material of the first protective layer 110/the third protective layer 130, a dry-etchable or wet-etchable material, such as silicon dioxide, silicon nitride, or the like, the first opening 110 a/the third opening 130a may be formed by dry-etchable or wet-etchable.

In some embodiments, in the multiple groups of packages 3 in step S1, specifically, in the first die assembly 20 and/or the passive device 13, the first protection layer 110 may have a first opening 110a exposing the first pad 111, and/or the third protection layer 130 may have a third opening 130a exposing the electrical connection terminal 131.

The method of forming the metal pattern block 15a in the first conductive trace 15 may refer to the method of forming the metal pattern block 16a in the second conductive trace 16. The layout of the first conductive trace 15 may be according to a predetermined layout.

In this embodiment, the first conductive trace 15 comprises a layer.

A partial number of metal pattern blocks 15a selectively electrically connect the front-side electrical connection points 101 with the first pads 111 to achieve electrical connection of the pre-wiring substrate 10 with the first die 11; a partial number of metal pattern blocks 15a selectively electrically connect the front-side electrical connection points 101 with the electrical connection terminals 131 to achieve electrical connection of the pre-wiring substrate 10 with the passive devices 13; a partial number of the metal pattern blocks 15a are selectively electrically connected to the front-side electrical connection points 101 to draw out the front-side electrical connection points 101 through the conductive bumps 17. In addition, a part of the metal pattern blocks 15a can be selectively and electrically connected with a plurality of front-side electrical connection points 101, so as to realize the circuit layout or electrical conduction of the front-side electrical connection points 101; there may also be a partial number of metal pattern blocks 15a selectively electrically connecting a plurality of first pads 111 to realize circuit layout or electrical conduction of the first pads 111.

In other embodiments, the first conductive trace 15 may include two or more metal pattern layers.

Next, referring to step S5 in fig. 2 and fig. 8, a conductive bump 17 is formed on the first conductive trace 15, and a first dielectric layer 18 is formed to encapsulate the first conductive trace 15 and the conductive bump 17, and the conductive bump 17 is exposed outside the first dielectric layer 18.

This step S5 may include steps S51-S55.

Step S51: a photoresist layer is formed on the metal pattern block 15a, the insulating material layer exposed from the front surface 10a of the pre-wiring substrate, and the front surface 14a of the molding layer 14.

In this step S51, in an alternative, the photoresist layer formed may be a photosensitive film. The photosensitive film may be peeled off from the adhesive tape and applied to the metal pattern block 15a, the insulating material layer exposed from the front surface 10a of the pre-wiring substrate, and the front surface 14a of the molding layer 14. Alternatively, the photoresist layer may be formed by coating a liquid photoresist and then curing by heating.

Step S52: the photoresist layer is exposed and developed, and the photoresist in the second preset area is reserved. The second predetermined region is complementary to the region where the conductive bump 17 is to be formed.

This step S52 patterns the photoresist layer. In other alternatives, other easily removable sacrificial materials may be used in place of the photoresist layer.

Step S53: and filling the complementary region of the second predetermined region with a metal layer to form the conductive bump 17.

This step S53 may be accomplished using an electroplating process. The copper or aluminum electroplating process is mature. A seed layer (SEED LAYER) may also be deposited by physical vapor deposition or chemical vapor deposition as a power supply layer prior to copper or aluminum plating.

Step S54: ashing removes the photoresist layer remaining in the second predetermined area.

The conductive bump 17 may be planarized by a polishing process, such as chemical mechanical polishing.

Step S55: referring to fig. 8, a first dielectric layer 18 is formed on the conductive bump 17, the metal pattern block 15a, the insulating material layer exposed from the front surface 10a of the pre-wiring substrate, and the front surface 14a of the molding layer 14; the first dielectric layer 18 is thinned until the conductive bump 17 is exposed.

The material and forming method of the first dielectric layer 18 may refer to the material and forming method of the second dielectric layer 19.

In the step of forming the first dielectric layer 18, in order to prevent the process from scratching the molding layer 14, the first dielectric layer 18 may be formed on the front surface 14a of the molding layer 14 between adjacent groups of the packages 3.

When the first dielectric layer 18 covers the conductive bump 17, the first dielectric layer 18 is polished until the conductive bump 17 is exposed.

The first dielectric layer 18 may include one or more layers.

After the conductive bump 17 is fabricated, in a) alternative, referring to fig. 8, the conductive bump 17 serves as an external connection terminal of the MCM package structure 1.

B) Alternatively, after the conductive bump 17 is exposed, an oxidation-resistant layer is formed on the conductive bump 17.

The oxidation resistant layer may include: b1 Tin layer, or b 2) nickel layer and gold layer stacked from bottom to top, or b 3) nickel layer, palladium layer and gold layer stacked from bottom to top. The oxidation resistant layer may be formed using an electroplating process. The material of the conductive bump 17 may be copper, and the oxidation-resistant layer may prevent oxidation of copper, thereby preventing deterioration of electrical connection performance due to oxidation of copper.

C) Alternatively, after exposing the conductive bump 17, a solder ball is formed on the conductive bump 17 for flip-chip mounting of the MCM package structure 1 (see fig. 1).

After the conductive bump 17 is formed, the first support plate 4 is removed as shown with reference to fig. 9.

The first support plate 4 may be removed by conventional removal methods such as laser lift-off and UV irradiation.

Thereafter, referring to step S6 in fig. 2, fig. 9 and fig. 1, a plurality of MCM package structures 1 are formed by dicing, and each MCM package structure 1 includes a group of packages 3 to be packaged.

For the embodiment in which the pre-wiring substrates 10 of the respective sets of packages 3 are connected together, the pre-wiring substrates 10 are cut in the dicing process of this step S6.

In the MCM package structure 1 formed through the above steps, on one hand, the first die assemblies 20 with the active surfaces facing away from each other achieve the effect of small volume and compact structure of the MCM package structure 1. On the other hand, by the pre-wiring substrate 10, not only the electrical connection between the first die 11, the second die 12 and the passive device 13 is realized, but also the wiring on both sides of the front surface 14a and the back surface 14b of the molding layer 14 is realized, and the wiring density can be improved compared with the wiring on only one side, so that the MCM package structure 1 with more complicated wiring and smaller volume can be formed.

The benefits of using the pre-wiring substrate 10 are: first, transferring fine wires in the rewiring layer to the pre-wiring substrate 10 reduces the probability of shorting, increases product yield, and reduces the number of layers of the first conductive trace 15 and/or the second conductive trace 16, reducing process complexity. Second, providing a pre-formed pre-wiring substrate 10 allows testing of the pre-wiring substrate 10 prior to packaging, avoiding the use of a known defective pre-wiring substrate 10. Third, the pre-wiring substrate 10 is a pre-fabricated substrate, and the manufacturing process is performed independently of the packaging process, so that the packaging time of the whole packaging process can be saved.

A second embodiment of the present invention provides another method of fabricating the MCM package structure 1 of fig. 1. Fig. 10 is a flow chart of a method of fabrication. Fig. 11 and 12 are intermediate structure diagrams corresponding to the flow in fig. 10.

Referring to fig. 10 and 2, the manufacturing method of the present embodiment is substantially the same as that of the embodiment shown in fig. 2, and differs only in that:

Step S2', referring to FIG. 5, a plastic layer 14 for embedding each group of the to-be-packaged components 3 is formed on the surface of the carrier plate 2;

step S3', referring to fig. 11, the carrier 2 is removed, exposing the active surface 11a of the first die 11, the active surface 13a of the passive device 13, the front surface 10a of the pre-wiring substrate 10, and the front surface 14a of the molding layer 14; forming first conductive traces 15 on the first pads 111, the electrical connection terminals 131, the front side electrical connection points 101, and the front side 14a of the molding layer 14 to electrically connect the first die 11, the passive devices 13, and the pre-wiring lines 100 within the group;

step S4', continuing to refer to fig. 11, forming a conductive bump 17 on the first conductive trace 15 and forming a first dielectric layer 18 embedding the first conductive trace 15 and the conductive bump 17, wherein the conductive bump 17 is exposed outside the first dielectric layer 18;

Step S5', referring to fig. 12, the plastic sealing layer 14 is thinned until the second protective layer 120 and the back surface 10b of the pre-wiring substrate 10 are exposed; forming a second opening 120a in the second protective layer 120 to expose the second pad 121; forming second conductive traces 16 on the second protective layer 120, the second pads 121, the backside electrical connection points 102, and the backside 14b of the molding layer 14 to electrically connect the second die 12 in the group with the pre-routing lines 100; a second dielectric layer 19 is formed embedding the second conductive trace 16.

Step S2 'may refer to step S2 of the foregoing embodiment, step S3' may refer to step S4 of the foregoing embodiment, step S4 'may refer to step S5 of the foregoing embodiment, and step S5' may refer to steps S2 and S3 of the foregoing embodiment.

Specifically, in this step 3', referring to fig. 11, after removing the carrier plate 2, the first support plate 4 may be disposed on the back surface 14b of the plastic layer 14; removing the first support plate 4 after the step S4' is completed, and disposing a second support plate 5 on the conductive bump 17 and the first dielectric layer 18; after the end of step S5', the second support plate 5 is removed.

In other words, the carrier 2 is removed first to form the first conductive trace 15, the conductive bump 17, and the first dielectric layer 18 embedding the first conductive trace 15 and the conductive bump 17; and a second supporting plate 5 is arranged on the first dielectric layer 18 and the conductive bump 17, and the plastic sealing layer 14 is thinned to form a second conductive trace 16 and a second dielectric layer 19.

In some embodiments, the plastic sealing layer 14 may be thinned in step S2'.

Fig. 13 is a schematic cross-sectional structure of an MCM package structure according to a third embodiment of the present invention. Referring to fig. 13, the MCM package structure 6 in the present embodiment is substantially the same as the MCM package structure 1 of the foregoing embodiment, except that: the active surface 11a of the first die 11, the active surface 13a of the passive device 13, the front surface 10a of the pre-wiring substrate 10, and the front surface 14a of the molding layer 14 are provided with a third dielectric layer 21, omitting the first protective layer 110 and the third protective layer 130; the third dielectric layer 21 has a fourth opening 21a exposing the first pad 111, the electrical connection terminal 131 and the front electrical connection point 101; the first conductive trace 15 is located on the first pad 111, the electrical connection 131, the front side electrical connection point 101, and the third dielectric layer 21.

Accordingly, the manufacturing method is different from the two embodiments described above in that: in step S4/S3', after removing the carrier plate 2 and exposing the active surface 11a of the first die 11, the active surface 13a of the passive device 13, the front surface 10a of the pre-wiring substrate 10, and the front surface 14a of the molding layer 14: forming a third dielectric layer 21 on the exposed active surface 11a of the first die 11, the active surface 13a of the passive device 13, the front surface 10a of the pre-wiring substrate 10, and the front surface 14a of the molding layer 14; forming a plurality of fourth openings 21a in the third dielectric layer 21, the fourth openings 21a exposing the first pads 111, the electrical connection terminals 131 and the front electrical connection points 101; a first conductive trace 15 is then formed on the first pad 111, the electrical connection 131, the front side electrical connection 101, and the third dielectric layer 20.

The material of the third dielectric layer 21 refers to the materials of the first dielectric layer 18 and the second dielectric layer 19.

The material of the third dielectric layer 21 is a laser-reactive material, such as epoxy resin, and the fourth opening 21a can be formed by denaturing the material by laser irradiation. For the material of the third dielectric layer 21, which is a photosensitive material, such as polyimide, the fourth opening 21a may be formed by exposing and then developing. The fourth opening 21a may be formed by dry-etchable or wet-etchable material for the third dielectric layer 21, such as silicon dioxide, silicon nitride, or the like.

Fig. 14 is a schematic cross-sectional structure of an MCM package structure according to a fourth embodiment of the present invention. Referring to fig. 14, the MCM package structure 7 in the present embodiment is substantially the same as the MCM package structures 1, 6 of the foregoing embodiments, except that: the conductive bump 17 is connected to the second conductive trace 16; correspondingly, the second dielectric layer 19 embeds the second conductive trace 16 and the conductive bump 17, the conductive bump 17 is exposed outside the second dielectric layer 19, and the first dielectric layer 18 embeds the first conductive trace 15.

Accordingly, the manufacturing method is different from the foregoing three embodiments in that: in step S3/S5', after forming the second conductive trace 16, forming a conductive bump 17 on the second conductive trace 16 and forming a second dielectric layer 19 embedding the second conductive trace 16 and the conductive bump 17, wherein the conductive bump 17 is exposed outside the second dielectric layer 19; in step S5/S4', a first dielectric layer 18 is formed embedding the first conductive trace 15.

Fig. 15 is a schematic cross-sectional structure of an MCM package structure according to a fifth embodiment of the present invention. Referring to fig. 15, the MCM package structure 8 in this embodiment is substantially the same as the MCM package structures 1, 6, 7 and the manufacturing methods thereof of the foregoing embodiments, and differs only in that: the first die assembly 20 is replaced with a die, for example, with the first die 11. Accordingly, the conductive bump 17 is connected to the rear electrical connection point 102. The conductive bump 17 is exposed outside the second dielectric layer 19, and the first dielectric layer 18 encapsulates the conductive trace 15.

In other embodiments, the first die assembly 20 may be replaced with the second die 12, or with a second die assembly that includes a plurality of first dies 11, or a plurality of second dies 12. In other words, in the second die assembly, the active faces of the dies are the same.

Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.

Claims

1. An MCM package structure, comprising:

A conductive bump connected to the first conductive trace;

A second dielectric layer embedding the second conductive trace.

2. The MCM package structure of claim 1, wherein the first die assembly is a die stack structure.

3. The MCM package structure of claim 1, wherein the conductive bump connection to the first conductive trace is replaced with: the conductive bump is connected to the second conductive trace; correspondingly, the second dielectric layer embeds the second conductive trace and the conductive bump, the conductive bump is exposed outside the second dielectric layer, and the first dielectric layer embeds the first conductive trace.

4. The MCM package structure of claim 1, further comprising: a third dielectric layer located on the active surface of the first bare chip, the active surface of the passive device, the front surface of the pre-wiring substrate and the front surface of the plastic sealing layer; the third dielectric layer exposes the first bonding pad, the electric connection end and the front electric connection point; the first conductive trace is located on the first pad, the electrical connection terminal, the front side electrical connection point, and the third dielectric layer.

5. The MCM package structure of claim 1, further comprising: a first protection layer covering the active surface of the first die, the first protection layer exposing the first bonding pad; the front surface of the plastic layer exposes the first protective layer and the first bonding pad.

6. The MCM package structure of claim 1, wherein the material of the second protective layer is an organic high molecular polymer insulating material, an inorganic insulating material, or a composite material; and/or the material of the first dielectric layer is an organic high polymer insulating material or an inorganic insulating material or a composite material; and/or the material of the second dielectric layer is an organic high polymer insulating material, an inorganic insulating material or a composite material.

7. The manufacturing method of the MCM packaging structure is characterized by comprising the following steps of:

8. The method of fabricating a MCM package structure according to claim 7, wherein after the step of forming a second conductive trace, forming a conductive bump on the second conductive trace and forming a second dielectric layer embedding the second conductive trace and the conductive bump, the conductive bump being exposed outside the second dielectric layer; forming a conductive bump on the first conductive trace and forming a first dielectric layer embedding the first conductive trace and the conductive bump, wherein the conductive bump is exposed outside the first dielectric layer and replaced by: a first dielectric layer is formed embedding the first conductive trace.

9. The method of manufacturing an MCM package according to claim 7, wherein the carrier is removed first to form the first conductive trace, the conductive bump, and the first dielectric layer embedding the first conductive trace and the conductive bump; and then, a supporting plate is arranged on the first dielectric layer and the conductive bump, and the plastic sealing layer is thinned to form the second conductive trace and the second dielectric layer.

10. The method of fabricating a MCM package structure of claim 7 wherein after removing the carrier, forming a third dielectric layer on the exposed active surface of the first die, the active surface of the passive device, the front surface of the pre-wiring substrate, and the front surface of the molding layer; forming a plurality of fourth openings in the third dielectric layer, wherein the fourth openings expose the first bonding pads, the electric connection ends and the front surface electric connection points; the first conductive trace is formed on the first pad, the electrical connection terminal, the front side electrical connection point, and the third dielectric layer.

11. The method of fabricating a MCM package structure of claim 7 wherein in the first die assembly, the active side of the first die is covered with a first protective layer; the first protection layer faces the carrier plate; the first protective layer is provided with a first opening exposing the first bonding pad, or after the step of removing the carrier plate and before the step of forming the first conductive trace, a first opening is formed in the first protective layer so as to expose the first bonding pad;

12. The method of manufacturing an MCM package according to any one of claims 7 to 11, wherein the pre-wiring substrates of the respective sets of the packages to be packaged are connected together, and the dicing is performed in the step of forming a plurality of MCM packages.

13. An MCM package structure, comprising:

a conductive bump connected to the back electrical connection point;

A first dielectric layer embedding the conductive trace; and

14. The MCM package structure of claim 13, wherein a second die assembly replaces the die, the second die assembly including a plurality of dies, the active faces of the plurality of dies being the same.

15. The manufacturing method of the MCM packaging structure is characterized by comprising the following steps of:

16. The method of fabricating an MCM package structure of claim 15 wherein a second die assembly replaces the die, the second die assembly including a plurality of dies having active faces that are the same.