CN114385335A - Method, device, device and storage medium for using interrupt resources - Google Patents

Abstract

The embodiment of the invention provides a method, a device, equipment and a storage medium for using interrupt resources, and relates to the technical field of computers. The method comprises the following steps: constructing a first corresponding relation between hardware interrupt resources and an index value and a second corresponding relation between GPIO pin identification and the index value; loading the first corresponding relation and the second corresponding relation when the OS is started every time; when the OS receives the user application, the OS finds a target index value from the second corresponding relation according to a target GPIO pin identifier carried in the application; and finding the hardware interrupt resource corresponding to the target index value from the first corresponding relation. In the invention, the definition of the index value is not limited by whether the hardware interrupt resources are multiplexed or not in some mechanisms or whether the hardware interrupt resources are continuous or not in multiplexing conditions, so that the corresponding relation between the GPIO pin identifier and the hardware interrupt resources can be converted into the first corresponding relation and the second corresponding relation for definition and transmission, thereby realizing the use of the multiplexed and discrete hardware interrupt resources under different mechanisms.

Description

Method, device, device and storage medium for using interrupt resources

technical field

The present invention relates to the field of computer technology, and in particular, to a method for using interrupt resources, a device for using interrupt resources, an electronic device, and a storage medium.

Background technique

At present, computers basically have GPIO (General-purpose input/output, general-purpose input and output) ports. Users (that is, developers) can realize diversified functional designs through GPIO ports. For example, GPIO ports can be used as inputs for triggering interrupts. port, thereby triggering the OS (Operating System, operating system) to perform interrupt processing.

The GPIO controller is a control circuit that controls the input or output of the GPIO port according to the settings. There are multiple GPIO pins on the GPIO controller. At present, computer manufacturers usually have different designs and use methods for the GPIO controller. In practical applications, the use of the GPIO controller is very flexible, and there are often diversified customized uses of the GPIO interrupt resources, which brings inconvenience to the use of the GPIO interrupt resources.

In some specific scenarios, due to the limited number of pins of the interrupt controller, there may be multiple GPIO pins multiplexing one input pin of the interrupt controller, and in the case of multiplexing the interrupt controller pins, It may also be necessary to further implement discrete multiplexing of GPIO interrupt resources for the multiplexed interrupt controller pins, that is, each GPIO pin that multiplexes the same interrupt controller pin is not a GPIO pin identified continuously.

However, in the use mechanism of some interrupt resources, multiplexed and discrete GPIO interrupt resources cannot be passed to the OS, and only non-multiplexed or multiplexed and continuous (that is, multiplexed interrupt controller same input pin of each input pin) can be passed. GPIO pins are GPIO interrupt resources that identify consecutively numbered GPIO pins), so that GPIO interrupt service customization cannot be performed for the case where GPIO interrupt resources are multiplexed and discrete.

SUMMARY OF THE INVENTION

In view of the above problems, embodiments of the present invention are proposed to provide a method for using interrupt resources that overcomes the above problems or at least partially solves the above problems, so that in different architectures that can deliver interrupt resources, multiplexing of GPIO interrupt resources is possible And in discrete cases, GPIO interrupt service customization is performed.

Correspondingly, the embodiments of the present invention also provide a device for using interrupt resources, an electronic device, and a storage medium, so as to ensure the implementation and application of the above method.

In order to solve the above problems, an embodiment of the present invention discloses a method for using interrupt resources, including:

In the kernel of firmware or operating system, construct the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and the second correspondence between the GPIO pin identification and the index value;

After completing the construction, load the first correspondence and the second correspondence each time the operating system is started;

When receiving the user application for obtaining the interrupt resource corresponding to the target GPIO pin identifier, according to the target GPIO pin identifier carried in the user application, from the second correspondence, parse and obtain the target GPIO The target index value corresponding to the pin identification;

From the first correspondence, the target hardware interrupt resource corresponding to the target index value is obtained by parsing.

Optionally, in the kernel of the firmware or the operating system, the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and the relationship between the GPIO pin identification and the index value are constructed. The steps of the second correspondence include:

In the firmware, through the advanced configuration and power management interface table, the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource is constructed in the device information of the GPIO controller, and the GPIO pin identification and all the second correspondence between the index values, wherein each GPIO pin of the GPIO controller is electrically connected to the interrupt controller;

The step of loading the first correspondence and the second correspondence includes:

The advanced configuration and power management interface table is loaded from the firmware to obtain the first correspondence and the second correspondence from device information of the GPIO controller.

Optionally, in the kernel of the firmware or the operating system, the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and the relationship between the GPIO pin identification and the index value are constructed. The steps of the second correspondence include:

In the kernel of the firmware or the operating system, through the device tree, the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource is constructed in the device information of the GPIO controller, and the GPIO pin identifier and all the second correspondence between the index values, wherein each GPIO pin of the GPIO controller is electrically connected to the interrupt controller;

The step of loading the first correspondence and the second correspondence includes:

The device tree is loaded from the firmware or the kernel to obtain the first correspondence and the second correspondence from device information of the GPIO controller.

Optionally, the step of constructing the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and the second correspondence between the GPIO pin identifier and the index value, includes:

Each hardware interrupt resource is used as a first array element, the index value of the hardware interrupt resource is represented by the array subscript of the first array element, and the first array in which the hardware interrupt resource and the index value are in a one-to-one correspondence is constructed. an array;

Each GPIO pin identifier is represented by the array subscript of the second array element, and each of the index values is used as the second array element to construct a second array in which the index value and the GPIO pin identifier are in a one-to-one correspondence. array.

Optionally, each GPIO pin identifier is represented by the array subscript of the second array element, each of the index values is used as the second array element, and the index value and the GPIO pin identifier are constructed to be the same. A step corresponding to the second array of relationships, comprising:

For any of the GPIO pin identifications, in the case that the GPIO pin corresponding to the GPIO pin identification is not connected to any input pin in the interrupt controller, the GPIO pin identification is represented as the second The second array element corresponding to the array subscript of the array element is filled with the illegal value of the array subscript of the first array element.

Optionally, after the completion of the construction, each time the operating system is started, after loading the first correspondence and the second correspondence, the method further includes:

A mapping relationship between each of the hardware interrupt resources and software interrupt resources is constructed.

Optionally, after obtaining the target hardware interrupt resource corresponding to the target index value by parsing from the first correspondence, the method further includes:

performing interrupt mapping on the target hardware interrupt resource according to the mapping relationship to obtain a target software interrupt resource corresponding to the target hardware interrupt resource;

The target software interrupt resource is returned to the development software that applies for the user, so that the user can customize an interrupt routine according to the target software interrupt resource.

Optionally, one of the hardware interrupt resources includes the pin number of an input pin on the interrupt controller to which the GPIO pin is connected.

The embodiment of the present invention also discloses a device for using interrupt resources, including:

The first building module is used to construct, in the kernel of the firmware or the operating system, the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and between the GPIO pin identification and the index value The second correspondence of ;

a loading module, configured to load the first correspondence and the second correspondence every time the operating system starts after completing the construction;

The first parsing module is used to, when receiving a user application for obtaining the interrupt resource corresponding to the target GPIO pin identification, according to the target GPIO pin identification carried in the user application, from the second corresponding relationship , parsed to obtain the target index value corresponding to the target GPIO pin identification;

A second parsing module, configured to parse and obtain the target hardware interrupt resource corresponding to the target index value from the first correspondence.

Optionally, the first building block includes:

The first construction sub-module is used to construct the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource in the device information of the GPIO controller through the advanced configuration and the power management interface table in the firmware , and the second correspondence between the GPIO pin identification and the index value, wherein each GPIO pin of the GPIO controller is electrically connected to the interrupt controller;

The loading module includes:

A first loading submodule, configured to load the advanced configuration and power management interface table from the firmware, so as to obtain the first correspondence and the second correspondence from device information of the GPIO controller.

Optionally, the first building block includes:

The second building submodule is used to build the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource in the device information of the GPIO controller through the device tree in the firmware or the kernel of the operating system , and the second correspondence between the GPIO pin identification and the index value, wherein each GPIO pin of the GPIO controller is electrically connected to the interrupt controller;

The loading module includes:

The second loading submodule is configured to load the device tree from the firmware or the kernel, so as to obtain the first correspondence and the second correspondence from the device information of the GPIO controller.

Optionally, the first building block includes:

The third construction sub-module is configured to use each hardware interrupt resource as a first array element, use the array subscript of the first array element to indicate the index value of the hardware interrupt resource, and construct the hardware interrupt resource and the index The first array whose values are in a one-to-one correspondence;

The fourth construction submodule is used to represent each GPIO pin identification by the array subscript of the second array element, and each described index value is used as the second array element, and the index value and the GPIO pin identification are constructed. A second array in a one-to-one correspondence.

Optionally, the fourth building submodule is specifically used for:

For any of the GPIO pin identifications, in the case that the GPIO pin corresponding to the GPIO pin identification is not connected to any input pin in the interrupt controller, the GPIO pin identification is represented as the second The second array element corresponding to the array subscript of the array element is filled with the illegal value of the array subscript of the first array element.

Optionally, the device further includes:

The second building module is configured to build a mapping relationship between each of the hardware interrupt resources and software interrupt resources.

Optionally, the device further includes:

a mapping module, configured to perform interrupt mapping on the target hardware interrupt resource according to the mapping relationship to obtain a target software interrupt resource corresponding to the target hardware interrupt resource;

The returning module is configured to return the target software interrupt resource to the development software that applies for the user, so that the user can customize an interrupt routine according to the target software interrupt resource.

Optionally, one of the hardware interrupt resources includes the pin number of an input pin on the interrupt controller to which the GPIO pin is connected.

An embodiment of the present invention also discloses an electronic device including a memory and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by one or more processors One or more programs comprising instructions for:

In the kernel of firmware or operating system, construct the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and the second correspondence between the GPIO pin identification and the index value;

After completing the construction, load the first correspondence and the second correspondence each time the operating system is started;

When receiving the user application for obtaining the interrupt resource corresponding to the target GPIO pin identifier, according to the target GPIO pin identifier carried in the user application, from the second correspondence, parse and obtain the target GPIO The target index value corresponding to the pin identification;

From the first correspondence, the target hardware interrupt resource corresponding to the target index value is obtained by parsing.

The embodiment of the present invention also discloses a readable storage medium, when the instructions in the storage medium are executed by the processor of the electronic device, the electronic device can execute the above-mentioned method for using interrupt resources.

The embodiments of the present invention include the following advantages:

In the embodiment of the present invention, the corresponding relationship between the GPIO pin identification and the hardware interrupt resource can be indirectly constructed through the index value, and recorded in the firmware or the kernel of the OS. When the user applies for the hardware interrupt resource of a GPIO pin When , the OS reads and parses the first correspondence between the hardware interrupt resource and the index value, and the second correspondence between the GPIO pin identifier and the index value, and then the OS can provide the user with The hardware interrupt resource of the requested GPIO pin. In the embodiment of the present invention, since the definition of the index value is not limited by whether the hardware interrupt resources are multiplexed and whether the multiplexing is continuous in some mechanisms, the corresponding relationship between the GPIO pin identifier and the hardware interrupt resource can be converted Defining and transferring the first correspondence and the second correspondence can not only realize the use of multiplexed and discrete hardware interrupt resources, but also realize the use of multiplexed and continuous hardware interrupt resources, as well as the use of non-multiplexed hardware interrupts use of resources.

Description of drawings

1 is a flow chart of steps of a method for using interrupt resources of the present invention;

2 is a schematic diagram of a hardware connection between a GPIO controller, a GPIO pin, an interrupt controller and a central processing unit in the electronic device of the present invention;

Fig. 3 is the use flow chart of the hardware interrupt resource of a kind of GPIO of the present invention;

Fig. 4 is the use flow chart of the hardware interrupt resource of another kind of GPIO of the present invention;

5 is a flow chart of steps of another method for using interrupt resources of the present invention;

6 is a structural block diagram of a device for using interrupt resources according to the present invention;

FIG. 7 is a structural block diagram of an electronic device for using interrupt resources according to an exemplary embodiment.

Detailed ways

In order to make the above objects, features and advantages of the present invention more clearly understood, the present invention will be described in further detail below with reference to the accompanying drawings and specific embodiments.

At present, in view of the problem of multiplexing and discreteness of GPIO interrupt resources, there is a lack of a unified method for using interrupt resources, which makes it impossible to provide a solution to this problem in some scenarios, which makes the development software for interrupt function development based on interrupt resources missing. related interrupt function.

For example, for the scenario of providing interrupt resources to the OS through the ACPI (Advanced Configuration and Power Management Interface) table (that is, passing interrupt resources to the OS through the ACPI mechanism), since the ACPI mechanism only supports non-multiplexing or multiplexing Therefore, under the ACPI mechanism, multiplexed and discrete interrupt resources cannot be delivered to the OS.

At present, in order to solve the above problems, customized processes to solve the above problems are usually added for different usage scenarios. However, due to the differences in customization, it needs to be individually adapted for different scenarios, which will reduce the compatibility of the development software, and need to maintain the development software processing process in multiple scenarios, which is not conducive to the maintenance of the development software.

One of the core concepts of the embodiment of the present invention is to define the corresponding relationship between the GPIO pin identifier and the hardware interrupt resource, and record it in the firmware or the kernel of the OS. When a user applies for a hardware interrupt resource of a GPIO pin, The OS reads and parses the corresponding relationship between the GPIO pin identification and the hardware interrupt resource, and then can provide the requested hardware interrupt resource of the GPIO pin according to the corresponding relationship.

Among them, in order to make the corresponding relationship between the GPIO pin identification and the hardware interrupt resource, the definition and transmission can be realized in different use mechanisms (such as the device tree mechanism, ACPI mechanism, etc.), the embodiment of the present invention uses the GPIO pin identification The corresponding relationship with the hardware interrupt resource is transformed into the first correspondence between the hardware interrupt resource and the index value, and the second correspondence between the GPIO pin identification and the index value, so that the GPIO is indirectly defined by the index value. The corresponding relationship between pin identification and hardware interrupt resources, because the index value is not limited by the continuous numbering of the GPIO pin identification in the case of multiplexing, therefore, any GPIO pin can correspond to any hardware interrupt through the index value Resource, in this way, not only can realize the transmission of GPIO interrupt resources in the case of multiplexing and discrete GPIO interrupt resources under different use mechanisms, but also realize the non-multiplexing of GPIO interrupt resources, and the GPIO in the case of multiplexing and continuous. Interrupt the delivery of resources.

Referring to FIG. 1, there is shown a flow chart of the steps of a method for using an interrupt resource of the present invention, which may specifically include the following steps:

Step 101 , in the firmware or the kernel of the operating system, build a first correspondence between each hardware interrupt resource and an index value of the hardware interrupt resource, and a second correspondence between a GPIO pin identifier and an index value.

Referring to FIG. 2, a schematic diagram of a hardware connection between a GPIO controller, GPIO pins, an interrupt controller and a central processing unit (CPU) in an electronic device is shown, wherein the GPIO controller can lead to the GPIO The pin is used for input or output control. The GPIO pin can be used as a pin for triggering an interrupt and is electrically connected to the interrupt controller. The interrupt controller can output an interrupt signal to the central processing unit when it receives an interrupt signal through the GPIO pin. The processor, in turn, can handle interrupts.

Wherein, a hardware interrupt resource includes a pin number of an input pin connected with a GPIO pin on the interrupt controller.

An input pin of the interrupt controller can be connected to one or more GPIO pins. If each input pin of the interrupt controller is connected to only one GPIO pin, the hardware interrupt resources of the GPIO are non-multiplexed; When any input pin of the interrupt controller is connected to multiple GPIO pins, the hardware interrupt resources of the GPIO are multiplexed.

Taking the GPIO controller shown in Figure 2 including 6 GPIO pins as an example, the identifications of the 6 GPIO pins are 0-5 respectively. Among them, GPIO pins 0, 2 and 4 are all related to the input pins of the interrupt controller. 13 is electrically connected, and the GPIO pins 1, 3 and 5 are all electrically connected to the input pin 15 of the interrupt controller, that is, each hardware interrupt resource of the GPIO is multiplexed.

Further, in the case where the hardware interrupt resources of GPIO are multiplexed, if the identifier of each GPIO pin connected to the multiplexed input pin is a continuous number, then the hardware interrupt resources of GPIO are multiplexed and continuous; If the identifiers of the GPIO pins connected to the multiplexed input pins are discrete numbers (ie, discontinuous numbers), the hardware interrupt resources of the GPIOs are multiplexed and discrete.

According to the actual connection between the GPIO pin and the interrupt controller in the electronic device, it can be determined which of the three situations of the GPIO hardware interrupt resource is non-multiplexed, multiplexed and continuous, multiplexed and discrete. In the case of hardware interrupt resources, in the code of the firmware or the kernel of the operating system, build the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and the first correspondence between the GPIO pin identification and the index value. Two correspondences.

Under the ACPI mechanism and similar mechanisms, it is limited to directly define the correspondence between GPIO pin identifiers and hardware interrupt resources. In the case of hardware interrupt resource multiplexing, the GPIO pin identifiers corresponding to the same hardware interrupt resource must be consecutively numbered. . Under the device tree mechanism and similar mechanisms, it is not limited to directly define the correspondence between GPIO pin identifiers and hardware interrupt resources. In the case of hardware interrupt resource multiplexing, the GPIO pin identifiers corresponding to the same hardware interrupt resource can be is a discrete number.

Therefore, considering the limitation of the ACPI mechanism and similar mechanisms on the multiplexing of hardware interrupt resources, in the embodiment of the present invention, the corresponding relationship between the GPIO pin identifier and the hardware interrupt resource can be established by means of the index value. The definition of the index value And the transmission is not limited by whether the multiplexed hardware interrupt resources are continuous, so that the definition of the correspondence between the GPIO pin identification and the hardware interrupt resources can be realized under the ACPI mechanism and similar mechanisms, as well as the device tree mechanism and similar mechanisms. and pass.

In this embodiment of the present invention, optionally, the firmware may be a BIOS (Basic Input Output System, basic input output system).

Step 102: After the construction is completed, each time the operating system is started, the first correspondence and the second correspondence are loaded.

After the first correspondence and the second correspondence are constructed, the electronic device can load the first correspondence and the second correspondence after each subsequent power-on. Specifically, each time the OS is started, the first correspondence and the second correspondence may be loaded from the firmware or the kernel of the OS to be used when the user applies for the interrupt resource.

Step 103, when receiving the user application for obtaining the interrupt resource corresponding to the target GPIO pin identification, according to the target GPIO pin identification carried in the user application, from the second correspondence, parse and obtain the corresponding target GPIO pin identification. target index value.

During the OS running process, the user can apply for the interrupt resource corresponding to the target GPIO pin identifier, where the target GPIO pin identifier is the identifier of any GPIO pin. When the OS receives the user application, the target GPIO pin identifier carried in the user application can be obtained, and then the target index value corresponding to the target GPIO pin identifier can be obtained by parsing from the loaded second correspondence.

Step 104: From the first correspondence, analyze and obtain the target hardware interrupt resource corresponding to the target index value.

After obtaining the target index value corresponding to the target GPIO pin identifier, the OS can further parse and obtain the target hardware interrupt resource corresponding to the target index value from the loaded first correspondence, where the target hardware interrupt resource is also the target GPIO pin identifier. Corresponding hardware interrupt resource.

In the embodiment of the present invention, the corresponding relationship between the GPIO pin identification and the hardware interrupt resource can be indirectly constructed through the index value, and recorded in the firmware or the kernel of the OS. When the user applies for the hardware interrupt resource of a GPIO pin When , the OS reads and parses the first correspondence between the hardware interrupt resource and the index value, and the second correspondence between the GPIO pin identifier and the index value, and then the OS can provide the user with The hardware interrupt resource of the requested GPIO pin. In the embodiment of the present invention, since the definition of the index value is not limited by whether the hardware interrupt resources are multiplexed and whether the multiplexing is continuous in some mechanisms, the corresponding relationship between the GPIO pin identifier and the hardware interrupt resource can be converted Defining and transferring the first correspondence and the second correspondence can not only realize the use of multiplexed and discrete hardware interrupt resources, but also realize the use of multiplexed and continuous hardware interrupt resources, as well as the use of non-multiplexed hardware interrupts use of resources.

Further, after the multiplexed and discrete, multiplexed and continuous, or non-multiplexed hardware interrupt resources are provided to the development software, the user can customize the interrupt routine in the development software, that is, the development software can be compatible with interrupt resources. The different use mechanisms of the software improve the compatibility of the development software, and do not need to maintain the development software processing process in multiple scenarios, which is conducive to the maintenance of the development software.

Referring to FIG. 3, a flow chart of the use of hardware interrupt resources of a GPIO is shown, wherein the first correspondence and the second correspondence can be defined in the firmware, and the kernel of the OS can be read out by passing parameters through the firmware , and analyze it, and then provide it to the development software for users to develop and use.

Referring to FIG. 4 , a flow chart of using hardware interrupt resources of another GPIO is shown, wherein the first correspondence and the second correspondence can be defined in the kernel of the OS, and the kernel of the OS can read and parse, And then provide the development software for the user to develop and use.

In practical applications, it is possible to choose whether to define the first correspondence and the second correspondence in the firmware or the kernel of the OS according to different use mechanisms of the interrupt resources. For example, under the ACPI mechanism, the first correspondence and the second correspondence can be defined in the firmware, while under the device tree mechanism, the first correspondence and the second correspondence can be defined in the firmware or the OS kernel .

Among them, the firmware is a piece of initialization code that is solidified in the electronic device. The electronic device starts to run as soon as it is powered on, and is used to perform necessary initialization to ensure that the kernel of the OS can be started, so as to prepare for the operation of the OS. When the OS prepares the necessary hardware environment, it will not enter into the startup of the operating system. Usually, the last step in the firmware operation is to transfer the OS from the hard disk partition to the memory and hand over control of the electronic device to the OS's kernel.

3, in an optional implementation manner, step 101 specifically includes the following steps:

S11: In the firmware, through the advanced configuration and power management interface table, build the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource in the device information of the GPIO controller, as well as the GPIO pin identification and index A second correspondence between the values, wherein each GPIO pin of the GPIO controller is electrically connected to the interrupt controller.

Correspondingly, the step of loading the first correspondence and the second correspondence in step 102 specifically includes:

S21: Load the advanced configuration and power management interface table from the firmware to obtain the first correspondence and the second correspondence from the device information of the GPIO controller.

Among them, the ACPI table provides a data structure for recording device information, which can record the device information of devices such as controllers and CPUs. In the firmware, an ACPI table can be constructed according to the information of each device, and it can be recorded in the GPIO controller. The first correspondence and the second correspondence are added to the device information, so that the first correspondence and the second correspondence are used as custom attributes in the device information of the GPIO controller.

When the OS starts each time, the firmware can pass the ACPI table to the OS by passing parameters, and then the OS can load the ACPI table defined in the firmware to obtain each device information. When the OS loads the device information of the GPIO controller, it can obtain to the first correspondence and the second correspondence.

3 and 4, in another optional implementation manner, step 101 specifically includes the following steps:

S12: In the firmware or the kernel of the operating system, through the device tree, build the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource in the device information of the GPIO controller, as well as the GPIO pin identification and index A second correspondence between the values, wherein each GPIO pin of the GPIO controller is electrically connected to the interrupt controller.

Correspondingly, the step of loading the first correspondence and the second correspondence in step 102 specifically includes:

S22: Load the device tree from the firmware or the kernel to obtain the first correspondence and the second correspondence from the device information of the GPIO controller.

Among them, the device tree also provides a data structure for recording device information, which can record the device information of devices such as controllers and CPUs. In the firmware or OS kernel, a device tree can be constructed according to each device information, and The first correspondence and the second correspondence are added to the device information of the GPIO controller, so that the first correspondence and the second correspondence are used as custom attributes in the device information of the GPIO controller.

When the OS starts each time, the firmware can pass parameters to the OS kernel or the kernel itself integrates the device tree, and then the OS kernel can obtain the device information according to the device tree, and the OS kernel loads the device information of the GPIO controller. , the first corresponding relationship and the second corresponding relationship can be obtained.

The embodiments of the present invention provide a general method for using GPIO interrupt resources, whether through a device tree, ACPI table or other methods, and whether GPIO interrupt resources are multiplexed, non-multiplexed, discrete or continuous, they can be Use this method to define, parse and use GPIO interrupt resources.

Further, in step 101, the steps of constructing the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, as well as the second correspondence between the GPIO pin identifier and the index value, may specifically include:

Taking each hardware interrupt resource as the first array element, the index value of the hardware interrupt resource is represented by the array subscript of the first array element, and the first array in which the hardware interrupt resource and the index value are in a one-to-one correspondence is constructed;

Each GPIO pin identifier is represented by the array subscript of the second array element, and each index value is used as the second array element to construct a second array in which the index value and the GPIO pin identifier are in a one-to-one correspondence.

In this embodiment of the present invention, the first array and the second array may be defined in an ACPI table or a device tree. The first array includes a plurality of first array elements, which are non-repetitive hardware interrupt resources. For any hardware interrupt resource, the array subscript corresponding to the hardware interrupt resource can be used as the index value of the hardware interrupt resource, so that Hardware interrupt resources may be indexed by respective array indices of the first array. The second array includes a plurality of second array elements, the second array represents each GPIO pin identifier by an array subscript, and the second array element is the index value of the hardware interrupt resource corresponding to each GPIO pin identifier.

Taking Figure 2 as an example, the first array A can be {13,15}, where the first first array element 13 is the hardware interrupt resource corresponding to GPIO pins 0, 2 and 4, and the second first array element 13 Element 15 is the hardware interrupt resource corresponding to GPIO pins 1, 3 and 5, wherein the array subscript of the first array element 13 is 0, and the array subscript of the first array element 15 is 1.

Correspondingly, the second array B may be {0, 1, 0, 1, 0, 1}, wherein the array subscripts of the six second array elements are 0-5 in sequence, respectively representing GPIO pins 0-5.

The first second array element 0 indicates that the hardware interrupt resource index value corresponding to GPIO pin 0 is 0, and then it can be found from the first array A that the first array element with the array subscript 0 is 13, which means GPIO The hardware interrupt resource corresponding to pin 0 is 13.

The second second array element 1 indicates that the hardware interrupt resource index value corresponding to GPIO pin 1 is 1, and then it can be found from the first array A that the first array element with the array subscript 1 is 15, which means GPIO The hardware interrupt resource corresponding to pin 1 is 15.

The third second array element 0 indicates that the hardware interrupt resource index value corresponding to GPIO pin 2 is 0, and then it can be found from the first array A that the first array element with the array subscript 0 is 13, which means GPIO The hardware interrupt resource corresponding to pin 2 is 13.

The fourth second array element 1 indicates that the hardware interrupt resource index value corresponding to GPIO pin 3 is 1, and then it can be found from the first array A that the first array element with the array subscript 1 is 15, which means GPIO The hardware interrupt resource corresponding to pin 3 is 15.

The fifth second array element 0 indicates that the hardware interrupt resource index value corresponding to GPIO pin 4 is 0, and then it can be found from the first array A that the first array element with the array subscript 0 is 13, which means GPIO The hardware interrupt resource corresponding to pin 4 is 13.

The sixth second array element 1 indicates that the hardware interrupt resource index value corresponding to GPIO pin 5 is 1, and then it can be found from the first array A that the first array element with the array subscript 1 is 15, which means GPIO The hardware interrupt resource corresponding to pin 5 is 15.

The above search results are consistent with the connection relationship shown in Figure 2.

It is worth noting that although the embodiment of the present application uses an array structure to construct a corresponding relationship as an example for illustrative description, the construction of the first corresponding relationship and the second corresponding relationship is not necessarily limited to the above examples, and can also be constructed through an index linked list. form to achieve. Taking the array structure as an example is because the attributes of the array structure itself bring convenience to the construction of the corresponding relationship, because the attributes of the array structure can realize the construction of the corresponding relationship while occupying less space.

Further optionally, the above-mentioned array subscripts of the second array elements represent each GPIO pin identification, each index value is used as the second array element, and the index value and the GPIO pin identification are in a one-to-one correspondence relationship of the second array. The steps can specifically include:

For any GPIO pin identification, in the case that the GPIO pin corresponding to the GPIO pin identification is not connected to any input pin in the interrupt controller, the GPIO pin identification is represented as an array of elements of the second array When subscripting, the corresponding second array element is filled with the illegal value of the array subscript of the first array element.

Among them, for any GPIO pin, if the GPIO pin is connected to an input pin in the interrupt controller, it means that the GPIO pin corresponds to a hardware interrupt resource. Therefore, in the second array, the The second array element corresponding to the identifier of the GPIO pin is filled with the legal value of the array subscript of the first array element. In the case that the GPIO pin is not connected to any input pin in the interrupt controller, it means that the GPIO pin has no corresponding hardware interrupt resource. Therefore, in the second array, the GPIO pin's Identifies that the corresponding second array element is filled with an illegal value of the array subscript of the first array element.

Taking the above first array A{13,15} as an example, in the first array A, the legal values of the array subscript of the first array element are 0 and 1, and the illegal value of the array subscript of the first array element can be a negative value (eg -1, -2, etc.) or positive values outside the legal value range {0,1} (eg 4, 8, etc.).

Taking the second array B as {0,1,0,1,0,1} as an example, the second second array element is 1, which is a legal value, then you can find out the GPIO pin 1 from the first array A The corresponding hardware interrupt resource is 13.

Taking the second array B as {0,-1,0,1,0,1} as an example, the second second array element is -1, which is an illegal value, so the GPIO cannot be found from the first array A The hardware interrupt resource corresponding to pin 1 indicates that there is no corresponding hardware interrupt resource for GPIO pin 1.

FIG. 5 shows a flowchart of steps of another embodiment of a method for using interrupt resources according to the present invention. Referring to FIG. 5 , optionally, after the first correspondence and the second correspondence are loaded in step 102, you can also Include the following steps:

Step 105: Build a mapping relationship between each hardware interrupt resource and software interrupt resource.

The mapping relationship between each hardware interrupt resource and software interrupt resource may be constructed and dynamically maintained by relevant software.

Correspondingly, after step 104, the following steps may also be included:

Step 106: Perform interrupt mapping on the target hardware interrupt resource according to the mapping relationship to obtain the target software interrupt resource corresponding to the target hardware interrupt resource.

Step 107: Return the target software interrupt resource to the development software that has applied for the user, so that the user can customize the interrupt routine according to the target software interrupt resource.

The interrupt routine is also a collection of interrupt function interfaces or interrupt services provided externally.

In practical applications, since the hardware interrupt resources are lower-level data and are directly provided to users who use development software, it will increase the difficulty of subsequent development and reduce development efficiency. Therefore, the kernel can provide a mapping mechanism to map each hardware interrupt resource. The software interrupt resources available for developing software achieve good isolation and cross-platform features. The mapped software interrupt resources have response priority and other mechanisms, which are beneficial to subsequent development. For users who use development software for development, they can hardly touch the underlying hardware interrupt resources, providing flexibility for efficient use of CPU resources.

In this embodiment of the present invention, step 101 may be performed after the electronic device is powered on any time, and steps 102, 105, 103, 104, 106, and 107 may be performed after each subsequent power-on of the electronic device.

In the embodiment of the present invention, the corresponding relationship between the GPIO pin identification and the hardware interrupt resource can be indirectly constructed through the index value, and recorded in the firmware or the kernel of the OS. When the user applies for the hardware interrupt resource of a GPIO pin When , the OS reads and parses the first correspondence between the hardware interrupt resource and the index value, and the second correspondence between the GPIO pin identifier and the index value, and then the OS can provide the user with The hardware interrupt resource of the requested GPIO pin. In the embodiment of the present invention, since the definition of the index value is not limited by whether the hardware interrupt resources are multiplexed and whether the multiplexing is continuous in some mechanisms, the corresponding relationship between the GPIO pin identifier and the hardware interrupt resource can be converted Defining and transferring the first correspondence and the second correspondence can not only realize the use of multiplexed and discrete hardware interrupt resources, but also realize the use of multiplexed and continuous hardware interrupt resources, as well as the use of non-multiplexed hardware interrupts use of resources.

It should be noted that, for the sake of simple description, the method embodiments are described as a series of action combinations, but those skilled in the art should know that the embodiments of the present invention are not limited by the described action sequences, because According to embodiments of the present invention, certain steps may be performed in other sequences or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present invention.

Referring to FIG. 6, it shows a structural block diagram of an apparatus for using interrupt resources according to the present invention, and the apparatus 300 may specifically include the following modules:

The first building module 301 is used for, in the kernel of the firmware or the operating system, to construct the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and the relationship between the GPIO pin identification and the index value. the second correspondence between;

A loading module 302, configured to load the first correspondence and the second correspondence when the operating system is started each time after the construction is completed;

The first parsing module 303 is configured to, when receiving a user application for obtaining the interrupt resource corresponding to the target GPIO pin identification, according to the target GPIO pin identification carried in the user application, from the second corresponding relationship In, parsing to obtain the index value corresponding to the target GPIO pin identification;

The second parsing module 304 is configured to parse and obtain the target hardware interrupt resource corresponding to the target index value from the first correspondence.

Optionally, the first building module 301 includes:

The first construction sub-module is used to construct the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource in the device information of the GPIO controller through the advanced configuration and the power management interface table in the firmware , and the second correspondence between the GPIO pin identification and the index value, wherein each GPIO pin of the GPIO controller is electrically connected to the interrupt controller;

The loading module 302 includes:

A first loading submodule, configured to load the advanced configuration and power management interface table from the firmware, so as to obtain the first correspondence and the second correspondence from device information of the GPIO controller.

Optionally, the first building module 301 includes:

The second building submodule is used to build the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource in the device information of the GPIO controller through the device tree in the firmware or the kernel of the operating system , and the second correspondence between the GPIO pin identification and the index value, wherein each GPIO pin of the GPIO controller is electrically connected to the interrupt controller;

The loading module 302 includes:

The second loading submodule is configured to load the device tree from the firmware or the kernel, so as to obtain the first correspondence and the second correspondence from the device information of the GPIO controller.

Optionally, the first building module 301 includes:

The third construction sub-module is configured to use each hardware interrupt resource as a first array element, use the array subscript of the first array element to indicate the index value of the hardware interrupt resource, and construct the hardware interrupt resource and the index The first array whose values are in a one-to-one correspondence;

The fourth construction submodule is used to represent each GPIO pin identification by the array subscript of the second array element, and each described index value is used as the second array element, and the index value and the GPIO pin identification are constructed. A second array in a one-to-one correspondence.

Optionally, the fourth building submodule is specifically used for:

For any of the GPIO pin identifications, in the case that the GPIO pin corresponding to the GPIO pin identification is not connected to any input pin in the interrupt controller, the GPIO pin identification is represented as the second The second array element corresponding to the array subscript of the array element is filled with the illegal value of the array subscript of the first array element.

Optionally, the apparatus 300 further includes:

The second building module is configured to build a mapping relationship table between each of the hardware interrupt resources and software interrupt resources in the kernel of the operating system.

Optionally, the apparatus 300 further includes:

a second loading module, configured to load the mapping table through the kernel;

The apparatus 300 also includes:

a mapping module, configured to perform interrupt mapping on the target hardware interrupt resource according to the mapping relationship table to obtain a target software interrupt resource corresponding to the target hardware interrupt resource;

The returning module is configured to return the target software interrupt resource to the development software that applies for the user, so that the user can customize an interrupt routine according to the target software interrupt resource.

Optionally, one of the hardware interrupt resources includes the pin number of an input pin on the interrupt controller to which the GPIO pin is connected.

In the embodiment of the present invention, the corresponding relationship between the GPIO pin identification and the hardware interrupt resource can be indirectly constructed through the index value, and recorded in the firmware or the kernel of the OS. When the user applies for the hardware interrupt resource of a GPIO pin When , the OS reads and parses the first correspondence between the hardware interrupt resource and the index value, and the second correspondence between the GPIO pin identifier and the index value, and then the OS can provide the user with The hardware interrupt resource of the requested GPIO pin. In the embodiment of the present invention, since the definition of the index value is not limited by whether the hardware interrupt resources are multiplexed and whether the multiplexing is continuous in some mechanisms, the corresponding relationship between the GPIO pin identifier and the hardware interrupt resource can be converted Defining and transferring the first correspondence and the second correspondence can not only realize the use of multiplexed and discrete hardware interrupt resources, but also realize the use of multiplexed and continuous hardware interrupt resources, as well as the use of non-multiplexed hardware interrupts use of resources.

As for the apparatus embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and reference may be made to the partial description of the method embodiment for related parts.

FIG. 7 is a structural block diagram of an electronic device 400 for power-on display according to an exemplary embodiment. For example, electronic device 400 may be a mobile phone, computer, digital broadcast terminal, messaging device, game console, tablet device, medical device, fitness device, personal digital assistant, and the like.

7, electronic device 400 may include one or more of the following components: processing component 402, memory 404, power supply component 406, multimedia component 408, audio component 410, input/output (I/O) interface 412, sensor component 414 , and the communication component 416 .

The processing component 402 generally controls the overall operation of the electronic device 400, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing element 402 may include one or more processors 420 to execute instructions to perform all or part of the steps of the methods described above. Additionally, processing component 402 may include one or more modules that facilitate interaction between processing component 402 and other components. For example, processing component 402 may include a multimedia module to facilitate interaction between multimedia component 408 and processing component 402 .

Memory 404 is configured to store various types of data to support operation at device 400 . Examples of such data include instructions for any application or method operating on electronic device 400, contact data, phonebook data, messages, pictures, videos, and the like. Memory 404 may be implemented by any type of volatile or non-volatile storage device or combination thereof, such as static random access memory (SRAM), electrically erasable programmable read only memory (EEPROM), erasable Programmable Read Only Memory (EPROM), Programmable Read Only Memory (PROM), Read Only Memory (ROM), Magnetic Memory, Flash Memory, Magnetic or Optical Disk.

Power supply assembly 406 provides power to various components of electronic device 400 . Power supply components 406 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to electronic device 400 .

Multimedia component 408 includes a screen that provides an output interface between the electronic device 400 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from a user. The touch panel includes one or more touch sensors to sense touch, swipe, and gestures on the touch panel. The touch sensor may not only sense the boundaries of a touch or swipe action, but also detect the duration and pressure associated with the touch or swipe action. In some embodiments, multimedia component 408 includes a front-facing camera and/or a rear-facing camera. When the electronic device 400 is in an operation mode, such as a shooting mode or a video mode, the front camera and/or the rear camera may receive external multimedia data. Each of the front and rear cameras can be a fixed optical lens system or have focal length and optical zoom capability.

Audio component 410 is configured to output and/or input audio signals. For example, audio component 410 includes a microphone (MIC) that is configured to receive external audio signals when electronic device 400 is in operating modes, such as calling mode, recording mode, and voice recognition mode. The received audio signal may be further stored in memory 404 or transmitted via communication component 416 . In some embodiments, audio component 410 also includes a speaker for outputting audio signals.

The I/O interface 412 provides an interface between the processing component 402 and a peripheral interface module, which may be a keyboard, a click wheel, a button, or the like. These buttons may include, but are not limited to: home button, volume buttons, start button, and lock button.

Sensor assembly 414 includes one or more sensors for providing status assessment of various aspects of electronic device 400 . For example, the sensor assembly 414 can detect the open/closed state of the device 400, the relative positioning of the components, such as the display and keypad of the electronic device 400, the sensor assembly 414 can also detect the electronic device 400 or a component of the electronic device 400 The position of the electronic device 400 changes, the presence or absence of user contact with the electronic device 400 , the orientation or acceleration/deceleration of the electronic device 400 , and the temperature change of the electronic device 400 . Sensor assembly 414 may include a proximity sensor configured to detect the presence of nearby objects in the absence of any physical contact. Sensor assembly 414 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 414 may also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

Communication component 416 is configured to facilitate wired or wireless communication between electronic device 400 and other devices. Electronic device 400 may access wireless networks based on communication standards, such as WiFi, 2G or 3G, or a combination thereof. In one exemplary embodiment, the communication component 416 receives broadcast signals or broadcast related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 416 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

In an exemplary embodiment, electronic device 400 may be implemented by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable A programmed gate array (FPGA), controller, microcontroller, microprocessor or other electronic component implementation is used to perform the above method.

In an exemplary embodiment, there is also provided a non-transitory computer-readable storage medium including instructions, such as memory 404 including instructions, executable by the processor 420 of the electronic device 400 to accomplish the above method. For example, the non-transitory computer-readable storage medium may be ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, optical data storage device, and the like.

A readable storage medium, when instructions in the storage medium are executed by a processor of an electronic device, the electronic device can execute a method for using interrupt resources, the method comprising:

In the kernel of firmware or operating system, construct the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and the second correspondence between the GPIO pin identification and the index value;

After completing the construction, load the first correspondence and the second correspondence each time the operating system is started;

When receiving the user application for obtaining the interrupt resource corresponding to the target GPIO pin identifier, according to the target GPIO pin identifier carried in the user application, from the second correspondence, parse and obtain the target GPIO The target index value corresponding to the pin identification;

From the first correspondence, the target hardware interrupt resource corresponding to the target index value is obtained by parsing.

The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same and similar parts between the various embodiments may be referred to each other.

It should be understood by those skilled in the art that the embodiments of the embodiments of the present invention may be provided as a method, an apparatus, or a computer program product. Accordingly, embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present invention may take the form of a computer program product implemented on one or more computer-usable storage media having computer-usable program code embodied therein, including but not limited to disk storage, CD-ROM, optical storage, and the like.

Embodiments of the present invention are described with reference to flowcharts and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the present invention. It will be understood that each flow and/or block in the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to the processor of a general purpose computer, special purpose computer, embedded processor or other programmable data processing terminal equipment to produce a machine that causes the instructions to be executed by the processor of the computer or other programmable data processing terminal equipment Means are created for implementing the functions specified in the flow or flows of the flowcharts and/or the blocks or blocks of the block diagrams.

These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data processing terminal equipment to operate in a predictive manner, such that the instructions stored in the computer readable memory result in an article of manufacture comprising instruction means, the The instruction means implement the functions specified in the flow or flow of the flowcharts and/or the block or blocks of the block diagrams.

These computer program instructions can also be loaded on a computer or other programmable data processing terminal equipment, so that a series of operational steps are performed on the computer or other programmable terminal equipment to produce a computer-implemented process, thereby executing on the computer or other programmable terminal equipment The instructions executed on the above provide steps for implementing the functions specified in the flowchart or blocks and/or the block or blocks of the block diagrams.

Although preferred embodiments of the embodiments of the present invention have been described, additional changes and modifications to these embodiments may be made by those skilled in the art once the basic inventive concepts are known. Therefore, the appended claims are intended to be construed to include the preferred embodiments as well as all changes and modifications that fall within the scope of the embodiments of the present invention.

Finally, it should also be noted that in this document, relational terms such as first and second are used only to distinguish one entity or operation from another, and do not necessarily require or imply these entities or that there is any such actual relationship or sequence between operations. Moreover, the terms "comprising", "comprising" or any other variation thereof are intended to encompass non-exclusive inclusion, such that a process, method, article or terminal device comprising a list of elements includes not only those elements, but also a non-exclusive list of elements. other elements, or also include elements inherent to such a process, method, article or terminal equipment. Without further limitation, an element defined by the phrase "comprises a..." does not preclude the presence of additional identical elements in the process, method, article or terminal device comprising said element.

A method and device for using an interrupt resource, an electronic device, and a storage medium provided by the present invention have been described above in detail. In this paper, specific examples are used to illustrate the principles and implementations of the present invention. The description of the embodiment is only used to help understand the method of the present invention and its core idea; meanwhile, for those of ordinary skill in the art, according to the idea of the present invention, there will be changes in specific embodiments and application scope. As mentioned above, the contents of this specification should not be construed as limiting the present invention.

Claims (11)

1. a use method of interrupt resource, is characterized in that, comprises: In the kernel of firmware or operating system, construct the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and the second correspondence between the GPIO pin identification and the index value; After completing the construction, load the first correspondence and the second correspondence each time the operating system is started; When receiving the user application for obtaining the interrupt resource corresponding to the target GPIO pin identifier, according to the target GPIO pin identifier carried in the user application, from the second correspondence, parse and obtain the target GPIO The target index value corresponding to the pin identification; From the first correspondence, the target hardware interrupt resource corresponding to the target index value is obtained by parsing. 2. The method according to claim 1, wherein, in the kernel of the firmware or the operating system, the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource is constructed, and the GPIO The step of the second correspondence between the pin identification and the index value includes: In the firmware, through the advanced configuration and power management interface table, the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource is constructed in the device information of the GPIO controller, and the GPIO pin identification and all the second correspondence between the index values, wherein each GPIO pin of the GPIO controller is electrically connected to the interrupt controller; The step of loading the first correspondence and the second correspondence includes: The advanced configuration and power management interface table is loaded from the firmware to obtain the first correspondence and the second correspondence from device information of the GPIO controller. 3. method according to claim 1, is characterized in that, described in the kernel of firmware or operating system, construct the first correspondence between each hardware interrupt resource and the index value of described hardware interrupt resource, and GPIO The step of the second correspondence between the pin identification and the index value includes: In the kernel of the firmware or the operating system, through the device tree, the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource is constructed in the device information of the GPIO controller, and the GPIO pin identifier and all the second correspondence between the index values, wherein each GPIO pin of the GPIO controller is electrically connected to the interrupt controller; The step of loading the first correspondence and the second correspondence includes: The device tree is loaded from the firmware or the kernel to obtain the first correspondence and the second correspondence from device information of the GPIO controller. 4. according to the method described in any one of claim 1-3, it is characterized in that, described constructing the first correspondence between the index value of each hardware interrupt resource and described hardware interrupt resource, and GPIO pin identification and The step of the second correspondence between the index values includes: Each hardware interrupt resource is used as a first array element, the index value of the hardware interrupt resource is represented by the array subscript of the first array element, and the first array in which the hardware interrupt resource and the index value are in a one-to-one correspondence is constructed. an array; Each GPIO pin identifier is represented by the array subscript of the second array element, and each of the index values is used as the second array element to construct a second array in which the index value and the GPIO pin identifier are in a one-to-one correspondence. array. 5. The method according to claim 4, wherein the array subscript of the second array element represents each GPIO pin identification, and each described index value is used as the second array element to construct the described The step of indexing the second array in which the GPIO pin identification is in a one-to-one correspondence, including: For any of the GPIO pin identifications, in the case that the GPIO pin corresponding to the GPIO pin identification is not connected to any input pin in the interrupt controller, the GPIO pin identification is represented as the second The second array element corresponding to the array subscript of the array element is filled with the illegal value of the array subscript of the first array element. 6. The method according to any one of claims 1-5, characterized in that, after the completion of the construction, when the operating system starts each time, the first correspondence and the second correspondence are loaded After the relationship, also include: A mapping relationship between each of the hardware interrupt resources and software interrupt resources is constructed. 7. The method according to claim 6, characterized in that, after obtaining the target hardware interrupt resource corresponding to the target index value by parsing from the first correspondence, the method further comprises: performing interrupt mapping on the target hardware interrupt resource according to the mapping relationship to obtain a target software interrupt resource corresponding to the target hardware interrupt resource; The target software interrupt resource is returned to the development software that applies for the user, so that the user can customize an interrupt routine according to the target software interrupt resource. 8. The method according to any one of claims 1-7, wherein one of the hardware interrupt resources comprises the pin number of an input pin connected to the GPIO pin on the interrupt controller. 9. A device for using interrupt resources, comprising: The first building module is used to construct, in the kernel of the firmware or the operating system, the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and between the GPIO pin identification and the index value. The second correspondence of ; a loading module, configured to load the first correspondence and the second correspondence every time the operating system starts after completing the construction; The first parsing module is used to, when receiving a user application for obtaining the interrupt resource corresponding to the target GPIO pin identification, according to the target GPIO pin identification carried in the user application, from the second corresponding relationship , parsed to obtain the target index value corresponding to the target GPIO pin identification; A second parsing module, configured to parse and obtain the target hardware interrupt resource corresponding to the target index value from the first correspondence. 10. An electronic device comprising a memory and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by one or more processors or one or more programs containing instructions for: In the kernel of firmware or operating system, construct the first correspondence between each hardware interrupt resource and the index value of the hardware interrupt resource, and the second correspondence between the GPIO pin identification and the index value; After completing the construction, load the first correspondence and the second correspondence each time the operating system is started; When receiving the user application for obtaining the interrupt resource corresponding to the target GPIO pin identifier, according to the target GPIO pin identifier carried in the user application, from the second correspondence, the target GPIO is obtained by parsing The target index value corresponding to the pin identification; From the first correspondence, the target hardware interrupt resource corresponding to the target index value is obtained by parsing. 11. A readable storage medium, characterized in that, when the instructions in the storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute the interrupt resource according to any one of claims 1-8 method of use.

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