CN114361309B - Four inch PSS substrate output improving scheme - Google Patents
Four inch PSS substrate output improving scheme Download PDFInfo
- Publication number
- CN114361309B CN114361309B CN202111682942.9A CN202111682942A CN114361309B CN 114361309 B CN114361309 B CN 114361309B CN 202111682942 A CN202111682942 A CN 202111682942A CN 114361309 B CN114361309 B CN 114361309B
- Authority
- CN
- China
- Prior art keywords
- disc
- etching
- inch
- discs
- pss
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 31
- 238000000034 method Methods 0.000 claims abstract description 86
- 238000005530 etching Methods 0.000 claims abstract description 44
- 238000012360 testing method Methods 0.000 claims description 17
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 239000007789 gas Substances 0.000 claims description 8
- 239000001307 helium Substances 0.000 claims description 8
- 229910052734 helium Inorganic materials 0.000 claims description 8
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 8
- 230000007547 defect Effects 0.000 description 10
- 235000012431 wafers Nutrition 0.000 description 10
- 230000000052 comparative effect Effects 0.000 description 5
- 229910052594 sapphire Inorganic materials 0.000 description 5
- 239000010980 sapphire Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 238000000407 epitaxy Methods 0.000 description 2
- 238000004377 microelectronic Methods 0.000 description 2
- 230000002035 prolonged effect Effects 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
- 238000012876 topography Methods 0.000 description 1
Landscapes
- Drying Of Semiconductors (AREA)
Abstract
The present disclosure provides a four inch PSS substrate throughput enhancement scheme, comprising the steps of: step one, yellow PR pattern; step two, preparing nine disc etching process carrier discs; step three, checking whether the nine-disc etching process carrier disc meets the process requirement index; and step four, carrying a disc to produce the PSS substrate in four times by using a nine-disc etching process. The method of the present disclosure increases the throughput of PSS substrates at four times with the same number of tools by increasing the number of process slices per disk of the etching process.
Description
Technical Field
The invention relates to the technical field of etching, in particular to a four-inch PSS substrate yield improvement scheme.
Background
For the LED industry, the process involved to pattern the sapphire substrate (Patterned Sapphire Substrate, PSS) is not unknown. That is, a dry etching mask is grown on a sapphire substrate, a pattern is etched on the mask by a standard photolithography process, and sapphire (Al 2 O 3 ) And removing the mask, and growing GaN material on the mask to change the longitudinal epitaxy of the GaN material into the transverse epitaxy. On one hand, dislocation density of GaN epitaxial materials can be effectively reduced, so that non-radiative recombination of an active region is reduced, reverse leakage current is reduced, and service life of an LED is prolonged; on the other hand, light emitted by the active region is scattered for multiple times through the interface of the GaN and the sapphire substrate, so that the emergence angle of total reflection light is changed, the emergence probability of light of the flip LED from the sapphire substrate is increased, and the light extraction efficiency is improved. By combining the two reasons, the emergent light brightness of the LED grown on the PSS is greatly improved compared with that of the traditional LED, meanwhile, the reverse leakage current is reduced, and the service life of the LED is prolonged.
With the development of process technology in the LED field and the rapid growth of the whole LED industry, the research on the GaN-based LED device PSS substrate is also gradually increased. The yield of the PSS substrate is also one of the reasons for limiting the economic benefit, and thus, it is important to improve the manufacturing efficiency of the PSS substrate.
Disclosure of Invention
In view of the problems in the background art, it is an object of the present disclosure to provide a four inch PSS substrate throughput improvement scheme that can improve throughput of four inch PSS substrates.
In order to achieve the above objective, the present disclosure provides a solution for improving the yield of four-inch PSS substrates, comprising the steps of: step one, yellow PR pattern; step two, preparing nine disc etching process carrier discs; step three, checking whether the nine-disc etching process carrier disc meets the index of the process requirement; and step four, producing the four inch PSS substrate by using a nine-disc etching process carrier disc.
In the first step, the yellow PR pattern is a yellow exposure pattern.
In some embodiments, in step one, the yellow PR pattern parameters are: the width of the upper bottom is 1.8um-2.2um; the width of the lower bottom is 1.3um-2.3um; the height is 1.6um-3.2um.
In some embodiments, in step two, the nine-plate etch production includes ME main etch and OE over etch.
In some embodiments, the parameters of the ME prime are: the flow rate of the back helium is 4Torr-6Torr; the pressure of the cavity is 3mT-7mT during the process; the power of the upper electrode is 1000W-2000W; the power of the lower electrode is 100W-500W; etching gas BCl 3 /Cl 2 50-150sccm/80-120sccm; the time of the process is 1800s-2000s; the temperature of the process is 15-25 ℃.
In some embodiments, the parameters of OE overetch are: the flow rate of the back helium is 4Torr-6Torr; the pressure of the cavity is 3mT-7mT during the process; the power of the upper electrode is 1000W-2000W; the power of the lower electrode is 500W-1100W; etching gas BCl 3 /Cl 2 50-150sccm/80-120sccm; the time of the process is 1800s-2000s; the temperature of the process is 15-25 ℃.
In some embodiments, in step three, the method of verifying the disk specifications of a nine-disk etching process includes SEM testing.
The beneficial effects of the present disclosure are as follows:
the method of the present disclosure increases the throughput of four inch PSS substrates with the same number of tools by increasing the number of process slices per disk of the etching process.
Drawings
Fig. 1 is a nine-wafer disk etching process carrier disk prepared in example 1 and a four-inch wafer-loaded carrier disk.
Fig. 2 is an eight-plate etching process carrier plate prepared in comparative example 1.
Fig. 3 is a graph after yellow light PR of example 1.
Fig. 4 is a SEM topography of a four inch wafer of example 1.
Fig. 5 is a defect data diagram of a four inch wafer according to example 1.
Fig. 6 is an AOI diagram of a four inch wafer of example 1.
Fig. 7 is a graph of% CD CV for a four inch wafer according to example 1.
Fig. 8 is an atomic force microscope data diagram of a four inch wafer of example 1.
Fig. 9 is a comparative STD plot of four inch wafers of example 1 and comparative example 1.
Detailed Description
The following details the lift-off scheme for the four inch PSS substrate throughput of the present disclosure.
The four inch PSS substrate yield improvement scheme comprises the following steps:
step one, yellow PR pattern; step two, preparing nine disc etching process carrier discs; step three, checking whether the nine-disc etching process carrier disc meets the index of the process requirement; and step four, producing the four inch PSS substrate by using a nine-disc etching process carrier disc.
The nine-disc etching process carrier disc is prepared by adjusting a scheme of a specific process formula, and the yield is improved by utilizing the newly prepared nine-disc etching process carrier disc.
In the present disclosure, the yellow PR pattern requires morphology control by AOI (CD measurement) and SEM, and the monitored morphology meets the process requirements. In some embodiments, in step one, the yellow PR pattern parameters are: the width of the upper bottom is 1.8um-2.2um; the width of the lower bottom is 1.3um-2.3um; the height is 1.6um-3.2um.
In some embodiments, in step two, the nine-plate etch production includes ME main etch and OE over etch. ME (main etch) is the main step of etching, and OE (over etch) is the over etch to modify the etched morphology.
In some embodiments, the ME masterThe parameters of the engraving are: the flow rate of the back helium is 4Torr-6Torr; the pressure of the cavity is 3mT-7mT during the process; the power of the upper electrode is 1000W-2000W; the power of the lower electrode is 100W-500W; etching gas BCl 3 /Cl 2 50-150sccm/80-120sccm; the time of the process is 1800s-2000s; the temperature of the process is 15-25 ℃.
In some embodiments, the parameters of OE overetch are: the back helium flow is 4-6 torr; the pressure of the cavity is 3mT-7mT during the process; the power of the upper electrode is 1000W-2000W; the power of the lower electrode is 500W-1100W; etching gas BCl 3 /Cl 2 50-150sccm/80-120sccm; the time of the process is 1800s-2000s; the temperature of the process is 15-25 ℃.
In some embodiments, in step three, the method of verifying whether the nine-plate etch process carrier plate meets the specifications of the process requirements includes SEM testing. The slices of the nine-slice disc process are tested by SEM, and if the slices meet the requirements, the four-inch PSS substrate production is carried out.
In step three, the upper and lower limits of the current SEM specification are: the height is 1.70-1.80um, the bottom width is 2.60-2.78um, i.e. the test result is qualified in the range.
In the third step, the indexes for checking whether the nine-disc etching process carrier disc meets the process requirement comprise:
(1) The pattern substrate meets the four inch specification; (2) Four inches epitaxial growth, confirm whether to meet the requirement of epitaxial growth process; (3) And confirming whether the photoelectric parameters meet the process requirements or not according to the chip production model.
[ test procedure and test results ]
The apparatus of the present disclosure:
the etching equipment is a machine of NMC ELEDE 380E model of northern microelectronics, and is suitable for the PSS substrate process of 4 inch wafers;
the exposure apparatus is an SSB300 exposure tool for Shanghai Microelectronics (SMEE).
Further testing equipment needed to meet the process' demand criteria:
the measuring equipment to be utilized is as follows: SEM (Hitachi Flex 1000), AOI test (Rui), AFM (model: division Edge equipment manufacturer: bruker), focus microscope, film thickness gauge (KLA), other equipment required to be used are common microscope, step gauge, suction pen, cleaning machine, etc.
Example 1
Step one, yellow PR pattern, adjusting parameters of the yellow PR pattern as follows: the width of the upper bottom is 1.81um; the width of the bottom is 2.14um; the height is 2.43um;
step two, preparing nine disc etching process carrier discs,
the parameters of ME main engraving are as follows: the back helium flow is 4Torr; the pressure of the cavity is 3mT in the process; the power of the upper electrode is 1200W; the power of the lower electrode is 450W; etching gas BCl 3 /Cl 2 50sccm/70sccm; the process time is 1860s; the temperature of the process is 23 ℃;
the parameters for OE over etching are: the back helium flow is 4Torr; the pressure of the cavity is 3mT in the process; the power of the upper electrode is 1200W; the power of the lower electrode is 500W; etching gas BCl 3 /Cl 2 50sccm/80sccm; the time of the process is 1818s; the temperature of the process was 23 ℃.
And thirdly, checking the disc carrying specification of the nine-disc etching process, and testing SEM, AOI, AFM and CD CV percent data.
And step four, producing the four inch PSS substrate by using a nine-disc etching process carrier disc.
The tests are shown in tables 1, 2 and FIGS. 1-9.
Comparative example 1
Eight-disc etching process carrier discs are prepared according to the conventional means, and four-inch PSS substrates are produced.
The tests are shown in tables 1, 2 and 9.
Test description
In order to detect the specification of the nine-disc etching process carrier disc, the appearance of the four-inch wafer carried by the nine-disc etching process carrier disc and microscopic test data, namely SEM, AOI, AFM and CD CV% data, are tested, and the specification of the nine-disc etching process carrier disc prepared by us can be reflected through the data of the four-inch wafer loaded by test.
In order to ensure the accuracy of the data, testing of multiple groups of data is performed.
Table 1 comparison of eight-disc and nine-disc epitaxial data
Table 2 comparison of electrical parameters for eight and nine discs
The 4 sets of epitaxial data in table 1 show that the comparative epitaxial data of eight discs and nine discs, WLD, are in 455, which indicates that the results from nine discs meet the technological requirements of the optical band; the data ratio of 5nm size is higher for nine discs than for eight discs, the smaller the STD is, the better, it is obvious that the STD of nine discs is smaller than for eight discs, and the more superior product ratio of STD <1.8% is that nine discs are higher than for eight discs; I.I is the electrical data of the eight and nine discs, and the electrical parameters show that the results of the eight and nine discs are substantially equivalent;
in table 2 is a specific comparison of three sets of electrical parameters for eight and nine discs: the voltages of Vf, vz are substantially equivalent; WLD consistency is higher; the ESDHM electrostatic discharge rate is basically consistent, and the process requirement is met; the Ir resistance reject ratio of the nine discs is also lower, and the mass production requirement of products is met.
The defect data diagram of fig. 5 can reflect the detection of defects of the etched product, if the number of defects is too large, the quality of the product and even the yield of the whole process are affected, so that it is very important to control the number of defects of the etched product, generally, the number of defects of the PSS substrate is controlled to be about 50, the defect data of 400 pieces of etched products produced by the nine-disc process are listed in fig. 5, the defect data are basically within the range of controlling the defects, the process requirements are met, and the clamping control of the defects by the station is met.
The AOI test machine in FIG. 6 is used for measuring the bottom width of the etched product, the process requirement can be met by controlling the bottom width of the conical pile and clamping the conical pile within the range of the epitaxial requirement, the epitaxial bottom width ranges from 2.55 um to 2.75um, the optimal bottom width is about 2.65um, the AOI average value is 2.66um (normal range 2.55 um to 2.75 um), that is, the AOI average value of the application is within the epitaxial bottom width range, and the standard is met.
In the above, we say that CD means the bottom width, and in terms of process, CD CV% is required to meet the requirement of not more than 2% for mass production, and the data in fig. 7 shows that the average value of CD CV% is 0.65% (less than 2% is required), and CD CV% is shown in nine discs and between discs, that is, we say, the in-disc uniformity and the inter-disc uniformity, and the requirement of inter-disc uniformity. The data of fig. 7 shows intra-chip uniformity, which is a guarantee of inter-chip and inter-disk uniformity.
AFM (atomic force microscope) is an instrument used to test the height of a conical stack, and the data in FIG. 8 shows that the AFM average is around 1.80um (process requirement 1.77-1.85 um) over the height range of the process requirement.
The new device in fig. 9 is test data for eight discs. The data shows that the STD (standard deviation) of the nine discs is smaller, indicating that the nine discs are more uniform than the eight discs.
From the analysis of the above data, it can be seen that SEM, AOI, CD CV, AFM all meet the process requirements, and all nine discs verified by the process meet the requirements for mass production.
The above disclosed features are not intended to limit the scope of the disclosure, and therefore, equivalent variations to what is described in the claims of the disclosure are intended to be included within the scope of the claims of the disclosure.
Claims (2)
1. A four inch PSS substrate throughput enhancement scheme comprising the steps of:
step one, yellow PR pattern;
step two, preparing nine disc etching process carrier discs;
step three, checking whether the nine-disc etching process carrier disc meets the index of the process requirement;
step four, a nine-disc etching process is used for carrying discs to produce four-inch PSS substrates;
in the first step, the yellow PR pattern parameters are:
the width of the upper bottom is 1.8um-2.2um;
the width of the lower bottom is 1.3um-2.3um;
the height is 1.6um-3.2um;
in the second step, the etching production of the nine discs comprises ME main etching and OE over etching;
the ME main engraving parameters are as follows:
the flow rate of the back helium is 4Torr-6Torr;
the pressure of the cavity is 3mT-7mT during the process;
the power of the upper electrode is 1000W-2000W;
the power of the lower electrode is 100W-500W;
etching gas BCl 3 /Cl 2 50-150sccm/80-120sccm;
the time of the process is 1800s-2000s;
the temperature of the process is 15-25 ℃;
the parameters of the OE over-etching are as follows:
the flow rate of the back helium is 4Torr-6Torr;
the pressure of the cavity is 3mT-7mT during the process;
the power of the upper electrode is 1000W-2000W;
the power of the lower electrode is 500W-1100W;
etching gas BCl 3 /Cl 2 50-150sccm/80-120sccm;
the time of the process is 1800s-2000s;
the temperature of the process is 15-25 ℃.
2. The four inch PSS substrate throughput enhancement scheme according to claim 1, characterized in that,
in step three, the method for checking the specification of the carrier disc of the nine-disc etching process comprises SEM test.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202111682942.9A CN114361309B (en) | 2021-12-31 | 2021-12-31 | Four inch PSS substrate output improving scheme |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202111682942.9A CN114361309B (en) | 2021-12-31 | 2021-12-31 | Four inch PSS substrate output improving scheme |
Publications (2)
Publication Number | Publication Date |
---|---|
CN114361309A CN114361309A (en) | 2022-04-15 |
CN114361309B true CN114361309B (en) | 2024-03-05 |
Family
ID=81104471
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202111682942.9A Active CN114361309B (en) | 2021-12-31 | 2021-12-31 | Four inch PSS substrate output improving scheme |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN114361309B (en) |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102176497A (en) * | 2011-03-11 | 2011-09-07 | 上海蓝光科技有限公司 | Technological method for improving capacity of ICP (inductively coupled plasma) to etch sapphire pattern substrate |
TW201533835A (en) * | 2014-02-17 | 2015-09-01 | Ulvac Taiwan Inc | Substrate tray set for use in dry etching device |
CN106449344A (en) * | 2016-10-28 | 2017-02-22 | 湘能华磊光电股份有限公司 | Lower tray and method for improving dry etching uniformity of 4-inch patterned substrates |
CN111180370A (en) * | 2020-02-21 | 2020-05-19 | 北京北方华创微电子装备有限公司 | Wafer bearing tray and semiconductor processing equipment |
CN111816604A (en) * | 2020-08-18 | 2020-10-23 | 北京智创芯源科技有限公司 | Wafer etching method |
CN112768402A (en) * | 2020-12-31 | 2021-05-07 | 深圳市金旺鑫五金有限公司 | PSS etching carrier tray |
CN113698208A (en) * | 2021-08-24 | 2021-11-26 | 南通三责精密陶瓷有限公司 | Method for manufacturing silicon carbide carrying disc for plasma etching and silicon carbide carrying disc |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102012215067A1 (en) * | 2012-08-24 | 2014-02-27 | Osram Opto Semiconductors Gmbh | Method for producing isolated semiconductor devices e.g. LED, involves carrying out etching process for cutting the substrate in separation areas formed in substrate through recess walls, and forming isolated semiconductor devices |
US10276426B2 (en) * | 2016-05-31 | 2019-04-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | System and method for performing spin dry etching |
-
2021
- 2021-12-31 CN CN202111682942.9A patent/CN114361309B/en active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102176497A (en) * | 2011-03-11 | 2011-09-07 | 上海蓝光科技有限公司 | Technological method for improving capacity of ICP (inductively coupled plasma) to etch sapphire pattern substrate |
TW201533835A (en) * | 2014-02-17 | 2015-09-01 | Ulvac Taiwan Inc | Substrate tray set for use in dry etching device |
CN106449344A (en) * | 2016-10-28 | 2017-02-22 | 湘能华磊光电股份有限公司 | Lower tray and method for improving dry etching uniformity of 4-inch patterned substrates |
CN111180370A (en) * | 2020-02-21 | 2020-05-19 | 北京北方华创微电子装备有限公司 | Wafer bearing tray and semiconductor processing equipment |
CN111816604A (en) * | 2020-08-18 | 2020-10-23 | 北京智创芯源科技有限公司 | Wafer etching method |
CN112768402A (en) * | 2020-12-31 | 2021-05-07 | 深圳市金旺鑫五金有限公司 | PSS etching carrier tray |
CN113698208A (en) * | 2021-08-24 | 2021-11-26 | 南通三责精密陶瓷有限公司 | Method for manufacturing silicon carbide carrying disc for plasma etching and silicon carbide carrying disc |
Also Published As
Publication number | Publication date |
---|---|
CN114361309A (en) | 2022-04-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2010161354A (en) | Template substrate for semiconductor light emitting element, method for manufacturing the same, method for manufacturing semiconductor light emitting element and semiconductor light emitting element | |
CN102694090B (en) | A kind of manufacture method of patterned Sapphire Substrate | |
CN106816404B (en) | Film-expanding and grain-taking method of wafer and production method of wafer | |
CN111009496A (en) | A kind of semiconductor substrate with high thermal conductivity and preparation method thereof | |
CN114378645A (en) | Preparation process of high-flatness polished wafer | |
CN102709413B (en) | Method for manufacturing patterned sapphire substrate | |
CN107342254B (en) | The calibration method of crystal edge etching machine bench | |
CN114361309B (en) | Four inch PSS substrate output improving scheme | |
CN112067402A (en) | A dislocation defect analysis method | |
CN117116746A (en) | Molecular beam epitaxy process optimization method of InP-based semiconductor device | |
CN110648909B (en) | Back grinding method, substrate wafer and electronic device | |
CN114220731A (en) | Thinning method of III-V semiconductor wafer | |
CN102856442B (en) | Method for improving uniformity of epitaxial layer of sapphire substrate | |
CN101083220B (en) | Substrate, substrate inspecting method and methods of manufacturing an element and a substrate | |
CN114485522B (en) | Method for testing surface damage layer thickness of <100> crystal orientation silicon single crystal grinding sheet | |
CN112542373B (en) | Method for improving grinding yield of warped sapphire wafer | |
JP2017077978A (en) | Crystal growth substrate, its manufacturing method and inspecting method | |
CN112802769B (en) | A method for detecting and repairing a patterned composite substrate | |
CN114527362B (en) | Light-emitting brightness calibration method of AlGaInP quaternary LED chip production machine | |
JPWO2020049731A1 (en) | Semiconductor device | |
CN113053724B (en) | Composite patterned substrate, preparation method and LED epitaxial wafer | |
CN113752401A (en) | Method for improving flatness of SiC wafer | |
CN114078991A (en) | A kind of preparation method and uniform glue system of patterned substrate | |
CN115241334B (en) | AlGaInP mini LED with periodically distributed contact point electrodes and preparation method thereof | |
TWI889618B (en) | Processing method and polished wafer for final polishing process |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |