CN114360824A - A NiCrCuNi double-layer thin film resistor with near-zero temperature coefficient of resistance and its preparation method - Google Patents

Abstract

The invention belongs to the technical field of metal film surface treatment, and discloses a NiCr CuNi double-layer film resistor with a near-zero resistance temperature coefficient, which consists of a NiCr layer and a CuNi layer, wherein the NiCr layer is arranged on the substrate side, the CuNi layer is arranged on the top of the NiCr layer, the NiCr layer contains 80:20 wt% of Ni and has a thickness of 150-300 nm, the CuNi layer contains 75:25 at% to 50:50 at% of Cu and Ni, and has an overall thickness of 250-720 nm, and the crystal structures of the NiCr layer and the CuNi layer are both FCC single-phase solid solutions. The NiCr CuNi double-layer film resistor with the resistance temperature coefficient close to 0 is prepared by using a NiCr alloy target, a Cu target and a Ni target and adopting a magnetron sputtering technology, the element content of a CuNi layer can be adjusted by changing the power ratio of Cu and Ni targets during co-sputtering, so that the resistance temperature coefficient of the CuNi layer is changed, the effect of adjusting the thickness ratio of the two layers can be achieved by adjusting the sputtering time length of the NiCr layer and the sputtering time length of the co-sputtered CuNi layer, and the resistance temperature coefficient is adjusted so that the absolute value of the resistance temperature coefficient is close to 0.

Description

A kind of NiCrCuNi double-layer thin film resistor with near zero resistance temperature coefficient and preparation method thereof

technical field

The invention belongs to the technical field of surface treatment of metal thin films, in particular to a NiCr CuNi double-layer thin film resistor with nearly zero resistance temperature coefficient and a preparation method thereof.

Background technique

Thin film resistors are one of the basic devices of integrated circuits and are used in huge quantities in integrated circuits. It is one of the core problems to be solved urgently in the development of high-precision integrated circuits to prepare a low temperature coefficient of resistance film whose resistivity does not change with the working environment temperature. Thin film resistors have the advantages of a wide surface resistance range (10Ω/□～100KΩ/□), low and adjustable resistance temperature coefficient, long life, good repeatability, low parasitic resistance, etc., and have been widely used in hybrid integrated circuits. , microwave integrated circuits, chip resistors and other precision electronic instruments.

With the improvement of the integration density of microelectronic devices, the use of thin-film technology to prepare passive thin-film resistors on substrates has become a very important part of integrated circuit technology. Impedance and other aspects play an important role; at present, several material systems commonly used in thin film resistors are: NiCr series, CrSi series and TaNx series. Because of the high resistivity and excellent stability of NiCr alloys, NiCr alloys have become widely commercialized. However, NiCr alloy thin film resistors currently have shortcomings such as unstable resistance value and large resistance temperature coefficient.

SUMMARY OF THE INVENTION

The purpose of the present invention is to address the above problems. The present invention provides a NiCrCuNi double-layer thin film resistor with a near-zero temperature coefficient of resistance and a preparation method thereof. The method is mainly realized by magnetron sputtering technology. The prepared double-layer thin film Resistor By adjusting the thickness ratio of the NiCr/CuNi layers, the advantages of thin film resistors with a temperature coefficient of resistance ranging from 0 to 10 ppm/°C can be obtained.

In order to achieve the above object, the present invention provides the following technical solutions: a NiCrCuNi double-layer thin-film resistor with a near-zero temperature coefficient of resistance, the double-layer thin-film resistor is composed of a NiCr layer and a CuNi layer, the NiCr layer is arranged on the substrate side, and the CuNi layer is arranged on the substrate side. The layer is arranged on the top of the NiCr layer, the element content of the NiCr layer is Ni:Cr=80:20wt% and the thickness is 150～300nm, the content ratio of Cu and Ni in the CuNi layer is 75:25at% to 50:50at% and the overall thickness is 250nm～ 720nm, the crystal structure of NiCr layer and CuNi layer are FCC single-phase solid solution;

In the present invention, the traditional NiCr alloy (80:20wt%) thin film resistor and the CuNi thin film are stacked to form a double-layer thin film structure. Since the current direction is parallel to the surface of the thin film, the NiCr thin film and the CuNi thin film can achieve a parallel effect. The thickness ratio of the NiCr film with a temperature coefficient of resistance and the CuNi film with a negative temperature coefficient of resistance can achieve the effect of adjusting the temperature coefficient of resistance of the double-layer film, so that the absolute value of the temperature coefficient of resistance is close to 0; another film layer of the present invention is selected CuNi can obtain a film with a negative temperature coefficient of resistance by changing the element content of the CuNi film, and combine with the NiCr film to form a zero temperature coefficient of resistance thin film resistor.

As a preferred technical solution of the present invention, the average temperature coefficient of resistance of the double-layer film resistor in the range of 25°C to 125°C is -86～15ppm/°C, the average square resistance value is 0.70～1.47Ω/□, and the average elastic modulus is is 70GPa, the average hardness is 5GPa;

For the above Ω/□, the unit is the unit of sheet resistance, and its size has nothing to do with the size of the sample, which is defined as the resistance of a square semiconductor thin layer in the direction of current, in ohms per square, sheet resistance (SheetResistance) It refers to the resistance value per unit thickness and unit area of the conductive material, referred to as the square resistance. Ideally, it is equal to the resistivity of the material divided by the thickness.

The present application also proposes a method for preparing a NiCrCuNi double-layer thin film resistor with a near-zero temperature coefficient of resistance. The specific operation steps are as follows:

S1. Place the Si sheet or other substrate on the sample stage in the magnetron sputtering equipment, install the sputtering target on the target base, and the target material is NiCr alloy target, Cu target, Ni target;

S2, the deposition chamber is evacuated, and then Ar gas is introduced, and the substrate is connected to a radio frequency power supply for reverse sputtering cleaning;

S3. Connect the NiCr alloy target to the sputtering power supply, sputter and deposit the NiCr film, and turn off the NiCr target after reaching the specified time;

S4. Connect the Cu and Ni targets to the sputtering power supply, co-sputter and deposit CuNi films, adjust the sputtering power of the two targets as required, and turn off the Cu and Ni targets after reaching the specified time.

As a preferred technical solution of the present invention, the sputtering targets used in step S1 are NiCr alloy targets, Cu targets, and Ni targets, wherein the mass ratio of NiCr alloy target elements is Ni:Cr=80:20.

As a preferred technical solution of the present invention, in step S2, after the vacuum degree is pumped to <7×10 ^-4 Pa, Ar is introduced to keep the pressure in the vacuum chamber at about 1.0~2.0Pa, and the radio frequency power supply is turned on and the power is adjusted to 60~ 120W, the substrate is cleaned by reverse sputtering, and the time of reverse sputtering is 10-15 minutes.

As a preferred technical solution of the present invention, in step S3, the vacuum degree in the sputtering chamber is pumped to <7×10 ^-4 , Ar gas is introduced, the vacuum degree is adjusted to 0.2-0.8Pa, and the sputtering power of the NiCr alloy target is It is 100W, the substrate bias is -40V～-100V, and the sputtering of the NiCr target is stopped after deposition for 20～40min.

As a preferred technical solution of the present invention, the Cu target power is 50W, the Ni target power is 50W～120W, the substrate bias voltage is -40V～-100V, and the sputtering of Ni and Cu is stopped after 20～60min of deposition. Target; Cu and Ni target co-sputtering can adjust the composition of CuNi layer by adjusting the sputtering power ratio of the two targets, and the composition content of the CuNi layer film ranges from 75:25at% to 50:50at%.

As a preferred technical solution of the present invention, after the deposition is completed in step S4, the sputtering power supply, bias power supply and Ar gas are turned off and vacuuming is continued. Temperature Coefficient of Double Layer Sheet Resistors.

Compared with the prior art, the beneficial effects of the present invention are as follows:

1. In the present invention, the NiCr CuNi double-layer thin film resistor is prepared by using NiCr alloy target, Cu target and Ni target by magnetron sputtering technology, and CuNi can be adjusted by changing the power ratio of Cu and Ni targets during co-sputtering. The element content of the layer can change the temperature coefficient of resistance of the CuNi layer. By adjusting the sputtering time of the NiCr layer and the sputtering time of the co-sputtered CuNi layer, the effect of adjusting the thickness ratio of the two layers can be achieved, thereby adjusting the temperature coefficient of resistance to make it absolute value is close to 0.

Description of drawings

Fig. 1 is a schematic diagram of the SEM surface morphology photograph of the NiCr CuNi double-layer thin film resistor of the present invention;

2 is a schematic diagram of a SEM cross-sectional photograph of a NiCr CuNi double-layer thin film resistor of the present invention;

Fig. 3 is the XRD pattern schematic diagram of the NiCrCuNi double-layer thin film resistor of the present invention;

4 is a schematic diagram of the GDOES element content map of the NiCrCuNi double-layer thin film resistor of the present invention;

5 is a schematic diagram of a square resistance value-temperature line graph (540nm; 720nm; 1040nm) of the NiCrCuNi double-layer thin film resistor of the present invention;

6 is a schematic diagram of a temperature coefficient of resistance-temperature line graph (540 nm; 720 nm; 1040 nm) of the NiCr CuNi double-layer thin film resistance of the present invention.

Detailed ways

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

As shown in Fig. 1 to Fig. 6, the present invention proposes a NiCrCuNi double-layer thin film resistor with near-zero temperature coefficient of resistance and a preparation method thereof. The following drawings are briefly described. In Fig. 3, the upper line is Ni fcc , the bottom line is Cr fcc.

Example 1

The present invention provides a method for preparing a thin film resistor with a near-zero temperature coefficient of resistance, which specifically includes the following steps:

The Si wafer with its own high-resistance silicon film with a resistivity of 7.5-11.5 Ω·cm was ultrasonically cleaned in acetone, alcohol and deionized water in order to remove the contaminants attached to its surface, and dried with a hair dryer. Deionized water stains on the surface;

After the Si wafer is fixed on the sample tray, it is placed in the sample transfer chamber of the magnetron sputtering equipment. After the vacuum degree of the sample transfer chamber is pumped to 7×10 ^-4 Pa, Ar is introduced and the flow rate is adjusted to 30sccm, and the radio frequency power supply is turned on. The power is up to 120W to perform reverse sputtering cleaning on the Si wafer, aiming to further remove impurities on the surface of the Si wafer. During the reverse sputtering, the pressure of the sample transfer chamber is maintained at about 2.0Pa, and the reverse sputtering time is 10min;

The Si wafers cleaned by back-sputtering were transferred to the sputtering chamber together with the sample disk. The sputtering targets were NiCr alloy targets, Cu targets and Ni targets, wherein the mass ratio of NiCr alloy target elements was Ni:Cr=80:20. Pump the vacuum in the sputtering chamber to 5×10 ^-4 Pa;

Enter Ar, set the Ar flow to 30sccm, adjust the valve of the molecular pump to adjust the vacuum to 5 × 10-1Pa, first connect the NiCr target to the DC power supply, set the sputtering power to 100W, set the bias voltage to -80V, and pre- Sputtering for 10 minutes is used to remove impurities and contaminants on the surface of the target to improve the quality of subsequent coatings;

After the pre-sputtering, remove the sample tray baffle and turn on the power of the sample tray rotation motor at the same time to start sputtering;

The sputtering time is 40min. After the sputtering is completed, the sputtering power supply, bias power supply, and argon gas flowmeter are turned off. Then the Cu target and the Ni target are connected to the DC power supply at the same time, and the Ar flowmeter is turned on and set to 30sccm. The pressure is adjusted to 0.5Pa, the sputtering power supply and the bias power supply are turned on, the power of the Cu target and the Ni target is adjusted to 50W, the bias voltage is adjusted to -80V, and the total sputtering time is 20min. Piezoelectric power source, rotation motor, sample tray baffle, Ar flowmeter and its valve, then open the molecular pump valve to the maximum and continue to vacuumize, and finally transfer the sample tray with the plated thin-film Si sheet to the sample transfer chamber. And take it out, you can get the thin film resistor with near zero resistance temperature coefficient. The thickness is 240nm, the square resistance of the film at 25°C is 1.47Ω/□, and the temperature coefficient of resistance of the film varies from 0 to 7.9ppm/°C in the range of 25°C to 125°C.

Example 2

The present invention provides a method for preparing a thin film resistor with a near-zero temperature coefficient of resistance, comprising the following steps:

The Si wafer with its own high-resistance silicon film with a resistivity of 7.5-11.5 Ω·cm was ultrasonically cleaned in acetone, alcohol and deionized water in order to remove the contaminants attached to its surface, and dried with a hair dryer. Deionized water stains on the surface;

After the Si wafer is fixed on the sample tray, it is placed in the sample transfer chamber of the magnetron sputtering equipment. After the vacuum degree of the sample transfer chamber is pumped to 6×10 ^-4 Pa, Ar is introduced and the flow rate is adjusted to 30sccm, and the RF power supply is turned on. The power is up to 100W to perform reverse sputtering cleaning on the Si wafer, aiming to further remove impurities on the surface of the Si wafer. During the reverse sputtering, the pressure of the sample transfer chamber is maintained at about 1.7Pa, and the reverse sputtering time is 13min;

The Si wafer after reverse sputtering cleaning is transferred to the sputtering chamber together with the sample plate, and the sputtering target is selected as NiCr alloy target, Cu target, and Ni target, wherein the mass ratio of NiCr alloy target elements is Ni:Cr=80:20 , the vacuum in the sputtering chamber was pumped to 3.5×10 ^-4 Pa;

Enter Ar, set the Ar flow to 30sccm, adjust the valve of the molecular pump to adjust the vacuum to 5×10 ^-1 Pa, first connect the NiCr target to the DC power supply, set the sputtering power to 100W, and set the bias voltage to -80V. Pre-sputtering for 15 minutes is used to remove impurities and contaminants on the surface of the target to improve the quality of subsequent coatings;

After the pre-sputtering, remove the sample tray baffle and turn on the power of the sample tray rotation motor at the same time to start sputtering;

The sputtering time is 40min. After the sputtering is completed, the sputtering power supply, bias power supply, and argon gas flowmeter are turned off. Then the Cu target and the Ni target are connected to the DC power supply at the same time, and the Ar flowmeter is turned on and set to 30sccm. The pressure is adjusted to 0.5Pa, the sputtering power supply and the bias power supply are turned on, the power of the Cu target and the Ni target is adjusted to 50W, the bias voltage is adjusted to -80V, and the total sputtering time is 40min. Piezoelectric power supply, rotation motor, sample tray baffle, Ar flowmeter and its valve, then open the molecular pump valve to the maximum and continue to vacuumize, and finally transfer the sample tray with the plated thin-film Si sheet to the sample transfer chamber. And take it out to obtain the thin film resistor with near zero resistance temperature coefficient. The thickness of the film is 420nm, the square resistance of the film at 25°C is 0.89Ω/□, and the temperature coefficient of resistance of the film varies from -170 to 0ppm/°C in the range of 25°C to 125°C.

Example 3

The present invention provides a method for preparing a thin film resistor with a near-zero temperature coefficient of resistance, comprising the following steps:

The Si wafer with its own high-resistance silicon film with a resistivity of 7.5-11.5 Ω·cm was ultrasonically cleaned in acetone, alcohol and deionized water in order to remove the contaminants attached to its surface, and dried with a hair dryer. Deionized water stains on the surface;

The Si wafer is fixed on the sample tray and placed in the sample transfer chamber of the magnetron sputtering equipment. After the vacuum degree of the sample transfer chamber is pumped to 5×10 ^-4 Pa, Ar is introduced and the flow rate is adjusted to 30sccm, and the RF power supply is turned on to adjust The power is increased to 80W to perform reverse sputtering cleaning on the Si wafer, which aims to further remove impurities on the surface of the Si wafer. During the reverse sputtering, the pressure of the sample transfer chamber is maintained at about 1.5Pa, and the reverse sputtering time is 15min.

The Si wafer after reverse sputtering cleaning is transferred to the sputtering chamber together with the sample plate, and the sputtering target is selected as NiCr alloy target, Cu target, and Ni target, wherein the mass ratio of NiCr alloy target elements is Ni:Cr=80:20 , the vacuum in the sputtering chamber was pumped to 2×10 ^-4 Pa.

Enter Ar, set the Ar flow to 30sccm, adjust the valve of the molecular pump to adjust the vacuum to 5 × 10-1Pa, first connect the NiCr target to the DC power supply, set the sputtering power to 100W, set the bias voltage to -80V, and pre- Sputtering for 20min is used to remove impurities and contaminants on the surface of the target to improve the quality of subsequent coatings.

After the pre-sputtering, remove the sample tray baffle and turn on the power of the sample tray rotation motor at the same time to start sputtering;

The sputtering time is 40min. After the sputtering is completed, the sputtering power supply, bias power supply, and argon gas flowmeter are turned off. Then the Cu target and the Ni target are connected to the DC power supply at the same time, and the Ar flowmeter is turned on and set to 30sccm. The pressure is adjusted to 0.5Pa, the sputtering power supply and the bias power supply are turned on, the power of the Cu target and the Ni target is adjusted to 50W, the bias voltage is adjusted to -80V, and the total sputtering time is 60min. Piezoelectric power supply, rotation motor, sample tray baffle, Ar flowmeter and its valve, then open the molecular pump valve to the maximum and continue to vacuumize, and finally transfer the sample tray with the plated thin-film Si sheet to the sample transfer chamber. And take it out to obtain the thin film resistor with near zero resistance temperature coefficient. The thickness is 740nm, the square resistance of the film at 25°C is 0.69Ω/□, and the temperature coefficient of resistance of the film varies from -275 to 150ppm/°C in the range of 25°C to 125°C.

It should be noted that, in this document, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any relationship between these entities or operations. any such actual relationship or sequence exists. Moreover, the terms "comprising", "comprising" or any other variation thereof are intended to encompass non-exclusive inclusion such that a process, method, article or device comprising a list of elements includes not only those elements, but also includes not explicitly listed or other elements inherent to such a process, method, article or apparatus.

Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, and substitutions can be made in these embodiments without departing from the principle and spirit of the invention and modifications, the scope of the present invention is defined by the appended claims and their equivalents.

Claims (8)

1. A NiCr CuNi double-layer film resistor with a near-zero temperature coefficient of resistance is characterized in that: the double-layer film resistor is composed of a NiCr layer and a CuNi layer, wherein the NiCr layer is arranged on the bottom side of a substrate, the CuNi layer is arranged on the top of the NiCr layer, the content of elements of the NiCr layer is 80:20 wt%, the thickness of the NiCr layer is 150-300 nm, the content ratio of Cu to Ni in the CuNi layer is 75:25 at% to 50:50 at%, the overall thickness of the CuNi layer is 250-720 nm, and the crystal structures of the NiCr layer and the CuNi layer are both FCC single-phase solid solutions.

2. A NiCr CuNi double layer thin film resistor having a near-zero temperature coefficient of resistance according to claim 1, wherein: the double-layer film resistor has an average temperature coefficient of resistance of-86 to 15 ppm/DEG C, an average square resistance of 0.70 to 1.47 omega/□, an average elastic modulus of 70GPa, and an average hardness of 5GPa in a temperature range of 25 to 125 ℃.

3. A preparation method of a NiCr CuNi double-layer film resistor with a near-zero resistance temperature coefficient is characterized by comprising the following steps: the specific operation steps are as follows:

s1, placing a Si sheet or other substrates on a sample table in a magnetron sputtering device, and mounting a sputtering target material on a target seat, wherein the target material is a NiCr alloy target material, a Cu target and a Ni target;

s2, vacuumizing the deposition chamber, introducing Ar gas, and connecting the substrate to a radio frequency power supply for reverse sputtering cleaning;

s3, connecting the NiCr alloy target material into a sputtering power supply, sputtering and depositing a NiCr film, and closing the NiCr target after the specified time is reached;

and S4, connecting the Cu and Ni targets into a sputtering power supply, co-sputtering and depositing a CuNi film, adjusting the sputtering power of the two targets as required, and closing the Cu and Ni targets after reaching the specified time.

4. The method for preparing NiCr CuNi double-layer film resistor with near-zero temperature coefficient of resistance according to claim 3, characterized in that: the sputtering target used in the step S1 is an NiCr alloy target material, a Cu target, and an Ni target, wherein the mass ratio of the elements of the NiCr alloy target is Ni: Cr ═ 80: 20.

5. The method for preparing NiCr CuNi double-layer film resistor with near-zero temperature coefficient of resistance according to claim 3, characterized in that: in the step S2, the vacuum degree is pumped to<7×10^-4And after Pa, introducing Ar to keep the pressure in the vacuum chamber at about 1.0-2.0 Pa, turning on a radio frequency power supply and adjusting the power to 60-120W, and carrying out reverse sputtering cleaning on the substrate for 10-15 min.

6. The method for preparing NiCr CuNi double-layer film resistor with near-zero temperature coefficient of resistance according to claim 3, characterized in that: in step S3, the vacuum degree in the sputtering chamber is pumped to<7×10^-4And introducing Ar gas, adjusting the vacuum degree to 0.2-0.8 Pa, sputtering the NiCr alloy target with the sputtering power of 100W and the substrate bias voltage of-40V-100V, and stopping sputtering the NiCr target after depositing for 20-40 min.

7. The method for preparing NiCr CuNi double-layer film resistor with near-zero temperature coefficient of resistance according to claim 3, characterized in that: s4, the Cu target power is 50W, the Ni target power is 50W-120W, the substrate bias is-40V-100V when co-sputtering deposition is carried out, and the sputtering of Ni and Cu targets is stopped after 20-60 min of deposition; when Cu and Ni targets are co-sputtered, the component of the CuNi layer can be adjusted by adjusting the sputtering power ratio of the two targets, and the component content range of the CuNi layer film is 75:25 at% to 50:50 at%.

8. The method for preparing NiCr CuNi double-layer film resistor with near-zero temperature coefficient of resistance according to claim 3, characterized in that: and S4, after the deposition is finished, turning off a sputtering power supply, a bias power supply and Ar gas, continuously vacuumizing, and taking out the substrate when the temperature of the substrate is lower than 50 ℃ to obtain the double-layer film resistor with the near-zero resistance temperature coefficient.

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