CN114355685B - Array substrate, preparation method of array substrate and display panel - Google Patents

Abstract

The application discloses an array substrate, a preparation method of the array substrate and a display panel. The array substrate includes a substrate, a plurality of scanning lines, a plurality of data lines, a color filter layer and a display electrode; the corresponding pixels of the color filter layer are provided with A plurality of color-resisting layers of different colors, the color-resisting layer includes a first color-resisting layer, the first color-resisting layer includes an edge portion close to the data line, and a middle portion away from the data line, along the arrangement direction of the scanning lines, the edge portion The thickness of the display electrode is greater than the thickness of the middle part; the display electrode includes a first display electrode, the first display electrode is arranged on the first color resistance layer, and the first display electrode includes a plurality of first display electrode branches; wherein, the first display electrode arranged corresponding to the edge part The width of a display electrode branch is smaller than the width of the first display electrode branch corresponding to the middle part. The present application adjusts the width of the display electrode branches through the above method, improves the uneven transmittance of the array substrate, and improves the image quality performance effect.

Description

Array substrate, preparation method of array substrate and display panel

technical field

The present application relates to the field of display technology, and in particular to an array substrate, a method for preparing the array substrate, and a display panel.

Background technique

Liquid crystal displays occupy more and more important positions in people's life and work. It has the advantages of thin body, power saving, cheap price, etc., so it has been widely used, such as: computers, mobile phones, TVs and so on. A liquid crystal display is usually composed of a liquid crystal display panel and a backlight module. The liquid crystal display panel is composed of an opposing substrate, an array substrate for controlling electrical signals, and liquid crystal interposed between the two substrates.

However, existing liquid crystal display panels tend to adopt array substrates made by COA (color filter layer on array substrate) technology. The current color filter layer is generally made of photoresist coated, but because Due to the leveling problem of the photoresist itself, the formed color resist layer may appear concave, resulting in thin thickness in the middle position and thick edge position, resulting in the middle position and edge position of the pixel corresponding to the color resist layer. The transmittance is not the same, and then the chromaticity and brightness are different, resulting in poor product quality. Therefore, it is necessary to propose a new design to improve the problem of poor image quality caused by different transmittance.

Contents of the invention

The purpose of the present application is to provide an array substrate, a method for preparing the array substrate, and a display panel. By adjusting the width of the display electrode branches, the uneven transmittance of the array substrate can be improved, and the image quality can be improved.

The present application discloses an array substrate, which is applied to a display panel. The array substrate includes a substrate, a plurality of scanning lines, a plurality of data lines, a color filter layer, and a display electrode; a plurality of the scanning lines and a plurality of the The data lines are all arranged on the substrate, and arranged in a staggered manner to form a plurality of pixels, the pixels include display electrodes, and the display electrodes include a plurality of display electrode branches; the color filter layer is provided corresponding to the pixels A plurality of color-resisting layers of different colors, the color-resisting layer includes a first color-resisting layer, the first color-resisting layer includes an edge portion close to the data line, and a middle portion away from the data line, along the The arrangement direction of the scanning lines, the thickness of the edge part is greater than the thickness of the middle part; the display electrode includes a first display electrode, and the first display electrode is arranged on the first color resistance layer, so The first display electrode includes a plurality of first display electrode branches; wherein, the width of the first display electrode branch corresponding to the edge portion is smaller than the width of the first display electrode branch corresponding to the middle portion.

Optionally, the display panel is a plane switching display panel, the first display electrode includes a pixel electrode and a common electrode, the pixel electrode includes a plurality of pixel electrode branches; the common electrode includes a plurality of common electrode branches, The plurality of common electrode branches and the plurality of pixel electrode branches are alternately arranged at intervals, and extend along the arrangement direction of the data lines to form a horizontal electric field; among the plurality of pixel electrode branches, corresponding to the edge portion The width of the set pixel electrode branch is smaller than the width of the pixel electrode branch set corresponding to the middle part; and/or among the plurality of common electrode branches, the width of the common electrode branch set corresponding to the edge part The width is smaller than the width of the common electrode branch corresponding to the middle part.

Optionally, the display panel is a vertical alignment display panel, the first display electrode includes a pixel electrode, and the pixel electrode includes a cross keel and a plurality of pixel electrode branches, and the plurality of pixel electrode branches are all connected to the Cross keel connection; the part of the pixel electrode branch corresponding to the edge part is the end part, the part of the pixel electrode branch corresponding to the middle part is the middle part, and the width of the end part of the pixel electrode branch is smaller than the pixel electrode branch The width of the middle of the electrode branch.

Optionally, the display panel is a fringe field switching technology display panel, the first display electrode includes a pixel electrode, and the pixel electrode includes a plurality of pixel electrode branches; the display electrode includes a second display electrode, and the first display electrode includes Two display electrodes are arranged between the color filter layers, the second display electrode is a monolithic electrode, and forms a fringe electric field with the pixel electrode; among the plurality of pixel electrode branches, corresponding to the fringe part is arranged The width of the pixel electrode branch is smaller than the width of the pixel electrode branch corresponding to the middle part.

Optionally, the width range of the first display electrode branch corresponding to the middle part is 1.5um-3.0um; the width range of the first display electrode branch corresponding to the edge part is 1.0um-2.0um um.

Optionally, the array substrate further includes a flat layer, the flat layer is disposed above the color filter layer, and the display electrodes are disposed on the flat layer; and the flat layer corresponds to the The thickness is smaller than the thickness corresponding to the middle part, so that the flat layer is flush with the surface away from the color filter layer.

Optionally, the color filter layer further includes at least one second color-resist layer, and the thickness of the second color-resist layer is uniform along the arrangement direction of the scanning lines; the display electrode includes a third display electrode , the third display electrode is disposed on the second color resistance layer, and the third display electrode includes a plurality of third display electrode branches; wherein, the width of the third display electrode branches is equal to the width corresponding to the middle portion Set the width of the first display electrode branch.

Optionally, for the first display electrode branch disposed corresponding to the edge portion, along the arrangement direction of the data lines, the width of the first display electrode branch is from a position close to the scan line to a position far away from the data line. The position of the scan line increases gradually.

The present application also discloses a preparation method of an array substrate, which is used to make any one of the array substrates disclosed in the present application. The preparation method of the array substrate includes the steps of:

A substrate is provided, and a plurality of scanning lines and a plurality of data lines are sequentially prepared on the substrate, and arranged in a staggered manner to form a plurality of pixel regions;

forming at least one second color-resist layer corresponding to the pixel area, and finally forming the first color-resist layer to form a color filter layer;

forming a flat layer on the color filter layer;

On the planar layer, a plurality of third display electrodes are prepared corresponding to the top of the second color-resist layer, and a plurality of first display electrodes are prepared corresponding to the top of the first color-resist layer to form a conductive layer, so that in the pixel area form pixels;

Wherein, the width of the display electrode branch of the first display electrode disposed corresponding to the edge portion of the first color resistance is greater than the width of the display electrode branch of the first display electrode disposed corresponding to the middle portion of the first color resistance width.

The present application also discloses a display panel, comprising an opposite substrate and any one of the array substrates disclosed in the present application, the opposite substrate and the array substrate are arranged in a box.

The color-resist layer, especially the last formed color-resist layer, is prone to concave problems, which leads to different pixel transmittances corresponding to the color-resist layer and poor image quality. This application adjusts the corresponding The width of the first display electrode branch at different positions of the first color-resist layer, specifically, corresponding to the edge portion where the thickness of the color-resist layer is greater, the width of the first display electrode branch is smaller than the first display electrode branch corresponding to the middle part of the color-resist layer. The width of the display electrode branch, and when the thickness of the color resistance layer is the same, the smaller the width of the first display electrode branch, the higher the transmittance; and when the width of the first display electrode branch is the same, the thicker the thickness of the color resistance layer, the higher the transmittance The lower the transmittance; therefore, at the edge position, the first display electrode branch with a smaller width compensates the transmittance at the edge position, so that the transmittance at the edge and the middle portion tends to be consistent, improving the array substrate. The phenomenon of uneven transmittance can avoid the difference in chromaticity and brightness caused by inconsistent transmittance, thereby improving the display effect of image quality, improving the quality of products, and optimizing the structure of products.

Description of drawings

The included drawings are used to provide a further understanding of the embodiments of the present application, which constitute a part of the specification, are used to illustrate the implementation of the present application, and explain the principle of the present application together with the text description. Apparently, the drawings in the following description are only some embodiments of the present application, and those skilled in the art can obtain other drawings according to these drawings without any creative effort. In the attached picture:

Fig. 1 is the schematic diagram of the display panel of the present application;

FIG. 2 is a schematic top view of an array substrate according to Embodiment 1 of the present application;

FIG. 3 is a schematic top view of a first display electrode according to Embodiment 1 of the present application;

Fig. 4 is a schematic cross-sectional view of Fig. 2 along the A-A ' direction;

5 is a schematic cross-sectional view of an array substrate according to Embodiment 1 of the present application;

6 is a schematic cross-sectional view of an array substrate according to Embodiment 2 of the present application;

7 is a schematic top view of an array substrate according to Embodiment 3 of the present application;

8 is a schematic cross-sectional view of an array substrate according to Embodiment 3 of the present application;

FIG. 9 is a step diagram of the method for preparing the array substrate of the present application;

FIG. 9a is a schematic structural diagram of the first stage of preparing an array substrate in the present application;

Fig. 9b is a schematic structural diagram of the second stage of preparing the array substrate of the present application;

Fig. 9c is a schematic structural diagram of the third stage of preparing an array substrate in the present application;

Fig. 9d is a schematic structural diagram of the fourth stage of preparing the array substrate of the present application.

Among them, 10, display panel; 20, array substrate; 210, substrate; 220, scanning line; 221, pixel area; 230, data line; 240, color filter layer; 241, first color resist layer; 243, the middle part; 244, the second color resistance layer; 250, the flat layer; 260, the display electrode; 261, the first display electrode; 263, the second display electrode; 262, the third display electrode; 264, the display electrode Branch; 270, pixel electrode; 271, pixel electrode branch; 278, cross keel; 280, common electrode; 281, common electrode branch; 30, opposite substrate; 40, liquid crystal layer.

detailed description

It should be understood that the terminology and specific structural and functional details disclosed herein are representative only for describing specific embodiments, but the application can be embodied in many alternative forms and should not be construed as merely Be limited by the examples set forth herein.

In the description of the present application, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating relative importance, or implicitly indicating the quantity of indicated technical features. Therefore, unless otherwise specified, the features defined as "first" and "second" may explicitly or implicitly include one or more of these features; "multiple" means two or more. The term "comprising" and any variations thereof mean non-exclusive inclusion, possible presence or addition of one or more other features, integers, steps, operations, units, components and/or combinations thereof.

Also, Center, Horizontal, Top, Bottom, Left, Right, Vertical, Horizontal, Top, Bottom, Inner, Outer The terms indicating the orientation or positional relationship are described based on the orientation or relative positional relationship shown in the drawings, and are only for the convenience of describing the simplified description of the application, rather than indicating that the referred device or element must have a specific orientation. , are constructed and operate in a particular orientation and therefore are not to be construed as limiting the application.

In addition, unless otherwise clearly specified and limited, the terms "mounted", "connected" and "connected" should be interpreted in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection , can also be an electrical connection; it can be a direct connection, an indirect connection through an intermediary, or an internal communication between two components. Those of ordinary skill in the art can understand the specific meanings of the above terms in this application according to specific situations.

The present application will be described in detail below with reference to the accompanying drawings and optional embodiments.

FIG. 1 is a schematic diagram of a display panel of the present application. As shown in FIG. 1 , the present application discloses a display panel 10 including an opposing substrate 30 and an array substrate 20 , and the opposing substrate 30 and the array substrate 20 are arranged in a box.

The display panel 10 of the present application can be a liquid crystal display panel 10, which can be a laptop computer, a tablet computer, a mobile phone, a television, etc., and the display panel 10 is composed of an opposite substrate 30 and an array substrate 20 arranged in a box. A liquid crystal layer 40 is also arranged between the array substrates 20, and the deflection of the liquid crystal is realized by driving an electric signal between the two substrates to display a picture. Moreover, the transmittance of the display panel 10 is consistent, and the chromaticity and brightness presented at various angles are uniform. , good image quality and good user experience, the display panel 10 can be vertically aligned (VA), in-plane switching (IPS), etc., which are widely used, and thus the products are highly competitive.

This application mainly makes improvements to the array substrate 20 in the display panel 10, specifically as follows:

Embodiment one:

2 is a schematic top view of an array substrate according to Embodiment 1 of the present application; FIG. 3 is a schematic top view of a first display electrode according to Embodiment 1 of this application; FIG. 4 It can be seen that the present application discloses an array substrate 20, which is applied to the display panel 10. The array substrate 20 includes a substrate 210, a plurality of scanning lines 220, a plurality of data lines 230, a color filter layer 240 and a display electrode 260; A scanning line 220 and a plurality of data lines 230 are all arranged on the substrate 210, and are arranged in a staggered manner to form a plurality of pixels, the pixel includes a display electrode 260, and the display electrode 260 includes a plurality of display electrode branches 264; the color filter layer 240 corresponds to the pixel There are multiple color-resist layers of different colors, the color-resist layer includes a first color-resist layer 241, the first color-resist layer 241 includes an edge portion 242 close to the data line 230, and a middle portion 243 away from the data line 230, along the scanning The arrangement direction of the lines 220, the thickness of the edge portion 242 is greater than the thickness of the middle portion 243; the display electrode 260 includes a first display electrode 261, and the first display electrode 261 is arranged on the first color resistance layer 241, and the first display electrode 261 includes A plurality of first display electrode branches; wherein, the width of the first display electrode branches corresponding to the edge portion 242 is smaller than the width of the first display electrode branches corresponding to the middle portion 243 .

The color-resist layer, especially the last formed color-resist layer, is prone to concave problems, which leads to different pixel transmittances corresponding to the color-resist layer and poor image quality. This application adjusts the corresponding The width of the first display electrode branches at different positions of the first color-resist layer 241, specifically, corresponding to the edge portion 242 where the thickness of the color-resist layer is greater, the width of the first display electrode branch is smaller than that corresponding to the middle portion 243 of the color-resist layer The width of the first display electrode branch, and when the thickness of the color resist layer is the same, the smaller the width of the first display electrode branch, the higher the transmittance; and when the width of the first display electrode branch is the same, the thicker the color resist layer is thicker, the lower the transmittance; therefore, at the edge portion 242, the first display electrode branch with a smaller width compensates the transmittance at the edge portion 242, so that the transmittance of the edge portion 242 and the middle portion 243 tends to Consistency improves the unevenness of the transmittance of the array substrate 20, avoids the difference in chromaticity and brightness caused by the inconsistency of the transmittance, and then improves the display effect of image quality, improves the quality of the product, and optimizes the structure of the product.

Moreover, the width of the first display electrode branch corresponding to the edge portion 242 gradually increases from a position close to the scan line 220 to a position away from the scan line 220 along the arrangement direction of the data lines 230 .

Usually, the first color-resist layer 241 is not only concave along the direction of the arrangement of the scanning lines 220, but also has a concave shape along the direction of the arrangement of the data lines 230. Therefore, the corresponding edge portion 242 The first display electrode branch is provided. Along the arrangement direction of the data lines 230, the width of the first display electrode branch gradually increases from the position close to the scanning line 220 to the width of the position away from the scanning line 220, so that the first display electrode branch presents a The shape is wide in the middle and tapered toward both sides to offset the low transmittance of the first color resist layer 241 due to the excessive thickness near the scan line 220 , so that the transmittance of the array substrate 20 tends to be consistent.

Specifically, the array substrate 20 further includes a flat layer 250, the flat layer 250 is disposed above the color filter layer 240, and the display electrodes 260 are disposed on the flat layer 250; thickness, so that the flat layer 250 is flush with the surface away from the color filter layer 240 .

In this embodiment, a flat layer 250 is fabricated on the top of the color filter layer 240 to planarize the array substrate 20, and the thickness of the flat layer 250 corresponding to the edge portion 242 of the first color-resist layer 241 is smaller than the thickness of the middle portion 243 , so that the upper surface of the flat layer 250 (that is, the surface of the flat layer 250 away from the color filter layer 240) is flush, not only can facilitate the production of the display electrode 260, make the thickness of the display electrode 260 uniform, enhance the stability of the electric field, and can also When the array substrates 20 are combined to form the display panel 10 , the thickness of the liquid crystal layer 40 is uniform, which further improves the uniformity of image quality.

FIG. 4a is a graph showing the relationship between the transmittance of the present application and the width of the display electrode branch 264. FIG. The width range of the first display electrode branch is 1.5um˜3.0um; the width range of the first display electrode branch corresponding to the edge portion 242 is 1.0um˜2.0um _.

In this embodiment, the inventors of the present application have done experimental simulations on the transmittance and the width of the display electrode branch 264, as well as the transmittance and the thickness of the color-resisting layer, and conducted multiple verifications during actual production. Usually, the display electrode The width of the branch 264 ranges from 1.0um to 3.0um to ensure normal liquid crystal driving. As shown in FIG. 4μm, due to the leveling problem of the color-resist layer, the thickness of the first color-resist layer 241 corresponds to the thickness of the edge part 242 being 0.2um-0.5μm larger than the thickness of the middle part 243, as shown in Figure 4b (the abscissa is the color The reduction value of the film thickness of the middle part of the resist layer relative to the film thickness of the edge part, the ordinate is the change value of the transmittance), the thicker the thickness of the color resist layer, the lower the transmittance.

Preferably, corresponding to the position of the middle part 243, the width of the first display electrode branch can be set to 1.5um-3.0um, corresponding to the position where the transmittance of the edge part 242 is low, the width of the first display electrode branch can be reduced. Set it to 1.0um~2.0um, so that the transmittance tends to be the same at the position corresponding to the middle part 243 and the edge part 242 of the first color-resist layer 241, improving the image quality; it should be noted that the electrode width at the corresponding position plus The widths of adjacent empty areas are kept consistent so as not to change the aperture ratio of the display panel.

Further, FIG. 5 is a schematic cross-sectional view of an array substrate according to Embodiment 1 of the present application. As shown in FIG. The thickness of the color resistance layer 244 is uniform; the display electrode 260 includes a third display electrode 262, and the third display electrode 262 is arranged on the second color resistance layer 244, and the third display electrode 262 includes a plurality of third display electrode branches; wherein, the first The widths of the three display electrode branches are equal to the width of the first display electrode branch disposed corresponding to the middle portion 243 .

Usually the color filter layer 240 is formed by color-resist layers of three colors, red (R), green (G) and blue (B), and the first color-resist layer 241 is usually the last formed color-resist layer, usually B Color resistance layer, the color filter layer 240 also includes at least one second color resistance layer 244, the second color resistance layer 244 is a color resistance layer formed before the first color resistance layer 241, which can be R and/or B color resistance layer, usually the thickness of the second color-resist layer 244 is even, does not appear concave or the degree of concave is not obvious, the influence on the transmittance can be ignored, and the difference in image quality is not obvious to the human eye, therefore, the corresponding middle part The width of the first display electrode branch set at 243 is set to be equal to the width of the third display electrode branch, which is equivalent to determining the array substrate based on the width of the third display electrode branch set on the second color resist layer 244 The transmittance of 20 is convenient to make the transmittance of the entire array substrate 20 consistent. It is also possible to set the width of the first display electrode branch of the edge portion 242 with the width of the third display electrode branch, so that the edge portion 242 The width of the first display electrode branch is more accurate, and the width of the first display electrode branch is adjusted to offset the concave shape of the color resistance layer This causes a phenomenon that the transmittance of the edge portion 242 decreases, thereby making the transmittance more consistent.

Specifically, the display panel 10 is an in-plane switching (IPS) display panel 10, the first display electrode 261 includes a pixel electrode 270 and a common electrode 280, including a plurality of pixel electrode branches 271; the common electrode 280 includes a plurality of common electrode branches 281, A plurality of common electrode branches 281 and a plurality of pixel electrode branches 271 are alternately arranged at intervals, and extend along the arrangement direction of the data lines 230 to form a horizontal electric field; among the plurality of pixel electrode branches 271, the pixel electrode branches corresponding to the edge portion 242 The width of 271 is smaller than the width of the pixel electrode branch 271 set corresponding to the middle part 243; and/or among the plurality of common electrode branches 281, the width of the common electrode branch set corresponding to the edge part 242 is smaller than the width of the common electrode branch set corresponding to the middle part 243 width.

In this embodiment, the array substrate 20 is applied to the IPS display panel 10, the pixel electrodes 270 and the common electrodes 280 are located on the color filter layer 240, and a plurality of pixel electrode branches 271 and a plurality of common electrode branches 281 are alternately arranged at intervals, And extend along the arrangement direction of the data lines 230 to form a horizontal electric field and drive the liquid crystal to deflect. At this time, corresponding to the first color resist layer 241, the width of the pixel electrode branch 271 provided on the edge portion 242 can be set to be smaller than that of the middle portion 243 The width of the pixel electrode branch 271 and the width of the common electrode branch provided in the edge part 242 are set to be smaller than the width of the common electrode branch provided in the middle part 243, so that the transmittance of the edge part 242 and the middle part 243 are consistent.

Embodiment two:

6 is a schematic cross-sectional view of an array substrate according to Embodiment 2 of the present application. Referring to FIG. 6, it can be seen that the display panel 10 is a fringe field switching (FFS) display panel 10, and the first display electrode 261 includes a pixel electrode 270, and the pixel electrode 270 includes a plurality of The pixel electrode branch 271; the display electrode 260 includes a second display electrode 263, the second display electrode 263 is arranged between the substrate 210 and a plurality of scanning lines 220 and a plurality of data lines 230, and the second display electrode 263 is a monolithic electrode , forming a fringe electric field with the pixel electrode 270; among the plurality of pixel electrode branches 271, the width of the pixel electrode branch 271 corresponding to the edge portion 242 is smaller than the width of the pixel electrode branch 271 corresponding to the middle portion 243.

In this embodiment, the array substrate 20 is also applied to the FFS display panel 10. The difference from the first embodiment is that the first display electrode 261 includes a pixel electrode 270, and the pixel electrode 270 includes a plurality of pixel electrode branches 271, and the pixel electrode 270 is located at On the color filter layer 240, the display electrode 260 further includes a second display electrode 263, the second display electrode 263 is located between the substrate 210 and the color filter layer 240, that is, below the pixel electrode 270, and the second display electrode 263 is The integral electrode forms a fringe electric field with the pixel electrode 270. The second display electrode 263 can be a common electrode 280. At this time, the common electrode 280 and the pixel electrode 270 are arranged in different layers. In this way, only the pixel electrode corresponding to the edge portion 242 is arranged The width of the branch 271 is set to be smaller than the width of the pixel electrode branch 271 corresponding to the middle portion 243 to ensure uniform transmittance.

Embodiment three:

7 is a schematic top view of an array substrate according to Embodiment 3 of the present application, and FIG. 8 is a schematic cross-sectional view of an array substrate according to Embodiment 3 of the present application. Referring to FIGS. The first display electrode 261 includes a pixel electrode 270, and the pixel electrode 270 includes a cross keel 278 and a plurality of pixel electrode branches 271, and the plurality of pixel electrode branches 271 are connected to the cross keel 278; the part of the pixel electrode branch 271 corresponding to the edge portion 242 is an end The part of the pixel electrode branch 271 corresponding to the middle part 243 is the middle part, and the width of the end part of the pixel electrode branch 271 is smaller than the width of the middle part of the pixel electrode branch 271 .

In this embodiment, the array substrate 20 is applied to the VA display panel 10, the first display electrode 261 includes a pixel electrode 270, and the pixel electrode 270 may have a "m"-shaped structure, including a cross keel 278 and a plurality of pixel electrode branches 271, A plurality of pixel electrode branches 271 are all connected to the cross keel 278, wherein the part of the branch corresponding to the edge part 242 is the end part, the part of the branch corresponding to the middle part 243 is the middle part, and the width of the end part of the branch is smaller than the width of the middle part of the branch. In order to make the branch width near the data line 230 or the scan line 220 smaller than the width of the branch at the middle position, the transmittance is guaranteed to be consistent and the image quality is improved.

Usually, the pixel electrode 270 also includes a closed frame arranged on the outside of the cross keel 278 and the plurality of pixel electrode branches 271, the closed frame is back-shaped, therefore, the width of the closed frame corresponding to the position of the edge portion 242 can also be changed, and the closed frame is close to the scanning area. The width of the line 220 or the data line 230 is smaller than the width of the middle position of the closed frame, showing a structure with a wide middle of the closed frame and thinner sides, so as to ensure the uniform transmittance area of the entire array substrate 20 .

Fig. 9 is a step diagram of the method for preparing the array substrate of the present application. With reference to Fig. 9, it can be known that the present application also discloses a method for preparing the array substrate, which is used to make any array substrate disclosed in the present application. The preparation method comprises steps:

S1. Provide a substrate, sequentially prepare a plurality of scanning lines and a plurality of data lines on the substrate, and arrange them in a staggered manner to form a plurality of pixel regions;

S2. Form at least one second color-resist layer corresponding to the pixel area, and finally form the first color-resist layer to form a color filter layer;

S3, forming a flat layer on the color filter layer;

S4. On the planar layer, prepare a plurality of third display electrodes above the second color-resist layer, and prepare a plurality of first display electrodes above the first color-resist layer to form a conductive layer, so as to The pixel area forms a pixel;

Wherein, the width of the display electrode branch of the first display electrode disposed corresponding to the edge portion of the first color resistance is smaller than the display electrode branch of the first display electrode disposed corresponding to the middle portion of the first color resistance width.

Fig. 9a is a schematic structural diagram of the first stage of preparing the array substrate of the present application. Referring to Fig. 9a, it can be seen that on the pad, a series of processes such as film formation, photolithography, and etching are used to sequentially form a plurality of scanning lines and A plurality of data lines, and a plurality of scanning lines and a plurality of data lines are alternately arranged to form a plurality of pixel regions. The manufacturing methods of the plurality of scanning lines and the plurality of data lines adopt the existing known technology, and will not be repeated here.

Figure 9b is a schematic structural diagram of the second stage of the array substrate of the present application. Referring to Figure 9b, it can be seen that after the production of multiple scanning lines and multiple data lines is completed, a plurality of second color resists are first formed by coating photoresist layer, and finally form the first color-resist layer to form the color filter layer. When making the color-resist layer in the color filter layer, the general production sequence is to do R first, then G, and finally B, that is, the first color-resist layer It is the B color-resist layer, the second color-resist layer is R and/or G color-resist layer, and due to the leveling property of the color-resist layer, the thickness of the middle part of the first color-resist layer is smaller than the thickness of the edge part, and usually the thickness difference will In 0.2um ~ 0.5um.

Fig. 9c is a schematic structural diagram of the third stage of the array substrate of the present application. With reference to Fig. 9c, it can be seen that a flat layer is formed on the color filter layer using masking technology, and a halftone masking process is used at the position corresponding to the first color-resisting layer, so that The thickness of the flat layer at the edge is smaller than the thickness of the flat layer at the middle, so as to ensure that the upper surface of the flat layer is flush.

Fig. 9d is a schematic diagram of the structure of the fourth stage of the array substrate of the present application. Referring to Fig. 9d, it can be seen that a plurality of third display electrodes are prepared on the flat layer by using processes such as film formation, yellow light, and etching, corresponding to the top of the second color resist layer, And prepare a plurality of first display electrodes corresponding to the top of the first color resistance layer, form a conductive layer, and use patterning to form pixel electrodes and/or common electrode patterns to form pixels in the pixel area, and the formed first The widths of the display electrode branches of the display electrodes are different. Specifically, the width of the display electrode branches of the first display electrode disposed corresponding to the edge of the first color resistance is smaller than that of the first display electrode disposed corresponding to the middle part of the first color resistance. Displays the width of the electrode branch.

Moreover, the width range of the first display electrode branch corresponding to the middle part is 1.5um-3.0um; the width range of the first display electrode branch corresponding to the edge part is 1.0um-2.0um, and the specific width can be determined according to the first color resistance In the layer, the thickness of the middle part and the edge part is adjusted in a targeted manner to ensure consistent transmittance.

Specifically, in step S4, the formed third display electrode includes a third pixel electrode and a third common electrode, and a plurality of third subpixel electrodes in the third pixel electrode are connected to the third common electrode A plurality of third common sub-electrodes in the first pixel electrode are alternately arranged at intervals; the formed first display electrode includes a first pixel electrode and a first common electrode, and the plurality of first sub-pixel electrodes in the first pixel electrode are connected to the first pixel electrode A plurality of first common sub-electrodes in a common electrode are alternately arranged at intervals.

As shown in Figure 9d, the formed third display electrode includes a third pixel electrode and a third common electrode, the first display electrode includes a first pixel electrode and a first common electrode, and the third pixel electrode, the third common electrode, the third A pixel electrode and a first common electrode both have a comb structure to form a horizontal electric field, so that the array substrate can be applied to an IPS display panel, and a plurality of pixel electrode branches and a plurality of common electrode branches are parallel to the data lines, of course, The plurality of pixel electrode branches and the plurality of common electrode branches can also be V-shaped.

In addition, when the first display electrode is only a pixel electrode and is applied to a VA display panel, the first display electrode can also be in the shape of a "mice" or other shapes, which can be specifically determined according to different types of display panels. Scene, optimize the design to increase the transmittance and improve the display quality.

It should be noted that the limitations of the steps involved in this plan are not considered as limiting the order of the steps without affecting the implementation of the specific plan. The steps written in the front can be executed first. It can also be performed later, or even at the same time, as long as the solution can be implemented, it should be considered as belonging to the protection scope of the present application.

It should be noted that the inventive concept of the present application can form a lot of embodiments, but the space of the application documents is limited, and it is impossible to list them one by one. The technical features can be combined arbitrarily to form a new embodiment, and the original technical effect will be enhanced after each embodiment or technical feature is combined.

The technical scheme of the present application can be widely used in various display panels, such as TN (Twisted Nematic, twisted nematic) display panel, IPS (In-Plane Switching, plane conversion type) display panel, VA (Vertical Alignment, vertical alignment type) Both the display panel and the MVA (Multi-Domain Vertical Alignment, multi-quadrant vertical alignment type) display panel are applicable to the above solutions.

The above content is a further detailed description of the present application in conjunction with specific optional implementation modes, and it cannot be deemed that the specific implementation of the present application is limited to these descriptions. For those of ordinary skill in the technical field to which this application belongs, some simple deduction or substitutions can be made without departing from the concept of this application, which should be deemed to belong to the protection scope of this application.

Claims (6)

1. An array substrate applied to a display panel, characterized in that the array substrate includes a substrate, a plurality of scanning lines, a plurality of data lines, a color filter layer and display electrodes; A plurality of the scanning lines and a plurality of the data lines are arranged on the substrate and arranged in a staggered manner to form a plurality of pixels, the pixels include display electrodes, and the display electrodes include a plurality of display electrode branches; The color filter layer is provided with a plurality of color-resist layers of different colors corresponding to the pixels, the color-resist layer includes a first color-resist layer, and the first color-resist layer includes an edge portion close to the data line, and the middle part away from the data lines, along the arrangement direction of the scan lines, the thickness of the edge part is greater than the thickness of the middle part; The display electrode includes a first display electrode, the first display electrode is disposed on the first color resistance layer, and the first display electrode includes a plurality of first display electrode branches; Wherein, the width of the first display electrode branch corresponding to the edge part is smaller than the width of the first display electrode branch corresponding to the middle part; Wherein, the first display electrode branch compensates the transmittance of the edge portion, so that the transmittance of the edge portion and the middle portion are consistent; The display panel is a plane switching display panel, and the first display electrode includes: a pixel electrode, including a plurality of pixel electrode branches; and The common electrode includes a plurality of common electrode branches, the plurality of common electrode branches and the plurality of pixel electrode branches are alternately arranged at intervals, and extend along the arrangement direction of the data lines to form a horizontal electric field; Among the plurality of pixel electrode branches, the width of the pixel electrode branch corresponding to the edge part is smaller than the width of the pixel electrode branch corresponding to the middle part; And/or among the plurality of common electrode branches, the width of the common electrode branch corresponding to the edge portion is smaller than the width of the common electrode branch corresponding to the middle portion. 2. The array substrate according to claim 1, wherein the array substrate further comprises a flat layer, the flat layer is arranged above the color filter layer, and the display electrodes are arranged on the flat layer ; And the thickness of the flat layer corresponding to the edge portion is smaller than the thickness corresponding to the middle portion, so that the surface of the flat layer away from the color filter layer is flush. 3. The array substrate according to claim 1, wherein the color filter layer further comprises at least one second color-resist layer, along the arrangement direction of the scanning lines, the second color-resist layer Uniform thickness; The display electrode includes a third display electrode, the third display electrode is arranged on the second color resistance layer, and the third display electrode includes a plurality of third display electrode branches; Wherein, the width of the third display electrode branch is equal to the width of the first display electrode branch disposed corresponding to the middle portion. 4. The array substrate according to claim 1, wherein the width of the first display electrode branch corresponding to the edge portion along the arrangement direction of the data lines is gradually increase from a position close to the scan line to a position far from the scan line. 5. A method for preparing an array substrate, characterized in that it is used to manufacture the array substrate according to claims 1 to 4, and the method for preparing the array substrate comprises the steps of: A substrate is provided, and a plurality of scanning lines and a plurality of data lines are sequentially prepared on the substrate, and arranged in a staggered manner to form a plurality of pixel regions; forming at least one second color-resist layer corresponding to the pixel area, and finally forming the first color-resist layer to form a color filter layer; forming a flat layer on the color filter layer; On the planar layer, a plurality of third display electrodes are prepared corresponding to the top of the second color-resist layer, and a plurality of first display electrodes are prepared corresponding to the top of the first color-resist layer to form a conductive layer, so that in the pixel area form pixels; Wherein, the width of the display electrode branch of the first display electrode disposed corresponding to the edge portion of the first color resistance is greater than the width of the display electrode branch of the first display electrode disposed corresponding to the middle portion of the first color resistance width. 6 . A display panel, characterized by comprising an opposite substrate and the array substrate according to any one of claims 1 to 4 , wherein the opposite substrate and the array substrate are arranged in a box.

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