CN114327516A - Circuit and method for modifying chip system memory to burn - Google Patents

Abstract

The invention discloses a circuit and method for modifying a chip system memory for programming, comprising the following steps: (1) writing an FPGA project file; (2) programming the project file into the FPGA; (3) completing the circuit connection; ( 4) Start burning the program, and output control commands to the flash from the project file with the help of the bist pad to modify the system memory data; (5) Check whether the program is successfully burned. The invention uses the flash bist test pad in the chip to enter the bist mode, connects the chip to be tested through the fpga board, sends the corresponding erasing and writing instructions and contents to the bist serial interface, and can also modify the contents of the system memory after the chip leaves the factory. It is convenient to test the BootLoader program, and it is convenient for the debugging and testing of the chip to the flash.

Description

A circuit and method for modifying chip system memory for programming

technical field

The invention relates to a circuit and a method for modifying a chip system memory for programming, belonging to the technical field of chip testing.

Background technique

Flash is a type of memory chip, and the data in it can be modified by a specific program. Flash often means Flash Memory in the field of electronics and semiconductors, which is usually referred to as "flash memory". Flash memory, also known as flash memory, combines the advantages of ROM and RAM, not only has the performance of electronically erasable and programmable (EEPROM), but also can quickly read data (the advantage of NVRAM), so that data will not be lost due to power failure .

The flash has 3 startup modes, one of which is to start with the BootLoader in the system memory (system memory). The system memory contains the BootLoader program, which can be used to reprogram the flash memory using the USART1 serial interface. System memory can usually only be written to when the chip is manufactured and cannot be modified by the user. In order to be able to test the written BootLoader program and to facilitate the debugging and testing of the flash, we need to be able to modify the system memory content after the chip leaves the factory.

At this time, we propose a circuit and method for modifying the memory of the chip system for programming. The bist circuit of the flash is intended to solve the problem of testing the physical faults and yield of the flash area. The factory will enter the test mode through the test PAD, and send different signals to enter different test modes according to the sequence of the bist signal to test whether the flash storage area is damaged, and record the bad area address and replace it with redundant sectors. According to this principle, when the chip is tested after leaving the factory, we use the bist test pad to enter the bist mode, connect the chip through the FPGA board, and send the corresponding erase and write instructions and content to the bist serial interface, and then the content in the system memory can be changed. Run the BootLoader test.

SUMMARY OF THE INVENTION

The purpose of the present invention is to provide a circuit and method for modifying the system memory of a chip for programming, aiming at changing the content in the system memory, so as to facilitate subsequent BootLoader testing.

In order to achieve the above purpose, the present invention provides the following technical solutions: a circuit for modifying a chip system memory for programming, including an FPGA, an MCU test board, a chip to be tested, a downloader and a host computer, and the chip to be tested is installed on the MCU test board. , so that the flash is connected to the corresponding pins of the MCU test board, the power pins of the FPGA and MCU test boards are connected to the power supply, the GND pins of the FPGA and MCU test boards are grounded, one end of the downloader is connected to the FPGA through the serial port, and the other end of the downloader is connected to The host computer is connected, and the FPGA is connected with the MCU test board, so that the TDI, TCK, TDO, STROBE pins of the FPGA are connected to the TDI, TCK, TDO, and STROBE pins of the flash correspondingly, and the TESTEN pin of the flash is set to high level .

The invention also discloses a method for modifying the chip system memory for programming, using the above-mentioned circuit for modifying the chip system memory for programming, which specifically includes the following steps:

(1) Write the FPGA project files required for programming;

(2) Burn the project file into the FPGA;

(3) Complete the above circuit connection;

(4) Press the reset button of the FPGA to start programming the program. The FPGA communicates with the flash through the bist pad, and the project file uses the bist pad to output control commands to the flash to modify the system memory data;

(5) Check whether the program has been programmed successfully. If so, the program programming is completed. If not, go back to step (4) and continue to execute the program.

Further, the above-mentioned method for modifying the memory of the chip system for programming, wherein: the FPGA project file written in the step (1) follows the flash IP bist protocol, and the content in the project file includes: setting the flash interface signal ERASE to a high level to use To erase the original system memory in the flash, set the flash interface signal PROG to a high level for programming the program, and write the address and data in the flash interface signal A and the flash interface signal DIN respectively to realize the modification of the system memory.

Further, the above-mentioned method for modifying the system memory of a chip for programming, wherein: in the step (4), the project file of the FPGA outputs a control command to the flash by means of the bist pad, thereby modifying the system memory data specifically includes the following steps: 1.1, outputting a password, Enter the test mode test_mode; 1.2, output the erase command to erase the content of the on-chip system memory; 1.3, output the program and prog addresses and data.

Further, the above-mentioned method for modifying the memory of the chip system for programming, wherein: the step (5) specifically includes the following steps: 5.1. Power off the chip to be tested and then power it on again; 5.2. Use a data cable to connect the host computer and MCU test board; 5.3. Open the serial port tool to connect the serial port; 5.4. Read the device information and option bytes to check if they are correct, if so, go to the next step, if not, go back to step (4) to re-program the program; 5.5, Download the program; 5.6 Check whether the MCU test board will perform the corresponding function. If the detection is successful, it means that the system memory has been modified successfully. If not, return to step (4) to re-program the program.

Further, in the above-mentioned method for modifying the memory of the chip system for programming, wherein: the downloaded program in the step 5.5 is a marquee or a running water program.

The beneficial effects of the invention are as follows: the invention enters the bist mode by using the bist test pad of the flash in the chip, connects the chip to be tested through the fpga board, and sends the corresponding erasing and writing instructions and contents to the bist serial interface. The content of the system memory can be modified to facilitate the testing of the BootLoader program and the debugging and testing of the flash by the chip.

Description of drawings

1 is a schematic diagram of the connection circuit between FPGA and flash pins of the present invention;

Figure 2 is a flow chart of program burning;

Figure 3 is a flowchart of the project file outputting control instructions to the flash by means of the bist pad;

Figure 4 is a schematic diagram of the flash IP bist protocol;

Fig. 5 is the check flow chart after the program programming is completed.

Detailed ways

In order to further understand the content, features and effects of the present invention, a detailed description is given below with the accompanying drawings.

Please refer to FIG. 1 to FIG. 5 at the same time, and a circuit and method for modifying a system-on-a-chip memory for programming according to the present invention will be described in detail below with reference to the accompanying drawings.

As shown in FIG. 1 , a circuit of the present invention that uses the flash bist test mechanism to modify the in-chip system memory for programming includes an FPGA, an MCU test board, a chip to be tested, a downloader and a host computer, and the chip to be tested is installed in the On the MCU test board, the flash is connected to the corresponding pins of the MCU test board, the power pins of the FPGA and MCU test boards are connected to the power supply, the GND pins of the FPGA and MCU test boards are grounded, and one end of the downloader is connected to the FPGA through the serial port. The other end of the device is connected to the host computer, and the FPGA is connected to the MCU test board, so that the TDI, TCK, TDO, STROBE pins of the FPGA are connected to the TDI, TCK, TDO, and STROBE pins of the flash correspondingly, and the TESTEN pin of the flash is set to high level.

Specifically, TESTEN is the test mode enable signal, and when it is high, the test mode is entered. TCK is the test clock, TDI is the test input, TDO is the test output, and STROBE is the control signal for whether the input signal is valid. The control signal STROBE is active low, if STROBE is low, the test excitation signal of the serial input pin TDI will be input. When STROBE is set high, data in TDI will be ignored.

As shown in FIG. 2 , the present invention also discloses a method for modifying the circuit of the in-chip system memory for programming by means of the flash bist test mechanism, including the following steps:

(1) Write the FPGA project files required for programming; (2) Burn the project files into the FPGA; (3) Complete the above circuit connections; (4) Press the reset button of the FPGA to start the programming program, FPGA Communicate with the flash through the bist pad, and the project file uses the bist pad to output control commands to the flash to modify the system memory data; (5) Check whether the program is successfully burned, if so, the program burning is completed, if not, go back to the step ( 4) and then continue to execute the program. After burning the program in the step (4), it is necessary to wait for a response time of 20 to 40 seconds, preferably 30 seconds.

The FPGA project file written in the step (1) follows the flash IP bist protocol. The contents of the project file include: setting the flash interface signal ERASE to a high level to erase the original system memory in the flash, and setting the flash interface signal PROG to a high level Ping is used for programming programs, and addresses and data are written in flash interface signal A and flash interface signal DIN respectively to realize the modification of system memory.

As shown in Figure 3, in the step (4), the project file of the FPGA outputs the control command to the flash by means of the bist pad to modify the system memory data, which specifically includes the following steps: 1.1, output the password, and enter the test mode test_mode; 1.2, output the erase command , erase the content of the on-chip system memory; 1.3, output program and prog address and data. Response time is required between steps 1.2 and 1.3.

For the communication between the FPGA and the flash, the instructions sent on the above serial interface follow the flash IP bist protocol. Refer to Figure 4 for details. Figure 4 shows the input timing and input sequence of the protocol serial input pin TDI. Among them, the test clock TCK The general test frequency can be set to 1MHz, 10MHz or 20MHz.

The test output pin TDI of the FPGA sends the serial input signal to the test input pin TDI of the flash in the following order: CEb, DEEPPD, OEb, WEb, PROG, PROG2, ERASE, CHIP, NVR, TMEN, CONFEN, VREAD0, VREAD1, BYTE, A, DIN, msa, msb, msc, msd, freq0, freq1, Tprog_conf0, Tprog_conf1, Terase_conf0, Terase_conf1; where CEb to DIN are flash IP interface signals, including enable signal, program erase control, address, data Signals, etc., are used to control the flash work. The signals msa, msb, msc, msd, freq0, and freq1 in the serial input data stream are used to define the test mode and operating frequency. Tprog_conf0, Tprog_conf1 signals are used to set the word programming time TPROG, Terase_conf0, Terase_conf1 signals are used to set the sector/block erase time TERASE.

As shown in Figure 4, the step (5) specifically includes the following steps: 5.1. Power off the chip to be tested and then power it on again; 5.2. Connect the host computer and the MCU test board with a data cable; 5.3. Open the serial port tool to connect Serial port; 5.4. Read the device information and option bytes to see if they are correct. If so, go to the next step. If not, go back to step (4) to re-program the program; 5.5. Download the program; 5.6 Check whether the MCU test board will Execute the corresponding function. If the detection is successful, it means that the system memory has been modified successfully. If not, return to step (4) to re-program the program. The downloaded program in step 5.5 is a marquee or running water program. In step 5.6, check whether the LED of the MCU test board will light up or turn off according to the program.

It can be seen from the above description that the present invention enters the bist mode by using the bist test pad of the flash in the chip, connects the chip to be tested through the fpga board, and sends the corresponding erasing and writing instructions and contents to the bist serial interface. The content of the system memory can be modified to facilitate the testing of the BootLoader program and the debugging and testing of the flash by the chip.

Of course, the above are only typical examples of the present invention. In addition, the present invention can also have other various specific embodiments. All technical solutions formed by equivalent replacement or equivalent transformation fall within the scope of protection of the present invention. Inside.

Claims (6)

1. A circuit for modifying a system-on-chip memory for burning, comprising: including FPGA, MCU surveys the board, the chip that awaits measuring, downloader and host computer, the chip that awaits measuring is installed on MCU surveys the board, make flash be connected with MCU survey the corresponding pin of board, FPGA and MCU survey board power pin and insert the power, FPGA and MCU survey board GND pin ground connection, downloader one end passes through serial ports with FPGA, the downloader other end is connected with the host computer, FPGA surveys the board with MCU and is connected, make FPGA's TDI, TCK, TDO, STROBE pin and flash's TDI, TCK, TDO, STROBE pin corresponds the connection, flash's TESTING pin is the high level.

2. A method for modifying a system-on-chip memory for programming, wherein the circuit for modifying a system-on-chip memory for programming as claimed in claim 1 comprises the steps of:

(1) writing an FPGA engineering file required by burning; (2) burning the engineering file into the FPGA; (3) completing the circuit connection; (4) pressing a reset key of the FPGA to start burning a program, communicating the FPGA and the flash through a bistpad, and outputting a control instruction to the flash by the engineering file through the bistpad so as to modify the data of a system memory; (5) and (4) detecting whether the program is burnt successfully, if so, finishing the program burning, and if not, repeating the step (4) and then continuing to execute the program.

3. The method of claim 2, wherein the method further comprises: the FPGA engineering file written in the step (1) follows a flash IP bist protocol, and the content in the engineering file comprises: the high level of the flash interface signal ERASE is used for erasing the original system memory in the flash, the high level of the flash interface signal PROG is used for burning programs, and addresses and data are respectively written in the flash interface signal A and the flash interface signal DIN, so that the modification of the system memory is realized.

4. The method of claim 2, wherein the method further comprises: the step (4) of outputting the control instruction to the flash by the engineering file of the FPGA by means of the bistpad so as to modify the data of the system memory specifically comprises the following steps: 1.1, outputting a password, and entering a test mode test _ mode; 1.2, outputting an erase instruction, and erasing the content of a system memory in the chip; 1.3, outputting program finger and prog address and data.

5. The method of claim 2, wherein the method further comprises: the step (5) specifically comprises the following steps: 5.1, powering off the chip to be tested and then powering on again; 5.2, connecting the upper computer and the MCU test board by using a data line; 5.3, opening a serial port tool to connect a serial port; 5.4, reading the device information and the option bytes, checking whether the device information and the option bytes are correct, if so, executing the next step, and if not, returning to the step (4) to burn the program again; 5.5, downloading a program; 5.6 checking whether the MCU test board executes the corresponding function, if so, successfully detecting to indicate that the system memory is successfully modified, and if not, returning to the step (4) to re-burn the program.

6. The method of claim 5, wherein the method further comprises: and 5.5, the downloading program is a horse race lamp or water lamp program.

Images