CN114285138B

CN114285138B - Bus voltage-sharing balance control device and three-phase high-frequency UPS

Info

Publication number: CN114285138B
Application number: CN202111676184.XA
Authority: CN
Inventors: 黄政中
Original assignee: Invt Power Sytem Shenzhen Co ltd
Current assignee: Invt Power Sytem Shenzhen Co ltd
Priority date: 2021-12-31
Filing date: 2021-12-31
Publication date: 2022-11-18
Anticipated expiration: 2041-12-31
Also published as: CN114285138A

Abstract

The invention discloses a bus voltage-sharing balance control device and a three-phase high-frequency UPS (uninterrupted Power supply), wherein a discharge module, a first capacitor bank, a second capacitor bank and a control module in an original direct-current booster circuit of the three-phase high-frequency UPS are multiplexed, and the control module controls a battery pack to discharge the first capacitor bank and the second capacitor bank through the discharge module so as to enable the voltage of the first capacitor bank to be equal to the voltage of the second capacitor bank, so that the voltage-sharing balance between a positive end and a neutral end of a direct-current bus and between the neutral end and a negative end of the direct-current bus on the basis that the neutral end of the battery pack is not connected to the neutral end of the three-phase high-frequency UPS in the prior art is realized without additionally arranging a bus voltage-sharing balance circuit in the direct-current booster circuit, the cost of a neutral cable of the battery pack is saved, the cost of the bus balance circuit additionally arranged in the prior art is saved, and the product competitiveness of the three-phase high-frequency UPS is greatly improved.

Description

Bus voltage-sharing balance control device and three-phase high-frequency UPS

Technical Field

The invention relates to the field of circuit protection, in particular to a bus voltage-sharing balance control device and a three-phase high-frequency UPS.

Background

The three-phase high-frequency UPS (Uninterruptible Power Supply) can output three-phase Power after the voltage of the mains grid is processed by a rectification circuit, a direct-current booster circuit and an inverter circuit in the UPS, or output three-phase Power after the battery pack in the three-phase high-frequency UPS is processed by the direct-current booster circuit and the inverter circuit when the mains grid is powered off, so as to realize uninterrupted and high-quality Power Supply for industrial sites, data centers and the like. Therefore, the output end of the three-phase high-frequency UPS needs to be provided with a neutral line end due to the above functions of the three-phase high-frequency UPS, and the inverter circuit topology inside the three-phase high-frequency UPS usually adopts a half-bridge inverter topology, so that a direct-current bus connected between the direct-current booster circuit and the inverter circuit needs to be divided into a positive bus, a negative bus and a subsequent inverter circuit input by the neutral line end.

On this basis, in order to match the half-bridge inverter topology when the battery pack in the conventional three-phase high-frequency UPS is connected to the dc boost circuit for discharging, the output end of the battery pack needs to be divided into an output positive end and an output negative end, and meanwhile, it is further considered that if the neutral terminal of the battery pack is not connected to the neutral terminal of the three-phase high-frequency UPS, the voltage between the positive bus terminal and the neutral terminal of the dc bus and the voltage between the neutral terminal and the negative bus terminal of the dc bus are not equal, that is, the problem of unbalanced voltage equalization of the positive bus and the negative bus occurs, and further the three-phase high-frequency UPS is abnormal in operation. Therefore, the neutral line end of the battery pack is connected into the neutral line end of the direct current booster circuit to ensure the normal operation of the three-phase high-frequency UPS.

Specifically, referring to fig. 1, fig. 1 is a schematic diagram of a battery pack discharge circuit in the prior art, in which, taking a dc boost circuit of a three-phase high-frequency UPS as a single-phase dc boost circuit topology as an example, a BAT + terminal is an output positive terminal of a battery pack, a BAT-terminal is an output negative terminal of the battery pack, and a BATN terminal is a neutral terminal of the battery pack connected to a neutral terminal of the dc boost circuit; the BUS + end is a positive BUS end connected with the direct current booster circuit and the inverter circuit, the BUS-end is a negative BUS end connected with the direct current booster circuit and the inverter circuit, and the BUSN end is a neutral end connected with the neutral end of the voltage of the city network and the inverter circuit respectively by the direct current booster circuit. However, as the power of the three-phase high-frequency UPS is continuously increased, the cost of the cable connected between the neutral terminal of the battery pack and the neutral terminal of the dc boost circuit is higher and higher, and in normal use, although the current flowing through the neutral terminal of the battery pack is small, in order to cope with a single fault, the cable is usually thick in practical application, thereby causing great resource waste.

Therefore, in the prior art, in order to not only omit the cable but also solve the problem of unbalanced voltage sharing of the positive bus and the negative bus, a bus voltage sharing and balancing circuit is usually added in the dc boost circuit. Referring to fig. 2, fig. 2 is a schematic diagram of a neutral-line-less bus balancing circuit of a battery pack in the prior art, wherein a topology in which a dc boost circuit of a three-phase high-frequency UPS is a single-phase dc boost circuit is still taken as an example. On the basis of the above fig. 1, the BATN terminal, that is, the neutral terminal of the battery pack, is removed and is not required to be connected to the neutral terminal of the dc boost circuit, and the inductor L, the switching tube Q1 and the switching tube Q2 form the bus voltage-sharing balancing circuit. However, in this method, in order to realize the function of the bus voltage equalizing and balancing circuit, the requirements on the power level and the withstand voltage level of the inductor L, the switching tube Q1 and the switching tube Q2 are high, so that the cost of these devices is high, and further, the cost of the three-phase high-frequency UPS is increased.

Disclosure of Invention

The invention aims to provide a bus voltage-sharing balance control device and a three-phase high-frequency UPS (uninterrupted power supply), which realize voltage-sharing balance between a positive end and a neutral end of a direct-current bus and between the neutral end and a negative end of the direct-current bus on the basis that a neutral line end of a battery pack is not connected to a neutral line end of the three-phase high-frequency UPS by multiplexing an original direct-current booster circuit, save the cost and greatly improve the product competitiveness of the three-phase high-frequency UPS.

In order to solve the technical problem, the invention provides a bus voltage-sharing balance control device which is applied to a three-phase high-frequency UPS (uninterrupted power supply), wherein the three-phase high-frequency UPS comprises a battery pack, a direct-current booster circuit and an inverter circuit which are sequentially connected; the bus voltage-sharing balance control device comprises a discharge module, a first capacitor group, a second capacitor group and a control module which form a direct-current booster circuit of the three-phase high-frequency UPS;

the first input end of the discharging module is connected with the positive output end of the battery pack, the second input end of the discharging module is connected with the negative output end of the battery pack, the first output end of the discharging module is connected with the first end of the first capacitor pack, and the connected common end is used as the positive end of a direct current bus and is connected with the inverter circuit; a second output end of the discharging module is respectively connected with a second end of the first capacitor bank and a first end of the second capacitor bank, and a public end connected with the second output end of the discharging module is used as a neutral end of the direct current bus and is connected with the inverter circuit; a third output end of the discharging module is connected with a second end of the second capacitor bank, and a public end connected with the second end of the second capacitor bank is used as a negative end of the direct current bus and is connected with the inverter circuit; the discharging module is also connected with the control module;

the control module is used for controlling the battery pack to discharge the first capacitor bank and the second capacitor bank through the discharge module so as to enable the voltage of the first capacitor bank to be equal to the voltage of the second capacitor bank; when the voltage of the first capacitor bank is not equal to the voltage of the second capacitor bank, the discharge time of the first capacitor bank is in negative correlation with the voltage of the first capacitor bank, and the discharge time of the second capacitor bank is in negative correlation with the voltage of the second capacitor bank.

Preferably, when the dc boost circuit is a single-phase dc boost circuit:

the discharging module comprises a first energy storage module, a second energy storage module, a first isolation module, a second isolation module, a first controllable switch module and a second controllable switch module;

a first end of the first energy storage module is used as a first input end of the discharging module, and a second end of the first energy storage module is respectively connected with a first end of the first isolation module and a first end of the first controllable switch module; the first end of the second energy storage module is used as the second input end of the discharging module, and the second end of the second energy storage module is respectively connected with the first end of the second isolation module and the second end of the second controllable switch module;

the second end of the first isolation module is used as the first output end of the discharge module; the second end of the first controllable switch module is connected with the first end of the second controllable switch module, and the connected common end is used as the second output end of the discharge module; the second end of the second isolation module is used as a third output end of the discharge module;

controlling the battery pack to discharge the first capacitor bank and the second capacitor bank through the discharge module so that the voltage of the first capacitor bank is equal to the voltage of the second capacitor bank, comprising:

and controlling the battery pack to discharge the first capacitor pack and the second capacitor pack by controlling the first controllable switch module and the second controllable switch module to be switched on or switched off so as to enable the voltage of the first capacitor pack to be equal to the voltage of the second capacitor pack.

Preferably, when the dc boost circuit is a three-phase dc boost circuit:

the discharging module comprises a first discharging module, a second discharging module and a third discharging module, and the first discharging module, the second discharging module and the third discharging module respectively comprise a first energy storage module, a second energy storage module, a first isolation module, a second isolation module, a first controllable switch module and a second controllable switch module;

the second end of the first isolation module is used as the first output end of the discharge module; the second end of the first controllable switch module is connected with the first end of the second controllable switch module, and the connected common end is used as a second output end of the discharge module; the second end of the second isolation module is used as a third output end of the discharge module;

and controlling the battery pack to discharge the first capacitor bank and the second capacitor bank by controlling the first controllable switch module and the second controllable switch module to be switched on or switched off so as to enable the voltage of the first capacitor bank to be equal to the voltage of the second capacitor bank.

Preferably, the first energy storage module comprises a first inductor; the second energy storage module comprises a second inductor;

one end of the first inductor is used as a first end of the first energy storage module, and the other end of the first inductor is used as a second end of the first energy storage module; one end of the second inductor is used as the first end of the second energy storage module, and the other end of the second inductor is used as the second end of the second energy storage module.

Preferably, the first isolation module comprises a first diode; the second isolation module comprises a second diode;

an anode of the first diode is used as a first end of the first isolation module, and a cathode of the first diode is used as a second end of the first isolation module;

the cathode of the second diode is used as the first end of the second isolation module, and the anode of the second diode is used as the second end of the second isolation module.

Preferably, the first isolation module comprises a first controllable switch with a first body diode; the second isolation module comprises a second controllable switch with a second body diode;

the control end of the first controllable switch is connected with the control module, and the first end of the first controllable switch is connected with the anode of the first body diode, and the connected common end is used as the first end of the first isolation module; the second end of the first controllable switch is connected with the cathode of the first body diode, and the connected common end is used as the second end of the first isolation module;

the control end of the second controllable switch is connected with the control module, and the first end of the second controllable switch is connected with the cathode of the second body diode and the connected public end is used as the first end of the second isolation module; the second end of the second controllable switch is connected with the anode of the second body diode, and the connected common end is used as the second end of the second isolation module;

the control module is further used for controlling the first controllable switch and the second controllable switch to be turned off.

Preferably, the first controllable switch module comprises a third controllable switch and a fourth controllable switch; the second controllable switch module comprises a fifth controllable switch and a sixth controllable switch; the first isolation module comprises a third diode; the second isolation module comprises a fourth diode; the bus voltage-sharing balance control device also comprises a fifth diode and a sixth diode which form the direct-current booster circuit;

a first end of the third controllable switch is used as a first end of the first controllable switch module, a second end of the third controllable switch is connected with a first end of the fourth controllable switch, a second end of the fourth controllable switch is used as a second end of the first controllable switch module, a control end of the third controllable switch is connected with a control end of the fourth controllable switch, and a common end of the third controllable switch and the fourth controllable switch is used as a control end of the first controllable switch module;

a first end of the fifth controllable switch is used as a second end of the second controllable switch module, a second end of the fifth controllable switch is connected with a first end of the sixth controllable switch, a second end of the sixth controllable switch is used as a first end of the second controllable switch module, a control end of the fifth controllable switch is connected with a control end of the sixth controllable switch, and a common end of the fifth controllable switch and the sixth controllable switch is used as a control end of the second controllable switch module;

the anode of the third diode is used as the first end of the first isolation module, and the cathode of the third diode is used as the second end of the first isolation module; the cathode of the fourth diode is used as the first end of the second isolation module, and the anode of the fourth diode is used as the second end of the second isolation module;

the anode of the fifth diode is connected with the second end of the second capacitor bank and the anode of the fourth diode respectively, and the cathode of the fifth diode is connected with the other end of the first inductor, the anode of the third diode and the first end of the third controllable switch respectively; and the anode of the sixth diode is connected with the other end of the second inductor, the first end of the fifth controllable switch and the cathode of the fourth diode respectively, and the cathode of the sixth diode is connected with the first end of the first capacitor bank and the cathode of the third diode respectively.

Preferably, the controlling the battery pack to discharge the first capacitor pack and the second capacitor pack by controlling the first controllable switch module and the second controllable switch module to be turned on or off to make the voltage of the first capacitor pack equal to the voltage of the second capacitor pack includes:

in any control period, if the voltage of the first capacitor bank is judged to be greater than the voltage of the second capacitor bank, controlling the first controllable switch module and the second controllable switch module to be simultaneously conducted for a first preset time;

after the first preset time period is reached, controlling the second controllable switch module to be switched off and controlling the first controllable switch module to be continuously switched on for a second preset time period so as to discharge the second capacitor bank;

and after the second preset time length is reached, controlling the first controllable switch module to be switched off so as to discharge both the first capacitor bank and the second capacitor bank, so that the voltage of the first capacitor bank is equal to the voltage of the second capacitor bank.

in any control period, if the voltage of the first capacitor bank is judged to be smaller than the voltage of the second capacitor bank, controlling the first controllable switch module and the second controllable switch module to be simultaneously conducted for a third preset time;

after the third preset time period is reached, controlling the first controllable switch module to be turned off and controlling the second controllable switch module to be continuously turned on for a fourth preset time period so as to discharge the first capacitor bank;

and after the fourth preset time period is reached, controlling the second controllable switch module to be switched off so as to discharge both the first capacitor bank and the second capacitor bank, so that the voltage of the first capacitor bank is equal to the voltage of the second capacitor bank.

In order to solve the technical problem, the invention also provides a three-phase high-frequency UPS which comprises a battery pack and an inverter circuit; the bus voltage-sharing balance control device is characterized by further comprising the bus voltage-sharing balance control device, wherein the battery pack, the bus voltage-sharing balance control device and the inverter circuit are sequentially connected.

The invention provides a bus voltage-sharing balance control device and a three-phase high-frequency UPS (uninterrupted power supply), wherein a discharge module, a first capacitor bank, a second capacitor bank and a control module in an original direct-current booster circuit of the three-phase high-frequency UPS are multiplexed, and the control logic of the control module is combined, namely the control module controls a battery pack to discharge the first capacitor bank and the second capacitor bank through the discharge module so as to enable the voltage of the first capacitor bank to be equal to the voltage of the second capacitor bank, so that the bus voltage-sharing balance circuit is not additionally arranged in the direct-current booster circuit like the prior art, the balance between a positive end and a neutral end of a direct-current bus and between the neutral end and a negative end of the direct-current bus is realized on the basis that the neutral end of the battery pack is not connected to a medium-line end of the three-phase high-frequency UPS, the cost of a medium-line cable of the battery pack is saved, the cost of the bus balance circuit additionally arranged in the prior art is saved, and the product competitiveness of the three-phase high-frequency UPS is greatly improved.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed in the prior art and the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

Fig. 1 is a schematic diagram of a battery discharge circuit in the prior art;

fig. 2 is a schematic structural diagram of a neutral-line-free bus voltage-sharing balancing circuit of a battery pack in the prior art;

fig. 3 is a schematic structural diagram of a bus voltage-sharing balance control device provided by the present invention;

FIG. 4 is a schematic structural diagram of another bus voltage-sharing balance control device provided by the present invention;

FIG. 5 is a schematic structural diagram of another bus voltage-sharing and balancing control device provided by the present invention;

FIG. 6 is a schematic structural diagram of another bus voltage-sharing and balancing control device provided by the present invention;

FIG. 7 is a schematic structural diagram of another bus voltage-sharing and balancing control device provided by the present invention;

FIG. 8 is a schematic structural diagram of another bus voltage-sharing and balancing control device provided by the present invention;

FIG. 9 is a schematic structural diagram of another bus voltage-sharing balance control device provided by the present invention;

FIG. 10 is a schematic structural diagram of another bus voltage-sharing and balancing control device provided by the present invention;

FIG. 11 is a schematic structural view of another bus voltage-sharing balance control device provided by the present invention;

FIG. 12 is a schematic structural diagram of another bus voltage-sharing and balancing control device provided by the present invention;

FIG. 13 is a schematic structural diagram of another bus voltage-sharing and balancing control device provided by the present invention;

FIG. 14 is a schematic structural diagram of another bus voltage-sharing and balancing control device provided by the present invention;

fig. 15 is a schematic structural diagram of a three-phase high-frequency UPS provided by the present invention.

Detailed Description

The core of the invention is to provide a bus voltage-sharing balance control device and a three-phase high-frequency UPS, which realize voltage-sharing balance between a positive end and a neutral end of a direct-current bus and between the neutral end and a negative end of the direct-current bus on the basis that a neutral line end of a battery pack is not connected to a neutral line end of the three-phase high-frequency UPS by multiplexing an original direct-current booster circuit, save cost and greatly improve the product competitiveness of the three-phase high-frequency UPS.

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 1, fig. 2 and fig. 3, fig. 1 is a schematic structural diagram of a battery discharge circuit in the prior art; fig. 2 is a schematic structural diagram of a neutral-line-free bus voltage-sharing balancing circuit of a battery pack in the prior art; fig. 3 is a schematic structural diagram of a bus voltage-sharing balance control device provided by the invention.

The bus voltage-sharing balance control device is applied to a three-phase high-frequency UPS, and the three-phase high-frequency UPS comprises a battery pack, a direct-current booster circuit and an inverter circuit which are sequentially connected; the bus voltage-sharing balance control device comprises a discharge module 1, a first capacitor group 2, a second capacitor group 3 and a control module 4 which form a direct-current booster circuit of the three-phase high-frequency UPS;

the first input end of the discharging module 1 is connected with the positive output end of the battery pack, the second input end of the discharging module 1 is connected with the negative output end of the battery pack, the first output end of the discharging module 1 is connected with the first end of the first capacitor pack 2, and the connected public end serves as the positive direct-current bus end and is connected with the inverter circuit; a second output end of the discharging module 1 is respectively connected with a second end of the first capacitor bank 2 and a first end of the second capacitor bank 3, and a public end connected with the second output end of the discharging module is used as a neutral end of the direct current bus to be connected with the inverter circuit; a third output end of the discharge module 1 is connected with a second end of the second capacitor bank 3, and a public end connected with the second end of the second capacitor bank is used as a negative end of the direct current bus and is connected with the inverter circuit; the discharging module 1 is also connected with the control module 4;

the control module 4 is configured to control the battery pack to discharge the first capacitor bank 2 and the second capacitor bank 3 through the discharge module 1, so that the voltage of the first capacitor bank 2 is equal to the voltage of the second capacitor bank 3; when the voltage of the first capacitor bank 2 is not equal to the voltage of the second capacitor bank 3, the discharge time of the first capacitor bank 2 is negatively related to the voltage of the first capacitor bank 2, and the discharge time of the second capacitor bank 3 is negatively related to the voltage of the second capacitor bank 3.

In the embodiment, the problem of unbalanced voltage equalization of the positive bus and the negative bus is considered to occur if the neutral end of the battery pack is not connected to the neutral end of the three-phase high-frequency UPS; if the neutral terminal of the battery pack is connected to the neutral terminal of the three-phase high-frequency UPS, the specific circuit structure may be as shown in fig. 1, where the cable at the neutral terminal of the battery pack is usually thick, which causes great resource waste; in the prior art, in order to omit the cable, a bus voltage-sharing balancing circuit needs to be additionally arranged in the direct-current boost circuit of the three-phase high-frequency UPS, and a specific circuit structure can be shown in fig. 2, so that the cost of each device in the circuit is high due to the limitation of practical application requirements, and the cost of the three-phase high-frequency UPS is also increased. In order to solve the technical problem, the present application provides a bus voltage-sharing balance control device, which utilizes an original dc boost circuit to realize voltage-sharing balance of positive and negative buses on the basis that a neutral terminal of a three-phase high-frequency UPS is not connected to a line terminal of a battery pack without additionally adding a bus voltage-sharing balance circuit as shown in fig. 2.

First, it should be noted that the three-phase high-frequency UPS includes a battery pack, a dc boost circuit, and an inverter circuit, which are connected in sequence, and thus the bus voltage-sharing balance control apparatus includes a discharging module 1, a first capacitor bank 2, a second capacitor bank 3, and a control module 4, which form the dc boost circuit of the three-phase high-frequency UPS. Specifically, as shown in fig. 3, the control module 4 controls the battery pack to discharge the first capacitor bank 2 and the second capacitor bank 3 through the discharge module 1, so that the voltage of the first capacitor bank 2 is equal to the voltage of the second capacitor bank 3, that is, the voltage-sharing balance of the positive bus and the negative bus is realized; when the voltage of the first capacitor bank 2 is equal to the voltage of the second capacitor bank 3, the discharge time of the first capacitor bank 2 is the same as that of the second capacitor bank 3; when the voltage of the first capacitor group 2 is not equal to the voltage of the second capacitor group 3, the discharge time of the first capacitor group 2 is in negative correlation with the voltage of the first capacitor group 2, and the discharge time of the second capacitor group 3 is in negative correlation with the voltage of the second capacitor group 3. More specifically, when the voltage of the first capacitor bank 2 is greater than the voltage of the second capacitor bank 3, the discharge time of the first capacitor bank 2 is less than the discharge time of the second capacitor bank 3; when the voltage of the first capacitor group 2 is smaller than the voltage of the second capacitor group 3, the discharge time of the first capacitor group 2 is longer than that of the second capacitor group 3.

It should be noted that the first capacitor group 2 herein may include one capacitor, and may also include the first capacitor group 2 formed by a plurality of capacitors connected in parallel, and the capacitor herein may be a capacitor with polarity or a capacitor without polarity, and the application is not particularly limited herein; similarly, the second capacitor group 3 may include one capacitor, or may include a second capacitor group 3 formed by a plurality of capacitors connected in parallel, and the capacitor may be a capacitor with polarity or a capacitor without polarity, and the application is not limited herein; the three-phase high-frequency UPS may be another three-phase UPS, and the present application is not limited thereto.

It should also be noted that a switch circuit can be connected between the battery pack of the three-phase high-frequency UPS and the dc boost circuit, and the switch circuit can be used for switching off to isolate the output voltage of the battery pack when the voltage of the commercial power grid is normally input into the rectifier circuit and the boost of the subsequent dc boost circuit and the inversion conversion of the inverter circuit are performed; and when the voltage of the urban network is cut off, the direct current booster circuit is conducted to connect the output voltage of the battery pack into the direct current booster circuit.

In addition, the circuit topology of the direct current booster circuit can be a single-phase direct current booster circuit or a three-phase direct current booster circuit; the bus voltage-sharing balance control device can realize the function of balancing the voltage of the positive bus and the voltage of the negative bus under the condition of 100 percent of the voltage-sharing unbalance of the positive bus and the negative bus by combining the control logic of the control module 4.

The utility model provides a generating line voltage-sharing balance control device, the device is through multiplexing discharging module 1 among the original direct current boost circuit of three-phase high frequency UPS, first electric capacity group 2, second electric capacity group 3 and control module 4, and combine this control module 4's control logic, need not like prior art additionally to add the generating line voltage-sharing balance circuit in direct current boost circuit, just realized on the basis of the well line end that does not insert three-phase high frequency UPS at the well line end of group battery, voltage-sharing balance between the positive end of direct current generating line and the neutral terminal and between neutral terminal and the direct current generating line negative terminal, the cost of the line cable in the group battery has been saved on the one hand, on the other hand has saved the cost of the generating line balance circuit who adds among the prior art, three-phase high frequency UPS's product competitiveness has greatly been improved.

On the basis of the above-described embodiment:

referring to fig. 4, fig. 4 is a schematic structural diagram of another bus voltage-sharing balance control device provided in the present invention.

As a preferred embodiment, when the dc boost circuit is a single-phase dc boost circuit:

the discharging module 1 comprises a first energy storage module 11, a second energy storage module 12, a first isolation module 13, a second isolation module 14, a first controllable switch module 15 and a second controllable switch module 16;

a first end of the first energy storage module 11 serves as a first input end of the discharging module 1, and a second end of the first energy storage module 11 is connected with a first end of the first isolation module 13 and a first end of the first controllable switch module 15 respectively; a first end of the second energy storage module 12 is used as a second input end of the discharging module 1, and a second end of the second energy storage module 12 is connected with a first end of the second isolation module 14 and a second end of the second controllable switch module 16 respectively;

the second end of the first isolation module 13 is used as the first output end of the discharge module 1; the second end of the first controllable switch module 15 is connected with the first end of the second controllable switch module 16, and the connected common end is used as the second output end of the discharge module 1; a second end of the second isolation module 14 is used as a third output end of the discharge module 1;

the control group battery passes through module 1 and discharges first electric capacity group 2 and second electric capacity group 3 to make the voltage of first electric capacity group 2 and the voltage of second electric capacity group 3 equal, includes:

the first capacitor bank 2 and the second capacitor bank 3 are discharged by controlling the first controllable switch module 15 and the second controllable switch module 16 to be turned on or off, so that the voltage of the first capacitor bank 2 is equal to the voltage of the second capacitor bank 3.

In this application, the dc boost circuit may be a single-phase dc boost circuit, and then the discharging module 1 includes a first energy storage module 11, a second energy storage module 12, a first isolation module 13, a second isolation module 14, a first controllable switch module 15, and a second controllable switch module 16;

thus, as shown in FIG. 4, it should be noted that FIG. 4 is limited to the space shown in the figures, where the control module 4 is shown in the form of a circle with reference numbers. In order to realize voltage-sharing balance of the positive bus and the negative bus, the control module 4 controls the battery pack to discharge the first capacitor pack 2 and the second capacitor pack 3 by controlling the first controllable switch module 15 and the second controllable switch module 16 to be turned on or off, so that the voltage of the first capacitor pack 2 is equal to the voltage of the second capacitor pack 3.

It can be seen that, in this way, without adding an additional circuit, the voltage-sharing balance of the positive bus and the negative bus of the three-phase high-frequency UPS including the single-phase dc boost circuit can be simply and reliably realized by combining the control logic of the control module 4.

Referring to fig. 5, fig. 5 is a schematic structural view of another bus voltage-sharing balance control device provided in the present invention.

As a preferred embodiment, when the dc boost circuit is a three-phase dc boost circuit:

the discharging module 1 comprises a first discharging module, a second discharging module and a third discharging module, wherein the first discharging module, the second discharging module and the third discharging module respectively comprise a first energy storage module 11, a second energy storage module 12, a first isolation module 13, a second isolation module 14, a first controllable switch module 15 and a second controllable switch module 16;

the battery pack is controlled to discharge the first capacitor pack 2 and the second capacitor pack 3 by controlling the on or off of the first controllable switch module 15 and the second controllable switch module 16, so that the voltage of the first capacitor pack 2 is equal to the voltage of the second capacitor pack 3.

In this application, the dc boost circuit may be a three-phase dc boost circuit, and then the discharging module 1 may include a first discharging module, a second discharging module and a third discharging module, where the first discharging module, the second discharging module and the third discharging module all include a first energy storage module 11, a second energy storage module 12, a first isolation module 13, a second isolation module 14, a first capacitor bank 2, a second capacitor bank 3, a first controllable switch module 15 and a second controllable switch module 16.

Specifically, as shown in fig. 5, it should be noted that fig. 5 is limited to the space shown by the figures, and the control module 4 is given by the form of a circle with a reference numeral. Therefore, in order to realize the voltage-sharing balance of the positive and negative buses, the control module 4 controls the battery pack to discharge the first capacitor pack 2 and the second capacitor pack 3 by controlling the first controllable switch module 15 and the second controllable switch module 16 to be turned on or off so that the voltage of the first capacitor pack 2 is equal to the voltage of the second capacitor pack 3, corresponding to any phase of the three-phase dc boost circuit, that is, for any one of the first discharge module, the second discharge module, and the third discharge module.

It should be noted that the control module 4 may adopt three-phase interleaving control for controlling the first discharge module, the second discharge module and the third discharge module, and the interleaving angle may be 120 degrees, so as to better eliminate ripples in the output voltage of the battery pack, which is not limited herein.

It can be seen that, in this way, without adding an additional circuit, the voltage-sharing balance of the positive and negative buses of the three-phase high-frequency UPS including the three-phase dc boost circuit can be simply and reliably achieved by combining the control logic of the control module 4.

As a preferred embodiment, the first energy storage module 11 includes a first inductor L1; the second energy storage module 12 comprises a second inductance L2;

one end of the first inductor L1 is used as a first end of the first energy storage module 11, and the other end of the first inductor L1 is used as a second end of the first energy storage module 11; one end of the second inductor L2 serves as a first end of the second energy storage module 12, and the other end of the second inductor L2 serves as a second end of the second energy storage module 12.

In this application, the first energy storage module 11 may include a first inductor L1; the second energy storage module 12 may comprise a second inductance L2; as shown in fig. 4 in particular, the first inductor L1 may store energy to simply and reliably implement logic of the first energy storage module 11, that is, store energy; the second inductor L2 can store energy to simply and reliably implement logic, i.e., energy storage, of the second energy storage module 12.

It should be noted that, the first controllable switch module 15 herein may include a first IGBT (Insulated Gate Bipolar Transistor), a Gate of the first IGBT is used as a control terminal of the first controllable switch module 15, a collector of the first IGBT is used as a first terminal of the first controllable switch module 15, and an emitter of the first IGBT is used as a second terminal of the first controllable switch module 15, and the application is not limited herein; the second controllable switch module 16 may include a second IGBT, a gate of the second IGBT is used as the control terminal of the second controllable switch module 16, a collector of the second IGBT is used as the first terminal of the second controllable switch module 16, and an emitter of the second IGBT is used as the second terminal of the second controllable switch module 16.

It should be further noted that, the first IGBT here may also have a body diode to discharge the energy remaining at the moment of turning off itself; the second IGBT here can also be provided with a body diode to bleed off the energy remaining at the instant of its turn-off.

As a preferred embodiment, the first isolation module 13 comprises a first diode D1; the second isolation module 14 includes a second diode D2;

an anode of the first diode D1 serves as a first end of the first isolation module 13, and a cathode of the first diode D1 serves as a second end of the first isolation module 13;

the cathode of the second diode D2 serves as a first terminal of the second isolation module 14, and the anode of the second diode D2 serves as a second terminal of the second isolation module 14.

In this application, the first isolation module 13 may include a first diode D1; the second isolation module 14 may include a second diode D2; thus, as shown in fig. 4, for the first diode D1, when the first controllable switch module 15 is turned on, the potential of the anode is smaller than the potential of the cathode to ensure that the first capacitor group 2 does not discharge by mistake; for the second diode D2, when the second controllable switch module 16 is turned on, the cathode potential is greater than the anode potential to ensure that the second capacitor bank 3 does not discharge by mistake. It can be seen that in this way the control logic of the first and

second isolation modules

13, 14 can be implemented simply and reliably.

Referring to fig. 6, fig. 6 is a schematic structural view of another bus voltage-sharing balance control device provided in the present invention.

As a preferred embodiment, the first isolation module 13 comprises a first controllable switch Q3 with a first body diode; the second isolation block 14 comprises a second controllable switch Q4 with a second body diode;

the control end of the first controllable switch Q3 is connected with the control module 4, the first end of the first controllable switch Q3 is connected with the anode of the first body diode, and the connected common end serves as the first end of the first isolation module 13; the second end of the first controllable switch Q3 is connected with the cathode of the first body diode and the connected common end is used as the second end of the first isolation module 13;

the control end of the second controllable switch Q4 is connected with the control module 4, the first end of the second controllable switch Q4 is connected with the cathode of the second body diode, and the connected common end is used as the first end of the second isolation module 14; the second end of the second controllable switch Q4 is connected with the anode of the second body diode, and the connected common end is used as the second end of the second isolation module 14;

the control module 4 is further configured to control both the first controllable switch Q3 and the second controllable switch Q4 to be turned off.

In the present application, the first isolation module 13 may comprise a first controllable switch Q3 with a first body diode; the second isolation block 14 may comprise a second controllable switch Q4 with a second body diode; specifically, as shown in fig. 6, since the first controllable switch Q3 and the second controllable switch Q4 are always turned off in the process of controlling by the control module 4 to make the voltage of the first capacitor group 2 equal to the voltage of the second capacitor group 3, i.e. the voltage of the positive bus and the negative bus is balanced, for the first body diode, when the first controllable switch module 15 is turned on, the potential of the anode is smaller than the potential of the cathode to ensure that the first capacitor group 2 does not discharge by mistake; for the second body diode, when the second controllable switch module 16 is turned on, the cathode potential thereof is greater than the anode potential thereof to ensure that the second capacitor bank 3 does not discharge by mistake.

It should be noted that, the first controllable switch Q3 herein may be a third IGBT, a gate of the third IGBT is used as a control terminal of the first controllable switch Q3, an emitter of the third IGBT is used as a first terminal of the first controllable switch Q3, and a collector of the third IGBT is used as a second terminal of the first controllable switch Q3, and the application is not particularly limited herein; the second controllable switch Q4 may be a fourth IGBT, a gate of the fourth IGBT is used as a control terminal of the second controllable switch Q4, a collector of the third IGBT is used as a first terminal of the second controllable switch Q4, and an emitter of the third IGBT is used as a second terminal of the second controllable switch Q4, and the application is not limited thereto.

It should be further noted that, as shown in the schematic structural diagram of fig. 6, the control module 4 may further control the mains voltage to charge the battery pack to form a bidirectional circuit, at this time, the control module 4 controls both the first controllable switch module 15 and the second controllable switch module 16 to be turned off, and controls both the first controllable switch Q3 and the second controllable switch Q4 to be turned on, so that the battery pack can be charged by the mains voltage, which is not particularly limited in this application.

It can be seen that in this way the control logic of the first and

second isolator modules

13, 14 can be implemented simply and reliably.

Referring to fig. 7, fig. 7 is a schematic structural diagram of another bus voltage-sharing balance control device provided in the present invention.

As a preferred embodiment, the first controllable switch module 15 comprises a third controllable switch Q5 and a fourth controllable switch Q6; the second controllable switch module 16 includes a fifth controllable switch Q7 and a sixth controllable switch Q8; the first isolation module 13 comprises a third diode D3; the second isolation module 14 includes a fourth diode D4; the bus voltage-sharing balance control device also comprises a fifth diode D5 and a sixth diode D6 which form a direct-current booster circuit;

a first end of the third controllable switch Q5 is used as a first end of the first controllable switch module 15, a second end of the third controllable switch Q5 is connected with a first end of the fourth controllable switch Q6, a second end of the fourth controllable switch Q6 is used as a second end of the first controllable switch module 15, a control end of the third controllable switch Q5 is connected with a control end of the fourth controllable switch Q6, and a common end of the connection between the control end of the third controllable switch Q5 and the control end of the fourth controllable switch Q6 is used as a control end of the first controllable switch module 15;

a first end of the fifth controllable switch Q7 is used as a second end of the second controllable switch module 16, a second end of the fifth controllable switch Q7 is connected with a first end of the sixth controllable switch Q8, a second end of the sixth controllable switch Q8 is used as a first end of the second controllable switch module 16, a control end of the fifth controllable switch Q7 is connected with a control end of the sixth controllable switch Q8, and a common end of the connection between the control end of the fifth controllable switch Q7 and the control end of the sixth controllable switch Q8 is used as a control end of the second controllable switch module 16;

the anode of the third diode D3 is used as the first end of the first isolation module 13, and the cathode of the third diode D3 is used as the second end of the first isolation module 13; the cathode of the fourth diode D4 is used as the first end of the second isolation module 14, and the anode of the fourth diode D4 is used as the second end of the second isolation module 14;

the anode of the fifth diode D5 is connected to the second end of the second capacitor bank 3 and the anode of the fourth diode D4, respectively, and the cathode of the fifth diode D5 is connected to the other end of the first inductor L1, the anode of the third diode D3, and the first end of the third controllable switch Q5, respectively; an anode of the sixth diode D6 is connected to the other end of the second inductor L2, the first end of the fifth controllable switch Q7, and a cathode of the fourth diode D4, respectively, and a cathode of the sixth diode D6 is connected to the first end of the first capacitor bank 2 and the cathode of the third diode D3, respectively.

In the present application, the first controllable switch module 15 may include a third controllable switch Q5 and a fourth controllable switch Q6; the second controllable switch module 16 may include a fifth controllable switch Q7 and a sixth controllable switch Q8; the first isolation module 13 may include a third diode D3; the second isolation module 14 may include a fourth diode D4; the bus voltage-sharing balance control device can further comprise a fifth diode D5 and a sixth diode D6 which form a direct current booster circuit so as to form the direct current booster circuit adopting a Vienna circuit topological structure.

Specifically, as shown in fig. 7, the third controllable switch Q5 may be a fifth IGBT, a gate of the fifth IGBT is used as a control terminal of the third controllable switch Q5, a collector of the fifth IGBT is used as a first terminal of the third controllable switch Q5, and an emitter of the third IGBT is used as a second terminal of the third controllable switch Q5, and the application is not particularly limited herein; the fourth controllable switch Q6 here may be a sixth IGBT, a gate of the sixth IGBT is used as the control terminal of the fourth controllable switch Q6, an emitter of the sixth IGBT is used as the first terminal of the fourth controllable switch Q6, and a collector of the sixth IGBT is used as the second terminal of the fourth controllable switch Q6, and the application is not limited herein; here, the fifth controllable switch Q7 may be a seventh IGBT, a gate of the seventh IGBT is used as the control terminal of the fifth controllable switch Q7, a collector of the seventh IGBT is used as the first terminal of the fifth controllable switch Q7, and an emitter of the seventh IGBT is used as the second terminal of the fifth controllable switch Q7, which is not limited herein; here, the sixth controllable switch Q8 may be a seventh IGBT, a gate of the seventh IGBT is used as the control terminal of the sixth controllable switch Q8, an emitter of the seventh IGBT is used as the first terminal of the sixth controllable switch Q8, and a collector of the sixth IGBT is used as the second terminal of the sixth controllable switch Q8, and the application is not limited in this respect.

It should be further noted that, the fifth IGBT here may also have a body diode to discharge the energy remaining at the moment of turning off itself; the sixth IGBT can also be provided with a body diode to discharge the energy remained at the moment of turning off the sixth IGBT; the seventh IGBT can also be provided with a body diode to discharge the energy remained at the moment of turning off the body diode; the eighth IGBT here can also be provided with a body diode to bleed off the energy remaining at the instant of its turn-off.

Therefore, the direct-current booster circuit with the multiplexing Vienna circuit topological structure can simply and reliably realize the control logic of the neutral-line-free positive and negative bus voltage-sharing balance of the battery pack.

As a preferred embodiment, controlling the battery pack to discharge the first capacitor pack 2 and the second capacitor pack 3 by controlling the on or off of the first controllable switch module 15 and the second controllable switch module 16 to make the voltage of the first capacitor pack 2 and the voltage of the second capacitor pack 3 equal comprises:

in any control period, if the voltage of the first capacitor bank 2 is greater than the voltage of the second capacitor bank 3, controlling the first controllable switch module 15 and the second controllable switch module 16 to be simultaneously conducted for a first preset time;

after the first preset time period is reached, controlling the second controllable switch module 16 to be turned off and controlling the first controllable switch module 15 to be continuously turned on for a second preset time period so as to discharge the second capacitor bank 3;

and after the second preset time period is reached, controlling the first controllable switch module 15 to be turned off so as to discharge both the first capacitor bank 2 and the second capacitor bank 3, so that the voltage of the first capacitor bank 2 is equal to the voltage of the second capacitor bank 3.

In this embodiment, in any control period, if it is determined that the voltage of the first capacitor bank 2 is greater than the voltage of the second capacitor bank 3, the control logic of the control module 4 may be to indicate that the voltages of the positive and negative buses are unbalanced, and then control the first controllable switch module 15 and the second controllable switch module 16 to be simultaneously turned on for a first preset time period, specifically refer to fig. 8, which illustrates the above process by taking fig. 8 as an example, where fig. 8 takes a dc boost circuit as a single-phase dc boost circuit as an example. When the first controllable switch module 15 and the second controllable switch module 16 are turned on simultaneously, the current flows to the first inductor L1, the first controllable switch module 15, the second controllable switch module 16 and the second inductor L2;

after the first preset time period is reached, controlling the second controllable switch module 16 to be turned off and controlling the first controllable switch module 15 to be continuously turned on for a second preset time period so as to discharge the second capacitor bank 3, wherein the current at the time flows to the first inductor L1, the first controllable switch module 15, the second capacitor bank 3 and the second inductor L2;

after the second preset time period is reached, the first controllable switch module 15 is controlled to be turned off to discharge both the first capacitor bank 2 and the second capacitor bank 3, so that the voltage of the first capacitor bank 2 is equal to the voltage of the second capacitor bank 3, specifically, the current at this time flows to the first inductor L1-the first capacitor bank 2-the second capacitor bank 3-the second inductor L2.

In addition, in any control period, if it is determined that the voltage of the first capacitor bank 2 is equal to the voltage of the second capacitor bank 3, which indicates that the voltage-sharing balance of the positive bus and the negative bus is achieved at this time, the control module 4 controls the first controllable switch module 15 and the second controllable switch module 16 to be simultaneously turned on for a fifth preset time period, and controls the first controllable switch module 15 and the second controllable switch module 16 to be simultaneously turned off after the fifth preset time period is reached, so as to discharge both the first capacitor bank 2 and the second capacitor bank 3.

In addition, for the first preset time period and the second preset time period, the control logic of the control module 4 determines, and the control logic of the control module 4 can be specifically referred to the following description of the embodiment.

Firstly, it should be noted that the bus voltage-sharing balance control device may further include a first voltage sampling module, a second voltage sampling module, a third voltage sampling module, a first current sampling module, and a second current sampling module that constitute the dc boost circuit;

the first voltage sampling module is connected with the battery pack in parallel, and is also connected with the control module 4 and used for collecting the output voltage of the battery pack;

the second voltage sampling module is connected with the first capacitor bank 2 in parallel, and is also connected with the control module 4 and used for collecting the voltage of the first capacitor bank 2;

the third voltage sampling module is connected with the second capacitor bank 3 in parallel, and is also connected with the control module 4 and used for collecting the voltage of the second capacitor bank 3;

the first current sampling module is connected with the first inductor L1 in series, and is also connected with the control module 4 and used for sampling a first current flowing through the first inductor L1;

the second current sampling module is connected in series with the second inductor L2, and is further connected with the control module 4, and is configured to sample a second current flowing through the second inductor L2;

it should be noted that, in the present application, specific circuit structures of the first voltage sampling module, the second voltage sampling module, the third voltage sampling module, the first current sampling module, and the second current sampling module are not limited, and the sampling logic function thereof may be implemented according to actual requirements. Taking the first voltage sampling module as an example, the first voltage sampling module may include various circuit elements such as a sensor and an operational amplifier to implement the sampling logic function of the first voltage sampling module, which is not particularly limited herein.

Therefore, as for the connection position schematic diagrams of the first voltage sampling module, the second voltage sampling module, the third voltage sampling module, the first current sampling module, and the second current sampling module corresponding to different dc boost circuit topologies, reference may be made to fig. 8, fig. 9, and fig. 10, where fig. 8, fig. 9, and fig. 10 all use the dc boost circuit as a single-phase dc boost circuit as an example, so as to explain the control logic in this application, the specific control logic of the control module 4 may be as shown in fig. 11, fig. 12, and fig. 13:

in the first case: as shown in fig. 11, the voltage of the first capacitor bank 2 and the voltage of the second capacitor bank 3 are added to obtain a dc bus voltage feedback value a; subtracting A from the direct current bus voltage reference value to obtain a direct current bus voltage error value B, wherein the direct current bus reference value is a voltage control target between the direct current bus positive end and the direct current bus negative end; calculating the B in a PI controller to obtain an inductive current reference value C; the first current and the second current are added to obtain an inductor current feedback value D, but the inductor current feedback value D may also be obtained by dividing the sum of the first current and the second current by 2, and the application is not limited herein; processing the output voltage acquired by the first voltage sampling module to obtain a battery pack voltage feedforward value E; subtracting D from C, calculating in a PI controller to obtain a first control parameter for controlling a KPWM generator with an amplification coefficient of K, and adding E to the first control parameter to obtain a second control parameter for controlling the KPWM generator; inputting the second control parameter into the KPWM generator to obtain a driving duty cycle for driving the first controllable switch module 15;

the voltage of the first capacitor group 2 is subtracted from the 1/2 dc bus voltage reference value to obtain a half dc bus voltage error value F, and of course, the half dc bus voltage error value F may be obtained by subtracting the voltage of the second capacitor group 3 from the 1/2 dc bus voltage reference value, which is not limited herein; calculating the F in a PI controller to obtain a third control parameter for controlling the KPWM generator with the amplification factor of K, and subtracting the third control parameter from the second control parameter to obtain a fourth control parameter for controlling the KPWM generator; the fourth control parameter is input to the KPWM generator to obtain a driving duty cycle for driving the second controllable switch module 16.

It should be noted that the control logic in this case is applied to the circuit topology of fig. 8, 9 and 10 without the third current sampling circuit (i.e., sampling the midpoint current).

In the second case: as shown in fig. 12, the sampling result of the midpoint current is simulated by using a balanced current reconstruction method at this time to make the control effect more accurate. Specifically, the voltage of the first capacitor bank 2 and the voltage of the second capacitor bank 3 are added to obtain a direct-current bus voltage feedback value A; subtracting A from the direct current bus voltage reference value to obtain a direct current bus voltage error value B, wherein the direct current bus reference value is a voltage control target between the direct current bus positive end and the direct current bus negative end; calculating the B in a PI controller to obtain an inductive current reference value C; the first current and the second current are added to obtain an inductor current feedback value D, but the inductor current feedback value D may also be obtained by dividing the sum of the first current and the second current by 2, and the application is not limited herein; processing the output voltage acquired by the first voltage sampling module to obtain a battery pack voltage feedforward value E; subtracting D from C, calculating in a PI controller to obtain a first control parameter for controlling a KPWM generator with an amplification coefficient of K, and adding E to the first control parameter to obtain a second control parameter for controlling the KPWM generator; inputting the second control parameter into the KPWM generator to obtain a driving duty cycle for driving the first controllable switch module 15;

sampling a first current at the moment when a KPWM counter in a KPWM generator reaches a preset counting threshold value every time, and processing the first current to obtain a third current representing a midpoint current, wherein the preset counting threshold value is set according to actual requirements, and the application is not particularly limited; referring specifically to fig. 14, each arrow in the waveform of the KPWM counter represents the reaching of the preset count threshold described herein to sample the first current; it should be noted that fig. 14 also shows the driving duty cycle waveform of the first controllable switch module 15, the driving duty cycle waveform of the second controllable switch module 16, the waveform of the first current, and the waveform of the third current after the balance current is reconstructed, respectively.

Subtracting the voltage of the second capacitor group 3 from the negative bus voltage reference value to obtain a negative bus voltage error value G, wherein the negative bus voltage reference value is a voltage control target between the neutral end and the negative end of the direct current bus; calculating G in a PI controller to obtain a neutral current reference value H; subtracting the third current from H to obtain a balance current error value I representing the error value of the midpoint current; calculating the I in a PI controller to obtain a fifth control parameter for controlling the KPWM generator with the amplification factor of K, and subtracting the fifth control parameter from the second control parameter to obtain a sixth control parameter for controlling the KPWM generator; the sixth control parameter is input to the KPWM generator to obtain a driving duty cycle for driving the second controllable switch module 16. Compared with the control mode under the first condition, the control mode is more accurate and has better control effect, and compared with the control mode under the third condition, the control mode saves circuit elements.

In a third case, as shown in fig. 13, the bus voltage equalizing and balancing control apparatus may further include a third current sampling circuit that constitutes the dc boost circuit; the connection position schematic diagrams corresponding to different dc boost circuit topologies of the third current sampling circuit can refer to fig. 8, 9 and 10, and are used for acquiring a fourth current (i.e. a midpoint current) on the neutral line. Then, the voltage of the first capacitor bank 2 and the voltage of the second capacitor bank 3 are added to obtain a direct current bus voltage feedback value a; subtracting A from the direct current bus voltage reference value to obtain a direct current bus voltage error value B, wherein the direct current bus reference value is a voltage control target between the direct current bus positive end and the direct current bus negative end; calculating the B in a PI controller to obtain an inductive current reference value C; the first current and the second current are added to obtain an inductor current feedback value D, but the inductor current feedback value D may also be obtained by dividing the sum of the first current and the second current by 2, and the application is not limited herein; processing the output voltage acquired by the first voltage sampling module to obtain a battery pack voltage feedforward value E; subtracting D from C, calculating in a PI controller to obtain a first control parameter for controlling a KPWM generator with an amplification coefficient of K, and adding E to the first control parameter to obtain a second control parameter for controlling the KPWM generator; inputting the second control parameter into the KPWM generator to obtain a driving duty cycle for driving the first controllable switch module 15;

subtracting the voltage of the second capacitor group 3 from a negative bus voltage reference value to obtain a negative bus voltage error value J, wherein the negative bus voltage reference value is a voltage control target between the neutral end and the negative end of the direct current bus; calculating J in a PI controller to obtain a neutral current reference value L; subtracting the fourth current from the L to obtain a neutral current error value M; calculating M in a PI controller to obtain a seventh control parameter for controlling the KPWM generator with the amplification factor of K, and subtracting the seventh control parameter from the second control parameter to obtain an eighth control parameter for controlling the KPWM generator; the eighth control parameter is input to the KPWM generator to obtain a driving duty cycle for driving the second controllable switch module 16. Compared with the control mode under the first condition, the control mode is more accurate and has better control effect.

It can be seen that in this way the control logic of the control module 4 can be reliably implemented to ensure positive and negative bus voltage sharing balance.

in any control period, if the voltage of the first capacitor bank 2 is judged to be smaller than the voltage of the second capacitor bank 3, the first controllable switch module 15 and the second controllable switch module 16 are controlled to be simultaneously conducted for a third preset time;

after the third preset time period is reached, controlling the first controllable switch module 15 to be turned off and controlling the second controllable switch module 16 to be continuously turned on for a fourth preset time period so as to discharge the first capacitor bank 2;

and after the fourth preset time period is reached, the second controllable switch module 16 is controlled to be turned off to discharge both the first capacitor bank 2 and the second capacitor bank 3, so that the voltage of the first capacitor bank 2 is equal to the voltage of the second capacitor bank 3.

In this application, the control logic of the control module 4 may be in any control period, and if it is determined that the voltage of the first capacitor bank 2 is smaller than the voltage of the second capacitor bank 3, the first controllable switch module 15 and the second controllable switch module 16 are controlled to be simultaneously turned on for a third preset time period, specifically refer to fig. 8, which illustrates the above process by taking fig. 8 as an example, where fig. 8 takes a dc boost circuit as a single-phase dc boost circuit as an example. Thus, when the first controllable switch module 15 and the second controllable switch module 16 are turned on simultaneously, the current flows to the first inductor L1-the first controllable switch module 15-the second controllable switch module 16-the second inductor L2;

after the third preset time period is reached, controlling the first controllable switch module 15 to be turned off and controlling the second controllable switch module 16 to be continuously turned on for a fourth preset time period so as to discharge the first capacitor bank 2, specifically, the current flow at this time is the first inductor L1-the first capacitor bank 2-the second controllable switch module 16-the second inductor L2;

after the fourth preset time period is reached, the second controllable switch module 16 is controlled to be turned off to discharge both the first capacitor bank 2 and the second capacitor bank 3, so that the voltage of the first capacitor bank 2 is equal to the voltage of the second capacitor bank 3, specifically, the current at this time flows to the first inductor L1-the first capacitor bank 2-the second capacitor bank 3-the second inductor L2.

It should be noted that the bus voltage-sharing balance control device may further include, as described in the above embodiment, a first voltage sampling module, a second voltage sampling module, a third voltage sampling module, a first current sampling module, a second current sampling module, and a third current sampling module that form the dc boost circuit; the control logic of the control module 4 in three different situations has already been described in the above embodiments, and is not further described here.

In addition, the third preset duration and the fourth preset duration are determined by the control logic of the control module 4, and the control logic of the control module 4 may specifically refer to the description of the above embodiments, which is not described herein again.

Referring to fig. 15, fig. 15 is a schematic structural diagram of a three-phase high-frequency UPS provided by the present invention.

The three-phase high-frequency UPS comprises a battery pack and an inverter circuit; the bus voltage-sharing balance control device 5 is characterized in that the battery pack, the bus voltage-sharing balance control device 5 and the inverter circuit are sequentially connected.

For the introduction of the three-phase high-frequency UPS provided in the present invention, please refer to the embodiment of the bus voltage equalizing balance control device 5 described above, which is not described herein again.

The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.

It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising a," "8230," "8230," or "comprising" does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A bus voltage-sharing balance control device is characterized by being applied to a three-phase high-frequency UPS, wherein the three-phase high-frequency UPS comprises a battery pack, a direct-current booster circuit and an inverter circuit which are sequentially connected; the bus voltage-sharing balance control device comprises a discharge module, a first capacitor group, a second capacitor group and a control module which form a direct-current booster circuit of the three-phase high-frequency UPS;

the first input end of the discharging module is connected with the positive output end of the battery pack, the second input end of the discharging module is connected with the negative output end of the battery pack, the first output end of the discharging module is connected with the first end of the first capacitor pack, and the connected common end is used as the positive end of a direct current bus and is connected with the inverter circuit; a second output end of the discharging module is connected with a second end of the first capacitor bank and a first end of the second capacitor bank respectively, and a connected common end is used as a neutral end of the direct current bus to be connected with the inverter circuit; a third output end of the discharging module is connected with a second end of the second capacitor bank, and a public end connected with the second end of the second capacitor bank is used as a negative end of the direct current bus and is connected with the inverter circuit; the discharging module is also connected with the control module;

the control module is used for controlling the battery pack to discharge the first capacitor bank and the second capacitor bank through the discharge module so as to enable the voltage of the first capacitor bank to be equal to the voltage of the second capacitor bank; when the voltage of the first capacitor bank is not equal to the voltage of the second capacitor bank, the discharge time of the first capacitor bank is in negative correlation with the voltage of the first capacitor bank, and the discharge time of the second capacitor bank is in negative correlation with the voltage of the second capacitor bank;

when the direct current booster circuit is a single-phase direct current booster circuit:

the first end of the first energy storage module is used as the first input end of the discharging module, and the second end of the first energy storage module is respectively connected with the first end of the first isolation module and the first end of the first controllable switch module; the first end of the second energy storage module is used as a second input end of the discharging module, and the second end of the second energy storage module is respectively connected with the first end of the second isolation module and the second end of the second controllable switch module;

the second end of the first isolation module is used as the first output end of the discharge module; the second end of the first controllable switch module is connected with the first end of the second controllable switch module, and the connected common end is used as the second output end of the discharge module; a second end of the second isolation module is used as a third output end of the discharge module;

controlling the battery pack to discharge the first capacitor bank and the second capacitor bank through the discharge module so that the voltage of the first capacitor bank is equal to the voltage of the second capacitor bank, including:

controlling the battery pack to discharge the first capacitor pack and the second capacitor pack by controlling the first controllable switch module and the second controllable switch module to be switched on or switched off so as to enable the voltage of the first capacitor pack to be equal to the voltage of the second capacitor pack;

wherein the controlling the battery pack to discharge the first capacitor pack and the second capacitor pack by controlling the on or off of the first controllable switch module and the second controllable switch module to make the voltage of the first capacitor pack equal to the voltage of the second capacitor pack comprises:

and after the second preset time length is reached, controlling the first controllable switch module to be switched off so as to discharge the first capacitor bank and the second capacitor bank, so that the voltage of the first capacitor bank is equal to the voltage of the second capacitor bank.

2. The bus voltage equalizing and balancing control device according to claim 1, wherein when the dc boost circuit is a three-phase dc boost circuit:

3. The bus bar voltage equalizing balance control device according to claim 1, wherein the first energy storage module comprises a first inductor; the second energy storage module comprises a second inductor;

4. The bus bar voltage equalizing balance control device according to claim 3, wherein said first isolation module comprises a first diode; the second isolation module comprises a second diode;

the anode of the first diode is used as the first end of the first isolation module, and the cathode of the first diode is used as the second end of the first isolation module;

5. The bus bar voltage equalizing balance control device according to claim 3, wherein said first isolation module comprises a first controllable switch with a first body diode; the second isolation module comprises a second controllable switch with a second body diode;

the control module is also used for controlling the first controllable switch and the second controllable switch to be switched off.

6. The bus bar voltage-sharing balance control device according to claim 3, wherein the first controllable switch module comprises a third controllable switch and a fourth controllable switch; the second controllable switch module comprises a fifth controllable switch and a sixth controllable switch; the first isolation module comprises a third diode; the second isolation module comprises a fourth diode; the bus voltage-sharing balance control device also comprises a fifth diode and a sixth diode which form the direct-current booster circuit;

a first end of the third controllable switch is used as a first end of the first controllable switch module, a second end of the third controllable switch is connected with a first end of the fourth controllable switch, a second end of the fourth controllable switch is used as a second end of the first controllable switch module, a control end of the third controllable switch is connected with a control end of the fourth controllable switch, and a common end of the third controllable switch and the fourth controllable switch is used as a control end of the first controllable switch module; a first end of the fifth controllable switch is used as a second end of the second controllable switch module, a second end of the fifth controllable switch is connected with a first end of the sixth controllable switch, a second end of the sixth controllable switch is used as a first end of the second controllable switch module, a control end of the fifth controllable switch is connected with a control end of the sixth controllable switch, and a common end connected with the control end of the fifth controllable switch is used as a control end of the second controllable switch module; the anode of the third diode is used as the first end of the first isolation module, and the cathode of the third diode is used as the second end of the first isolation module; a cathode of the fourth diode is used as a first end of the second isolation module, and an anode of the fourth diode is used as a second end of the second isolation module;

an anode of the fifth diode is connected to the second end of the second capacitor bank and an anode of the fourth diode, and a cathode of the fifth diode is connected to the other end of the first inductor, an anode of the third diode, and a first end of the third controllable switch; and the anode of the sixth diode is connected with the other end of the second inductor, the first end of the fifth controllable switch and the cathode of the fourth diode respectively, and the cathode of the sixth diode is connected with the first end of the first capacitor bank and the cathode of the third diode respectively.

7. The bus bar voltage equalizing and balancing control device according to any one of claims 1 to 6, wherein controlling the battery pack to discharge the first capacitor pack and the second capacitor pack by controlling the first controllable switch module and the second controllable switch module to be turned on or off so as to equalize the voltage of the first capacitor pack and the voltage of the second capacitor pack comprises:

and after the fourth preset time period is reached, controlling the second controllable switch module to be switched off so as to discharge the first capacitor bank and the second capacitor bank, so that the voltage of the first capacitor bank is equal to the voltage of the second capacitor bank.

8. A three-phase high-frequency UPS is characterized by comprising a battery pack and an inverter circuit; the bus voltage-sharing balance control device further comprises a bus voltage-sharing balance control device according to any one of claims 1 to 7, wherein the battery pack, the bus voltage-sharing balance control device and the inverter circuit are connected in sequence.