CN114257067A

CN114257067A - Gate Drive Module and Circuit Configuration

Info

Publication number: CN114257067A
Application number: CN202111093128.3A
Authority: CN
Inventors: R·库施
Original assignee: Volkswagen Automotive Co ltd
Current assignee: Volkswagen Automotive Co ltd
Priority date: 2020-09-22
Filing date: 2021-09-17
Publication date: 2022-03-29
Also published as: DE102020211852A1

Abstract

The invention relates to a gate drive module for switching on and off a power transistor, comprising at least two switchable voltage sources and at least two outputs to which on and off resistors can be connected, wherein a configuration unit is provided in which a higher-level circuit configuration of the gate drive module is stored or can be recorded, the gate drive module having a logic unit which is designed to receive a PWM signal from a higher-level control unit and to switch the switchable voltage sources in accordance therewith, the logic unit being designed to store the PWM signal for at least one clock cycle, the gate drive module having a fault unit which is designed to forward an internal fault of the gate drive module to at least one adjacent gate drive module and/or to the control unit and to receive a fault message of the at least one adjacent gate drive module and/or to the control unit, the logic unit is configured to: the PWM signal is generated based on the fault message, the circuit configuration, and the stored PWM signal.

Description

Gate drive module and circuit arrangement

Technical Field

The invention relates to a gate driver module and a circuit arrangement with a plurality of gate driver modules.

Background

Such gate drive modules are used to switch power transistors on and off, which may be wired in different circuit configurations. Examples are an alternating voltage rectifier with, for example, three half-bridges or a 3-stage half-bridge circuit with four power transistors per half-bridge. In case of a fault, these gate drive modules have to switch off the damaged power transistors.

An integrated gate drive circuit for switching a power transistor using external control is known from DE 10351033 a 1. The integrated gate drive circuit ascertains the desaturation of the power transistor, thereby protecting the desaturation transistor from over-voltage transients by being soft-switched off via a soft-switching off sequence. The fault control circuit of the integrated gate drive circuit is responsible for preventing supply undervoltages and transistor desaturation enables communication with multiple integrated gate drive circuits in a multi-phase system using a private local area network.

Disclosure of Invention

The technical problem on which the invention is based is that: an improved gate driver module and a circuit arrangement with such a gate driver module are provided.

A solution to this problem is achieved by a gate driver module according to the invention and a circuit arrangement according to the invention. Further advantageous embodiments of the invention emerge from the dependent claims.

To this end, the gate drive module for switching on and off the power transistor comprises at least two switchable voltage sources and at least two output terminals to which a switching-on and switching-off resistor can be connected. The gate driving module further includes a configuration unit in which a higher-level circuit configuration of the gate driving module with respect to other gate driving modules is stored or can be recorded. For example, the higher-level circuit configuration is transferred and stored by the higher-level control unit. Additionally or alternatively, this is encoded by a discrete circuit, which can then be read or recorded by the configuration unit. For example, the gate driver module thus knows: the gate driver module is part of a 3-stage half-bridge circuit and controls the uppermost power transistor. That is, the gate drive module knows the higher level circuit configuration and the location of the gate drive module in the circuit configuration. The gate driving module further has a logic unit configured to: receiving a PWM signal from a higher level control unit and switching the switchable voltage source in dependence on the PWM signal, wherein the logic unit is configured to store the PWM signal for at least one clock cycle. The gate driving module further has at least one fault unit configured to: forwarding at least one internal fault of the gate driver module to at least one adjacent gate driver module and/or higher level control unit and receiving a fault message of at least one adjacent gate driver module and/or higher level control unit, wherein the logic unit is further configured to: the PWM signal is generated from the fault message of the fault unit, the stored or recorded circuit configuration and the stored PWM signal in order to switch off the connected power transistor. In the event of a failure of a power transistor in the circuit arrangement, the power transistor to be switched off can therefore be switched off in a predetermined switching-off sequence, in order to thus avoid adverse effects such as overvoltages at adjacent power transistors. If, for example, the uppermost gate driver module in a 3-stage half-bridge circuit detects a fault in its assigned power transistor, the other three gate driver modules are first informed. Then, the two built-in gate driver modules turn off their power transistors, and the two external gate driver modules turn off their power transistors. That is, the damaged power transistor is not immediately switched off regardless of the other power transistors. Rather, the power transistors are controlled in a guided manner, if necessary over several cycles.

In the event of a loss or absence of the control signal (PWM), the switching-off procedure required for safe switching-off is therefore complied with and an inadmissibly high voltage cannot be built up at any time at the power transistors.

In one embodiment, the gate driving module is configured to: at least the temperature of the power transistor and/or the output current of the power transistor is received, since the most frequently occurring fault situation can be determined on the basis of these parameters. However, in addition, other parameters, such as the voltage loading of the power transistors, can also be received. Based on these parameters, future failures may then be predicted or estimated, for example.

In a further embodiment, the gate driver module has at least one third switchable output, to which at least one current source can be switched in parallel with the input and output resistors. The at least one current source may be arranged outside the gate driver module like the input and output resistors or else may be integrated into the gate driver module like a voltage source. By means of an accessible current source, the switching-on process can be accelerated, for example, wherein the current source is then switched off again. It is also possible that: such a current source is used for fast switching-off, wherein the gate state is then maintained by the voltage source in static operation. The embodiment with the third switchable output is also an independent invention without logic, fault and configuration units.

The circuit arrangement has a plurality of gate drive modules, wherein the faulty cells of the gate drive modules are connected to each other in a daisy chain, so that a local control of the circuit arrangement is enabled.

In another embodiment, higher level control units are incorporated into the daisy chain so that other faults can also be transmitted.

In another embodiment, the circuit arrangement is configured as a 3-stage half-bridge circuit.

Drawings

The invention is described in more detail hereinafter with reference to preferred embodiments. In the drawings:

fig. 1 shows a schematic block circuit diagram of a gate driver module with external circuitry;

fig. 2 shows a 3-stage half-bridge circuit as a circuit configuration with a daisy chain without higher-level control units; and

fig. 3 shows a 3-stage half-bridge circuit as a daisy-chained circuit configuration with incorporated higher-stage control units.

Detailed Description

In fig. 1, a schematic block circuit diagram of a gate drive module 1 for switching on and off a power transistor LT is shown. The gate drive module 1 has a first output a1, at which a capacitor C is arranged_dyAnd an on-resistance R_G1A series circuit is formed, and the series circuit is connected to the gate G of the power transistor LT. Switch-off resistance R_G2In parallel with the series circuit at the second output a 2. Current source I₀At the third output a 3. The gate drive module 1 also has a configuration unit 2, a logic unit 3, a fault unit 4 and an isolated voltage supply 5 which supplies two switchable voltage sources V_p、V_sTo supply power and to supply these units 2-4 with a supply voltage. The gate drive module 1 also has a switching module 6 with four switches S1-S4, and an amplifier 7. The configuration unit 2 obtains a configuration signal SPI of a higher-level control unit, not shown, from which a higher-level circuit configuration and a position of the gate driving module 1 in the higher-level circuit configuration are derived.

Alternatively or additionally, the information is encoded by discrete connections that can be detected at the input D. The logic unit 3 obtains a PWM signal, which is realized by the logic unit 3 by manipulating the switching elements S1-S4, from a higher-level control unit, not shown. The logic unit 3 may also access the data of the configuration unit 2 and store the PWM signal. The fault unit 4 is dependent on the temperature T of the power transistor LT_jctAnd the output current I of the power transistor LT_outTo generate a Fault signal that waits for processing at the output Fault out. Temperature T of power transistor_jctFor example, by means of a temperature sensor 8 and is supplied to the fault unit 4 via an amplifier 7. The Fault unit 4 also obtains a Fault message Fault in from an adjacent gate drive module and/or a higher level control unit. The fault unit 4 is connected to the logic unit 3 via a connection not shown. If the power transistor LT should now be switched on very quickly, the switch S3 is closed (S1, S2 and S4 remain open). After switching on, S3Open and close S1. To turn off, S4 is closed and the other switches S1 to S3 are opened.

Next, S4 may then be opened and S2 closed. That is, only one switch S1-S4, respectively, is closed at all times, with switches S1 and S3 being used to turn on and switches S2 and S4 being used to turn off. It should be noted here that: the order may also be reversed, i.e. for example, S3 is closed first and then S1 is closed, or S2 is closed first and then S4 is closed.

Now, in case of a failure, the logic unit 3 gets a failure message. The logic unit 3 is aware of the higher-level circuit configuration and can then switch off its assigned power transistor LT in a next step in coordination with the other gate driver modules of the circuit configuration by means of the stored PWM signal, without this having a detrimental effect on the other power transistors.

In fig. 2, a 3-stage half-bridge circuit 10 is shown, which has four power transistors LT, wherein an intermediate tap M and a neutral point N are provided. These power transistors LT are respectively operated by the gate driver module 1. These gate drive modules 1 obtain their PWM signals PWM1-PWM4 and their configuration signals SPI, respectively, from a higher level control unit, not shown. Here, the Fault input Fault _ in and the Fault output Fault _ out are coupled to each other in a daisy chain, so that each gate driver module is informed of a Fault occurring within the circuit configuration and can then switch off the power transistors LT in coordination with each other. It should be noted here that: configurations in daisy chains with more than 4 elements are also possible.

An alternative embodiment is shown in fig. 3, in which higher level control units 20 are incorporated in a daisy chain.

List of reference numerals

1 grid driving module

2 configuration unit

3 logic unit

4 failed unit

5 Voltage supply device

6 switching module

7 amplifier

8 temperature sensor

103-stage half-bridge circuit

20 control unit

LT power transistor

G grid

S1-S4 switch

Claims

1. A gate drive module (1) for switching on and off a power transistor (LT), the gate drive module comprising at least two switchable voltage sources (V)_p、V_s) And at least two outputs (A1, A2) for switching the resistors (R) on and off_G1、R_G2) Can be connected to the output, a configuration unit (3) is provided in which a higher-level circuit configuration of the gate driver module (1) relative to other gate driver modules is stored or can be recorded, wherein the gate driver module (1) further has a logic unit (4) which is designed to: receiving a PWM signal from a higher level control unit (20) and controlling the switchable voltage supply (VV) in dependence on the PWM signal_p、V_s) -switching, wherein the logic unit (4) is further configured to store the PWM signal for at least one clock cycle, wherein the gate drive module (1) has at least one fault unit (5) configured to: forwarding at least one internal fault of the gate driver module (1) to at least one neighboring gate driver module and/or the higher level control unit (20) and receiving a fault message of at least one neighboring gate driver module and/or the higher level control unit (20), wherein the logic unit (4) is further configured to: generating a PWM signal in dependence on the fault message of the fault unit (5), the stored or recorded circuit configuration and the stored PWM signal in order to switch off the connected power transistor (LT).

2. A gate drive module according to claim 1, characterized in that the gate drive module (1) is configured to: receiving at least the temperature (T) of the power transistor (LT)_jct) And/or the output current (I) of the power transistor (LT)_out）。

3. A gate drive module according to claim 2, characterized in that the gate drive module (1) is configured to receive at least one further parameter of the power transistor (LT).

4. A gate drive module according to any one of the preceding claims, characterized in that the gate drive module (1) has at least one third switchable output (a 3), at least one current source (I)₀) Can be connected with input and output resistors (R)_G1、R_G2) Connected in parallel to the third switchable output.

5. A circuit arrangement with a plurality of gate drive modules according to any one of the preceding claims, characterized in that the faulty cells (5) of the gate drive modules (1) are connected to each other in a daisy chain.

6. A circuit arrangement as claimed in claim 5, characterized in that the higher-level control unit (20) is incorporated in the daisy chain.

7. A circuit arrangement as claimed in claim 5 or 6, characterized in that the circuit arrangement is constructed as a 3-stage half-bridge circuit (10).