CN114253383A - Redundant power supply circuit with fault detection and positioning functions and method - Google Patents
Redundant power supply circuit with fault detection and positioning functions and method Download PDFInfo
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- CN114253383A CN114253383A CN202111360422.6A CN202111360422A CN114253383A CN 114253383 A CN114253383 A CN 114253383A CN 202111360422 A CN202111360422 A CN 202111360422A CN 114253383 A CN114253383 A CN 114253383A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/30—Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/079—Root cause analysis, i.e. error or fault diagnosis
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Abstract
The invention provides a redundant power supply circuit with a fault detection and positioning function and a method thereof. The method of the invention utilizes the CPU processor, the controllable power supply and the sub-component circuit are controlled by the instruction of the CPU processor, and can independently cut off/disconnect or re-power on/re-connect, when circuit failure occurs, the failure is reproduced by controlling the on-off of each part, the division and the positioning of the failure are realized, and the analysis and the maintenance of the failure in a circuit system are convenient; meanwhile, each load is powered on by 2 power supplies in a redundant mode, normal operation can be guaranteed under the condition that one power supply fails, reliability of a power supply system is improved through the redundant design, and effective power supply of the loads in the circuit is guaranteed.
Description
Technical Field
The invention relates to the technical field of electronic circuits, in particular to a redundant power supply circuit with a fault detection and positioning function and a method.
Background
In the circuit, the fault can be positioned and the fault type can be determined, which is an important ring for diagnosing and troubleshooting the circuit fault, so that the circuit fault can be analyzed preliminarily, and the circuit fault diagnosis and troubleshooting method is favorable for overhauling and maintenance of the whole circuit system. Meanwhile, a power supply is a device for supplying electric energy in a circuit and is a basic element in the operation of the circuit. During the power supply process, the failure of a certain power supply may affect the operation of the whole circuit system, which puts a great demand on the reliability and stability of the power supply.
Therefore, there is a need for a circuit capable of detecting a circuit fault, locating the fault in the circuit in time, and improving reliability and stability of a power supply system.
Disclosure of Invention
In view of this, the invention provides a redundant power supply circuit with a fault detection and location function and a method thereof, which can realize the division and location of faults when the circuit has faults, and facilitate the analysis and the maintenance of the faults in a power supply system.
In order to achieve the purpose, the technical scheme of the invention is as follows:
a redundant power supply circuit with a fault detection and positioning function comprises a CPU processor, n loads and at least n controllable power supplies.
When the load has a fault, the CPU processor acquires the running state of the load through the programmable IO line, and sends an instruction to the controllable power supply through the programmable IO line.
The controllable power supplies supply power to the loads through wires, and each load is provided with 2 controllable power supplies for redundant power-on.
The instructions comprise a power-off instruction and a power-on instruction; the controllable power supply cuts off the power of the load connected with the controllable power supply after receiving the power-off instruction, and the controllable power supply powers on the load connected with the controllable power supply after receiving the power-on instruction.
Furthermore, the circuit also comprises a CPU power supply which supplies power to the CPU processor through a diode.
Further, when the number of the controllable power supplies is n +1, the specific circuit is as follows:
the CPU processor is connected with two ends of the first controllable power supply through the programmable IO line, connected with two ends of the second controllable power supply through the programmable IO line, connected with two ends of the third controllable power supply through the programmable IO line, and so on, and connected with two ends of the (n + 1) th controllable power supply through the programmable IO line.
The first load is connected with the CPU processor through the programmable IO line, the second load is connected with the CPU processor through the programmable IO line, the third load is connected with the CPU processor through the programmable IO line, and the like, and the nth load is connected with the CPU processor through the programmable IO line.
The first controllable power supply and the (n + 1) th controllable power supply are respectively provided with a branch passing through a diode, and the second controllable power supply, the third controllable power supply, the fourth controllable power supply and the nth controllable power supply are respectively provided with two branches passing through the diode; each load is supplied with two branches of diodes from different controllable power supplies.
Further, when the number of the controllable power supplies is n, the specific circuit is as follows:
the CPU processor is connected with two ends of the first controllable power supply through the programmable IO line, connected with two ends of the second controllable power supply through the programmable IO line, connected with two ends of the third controllable power supply through the programmable IO line, and so on, and connected with two ends of the nth controllable power supply through the programmable IO line.
The first load is connected with the CPU processor through the programmable IO line, the second load is connected with the CPU processor through the programmable IO line, the third load is connected with the CPU processor through the programmable IO line, and the like, and the nth load is connected with the CPU processor through the programmable IO line.
The first controllable power supply and the nth controllable power supply respectively have a branch passing through a diode, and the second controllable power supply, the third controllable power supply, the fourth controllable power supply and the nth-1 controllable power supply respectively have two branches passing through the diode; each load is supplied by two diode-connected branches from different controllable power supplies.
A method with a fault detection and positioning function specifically comprises the following steps aiming at a circuit:
the CPU detects feedback signals of the load through the programmable IO line, when the feedback is abnormal, whether the voltage at two ends of the controllable power supply is normal is detected through the programmable IO line, when the voltage value at two ends of one controllable power supply is abnormal, the power supply is judged to be in a fault, the controllable power supply with the abnormal voltage is sequentially sent with a power-off instruction, and the feedback signals of the load are detected in real time until the feedback signals are normal; when the voltage values at two ends of all the controllable power supplies are normal, judging that the load is in a fault, sending a power-off instruction to the controllable power supplies by the CPU processor, sending power-on instructions to the controllable power supplies by the CPU processor after all the loads are powered off, sequentially powering on each load, detecting a feedback signal of the powered-on load in real time, and removing the fault of the powered-on load if the feedback signal is normal; and if the feedback signal is abnormal, judging that the electrified load has a fault.
Has the advantages that:
1. the invention provides a redundant power supply circuit with a fault detection and positioning function, which comprises a CPU processor, a CPU power supply, a controllable power supply and a load. The method of the invention utilizes the CPU processor, the controllable power supply and the sub-component circuit are controlled by the instruction of the CPU processor, and can independently power off/power on or power on again/power off again, when the circuit fault occurs, the fault is reproduced by controlling the on-off of each part, the division and the positioning of the fault are realized, and the analysis and the maintenance of the fault in the circuit system are convenient; meanwhile, each load is powered on by 2 power supplies in a redundant mode, normal operation can be guaranteed under the condition that one power supply fails, reliability of a power supply system is improved through the redundant design, and effective power supply of the loads in the circuit is guaranteed.
2. The invention provides a method with a fault detection positioning function, which comprises the steps of detecting a feedback signal of a load through a programmable IO line by utilizing a CPU (central processing unit), detecting whether voltages at two ends of a controllable power supply are normal or not through the programmable IO line when the feedback is abnormal, judging that the power supply has a fault when the voltage values at two ends of one controllable power supply are abnormal, sequentially sending a power-off instruction to the controllable power supply with abnormal voltage, and detecting the feedback signal of the load in real time until the feedback signal is normal; when the voltage values at two ends of all the controllable power supplies are normal, judging that the load is in a fault, sending a power-off instruction to the controllable power supplies by the CPU processor, after all the loads are powered off, sending power-on instructions to the controllable power supplies by the CPU processor again, sequentially powering on each load, detecting a feedback signal of the powered-on load in real time, and if the feedback signal is normal, eliminating the fault of the powered-on load; and if the feedback signal is abnormal, judging that the electrified load has a fault.
Drawings
FIG. 1 is a circuit diagram according to an embodiment of the present invention.
Detailed Description
The invention is described in detail below by way of example with reference to the accompanying drawings.
The invention provides a redundant power supply circuit with a fault detection and positioning function, which comprises a CPU processor, n loads and at least n controllable power supplies. The CPU power supply supplies power to the CPU processor through diode a 0. When the load has a fault, the CPU processor acquires the running state of the load through the programmable IO line, and sends instructions including a power-off instruction and a power-on instruction to the controllable power supply through the programmable IO line. The controllable power supplies supply power to the loads through wires, and each load is provided with 2 controllable power supplies for redundant power-on. The controllable power supply cuts off the power of the load connected with the controllable power supply after receiving the power-off instruction, and powers on the load connected with the controllable power supply after receiving the power-on instruction.
In the embodiment of the present invention, when the number of the controllable power supplies is n +1, the specific circuit is:
the CPU processor is connected with two ends of the first controllable power supply through the programmable IO line, connected with two ends of the second controllable power supply through the programmable IO line, connected with two ends of the third controllable power supply through the programmable IO line, and so on, and connected with two ends of the (n + 1) th controllable power supply through the programmable IO line.
The first load is connected with the CPU processor through the programmable IO line, the second load is connected with the CPU processor through the programmable IO line, the third load is connected with the CPU processor through the programmable IO line, and the like, and the nth load is connected with the CPU processor through the programmable IO line.
The first controllable power supply and the (n + 1) th controllable power supply are respectively provided with a branch passing through a diode, and the second controllable power supply 2, the third controllable power supply, the fourth controllable power supply and the nth controllable power supply are respectively provided with two branches passing through the diode; each load has two branches from different controllable power supplies for power supply.
In the embodiment of the present invention, when n controllable power supplies are provided, the specific circuit is:
the CPU processor is connected with two ends of the first controllable power supply through the programmable IO line, connected with two ends of the second controllable power supply through the programmable IO line, connected with two ends of the third controllable power supply through the programmable IO line, and so on, and connected with two ends of the nth controllable power supply through the programmable IO line.
The first load is connected with the CPU processor through the programmable IO line, the second load is connected with the CPU processor through the programmable IO line, the third load is connected with the CPU processor through the programmable IO line, and the like, and the nth load is connected with the CPU processor through the programmable IO line.
The first controllable power supply and the nth controllable power supply respectively have a branch passing through a diode, and the second controllable power supply, the third controllable power supply, the fourth controllable power supply and the nth-1 controllable power supply respectively have two branches passing through the diode; each load has two branches from different controllable power supplies for power supply.
As shown in fig. 1, an embodiment of the present invention includes a CPU processor, a CPU power supply, a first controllable power supply, a second controllable power supply, a third controllable power supply, a fourth controllable power supply, a fifth controllable power supply, a first load, a second load, a third load, and a fourth load.
The CPU processor is connected with two ends of the first controllable power supply through the programmable IO line, connected with two ends of the second controllable power supply through the programmable IO line, connected with two ends of the third controllable power supply through the programmable IO line, connected with two ends of the fourth controllable power supply through the programmable IO line, and connected with two ends of the fifth controllable power supply through the programmable IO line.
The first load is connected with the CPU processor through a programmable IO line, the second load is connected with the CPU processor through a programmable IO line, the third load is connected with the CPU processor through a programmable IO line, and the fourth load is connected with the CPU processor through a programmable IO line.
The first controllable power supply is connected with the first load through a diode A1, the second controllable power supply is connected with the first load through a diode A2, and a diode A1 is connected with the diode in parallel; the first controllable supply is connected to the first load via a diode a1, the second controllable supply is connected to the first load via a diode a2, and a diode a1 is connected in parallel with a diode a 2.
The second controllable power supply is connected to the second load via a diode A3, the third controllable power supply 3 is connected to the second load via a diode a4, and a diode A3 is connected in parallel with a diode a 4.
The third controllable supply is connected to the third load via a diode a5, the fourth controllable supply is connected to the third load via a diode a6, and a diode a5 is connected in parallel with a diode a 6.
The fourth controllable supply is connected to the fourth load via a diode a7, the fifth controllable supply is connected to the fourth load via a diode A8, and a diode a7 is connected in parallel with a diode A8.
The CPU power supply is connected with the CPU processor through a diode and supplies power to the CPU processor.
As shown in the embodiment of fig. 1, the CPU processor is configured to send a power-on instruction to the first controllable power supply, the second controllable power supply, the third controllable power supply, the fourth controllable power supply, and the fifth controllable power supply through the programmable IO port according to a current task requirement, and the CPU processor detects the operating states of the first load, the second load, the third load, and the fourth load through the programmable IO port; if the circuit has faults, the CPU selectively sends power-off or power-on instructions to the first controllable power supply, the second controllable power supply, the third controllable power supply, the fourth controllable power supply, the fifth controllable power supply and the sub-component circuit through the programmable IO ports, and the instructions are used for positioning and dividing the fault types which belong to power supply faults and load faults.
After the instruction is sent, the CPU processor detects the load feedback signal again, determines the fault position and divides the fault type.
The invention provides a method with a fault detection and positioning function, which aims at the redundant power supply circuit and comprises the following specific steps:
the CPU detects feedback signals of the load through the programmable IO line, when the feedback is abnormal, whether the voltage at two ends of the controllable power supply is normal is detected through the programmable IO line, when the voltage value at two ends of one controllable power supply is abnormal, the power supply is judged to be in a fault, the controllable power supply with the abnormal voltage is sequentially sent with a power-off instruction, and the feedback signals of the load are detected in real time until the feedback signals are normal; when the voltage values at two ends of all the controllable power supplies are normal, judging that the load is in a fault, sending a power-off instruction to the controllable power supplies by the CPU processor, after all the loads are powered off, sending power-on instructions to the controllable power supplies by the CPU processor again, sequentially powering on each load, detecting a feedback signal of the powered-on load in real time, and if the feedback signal is normal, eliminating the fault of the powered-on load; and if the feedback signal is abnormal, judging that the electrified load has a fault.
In the embodiment of the invention, the fault position is determined and the fault types are divided, and the specific method comprises the following steps: the CPU processor controls whether the load works, and when a certain load is not accessed but a signal fed back by the load is normal, the accessed load has a fault; when a certain load cannot work, the corresponding controllable power supply fails.
In the embodiment of the invention, the first controllable power supply, the second controllable power supply, the third controllable power supply, the fourth controllable power supply and the fifth controllable power supply are used for receiving a power-on or power-off instruction of the CPU processor through the programmable IO interface, each controllable power supply can independently supply power and cut off power, and the on-off states of the first load, the second load, the third load and the fourth load are controlled according to the power-on or power-off instruction. The first load, the second load, the third load and the fourth load are used for receiving a power-on or power-off instruction of the first controllable power supply, the second controllable power supply, the third controllable power supply, the fourth controllable power supply or the fifth controllable power supply to change the on-off state of the first load, the second load, the third load and the fourth load; moreover, each load is provided with 2 power supplies which are powered on redundantly, so that normal power supply and operation can be guaranteed, and the running process of the load is detected by the CPU.
In summary, the above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (5)
1. A redundant power supply circuit with a fault detection and positioning function is characterized by comprising a CPU processor, n loads and at least n controllable power supplies;
when the load has a fault, the CPU processor acquires the running state of the load through a programmable IO line, and sends an instruction to the controllable power supply through the programmable IO line;
the controllable power supplies supply power to the loads through electric wires, and each load is provided with 2 controllable power supplies for redundant electrification;
the instructions comprise a power-off instruction and a power-on instruction; the controllable power supply receives the power-off instruction and then powers off the load connected with the controllable power supply, and the controllable power supply receives the power-on instruction and then powers on the load connected with the controllable power supply.
2. The circuit of claim 1 further comprising a CPU power supply, said CPU power supply powering said CPU processor through diode a 0.
3. The circuit of claim 1, wherein when the number of controllable power supplies is n +1, the specific circuit is:
the CPU processor is connected with two ends of the first controllable power supply through the programmable IO line, connected with two ends of the second controllable power supply through the programmable IO line, connected with two ends of the third controllable power supply through the programmable IO line, and so on, and connected with two ends of the (n + 1) th controllable power supply through the programmable IO line;
the first load is connected with the CPU processor through a programmable IO line, the second load is connected with the CPU processor through a programmable IO line, the third load is connected with the CPU processor through a programmable IO line, and so on, and the nth load is connected with the CPU processor through a programmable IO line;
the first controllable power supply and the (n + 1) th controllable power supply are respectively provided with a branch passing through a diode, and the second controllable power supply, the third controllable power supply, the fourth controllable power supply and the nth controllable power supply are respectively provided with two branches passing through the diode; each load is supplied with two branches of diodes from different controllable power supplies.
4. The circuit of claim 1, wherein when there are n controllable power supplies, the specific circuit is:
the CPU processor is connected with two ends of the first controllable power supply through the programmable IO line, connected with two ends of the second controllable power supply through the programmable IO line, connected with two ends of the third controllable power supply through the programmable IO line, and so on, and connected with two ends of the nth controllable power supply through the programmable IO line;
the first load is connected with the CPU processor through a programmable IO line, the second load is connected with the CPU processor through a programmable IO line, the third load is connected with the CPU processor through a programmable IO line, and so on, and the nth load is connected with the CPU processor through a programmable IO line;
the first controllable power supply and the nth controllable power supply are respectively provided with a branch passing through a diode, and the second controllable power supply, the third controllable power supply, the fourth controllable power supply and the nth-1 controllable power supply are respectively provided with two branches passing through the diode; each load is supplied by two diode-connected branches from different controllable power supplies.
5. A method with a fault detection and positioning function is directed to the circuit as claimed in claims 1-4, and is characterized in that the specific steps comprise:
the CPU detects feedback signals of the load through a programmable IO line, when the feedback is abnormal, whether the voltage at two ends of the controllable power supply is normal is detected through the programmable IO line, when the voltage value at two ends of one controllable power supply is abnormal, a power supply fault is determined, a power-off instruction is sequentially sent to the controllable power supply with abnormal voltage, and the feedback signals of the load are detected in real time until the feedback signals are normal; when the voltage values at two ends of all the controllable power supplies are normal, judging that the load is in a fault, sending a power-off instruction to the controllable power supplies by the CPU processor, after all the loads are powered off, sending power-on instructions to the controllable power supplies by the CPU processor, sequentially powering on each load, detecting a feedback signal of the powered-on load in real time, and if the feedback signal is normal, eliminating the fault of the powered-on load; and if the feedback signal is abnormal, judging that the electrified load has a fault.
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