CN114172397B

CN114172397B - A prediction method for phase-locked abnormality processing of mains zero-crossing of single-phase energy storage inverter

Info

Publication number: CN114172397B
Application number: CN202111523308.0A
Authority: CN
Inventors: 龙英文; 牟建学; 封安华; 金志强
Original assignee: Hongzheng Energy Storage Shanghai Energy Technology Co ltd
Current assignee: Hongzheng Energy Storage Shanghai Energy Technology Co ltd
Priority date: 2021-12-13
Filing date: 2021-12-13
Publication date: 2025-02-18
Anticipated expiration: 2041-12-13
Also published as: CN114172397A

Abstract

The invention discloses a method for predicting phase-locked abnormal processing of a single-phase energy storage inverter when the mains power passes through zero point. The method is performed according to the following steps: judging whether a phase-locked interruption starts, if not, returning to re-judgment whether the phase-locked interruption starts; if yes, judging whether Δθ is less than, if yes, reducing, if not, judging whether Δθ is greater than and less than, if yes, keeping unchanged, if not, judging whether Δθ is greater than, if yes, increasing, if not, returning to re-judgment whether the phase-locked interruption starts; Δθ is the phase of the inverter voltage leading the mains power, which is the amount by which the inverter voltage is smaller than the mains power frequency, c is the adjustment step for each time, and n is the ratio to c.

Description

Single-phase energy storage inverter mains supply zero crossing point phase locking exception handling prediction method

Technical Field

The invention relates to the technical field of electric power, in particular to a phase-locked exception handling prediction method for a mains supply zero crossing point of a single-phase energy storage inverter.

Background

The utility power needs to be phase-locked in both the grid-connected mode and the utility power bypass off-grid mode of the single-phase energy storage inverter. The traditional method is to adopt a mains supply zero crossing point phase locking method. For example, in the mains supply bypass off-grid mode, the phase of the reference sine table of the tracking inversion output voltage and the update frequency of the tracking step length are regulated by detecting the comparison between the mains supply zero crossing trigger time and the inversion voltage zero crossing time output by the energy storage inverter, so that the purposes of same frequency and same phase of the inversion output voltage and the mains supply are achieved.

The energy storage inverter control chip generally adopts chips such as a DSP, a singlechip and the like. In the phase locking process, a sixteen-bit unsigned integer variable is generally set as a counter for calculating the mains frequency, which is CAPLine, and a sixteen-bit unsigned integer variable is also set as a counter for calculating the inversion frequency, which is CAPInv. When the zero crossing point of the mains supply (generally set as the zero crossing point from the negative half shaft to the positive half shaft) completes triggering of CAP pins of chips such as a DSP, the DSP calls a mains supply zero crossing point interrupt program, the period of the mains supply in the last period can be obtained by multiplying a CAPLine variable obtained by current counting by a count period value Ts of CAPLine, the reciprocal is the mains supply frequency, meanwhile, the counting can be restarted after CAPLine is cleared until the next zero crossing point interrupt of the mains supply comes, and the phase and the frequency of the mains supply are updated again. Similarly, when the inversion zero crossing point (the setting and the mains supply zero crossing need to be consistent) completes triggering of chip CAP pins such as a DSP, the DSP calls a mains supply zero crossing point interrupt program, the period of the inversion output voltage of the previous period can be obtained by multiplying the current count-obtained CAPInv variable by the count period value Ts of CAPInv, the reciprocal is taken as the inversion output voltage frequency, meanwhile, the counting is restarted after CAPInv is cleared until the next inversion zero crossing point interrupt arrives, and the phase and the frequency of the inversion output are updated again. The phase difference of the phase lock is equal to the difference between the zero crossing point moment of the mains supply and the zero crossing point moment of the inverter voltage. If the setting conditions are all in ideal conditions, the problem that the phase-locked dynamic tracking response is slow when the mains frequency is changed is caused by the fact that the inversion zero crossing point interrupt trigger calculation is not timely caused by the fact that the setting conditions have no problem, but different interrupt priorities are met in the actual implementation process. The specific reasons are as follows:

Since any two interrupts in the DSP interrupt program cannot be calculated at the same time, different interrupt priorities are set to calculate important interrupts preferentially. The most important priority of the inversion feedback control interruption is highest, the priority of the mains supply zero crossing interruption is higher but lower than the inversion feedback control interruption because of the need of phase locking, and the inversion zero crossing interruption is lowest. The DSP may generate inversion feedback interrupt and mains supply zero crossing interrupt request when processing inversion zero crossing interrupt, so that the inversion zero crossing interrupt is suspended due to the lowest priority, the inversion feedback interrupt and the mains supply zero crossing interrupt are processed preferentially, and finally the 'post-occurrence but high-priority' mains supply zero crossing interrupt is executed before the 'pre-occurrence but low-priority' inversion zero crossing interrupt.

The problem was found that the zero-crossing difference occurred with a non-negligible probability approaching the maximum 65535 of the unsigned integer variable. The reason that the maximum number is 65535 is that the inversion interrupt is not handled in time and is not cleared, resulting in a situation where the count is always at the end with a hexadecimal unsigned maximum value.

Assuming the frequency of the mains remains unchanged, the following six cases occur in the zero-crossing lock phase:

case 1, as shown in fig. 2, where the difference between zero-crossings < inversion period/2, no prediction is required, phase difference = difference between zero-crossings;

case 2, as shown in fig. 3, where the difference between zero-crossings is < inversion period, and the difference between zero-crossings is < mains period, then the predicted phase difference = mains period-difference between zero-crossings;

Case 3, as shown in fig. 4, when the difference between zero-crossing points < inversion period, and the difference between zero-crossing points > mains supply period, the predicted phase difference=0, and the predicted mains supply period=the difference between zero-crossing points;

Case 4, as shown in fig. 5, where the difference between zero-crossing points > the inversion period and the difference between zero-crossing points < the mains cycle, the predicted phase difference=mains cycle-difference between zero-crossing points;

Case 5, as shown in fig. 6, where the difference between zero-crossing points > the inversion period, the difference between zero-crossing points > the mains supply period, and the difference between zero-crossing points <65000, the predicted phase difference=0, and the mains supply period=the difference between zero-crossing points;

Case 6, as shown in fig. 7, is an abnormal case in which the inversion zero crossing interruption is suspended, and the phase difference=65535-zero crossing difference.

Disclosure of Invention

The invention aims to provide a single-phase energy storage inverter mains supply zero crossing point phase locking abnormity processing and predicting method. For this purpose, the invention adopts the following technical scheme:

a phase-locked exception handling prediction method for a mains supply zero crossing point of a single-phase energy storage inverter is carried out according to the following steps:

Judging whether the phase-locking interruption starts or not, if not, returning to judge whether the phase-locking interruption starts or not again, if so, judging whether delta theta is smaller than If so, reducing Δf, if not, judging whether Δθ is greater thanAnd is smaller thanIf so, keeping Δf unchanged, if not, judging whether Δθ is greater thanIf the phase lock interruption is judged again, delta theta is the phase of the inverting voltage leading the mains supply, delta f is the amount that the inverting voltage is smaller than the mains supply frequency, c is the step of each adjustment, and n is the ratio of delta f to c.

Drawings

FIG. 1 is a schematic diagram of an inversion interrupt pair suspension.

Fig. 2, the difference between zero crossings < inversion period/2 time inversion and phase of mains supply.

Fig. 3, the difference between zero crossings < the phase of the inversion and mains at the inversion period.

Fig. 4, the difference between zero-crossing points < inversion period, and the difference between zero-crossing points > the phase of the mains and inversion at mains period.

Fig. 5, the difference between zero crossings > inversion period, and the difference between zero crossings < phase inversion and mains supply at mains supply period.

Fig. 6, the difference between zero crossings > inversion period and the difference between zero crossings > mains period, and the difference between zero crossings <65000 time inversion and mains phase.

Fig. 7, phase of the inversion and mains when the inversion zero crossing interruption is suspended.

Fig. 8 shows a phase locking operation flow in the abnormal condition of the phase locking condition 6.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It will be apparent that the described embodiments are some, but not all, embodiments of the invention. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

Solution to case 6:

The adjustment strategy has no non-three states, namely 1, reducing the frequency difference, 2, keeping unchanged, and 3, expanding the frequency difference.

Assuming that the current inversion phase advances by Δθ, the frequency is smaller than the commercial power by Δf, and each time the step c 1 is adjusted (this 1 is the minimum number of points increased by the count frequency 1/Ts, which is also the count minimum unit 1), the abbreviation Δf/c=n. The phase differences that can be reduced with different adjustment strategies are as follows:

(1) Reducing the frequency difference if the frequency difference is reduced from the next step to zero, the reduced phase difference in the kth step (k being the current time) is

Δf-c*n=c*(n-k)

Totally reduce the phase difference toA plurality of points;

(2) The phase difference is reduced to zero if the frequency difference is kept unchanged in the next step and then the frequency difference is zero according to the step (1)

A plurality of points;

(3) Expanding the frequency difference, if the frequency difference is expanded in the next step, then the frequency difference is zero according to the step (1), the phase difference can be reduced to

A point.

The frequency difference operation of case 6 can be obtained from the relationship between the current phase difference and the phase difference reducible by taking different strategies as shown in fig. 8.

Claims

1. A method for predicting the abnormality of phase-locked zero-crossing of mains power supply of a single-phase energy storage inverter, characterized by: performing the following steps:

Determine whether the phase-locked interruption has started. If not, return to re-determine whether the phase-locked interruption has started; if so, determine whether Δθ is less than If yes, reduce Δf, if no, determine whether Δθ is greater than and less than If yes, keep Δf unchanged, if no, determine whether Δθ is greater than If yes, increase Δf, if no, return to re-judge whether the phase-locked interruption has started; Δθ is the phase of the inverter voltage leading the mains, Δf is the amount by which the inverter voltage is smaller than the mains frequency, c is the adjustment step each time, and n is the ratio of Δf to c.