CN114171677B - Dielectric layer for realizing multi-value storage, resistive random access memory, preparation method and application thereof - Google Patents
Dielectric layer for realizing multi-value storage, resistive random access memory, preparation method and application thereof Download PDFInfo
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- H—ELECTRICITY
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- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
- H10N70/8822—Sulfides, e.g. CuS
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/0623—Sulfides, selenides or tellurides
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
- C23C14/35—Sputtering by application of a magnetic field, e.g. magnetron sputtering
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- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of switching materials, e.g. deposition of layers
- H10N70/026—Formation of switching materials, e.g. deposition of layers by physical vapor deposition, e.g. sputtering
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Abstract
The invention provides a medium layer for realizing multi-value storage, a resistive random access memory, a preparation method and application thereof, wherein CuSbS 2 is used as a medium material of RRAM, can be provided with bipolar and nonvolatile resistive characteristics, and has lower switching voltage and high resistive switching ratio; meanwhile, the higher energy level of the reverse bond orbit formed by the lone pair electrons of the Sb atoms and the S3 p is hybridized with the Sb 5p again to form a new charge trapping state, so that the dielectric layer and the resistive random access memory show the performance of multi-value storage, the dielectric layer and the resistive random access memory with novel multi-value storage mechanisms different from the prior art are obtained, and the novel application of the CuSbS 2 in the field of memories is obtained. The resistive random access memory is characterized in that: the dielectric layer is made of CuSbS 2 material. The preparation method is characterized in that: the dielectric layer is formed using CuSbS 2 material. The dielectric layer is characterized in that: a CuSbS 2 material was used.
Description
Technical Field
The invention belongs to the technical field of semiconductor manufacturing, and particularly relates to a medium layer for realizing multi-value storage, a resistive random access memory, a preparation method and application thereof.
Background
Resistive random access memory (RESISTIVE SWITCHINGRANDOMACCESS MEMORY, RRAM) is highly valued and widely studied in academic and industrial fields because of its low cost, low power consumption and excellent data storage characteristics, and its great advantage that can become a next generation nonvolatile memory is that RRAM has a great potential for miniaturization. The goal of the miniaturization of RRAM devices is to obtain a high density memory, and the resistive switching mechanism of the RRAM ensures that it can work properly in cell devices with a size of only a few nanometers, but even though the resistive switching mechanism of the RRAM supports the continuous decrease in device size, the increase in memory density is also dependent on the continuous advancement of microelectronic processing technology. However, the advancement of micro-fabrication technology today is facing an increasing challenge, at the expense of achieving miniaturized devices.
In this case, the proposed multi-value storage concept provides an effective way for RRAM to equivalently improve storage density: the multi-value memory technology can improve the memory density by storing a plurality of data for a single memory cell in the RRAM, and can increase the memory density by a multiple without increasing the cost. One of the advantages of RRAM over magnetic and ferroelectric memories is its multi-valued storage potential.
Recent research results show that Quantum Dots (QDs) used as a resistive function layer in RRAM can exhibit typical bipolar resistive characteristics, and the resistive properties of the device can be precisely controlled by adjusting the quantum dot film thickness. In RRAM, due to coulomb blocking and quantum tunneling effect of quantum dots, the quantum dots can realize self-trapping of injected electrons so as to have resistance change performance; the quantity of the trapped electrons is related to the size of the quantum dots under the influence of the quantum size effect, so that the resistance change characteristic of the device can be regulated and controlled by controlling the thickness of the quantum dot layer, and the multi-value storage of data is realized.
RRAM relies on the resistance transition of dielectric materials at different voltages to achieve the storage of data "0" and "1", and the resistance transition mechanism that can be relied on in a resistive random access memory is: electrochemical metallization mechanisms, valence change mechanisms, thermochemical mechanisms, and electrostatic/electronic mechanisms. There are two methods for achieving multi-value storage in RRAM, the first is to use two or more resistance transitioner mechanisms to simultaneously act in the same resistive device to obtain multiple resistance values. However, it is not an easy matter to have both mechanisms active simultaneously and to obtain different resistance states in the same device, and several requirements are usually met: first, the low-resistance state resistance values obtained by the two conversion mechanisms must be different to be observed; second, the mechanism with higher resistance must have a relatively low write voltage or the mechanism with lower resistance must have a relatively low erase voltage, where the resistance transitions caused by the two mechanisms are separated and not masked. The other is to control the transition voltage or current limiting value in the process of resistance transition to obtain conductive filaments with different sizes so as to obtain different resistance values, but the method needs to have a very large storage window (usually more than 100 times) of RRAM (resistive random access memory) to obtain multi-value storage of data by finely controlling the size or length of the conductive filaments, so that the technical difficulty is high and the method can only be applied to conductive filament type resistive devices.
While multi-valued storage of data can be achieved in RRAM using the above two methods, the limitations of the above two approaches themselves, which are difficult to avoid, limit further commercial applications of RRAM as device sizes are further reduced to a size of several nanometers. Therefore, a new method for implementing multi-value storage of data must be found to accommodate the further development of RRAM.
Disclosure of Invention
The present invention has been made to solve the above problems, and an object of the present invention is to provide a dielectric layer, a resistive random access memory, and a method for manufacturing the same, and applications thereof, which realize multi-level memory (having multi-level memory effect), and obtain a dielectric layer and a resistive random access memory having a novel multi-level memory mechanism different from the above two modes by utilizing the diversity of materials and unique electron ion coupling characteristics of some materials.
In order to achieve the above object, the present invention adopts the following scheme:
< resistive random Access memory >
The invention provides a resistive random access memory for realizing multi-value storage, which is characterized in that: the dielectric layer is made of CuSbS 2 material.
Preferably, the resistive random access memory for realizing multi-value storage provided by the invention is characterized in that: the CuSbS 2 material is at least one of a bulk material, a nano-sheet, a nano-wire, a nano-crystal and a quantum dot of the CuSbS 2.
Preferably, the resistive random access memory for realizing multi-value storage provided by the invention is characterized in that: a dielectric layer is positioned between the bottom electrode and the top electrode.
< Preparation method >
The invention further provides a preparation method of the < resistive random access memory >, which is characterized by comprising the following steps: the dielectric layer is formed using CuSbS 2 material.
Preferably, the preparation method of the high-temperature high-emissivity heat dissipation coating provided by the invention specifically comprises the following steps: step 1, preparing a bottom electrode on a substrate; step 2, using CuSbS 2 as a dielectric material, and adopting a thermal injection method, a hydrothermal method or magnetron sputtering to prepare the CuSbS 2 dielectric layer; and 3, preparing a top electrode on the upper surface of the CuSbS 2 dielectric layer.
< Dielectric layer >
Furthermore, the invention also provides a dielectric layer of the resistive random access memory, which is characterized in that: a CuSbS 2 material was used.
Preferably, the dielectric layer of the resistive random access memory provided by the invention is characterized in that: the CuSbS 2 material is at least one of a bulk material, a nano-sheet, a nano-wire, a nano-crystal and a quantum dot of the CuSbS 2.
< Application >
In addition, the invention also provides application of the CuSbS 2 as a dielectric layer material in a resistive random access memory.
Effects and effects of the invention
Compared with a resistive random access memory with a multi-value storage effect in the prior art, the resistive random access memory is focused on regulating and controlling a medium material of the memory, and a brand new mode for realizing the multi-value storage of data, which is different from the prior art, is found by utilizing the diversity of the material and the unique electronic ion coupling characteristic: copper antimony sulfide (CuSbS 2) belongs to ternary sulfide, has the advantages of optimal optical band gap of 1.4-1.6eV, high light absorption coefficient, p-type conductivity, high abundance in nature, no toxic elements and the like, and the CuSbS 2 is used as a dielectric material of RRAM, so that the CuSbS 2 can be bipolar and nonvolatile resistive characteristics, and has lower switching voltage and high resistive switching ratio; meanwhile, the higher energy level of the reverse bond orbit formed by the lone pair electrons of the Sb atoms and the S3 p is hybridized with the Sb 5p again to form a new charge trapping state, so that the dielectric layer and the resistive random access memory show the performance of multi-value storage, and the brand new application of the CuSbS 2 in the memory field is obtained.
Drawings
FIG. 1 is a schematic diagram of a resistive random access memory for realizing multi-value storage in an embodiment of the invention, wherein the resistive random access memory comprises a 10-resistive random access memory, an 11-substrate, a 12-bottom electrode, a 13-dielectric layer and a 14-top electrode;
FIG. 2 is a schematic diagram of a crystal structure of CuSbS 2 for implementing multi-value storage in an embodiment of the present invention;
FIG. 3 is a resistance change graph of a resistance change memory for implementing multi-value storage prepared in an embodiment of the invention;
FIG. 4 is a graph of repeated read endurance of a resistive random access memory implementing multi-valued storage in an embodiment of the present invention;
FIG. 5 is a graph of time stability of a resistive random access memory implementing multi-valued storage in an embodiment of the present invention;
FIG. 6 is a graph showing a resistance change curve of a resistance change memory having a dielectric layer of Cu 3SbS4 in a comparative example according to the present invention;
Fig. 7 is a resistance change graph of a resistance change memory with a dielectric layer of Cu 12Sb4S13 in the comparative example of the present invention.
Detailed Description
Specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Unless otherwise indicated, the starting materials and reagents used in the following examples were either commercially available or may be prepared by known methods.
< Example >
As shown in fig. 1, the resistive random access memory 10 for realizing multi-value storage provided in the present embodiment includes a substrate 11, a bottom electrode 12, a dielectric layer 13, and a top electrode 14, which are sequentially disposed from bottom to top. The substrate 11 is a glass substrate, the bottom electrode 12 is an ITO film, the dielectric layer 13 is a copper-antimony-sulfur quantum dot (CuSbS 2 QDs) dielectric material, and the top electrode 14 is an Au electrode.
The preparation method comprises the following steps:
(1) Glass is selected as a substrate 11, ITO is deposited on the surface of the substrate 11 by a magnetron sputtering method, and a bottom electrode 12 is formed; the sputtering power is 100W, and the distance between the substrate and the target is 100mm; the sputtering atmosphere was Ar/o=45:1; sputtering air pressure is 0.4Pa; the sputtering temperature is 200 ℃, and the annealing process is 650 ℃ and the temperature is kept for 30min.
(2) The two-step method is adopted to prepare CuSbS 2 QDs: in a first step, 1.5mmol of sulfur powder (CDH, 99.9%) and thioacetamide (TA, 99%) are added to 2ml of oleylamine (OLA, 90%) and heated to 50℃under a nitrogen blanket and incubated until CDH and TA are all dissolved in the oleylamine, which takes approximately 20-30min, in a second step, 0.5mmol of copper acetate ((CH 3COO)2Cu·H2 O, 99%), 0.5mmol of antimony trichloride (SbCl 3, 99%) and 6ml of OLA are added into a three-necked flask, after stirring and degassing for 20-30min at room temperature, the mixed system is heated to 190 ℃ under the protection of nitrogen, and finally the CDH-OLA solution prepared in the first step is added into the three-necked flask, the mixed system is heated to 200 ℃ and is kept warm for 45min, and after the reaction is finished, the mixture is cooled to room temperature and then is subjected to a thermal injection method to prepare CuSbS 2 QDs. 275mg of cuprous iodide (CuI, 99%) were first weighed into a three-necked flask and fixed on a heating mantle. Filling quartz sand for heat preservation, and ensuring that the three-necked flask is heated uniformly. OLA was selected as the reaction solvent, 30mL of oleylamine (OLA, 80-90%) was measured and added to a three-necked flask and gradually warmed to a reaction temperature of 150℃under an argon atmosphere and maintained for 10 minutes. 342mg of antimony trichloride (SbCl 3, 99%) was then added to the reaction mixture and stirring continued for 3 minutes. In another reagent bottle, 1026mg of N, N-diphenylthiourea (C 13H12N2 S, 98%) was weighed out and added to 2.25mL of diphenyl ether (C 12H10 O, > 99%) and heated to 90℃until dissolved. A solution of C 13H12N2S-C12H10 O was quickly injected into OLA using a quartz syringe and incubated for 300s. After the reaction was completed, the resulting solution was rapidly cooled to room temperature. The washing and centrifugation process was performed to obtain purified CuSbS 2 QDs, which was dispersed in hexane and stored in a nitrogen glove box. The structure of the prepared CuSbS 2 QDs is shown in figure 2.
(3) The prepared CuSbS 2 QDs precursor solution is spin-coated on an ITO/Glass substrate to form a dielectric layer 13.
(4) Finally, au is deposited on the surface of the CuSbS 2 QDs by a magnetron sputtering method, so that the Au top electrode 14 is formed. The purity of the top electrode 14 was 99.99%, and the sputtering parameters were respectively: the sputtering power is 100W, and the distance between the substrate and the target is 100mm; the sputtering atmosphere is Ar; sputtering air pressure is 0Pa; the sputtering temperature was room temperature.
Characterization of the properties:
The resistance change curve and the cycling stability of the prepared resistive random access memory 10 were tested.
FIG. 3 shows the I-V curve of the CuSbS 2 QDs, as can be seen from the figure. In the no voltage (or low voltage) state, the CuSbS 2 QDs device current is in the range of 10 -8～10-6 a, the device is in the High Resistance State (HRS), exhibits high insulation, which is referred to as an OFF state. The current value increases as the Voltage increases slowly from 0V (process 1), and the current increases rapidly from around 10 -6 a to around 10 -4 a (process 2), called the ON state, when the reverse Voltage increases to-0.83V, the Voltage at which (-0.83V) is called the writing Voltage of RRAM (SET Voltage), when the device transitions from HRS to the intermediate resistance state (INTERMEDIATE STATE, Process 3) demonstrates the ability of CuSbS 2 QDs to have multi-valued storage; Further increasing the applied voltage value to-1.28V, the device current reached within 10 -2～10-1 a, the device entered a low resistance state (LRS, process 4), and further applying the voltage, the device in LRS state exhibited good stability in both negative voltage scan (process 5, 6) and positive voltage scan (process 7, 8). subsequently, the sweep voltage gradually decreases from the high voltage applied in the forward direction, the current suddenly decreases from about 10 -2 A to 10 -4 A (process 9) when the device transitions again from LRS to the intermediate resistance state (process 10), which can be seen as the intermediate resistance state of CuSbS 2 QDs can exist steadily during the writing and erasing of the device, the Voltage at this time (1.28V) is called RESET Voltage (RESET Voltage). Continuing to decrease the applied voltage to around 0.83V, the current rapidly decreases from around 10 -4 a to around 10 -6 a (process 11), and the device enters a High Resistance State (HRS), i.e., an OFF state.
Fig. 4 and 5 are graphs showing repeated reading durability and time stability changes of the resistive random access memory 10, respectively. A rectangular pulse wave is adopted to alternately apply positive and negative voltages to the device for durability test, and write and erase voltage pulses are respectively-0.1V/1 ms and 0.1V/1ms. It can be seen that after 10 5 repeated erasures and writing, the memory window of the device is always kept around 10 4, and the data storage state has no obvious change, which indicates that the device has good data writing and reading characteristics. The device takes-0.1V as the reading voltage, the resistance performance degradation rate is less than 0.01% after the device continuously works for 1.4X10 7 s, and the on/off ratio is still stably kept above 10 4, which proves that the device has good storage stability. In repeated reading durability and time stability tests, the intermediate resistance state of the CuSbS 2 QDs always exists stably, so that the multi-value storage state is not stored by means of the metastable state of the CuSbS 2 QDs, the intermediate storage process can exist in a resistance variable device stably, and the discovery provides a new way for realizing multi-value storage for the resistance variable memory.
Comparative example
The Cu-Sb-S ternary system comprises three phases of CuSbS 2、Cu3SbS4 and Cu 12Sb4S13, and whether the two phases of Cu 3SbS4 and Cu 12Sb4S13 have multi-value storage performance or not is also explored.
Cu 3SbS4 and Cu 12Sb4S13 quantum dots are prepared by adopting a thermal injection method.
The preparation process of the Cu 12Sb4S13 quantum dot comprises the following steps: 285.6mg of cuprous iodide (CuI, 99%) was first weighed into a three-necked flask and fixed on a heating mantle. Filling quartz sand for heat preservation, and ensuring that the three-necked flask is heated uniformly. Oleylamine (OLA) was selected as a reaction solvent, 30mL of OLA was measured and added to a three-necked flask and gradually warmed up to a reaction temperature (110 ℃,130 ℃ and 150 ℃ respectively) under an argon atmosphere and maintained for 10 minutes. 114mg of antimony trichloride (SbCl 3, 99%) was then added to the reaction mixture and stirring continued for 3 minutes. In another reagent bottle, 513.70mg of N, N-diphenylthiourea (C 13H12N2 S, 98%) was weighed out and added to 2.25mL of diphenyl ether (C 12H10 O, > 99%) and heated to 90℃until dissolved. A solution of C 13H12N2S-C12H10 O was quickly injected into OLA using a quartz syringe and incubated for 300s. After the reaction was completed, the resulting solution was rapidly cooled to room temperature. The washing and centrifugation process was performed to obtain purified Cu 12Sb4S13 QDs, which were dispersed in hexane and stored in a nitrogen glove box.
In contrast to Cu 12Sb4S13 quantum dots, cu 3SbS4 quantum dots were originally dosed with 285.6mg of CuI, 114mg of SbCl 3 and 1140mg of C 13H12N2 S, and the other preparation processes were identical to Cu 12Sb4S13 above.
The resistance change curves of the Cu 3SbS4 and Cu 12Sb4S13 quantum dots are shown in figures 6 and 7, and the resistance change curves of the Cu 3SbS4 and Cu 12Sb4S13 quantum dots have no intermediate resistance state process, which shows that the Cu 3SbS4 and Cu 12Sb4S13 quantum dots have no multi-value storage performance.
Analysis of three phases of Cu-Sb-S (CuSbS 2、Cu3SbS4 and Cu 12Sb4S13) CuSbS 2 alone has a multi-valued memory property: we have found that CuSbS 2 has a multi-value storage property determined by its own crystal structure, in the unique two-dimensional layered structure of CuSbS 2, the lone pair electrons of Sb atoms have a higher energy with the back bond orbitals formed by the S3 p orbitals, which can again undergo orbital hybridization with the Sb 5p orbitals, and the new orbitals formed can provide new trapping states for charges, which are intermediate resistance states shown in the resistance curves, whereas Cu 3SbS4 and Cu 12Sb4S13 do not have such crystal structures, so they do not have the multi-value storage property.
The above embodiments are merely illustrative of the technical solutions of the present invention. The medium layer, the resistive random access memory, the preparation method and the application thereof for realizing multi-value storage according to the present invention are not limited to the description of the above embodiments, but the scope defined by the claims. Any modifications, additions or equivalent substitutions made by those skilled in the art based on this embodiment are within the scope of the invention as claimed in the claims.
Claims (8)
1. The resistive random access memory for realizing multi-value storage is characterized in that:
the resistive layer is made of CuSbS 2 material.
2. The resistance random access memory for realizing multi-value storage according to claim 1, wherein:
The CuSbS 2 material is at least one of a bulk material, a nano-sheet, a nano-wire, a nano-crystal and a quantum dot of the CuSbS 2.
3. The resistance random access memory for realizing multi-value storage according to claim 1, wherein:
wherein the resistive layer is positioned between the bottom electrode and the top electrode.
4. A method for manufacturing a resistive random access memory for realizing multi-value storage according to any one of claims 1 to 3, characterized in that:
the resistive layer is formed using CuSbS 2 material.
5. The method for manufacturing a resistive random access memory for realizing multi-value storage according to claim 4, comprising the steps of:
Step 1, preparing a bottom electrode on a substrate;
Step 2, taking CuSbS 2 as a resistance change material, and adopting a thermal injection method, a hydrothermal method or magnetron sputtering to prepare the resistance change layer of the CuSbS 2;
And 3, preparing a top electrode on the upper surface of the CuSbS 2 resistive layer.
6. The resistive random access memory realizes the multi-value storage, and is characterized in that:
a CuSbS 2 material was used.
7. The resistive layer of the resistive memory realizing multi-value storage according to claim 6, wherein:
The CuSbS 2 material is at least one of a bulk material, a nano-sheet, a nano-wire, a nano-crystal and a quantum dot of the CuSbS 2.
The CuSbS 2 is applied to a resistive random access memory for realizing multi-value storage as a resistive random access layer material.
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