CN114171675B

CN114171675B - A magnetic tunnel junction with low power consumption and high storage density

Info

Publication number: CN114171675B
Application number: CN202111319734.2A
Authority: CN
Inventors: 孟皓; 迟克群
Original assignee: CETHIK Group Ltd
Current assignee: CETHIK Group Ltd
Priority date: 2021-11-09
Filing date: 2021-11-09
Publication date: 2025-11-14
Anticipated expiration: 2041-11-09
Also published as: CN114171675A

Abstract

The invention discloses a magnetic tunnel junction with low power consumption and high storage density, which comprises a free layer and a barrier layer, wherein an interface is generated between the free layer and the barrier layer, and an annular defect structure is formed by etching the edge of the interface. The structure has a ring-shaped defect structure at the interface of the free layer and the barrier layer, and the interface of the ring-shaped defect structure has lower induced perpendicular anisotropy, so that the overall perpendicular anisotropy energy of the free layer is reduced, and meanwhile, an in-plane magnetization direction is formed at the edge of the magnetic tunnel junction, thereby being beneficial to reducing critical flip current, improving magnetic flip speed, storage density and running speed and reducing power consumption.

Description

Magnetic tunnel junction with low power consumption and high storage density

Technical Field

The invention belongs to the technical field of memories, and particularly relates to a magnetic tunnel junction with low power consumption and high storage density.

Background

The STT-MRAM (SPIN TRANSFER Torque-Magnetoresistive Random Access Memory) is a novel nonvolatile memory, adopts a magnetic tunnel junction (Magnetic Tunnel Junction, MTJ) as a memory unit, has excellent characteristics of nanosecond high-speed reading and writing, almost infinite service life, data storage time of more than 10 years and the like, and has great potential in future memory application. With the increasing demands of hardware on the memory performance, the application of STT-MRAM in a memory chip with large capacity and ultra-low power consumption still faces challenges, and the Magnetic Tunnel Junction (MTJ) is used as a basic memory unit of the STT-MRAM, so that the memory performance of the STT-MRAM is directly determined. The bottleneck in the increase in storage density of STT-MRAM is mainly due to the higher switching current required. In order to provide sufficient switching current, with the current transistor power supply capability, a larger power supply unit area is required, which is far larger than the MTJ device area, limiting the overall memory density, and at the same time, the higher the STT-MRAM memory density, the greater the power consumption. Therefore, how to achieve the increase in STT-MRAM storage density and the reduction in power consumption by reducing the switching current becomes a critical issue.

Disclosure of Invention

The present invention aims to solve the above problems, and provides a magnetic tunnel junction with low power consumption and high storage density, which is beneficial to reducing critical switching current, improving magnetic switching speed, storage density and operation speed, and reducing power consumption.

In order to achieve the above purpose, the technical scheme adopted by the invention is as follows:

The invention provides a magnetic tunnel junction with low power consumption and high storage density, which comprises a free layer and a barrier layer, wherein an interface is generated between the free layer and the barrier layer, and an annular defect structure is formed by etching the edge of the interface.

Preferably, the wall thickness of the annular defect structure is 0.1 nm-2 nm.

Preferably, the thickness of the free layer is 0.6nm to 2nm.

Preferably, the material of the free layer is selected from one or more of Co、Fe、Ni、Pt、Pd、Ru、Ta、W、Ir、Rh、Mo、Hf、Cu、CoB、FeB、NiB、CoFe、NiFe、CoNi、CoFeNi、CoFeB、NiFeB、CoNiB、CoFeNiB、FePt、FePd、CoPt、CoPd、CoFePt、CoFePd、FePtPd、CoPtPd、CoFePtPd.

Preferably, the material of the barrier layer is selected from one or more of magnesium oxide, silicon oxygen compound, silicon nitrogen compound, aluminum oxide compound, magnesium aluminum oxide compound, titanium oxide compound layer, tantalum oxide compound, calcium oxide compound, iron oxide compound.

Compared with the prior art, the magnetic tunnel junction has the beneficial effects that the interface of the free layer and the barrier layer is provided with the annular defect structure, and the interface induced perpendicular anisotropy of the annular defect structure is lower, so that the overall perpendicular anisotropy energy of the free layer is reduced, meanwhile, the in-plane magnetization direction is formed at the edge of the magnetic tunnel junction, the critical flip current is reduced, the magnetic flip speed, the storage density and the running speed are improved, and the power consumption is reduced.

Drawings

FIG. 1 is a schematic diagram of a prior art magnetic tunnel junction;

FIG. 2 is a schematic diagram of a magnetic tunnel junction of the present invention;

FIG. 3 is a schematic diagram of an interface structure of a magnetic tunnel junction according to the present invention;

fig. 4 is a graph of probability of magnetic tunnel junction inversion versus current density for the prior art (left) and the present invention (right).

Detailed Description

The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

It is to be noted that all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs unless defined otherwise. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

Fig. 1 is a schematic structural diagram of a magnetic tunnel junction in the prior art, including a free layer 1 and a barrier layer 3, the free layer 1 is located above the barrier layer 3, an interface 2 is generated between the free layer 1 and the barrier layer 3, and the magnetic tunnel junction is cylindrical, such as a cylinder. The free layer 1 is made of CoFeB material, the barrier layer 3 is made of MgO material, namely an interface (INTERFACE COFEB) is generated between the free layer (Bulk CoFeB) and the barrier layer (MgO), and the CoFeB contacting with MgO on the interface generally has interface-induced vertical anisotropy, and the CoFeB not contacting with MgO is weak in anisotropy. The magnetic tunnel junction has higher turnover current in operation, and needs larger power supply unit area under the current power supply capability of the transistor so as to provide enough turnover current, thereby being unfavorable for improving the storage density and having large power consumption. It should be noted that the laminated structure and the material of the magnetic tunnel junction are not limited thereto, and other laminated structures or other materials may be selected in the prior art.

As shown in fig. 2 to 4, a magnetic tunnel junction with low power consumption and high storage density includes a free layer and a barrier layer, an interface is formed between the free layer and the barrier layer, and a ring-shaped defect structure is formed by etching an edge of the interface.

As shown in fig. 2, the magnetic tunnel junction includes a free layer 1 and a barrier layer 3, the free layer 1 is located above the barrier layer 3, an interface 2 is generated between the free layer and the barrier layer, an annular defect structure 4 is formed at an edge of the interface 2, and the magnetic tunnel junction is cylindrical, such as a cylinder. The free layer 1 is made of CoFeB material, the barrier layer 3 is made of MgO material, namely an interface (INTERFACE COFEB) is generated between the free layer (Bulk CoFeB) and the barrier layer (MgO), and the CoFeB contacting with MgO on the interface 2 generally has interface-induced perpendicular anisotropy, and the CoFeB not contacting with MgO is weak in anisotropy. The annular Defect structure (Defect) means that the interface atomic characteristics of CoFeB atoms located at the edge of the CoFeB/MgO interface are destroyed by etching treatment, so that the interface-induced perpendicular magnetic anisotropy is reduced. The laminated structure of the magnetic tunnel junction is not limited to this, and may be other laminated structures in the prior art.

Specifically, as shown in fig. 3, an interface structure of the magnetic tunnel junction of the present invention is schematically shown, where R _device is the diameter of the cylindrical magnetic tunnel junction, R _defect is the wall thickness of the annular defect structure 4 (i.e., the gray annular dot-shaped region), i.e., the corresponding diameter direction, and the central black dot-shaped region is the remaining interface region. In the processing process, the annular defect structure 4 is formed on the CoFeB/MgO interface by using an etching technology, and the etching can be performed by using an IBE etching method or an RIE etching method or other etching methods in the prior art. The annular defect structure 4 is formed by a destroyed CoFeB/MgO interface 2, the spin orbit coupling effect of CoFeB and MgO is reduced, the hybridization interaction of Fe and O atom orbits is weakened, and the interface-induced perpendicular magnetic anisotropy of the defect position is weaker, so that the overall perpendicular anisotropy energy of the free layer is reduced, and meanwhile, an in-plane magnetization direction is formed at the edge of a magnetic tunnel junction, which is beneficial to reducing critical overturning current, improving magnetic overturning speed, storage density and running speed and reducing power consumption.

Fig. 4 (left graph) is a graph of the relationship between the probability of turning over and the current density of a magnetic tunnel junction in the prior art, that is, the wall thickness of the annular defect structure 4 is 0nm, the gray broken line is the relationship between the probability of turning over and the current density under the condition of 3ns turning over time, and the black broken line is the relationship between the probability of turning over and the current density under the condition of 5ns turning over time. Fig. 4 (right graph) is a graph of the relationship between the inversion probability and the current density of the magnetic tunnel junction according to the present invention, that is, the wall thickness of the annular defect structure 4 is 0.5nm, the gray broken line is the relationship between the inversion probability and the current density under the condition of 3ns inversion time, and the black broken line is the relationship between the inversion probability and the current density under the condition of 5ns inversion time. By simulation comparison, under the condition of the same turnover time and turnover probability, the current density is reduced by about 20%, so that the critical turnover current of the annular defect structure 4 can be reduced by about 20%, the turnover speed is obviously improved, and the running speed is high. And by reducing the critical flip current, only a smaller power supply unit area is needed, which is beneficial to improving the storage density and reducing the power consumption.

In one embodiment, the annular defect structure has a wall thickness of 0.1nm to 2nm. The wall thickness of the annular defect structure 4 is limited to the range, so that critical overturning current and processing difficulty can be remarkably reduced, rapid degradation of data storage time caused by reduction of thermal stability is avoided, and particularly the reduction of the thermal stability is obvious along with the increase of the wall thickness.

In one embodiment, the free layer has a thickness of 0.6nm to 2nm. The thickness of the free layer 1 is limited to this range, which is advantageous in ensuring the overall anisotropy energy and obtaining a sufficiently high data retention time.

In one embodiment, the material of the free layer is selected from one or more of Co、Fe、Ni、Pt、Pd、Ru、Ta、W、Ir、Rh、Mo、Hf、Cu、CoB、FeB、NiB、CoFe、NiFe、CoNi、CoFeNi、CoFeB、NiFeB、CoNiB、CoFeNiB、FePt、FePd、CoPt、CoPd、CoFePt、CoFePd、FePtPd、CoPtPd、CoFePtPd. The free layer 1 is made of a magnetic material, and the material is not limited thereto, but may be any other ferromagnetic material having interface-induced magnetic anisotropy known to those skilled in the art, and will not be described herein.

In an embodiment, the material of the barrier layer is selected from one or more of magnesium oxide, silicon nitride, aluminum oxide, magnesium aluminum oxide, titanium oxide, tantalum oxide, calcium oxide, and iron oxide. The barrier layer 3 is made of a non-magnetic material for inducing the magnetic anisotropy of the free layer 1, and the material is not limited thereto, but may be other materials known to those skilled in the art, and will not be described herein.

The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.

The above-described embodiments represent only the more specific and detailed embodiments of the present application, but are not to be construed as limiting the claims. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.

Claims

1. A magnetic tunnel junction with low power consumption and high storage density is characterized by comprising a free layer and a barrier layer, wherein an interface is generated between the free layer and the barrier layer, an annular defect structure is formed by etching the edge of the interface, namely etching free layer atoms positioned at the edge of the interface between the free layer and the barrier layer, the wall thickness of the annular defect structure is 0.1 nm-2 nm, and the wall thickness of the annular defect structure corresponds to the diameter direction and is perpendicular to the thickness direction of the free layer.

2. The magnetic tunnel junction with low power consumption and high storage density of claim 1 wherein the free layer has a thickness of 0.6 nm to 2 nm.

3. The magnetic tunnel junction with low power consumption and high storage density of claim 1 wherein the free layer material is selected from one or more of Co、Fe、Ni、Pt、Pd、Ru、Ta、W、Ir、Rh、Mo、Hf、Cu、CoB、FeB、NiB、CoFe、NiFe、CoNi、CoFeNi、CoFeB、NiFeB、CoNiB、CoFeNiB、FePt、FePd、CoPt、CoPd、CoFePt、CoFePd、FePtPd、CoPtPd、CoFePtPd.

4. The magnetic tunnel junction with low power consumption and high storage density according to claim 1, wherein the material of the barrier layer is one or more selected from the group consisting of magnesium oxide, silicon oxygen compound, silicon nitrogen compound, aluminum oxide compound, magnesium aluminum oxide compound, titanium oxide compound layer, tantalum oxide compound, calcium oxide compound, and iron oxide compound.