CN114170983B - Display device, display driving method, and electronic apparatus - Google Patents
Display device, display driving method, and electronic apparatus Download PDFInfo
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- CN114170983B CN114170983B CN202111443509.XA CN202111443509A CN114170983B CN 114170983 B CN114170983 B CN 114170983B CN 202111443509 A CN202111443509 A CN 202111443509A CN 114170983 B CN114170983 B CN 114170983B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
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- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Liquid Crystal Display Device Control (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The embodiment of the application provides a display device, a display driving method and an electronic device, wherein the display device comprises a liquid crystal display panel and a liquid crystal lens arranged on the light-emitting side of the liquid crystal display panel, and the liquid crystal lens is configured to control the light-emitting of any sub-pixel in a pixel island to be emitted during three-dimensional display; the liquid crystal display panel also comprises a grid line, a data line, a grid drive circuit, a source drive circuit and a reverse circuit, wherein the source drive circuit comprises an anode output end and a cathode output end; the reverse circuit is connected with the positive electrode output end and the negative electrode output end and is configured to conduct the positive electrode output end and the odd-numbered row data lines and conduct the negative electrode output end and the even-numbered row data lines in a first period of scanning of the grid electrode driving circuit; and in the second period of time, the negative output end and the odd-numbered row data lines are conducted, and the positive output end and the even-numbered row data lines are conducted. By the design, the sub-pixels which are controlled to enter human eyes under the 3D scene comprise positive polarity and negative polarity, the flicker effect can be eliminated, and the 3D screen flashing problem is solved.
Description
Technical Field
The embodiment of the application relates to the technical field of display devices, in particular to a display device, a display driving method and electronic equipment.
Background
In the related art, the display device compatible with 2D/3D display includes a 2D display panel having a special pixel arrangement, and a liquid crystal lens disposed on a light-emitting side of the 2D display panel; and 2D and 3D display switching is realized by controlling the liquid crystal lens.
However, in the existing 2D/3D display device, when the display device is switched from 2D to 3D, severe flicker (flicker) occurs, which affects the display effect.
Disclosure of Invention
In view of the above, an object of the embodiments of the present application is to provide a display device, a display driving method and an electronic apparatus.
In a first aspect, an embodiment of the present application provides a display device, including a liquid crystal display panel and a liquid crystal lens disposed on a light exit side of the liquid crystal display panel, where the liquid crystal display panel includes a plurality of pixel islands arranged in an array along a row direction and a column direction, and each pixel island includes at least two sub-pixels arranged along the row direction; the liquid crystal lens is configured to control light emission of any one of the sub-pixels in the pixel island during stereoscopic display;
the liquid crystal display panel also comprises grid lines, data lines, a grid driving circuit, a source driving circuit and an inversion circuit, wherein the grid lines are connected with the sub-pixels positioned on the same row, and the data lines are connected with the sub-pixels positioned on the same column;
the grid electrode driving circuit is connected with the grid line, and the source electrode driving circuit comprises a positive electrode output end and a negative electrode output end; the inversion circuit is connected with the positive electrode output end and the negative electrode output end and is configured to conduct the positive electrode output end and the data lines in odd columns and conduct the negative electrode output end and the data lines in even columns in a first period of scanning of the grid electrode driving circuit; and in a second period, the negative output end and the data lines in odd columns are conducted, and the positive output end and the data lines in even columns are conducted.
By the design, the sub-pixels controlled to enter human eyes under the 3D scene comprise positive polarity and negative polarity, so that the flicker effect can be eliminated, and the 3D screen flashing problem is solved.
In one possible implementation, the inversion circuit includes a first circuit connecting the positive output terminal and the data lines in odd columns, a second circuit connecting the negative output terminal and the data lines in even columns, a third circuit connecting the negative output terminal and the data lines in odd columns, and a third circuit connecting the positive output terminal and the data lines in even columns;
the first circuit comprises a first control switch, the second circuit comprises a second control switch, the third circuit comprises a third control switch, and the fourth circuit comprises a fourth control switch;
the inverter circuit controls on and/or off of the first control switch, the second control switch, the third control switch, and the fourth control switch in response to a control command.
In one possible embodiment, the inversion circuit includes a first control terminal, a second control terminal, and at least one inversion unit;
the inversion unit includes:
a control electrode of the first thin film transistor is connected with the first control end, a first electrode of the first thin film transistor is connected with the data lines in odd columns, and a second electrode of the first thin film transistor is connected with the anode output end;
a control electrode of the second thin film transistor is connected with the first control end, the first electrode of the second thin film transistor is connected with the data line in the even-numbered rows, and the second electrode of the second thin film transistor is connected with the negative electrode output end;
a control electrode of the third thin film transistor is connected with the second control end, a first electrode of the third thin film transistor is connected with the data line in the even-numbered rows, and a second electrode of the third thin film transistor is connected with the anode output end;
a control electrode of the fourth thin film transistor is connected with the second control end, a first electrode of the fourth thin film transistor is connected with the odd-numbered rows of the data lines, and a second electrode of the fourth thin film transistor is connected with the negative electrode output end;
the inversion circuit outputs a conduction instruction to the first control terminal or the second control terminal in response to a control instruction.
In one possible implementation, the first control terminal is configured to input a turn-on signal to the control electrodes of the first thin film transistor and the second thin film transistor in a first period of scanning by the gate driving circuit;
the second control terminal is configured to input a turn-on signal to the control electrodes of the third thin film transistor and the second thin film transistor in a second period of scanning by the gate driving circuit.
In one possible embodiment, the inversion circuit includes a plurality of the inversion units, and each of the inversion units is connected to one of the data lines in the odd-numbered columns and one of the data lines in the even-numbered columns.
In one possible implementation, the pixel island includes 8 of the subpixels arranged in the row direction.
In one possible embodiment, the liquid crystal display panel includes a plurality of pixel units arranged in an array along the row direction and the column direction, and each of the pixel units includes the pixel islands arranged along the column direction and displaying different colors.
In one possible embodiment, each of the pixel units includes a red pixel island, a green pixel island, and a blue pixel island arranged in the column direction.
In one possible embodiment, the liquid crystal display panel includes an array substrate, a color film substrate, and a liquid crystal layer disposed between the array substrate and the color film substrate; the grid drive circuit is integrated with the array substrate and comprises a plurality of cascaded shift register units; the grid line is connected with the output end of the shift register unit.
In one possible embodiment, the gate driving circuit includes a first driving unit located outside one end of the gate line, and a second driving unit located outside the other end of the gate line; the first driving unit comprises the shift register units connected with the odd-numbered lines of the grid lines, and the second driving unit comprises the shift register units connected with the even-numbered lines of the grid lines.
In a possible implementation manner, the shift register units in the liquid crystal display panel are all located outside the same end of the gate line.
In a second aspect, an embodiment of the present application provides a display driving method, which is applied to the display device described in any one of the embodiments of the first aspect, and the display driving method includes:
in a first period of time when the grid driving circuit scans the grid lines, the positive electrode output end and the odd-numbered row data lines are conducted, and the negative electrode output end and the even-numbered row data lines are conducted;
and in a second period of time when the grid driving circuit scans the grid lines, the negative electrode output end and the odd-numbered row data lines are conducted, and the positive electrode output end and the even-numbered row data lines are conducted.
In one possible implementation, the first period is a period in which the gate driving circuit scans an odd-numbered row of gate lines, and the second period is a period in which the gate driving circuit scans an even-numbered row of gate lines.
In one possible implementation, the gate driving circuit is integrated on an array substrate of the display device, and includes a plurality of cascaded shift register units; the grid driving circuit comprises a first driving unit positioned on the outer side of one end of the grid line and a second driving unit positioned on the outer side of the other end of the grid line; the first driving unit comprises the shift register unit connected with the grid lines in odd rows, and the second driving unit comprises the shift register unit connected with the grid lines in even rows;
in the scanning process of the grid drive circuit, the first drive unit is controlled to scan line by line, and then the second drive unit is controlled to scan line by line;
the first period is a period scanned by the first driving unit, and the second period is a period scanned by the second driving unit.
In a possible implementation manner, the gate driving circuit scans the gate lines row by row, the first period is a first half period of a scanning process of the gate driving circuit, and the second period is a second half period of the scanning process of the gate driving circuit.
In a third aspect, an embodiment of the present application further provides an electronic device, including the display device described in any of the embodiments of the first aspect.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments or related technologies of the present application, the drawings needed to be used in the description of the embodiments or related technologies are briefly introduced below, it is obvious that the drawings in the following description are only one or more embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a display device according to an embodiment of the present disclosure;
fig. 2 is a schematic diagram illustrating a pixel arrangement in an lcd panel according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of an array substrate according to an embodiment of the present disclosure;
fig. 4 is a partial schematic diagram of a driving circuit according to an embodiment of the present disclosure;
fig. 5 is a timing diagram of a GOA according to an embodiment of the present disclosure.
Description of reference numerals:
the liquid crystal display panel comprises a 1-array substrate, a 2-liquid crystal layer, a 3-color film substrate, a 4-liquid crystal lens, a 5-pixel transistor and a 6-pixel electrode.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Fig. 1 is a schematic structural diagram of a display device according to an embodiment of the present application, and as shown In fig. 1, the display device includes a liquid crystal display panel and a liquid crystal lens 4 (lens), where the liquid crystal display panel may be a Twisted Nematic (TN) liquid crystal display panel, an In Plane Switching (IPS) liquid crystal display panel, or a Fringe Field Switching (FFS) liquid crystal display panel; the embodiment of the present application does not limit the specific type of the liquid crystal display panel.
Referring to fig. 1, the liquid crystal display panel includes an Array substrate 1 (Array), a color filter substrate 3 (CF), and a liquid crystal layer 2 (LC), wherein the Array substrate 1 and the color filter substrate 3 are arranged in an aligned manner, and the liquid crystal layer 2 is arranged between the aligned Array substrate 1 and the color filter substrate 3.
Fig. 2 is a schematic diagram of a pixel arrangement in a liquid crystal display panel according to an embodiment of the present disclosure, and as shown in fig. 2, the liquid crystal display panel includes a plurality of pixel units, the pixel units are arranged in rows and columns to form a pixel array, the pixel array includes a plurality of pixel rows extending along a row direction, the pixel rows are arranged in parallel along a column direction, and each pixel row includes a plurality of pixel units arranged along the row direction; the pixel units between adjacent pixel rows are aligned to form pixel columns extending in the column direction, and all the pixel columns are arranged in parallel in the row direction.
Taking the orientation shown in fig. 2 as an example, the row direction is the lateral direction and the column direction is the longitudinal direction. The pixel array forms a display area for display.
The pixel unit includes three pixel islands arranged along the second aspect that can emit different colors, for example, in the present embodiment, the three pixel islands in each pixel unit are a red (R) pixel island, a green pixel island (G), and a blue (B) pixel island, respectively. Each pixel island comprises 8 sub-pixels arranged along the row direction, and the light colors emitted by the 8 sub-pixels in the same pixel island are the same; the sub-pixels are used for displaying viewpoint information during 3D display, 8 sub-pixels correspond to 8 viewpoint information, and in a possible embodiment, each pixel island includes two or more sub-pixels, so that 3D display can be achieved. The subpixels in the pixel array are arranged in rows and columns along the row and column directions.
The liquid crystal lens 4 is arranged on the light-emitting side of the liquid crystal display panel and can be controlled to be turned on and turned off, and in the turn-off state, light rays emitted by the liquid crystal display panel can be emitted normally through the liquid crystal lens 4, and at the moment, 2D display is realized by the liquid crystal display panel; after the liquid crystal lens 4 is opened, the appearance of the liquid crystal lens 4 is controlled, so that light emitted by any sub-pixel in the pixel island can be emitted, and at the moment, the liquid crystal display panel realizes 3D display. Therefore, the switchable effect of 2D and 3D display is realized by controlling the liquid crystal lens 4.
Fig. 3 is a schematic structural diagram of an array substrate 1 according to an embodiment of the present disclosure, and as shown in fig. 3, the array substrate 1 includes a substrate, a pixel circuit disposed on the substrate, and a plurality of pixel electrodes 6 connected to the pixel circuit, where the pixel electrodes 6 are disposed corresponding to the sub-pixels; the color filter substrate 3 is provided with a common electrode corresponding to the pixel electrode 6, in a possible embodiment, the pixel electrode 6 and the common electrode may be both disposed on one side of the array substrate 1, and the corresponding pixel electrode 6 and common electrode arrangement mode may be selected according to different types of liquid crystal display panels, which is not limited herein.
The pixel circuit includes a plurality of Gate lines Gate, a plurality of Data lines Data, and a plurality of Thin Film transistors (abbreviated TFTs) corresponding to the sub-pixels, which are defined as pixel transistors 5. The pixel transistor 5 comprises a Gate, a source and a drain, the drain of the pixel transistor 5 is connected with the pixel electrode 6 of the corresponding sub-pixel, and the Gate of the pixel transistor 5 is connected with the Gate line Gate and the source of the pixel transistor 5 and the data line.
The pixel transistors 5 are arranged corresponding to the sub-pixels, and the arrangement of the pixel transistors 5 may refer to the arrangement of the sub-pixels, which is not described herein again.
Each Gate line Gate extends along the row direction, a plurality of Gate lines gates are arranged in parallel along the column direction, the Gate lines gates are arranged corresponding to the pixel rows, and the gates of the pixel transistors 5 of the sub-pixels in the same row are connected with the same Gate line Gate.
Each Data line Data extends along the column direction, a plurality of Data lines Data are arranged in parallel along the row direction, the Data lines Data are arranged corresponding to the pixel columns, and optionally, the source electrodes of the pixel transistors 5 of the sub-pixels in the same column are connected with the same Data line Data.
The display device also comprises a driving circuit, wherein the driving circuit comprises a grid driving circuit, a source driving circuit and a common voltage generating circuit. The Gate driving circuit is connected to the Gate lines and configured to sequentially provide a scanning signal to the Gate lines Gate at a driving stage, and the Gate lines Gate receive the scanning signal to turn on the pixel transistors 5 corresponding to the Gate lines Gate, that is, to turn on the source and the drain of the pixel transistors 5.
The source driving circuit is connected to the Data lines Data, and is configured to write Data voltages into the Data lines Data in a driving phase, and the Data voltages are input to the corresponding pixel electrodes 6 through the turned-on pixel transistors 5. The common voltage generating circuit is electrically connected to the common electrode for supplying a common voltage Vcom to the common electrode in a driving stage.
When the pixel electrode 6 does not input the data voltage, the liquid crystal cell positioned between the pixel electrode 6 and the common electrode is in an initial state; when the pixel electrode 6 inputs a data voltage, a voltage difference is generated between the pixel electrode 6 and the common electrode, the liquid crystal unit is turned over under the action of the voltage difference, and the light transmission quantity of backlight passing through the liquid crystal unit can be changed after the liquid crystal unit is turned over, so that the corresponding pixel unit generates corresponding brightness, namely pixel gray scale. The pixel gray scale is related to the turning angle of the liquid crystal unit, and the turning angle of the liquid crystal unit is related to the voltage difference between the pixel electrode 6 and the common electrode, so that the pixel gray scale can be adjusted by adjusting the voltage difference between the pixel electrode 6 and the common electrode.
In the display process of the liquid crystal display panel, if data signals of the same polarity are always applied to the pixel electrodes 6, liquid crystal molecules are easily polarized, and thus the image sticking phenomenon is easily caused. To prevent this, the polarity of the pixel electrode 6 is controlled to periodically change around the common voltage Vcom applied by the common electrode during the display driving, for example, a positive and negative frame driving mode is adopted.
The positive and negative frame driving modes are that in two adjacent frames of display pictures, the voltage difference between the data voltage and the common voltage input to the pixel electrode 6 in one frame of display picture is a positive value, that is, a positive driving signal is input to the pixel electrode 6, and the frame of display picture is positive frame driving; in another frame of display, the voltage difference between the data voltage and the common voltage input to the pixel electrode 6 is negative, that is, a negative polarity driving signal is input to the pixel electrode 6, and the frame of display is a negative frame. The polarity of the voltage loaded on the liquid crystal molecules is alternately changed through the alternate change of the positive frame and the negative frame, so that the liquid crystal molecules can be prevented from being polarized by an electric field in one direction all the time, and the afterimage of the liquid crystal display is reduced.
However, due to the influence of factors such as the positive and negative polarization characteristics of the liquid crystal, the process uniformity and the like, it cannot be ensured that included angles between positive and negative polarizations of all sub-pixels of the liquid crystal display panel are completely symmetrical, and it cannot be ensured that the brightness of positive and negative frames under the same gray scale is completely the same, the brightness of the positive and negative frames is easy to have periodic jump, and a flicker phenomenon which can be perceived by human eyes can be generated. In the embodiment of the application, when the display device is switched from 2D to 3D, the view sub-pixels with the same polarity enter human eyes after passing through the liquid crystal lens 4 due to the view sub-pixel distribution rule and are turned over frame by frame, that is, all 3D display pictures are flicker patterns.
In view of this, an embodiment of the present application provides a display device, in a driving circuit in the display device, a source driving circuit includes a positive output terminal and a negative output terminal; the driving circuit is also provided with a reverse circuit, the reverse circuit is connected with the positive electrode output end and the negative electrode output end and is configured to conduct the positive electrode output end and the odd-numbered row data lines and conduct the negative electrode output end and the even-numbered row data lines in a first scanning period of the grid driving circuit; and in the second period, the negative electrode output end and the odd-numbered row data lines are conducted, and the positive electrode output end and the even-numbered row data lines are conducted. By the design, the sub-pixels controlled to enter human eyes under the 3D scene comprise positive polarity and negative polarity, so that the flicker effect can be eliminated, and the 3D screen flashing problem is solved.
Fig. 4 is a partial schematic diagram of a driving circuit provided in an embodiment of the present application, and as shown in fig. 4, the driving circuit includes an inversion circuit (in a dashed box), where the inversion circuit includes a first control terminal EN _ ODD, a second control terminal EN _ EVEN, and at least one inversion unit (swap unit).
The inversion unit comprises a first thin film transistor TFT1, a second thin film transistor TFT2, a third thin film transistor TFT3 and a fourth thin film transistor TFT4, wherein the control electrode of the first thin film transistor TFT1 is connected with a first control end EN _ ODD, the first electrode is connected with ODD-numbered columns of data lines, and the second electrode is connected with a positive electrode output end; a control electrode of the second thin film transistor TFT2 is connected with a first control end EN _ ODD, a first electrode is connected with even-numbered row data lines, and a second electrode is connected with a negative electrode output end; a control electrode of the third thin film transistor TFT3 is connected with a second control end EN _ ODD, a first electrode is connected with even-numbered row data lines, and a second electrode is connected with an anode output end; and a control electrode of the fourth thin film transistor TFT4 is connected with a second control end, a first electrode is connected with the odd-numbered column data line, and a second electrode is connected with a negative electrode output end.
Note that, the thin film transistor used in the embodiment of the present application includes a gate electrode, a source electrode, and a drain electrode, one of the source electrode and the drain electrode is referred to as a first electrode, the other of the source electrode and the drain electrode is referred to as a second electrode, and the gate electrode is referred to as a control electrode.
The inverter circuit outputs an on command to the first control terminal EN _ ODD or the second control terminal EN _ EVEN in response to a control command.
In one specific application scenario, the pixel polarity control logic is:
odd-numbered line control: when the grid driving circuit scans the grid lines in odd rows; controlling the first control terminal EN _ ODD =1 and the second control terminal EN _ EVEN =0, that is, inputting an on command to the control electrodes of the first thin film transistor TFT1 and the second thin film transistor TFT2 through the first control terminal EN _ ODD, and turning on the first thin film transistor TFT1 and the second thin film transistor TFT2 controlled by the first control terminal EN _ ODD; since the second control terminal EN _ EVEN does not input the on-signal to the control electrodes of the third thin film transistor TFT3 and the fourth thin film transistor TFT4, the third thin film transistor TFT3 and the fourth thin film transistor TFT4 are turned off, thereby realizing charging of the positive/negative polarity to the odd-numbered columns of the odd-numbered rows and the negative/positive polarity to the EVEN-numbered columns of the odd-numbered rows.
And (3) even row control: when the gate driving circuit scans EVEN-numbered rows of gate lines, the first control terminal EN _ ODD =0 and the second control terminal EN _ EVEN =1 are controlled, that is, a turn-on command is input to the control electrodes of the third thin film transistor TFT3 and the fourth thin film transistor TFT4 through the second control terminal EN _ EVEN, and the third thin film transistor TFT3 and the fourth thin film transistor TFT4 controlled by the second control terminal EN _ EVEN are turned on; since the first control terminal EN _ ODD does not input a turn-on signal to the control electrodes of the first thin film transistor TFT1 and the second thin film transistor TFT2, the first thin film transistor TFT1 and the second thin film transistor TFT2 are turned off; therefore, the charging of negative/positive polarity for odd-numbered columns of even rows and the charging of positive/negative polarity for even-numbered columns are realized.
As can be seen from the above description, with the adoption of the inversion circuit provided by the embodiment of the application, the polarities of the sub-pixels in the odd-numbered rows and the even-numbered rows entering the human eyes in the 3D scene are just opposite, so that the number of the sub-pixels in the positive and negative polarities entering the human eyes is kept the same, the flicker effect is eliminated, and the 3D screen flashing problem is solved.
The inversion unit in the inversion circuit can be arranged corresponding to each pair of data lines in odd columns and even columns, or can share one data line in multiple pairs of data lines in odd columns and even columns; the inversion units are connected to the same first control terminal EN _ ODD and second control terminal EN _ EVEN.
In a possible embodiment, the inverting circuit may be implemented by any circuit capable of performing line switching, for example, the inverting circuit includes a first circuit connecting the positive output terminal and the odd-numbered data lines, a second circuit connecting the negative output terminal and the even-numbered data lines, a third circuit connecting the negative output terminal and the odd-numbered data lines, and a fourth circuit connecting the positive output terminal and the even-numbered data lines;
the first circuit comprises a first control switch, the second circuit comprises a second control switch, the third circuit comprises a third control switch, and the fourth circuit comprises a fourth control switch;
the reversing circuit responds to the control instruction to control the first control switch, the second control switch, the third control switch and the fourth control switch to be switched on and/or switched off.
In some possible embodiments, the Gate driving Circuit is designed by using a GOA (Gate Driver on Array, 1 line Driver on Array), that is, the Gate driving Circuit is integrated on the Array substrate 1 of the display panel, instead of a driving chip made of an external silicon chip, so that a Gate IC (Gate integrated Circuit) portion and a fan-out (Fanout) wiring space can be omitted, thereby simplifying the structure of the Array substrate 1. The gate driving circuit integrated on the array substrate 1 using the GOA technology is also referred to as a GOA circuit.
The gate driving circuit comprises cascaded multiple stages of shift register units (hereinafter referred to as GOA), and output signals of the current stage of shift register unit are output to the previous stage of shift register unit (if any) as reset signals of the previous stage of shift register unit except for outputting and driving the pixel transistors 5 of the pixel unit of the row; and also output to the next stage shift register unit (if any) as an input signal to the next stage shift register unit. In the entire gate driving circuit, the input signal of the first stage shift register unit is the frame start signal STV, and the reset signal is not output. The last stage of shift register unit is connected with a first stage of redundancy shift register unit (Dummy GOA) to realize the reset of the last stage of shift register unit. Therefore, the cascaded multi-stage shift register units are mutually influenced to generate shift pulse signals, and the pixel array is scanned line by line.
In this embodiment, the gate driving circuit includes a first driving unit located outside one end of the gate line, and a second driving unit located outside the other end; the first driving unit comprises a shift register unit connected with odd-numbered grid lines, and the second driving unit comprises a shift register unit connected with even-numbered grid lines.
Fig. 5 is a timing diagram of a GOA provided in this embodiment, as shown in fig. 5, in a 3D mode, the GOA in ODD rows is driven from top to bottom, that is, in a process of scanning the first driving unit line by line, the first control terminal EN _ ODD is controlled to input a turn-on command to the control electrodes of the first thin film transistor TFT1 and the second thin film transistor TFT2, and the first thin film transistor TFT1 and the second thin film transistor TFT2TFT controlled by the first control terminal EN _ ODD are turned on; controlling the second control terminal EN _ EVEN not to input a conducting signal to the control electrodes of the third thin film transistor TFT3 and the fourth thin film transistor TFT4, and controlling the third thin film transistor TFT3 and the fourth thin film transistor TFT4;
then, the GOAs in EVEN rows are driven from top to bottom, that is, in the process of scanning the second driving unit row by row, the second control terminal EN _ EVEN is controlled to input a conducting instruction to the control electrodes of the third thin film transistor TFT3 and the fourth thin film transistor TFT4, and the third thin film transistor TFT3 and the fourth thin film transistor TFT4 controlled by the second control terminal EN _ EVEN are turned on; the first control terminal EN _ ODD is controlled not to input a turn-on signal to the control electrodes of the first thin film transistor TFT1 and the second thin film transistor TFT2, and the first thin film transistor TFT1 and the second thin film transistor TFT2 are turned off.
The above embodiment takes the case where the gate driver circuit performs interlace scanning as an example. The present application is not limited thereto, and in some embodiments, a progressive scanning mode may be used. It should be noted that interlaced scanning can greatly reduce the power consumption of the liquid crystal display panel. After the pixel polarity swap driving mode of the 3D flash screen is solved, if the progressive scanning mode is still used, the polarity of the data line can be charged and discharged with large positive and negative polarities in a behavior period, and the power consumption is increased. When the time sequence in fig. 5 is used for control, the odd rows can be scanned first and then the even rows can be scanned in the 3D mode, and the polarities of the data lines in one frame are jumped only in sequence with positive and negative polarities to greatly reduce power consumption.
The embodiment of the application also provides a display driving method applied to the display device, and the display driving method comprises the following steps:
in a first period of time when the grid driving circuit scans the grid lines, the positive electrode output end and the odd-numbered row data lines are conducted, and the negative electrode output end and the even-numbered row data lines are conducted;
and in a second period of time when the grid drive circuit scans the grid lines, the negative electrode output end and the odd-numbered row data lines are conducted, and the positive electrode output end and the even-numbered row data lines are conducted.
In one possible implementation, the first period is a period in which the gate driving circuit scans the odd-numbered row of gate lines, and the second period is a period in which the gate driving circuit scans the even-numbered row of gate lines.
In one possible implementation, the gate driving circuit is integrated on an array substrate of the display device, and comprises a plurality of cascaded shift register units; the grid driving circuit comprises a first driving unit positioned on the outer side of one end of the grid line and a second driving unit positioned on the outer side of the other end of the grid line; the first driving unit comprises a shifting register unit connected with odd-numbered grid lines, and the second driving unit comprises a shifting register unit connected with even-numbered grid lines;
in the scanning process of the grid drive circuit, the first drive unit is controlled to scan line by line, and then the second drive unit is controlled to scan line by line;
the first period is a period of scanning by the first driving unit, and the second period is a period of scanning by the second driving unit.
In one possible implementation, the gate driving circuit scans the gate lines row by row, the first period is a first half period of a scanning process of the gate driving circuit, and the second period is a second half period of the scanning process of the gate driving circuit. The embodiment of the application also provides electronic equipment, which comprises the display device in the embodiment, wherein the electronic equipment can be a television, a notebook computer, a mobile phone, a tablet computer, an outdoor advertising screen and the like.
In the description of the embodiments of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the referred device or element must have a specific orientation, be configured in a specific orientation, and operate, and thus, should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the embodiments of the present application, it should be noted that the terms "mounted," "connected," and "connected" are to be construed broadly and may be, for example, fixedly connected, detachably connected, or integrally connected unless explicitly stated or limited otherwise; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. Specific meanings of the above terms in the embodiments of the present application can be understood as specific cases by those of ordinary skill in the art.
In addition, the technical features mentioned in the different embodiments of the present application can be combined with each other as long as they do not conflict with each other.
So far, the technical solutions of the present application have been described in connection with the preferred embodiments shown in the drawings, but it is easily understood by those skilled in the art that the scope of protection of the present application is obviously not limited to these specific embodiments. Equivalent changes or substitutions of related technical features can be made by those skilled in the art without departing from the principle of the present application, and the technical scheme after the changes or substitutions will fall into the protection scope of the present application.
Claims (15)
1. A display device is characterized by comprising a liquid crystal display panel and a liquid crystal lens arranged on the light-emitting side of the liquid crystal display panel, wherein the liquid crystal display panel comprises a plurality of pixel islands which are arranged in an array along the row direction and the column direction, and each pixel island comprises at least two sub-pixels which are arranged along the row direction; the liquid crystal lens is configured to control light emission of any one of the sub-pixels in the pixel island during stereoscopic display;
the liquid crystal display panel also comprises grid lines, data lines, a grid driving circuit, a source driving circuit and an inversion circuit, wherein the grid lines are connected with the sub-pixels positioned on the same row, and the data lines are connected with the sub-pixels positioned on the same column;
the grid driving circuit is connected with the grid line, and the source driving circuit comprises a positive electrode output end and a negative electrode output end; the inversion circuit is connected with the positive electrode output end and the negative electrode output end and is configured to conduct the positive electrode output end and the data lines in odd columns and conduct the negative electrode output end and the data lines in even columns in a first period of scanning of the grid drive circuit; conducting the negative output end and the data lines in odd columns and conducting the positive output end and the data lines in even columns in a second period;
the reverse circuit comprises a first circuit, a second circuit, a third circuit and a fourth circuit, wherein the first circuit is used for connecting the positive output end with the data lines in odd columns, the second circuit is used for connecting the negative output end with the data lines in even columns, the third circuit is used for connecting the negative output end with the data lines in odd columns, and the fourth circuit is used for connecting the positive output end with the data lines in even columns;
the first circuit comprises a first control switch, the second circuit comprises a second control switch, the third circuit comprises a third control switch, and the fourth circuit comprises a fourth control switch;
the inverter circuit controls on and/or off of the first control switch, the second control switch, the third control switch, and the fourth control switch in response to a control command.
2. The display device according to claim 1, wherein the inverting circuit includes a first control terminal, a second control terminal, and at least one inverting unit;
the inversion unit includes:
a control electrode of the first thin film transistor is connected with the first control end, a first electrode of the first thin film transistor is connected with the data lines in odd columns, and a second electrode of the first thin film transistor is connected with the anode output end;
a control electrode of the second thin film transistor is connected with the first control end, the first electrode of the second thin film transistor is connected with the data line in the even-numbered rows, and the second electrode of the second thin film transistor is connected with the negative electrode output end;
a control electrode of the third thin film transistor is connected with the second control end, a first electrode of the third thin film transistor is connected with the data line in the even-numbered rows, and a second electrode of the third thin film transistor is connected with the anode output end;
a control electrode of the fourth thin film transistor is connected with the second control end, a first electrode of the fourth thin film transistor is connected with the odd-numbered rows of the data lines, and a second electrode of the fourth thin film transistor is connected with the negative electrode output end;
the inversion circuit outputs a conduction instruction to the first control terminal or the second control terminal in response to a control instruction.
3. The display device according to claim 2, wherein the first control terminal is configured to input an on signal to control electrodes of the first thin film transistor and the second thin film transistor in a first period of scanning by the gate driving circuit;
the second control terminal is configured to input a turn-on signal to the control electrodes of the third thin film transistor and the second thin film transistor in a second period of scanning by the gate driving circuit.
4. The display device according to claim 2, wherein the inversion circuit includes a plurality of the inversion units, each of the inversion units being connected to one of the data lines in odd columns and one of the data lines in even columns.
5. The display device according to claim 1, wherein the pixel island includes 8 of the subpixels arranged in the row direction.
6. The display device according to claim 5, wherein the liquid crystal display panel includes a plurality of pixel units arranged in an array in the row direction and the column direction, each of the pixel units including the pixel islands arranged in the column direction to display a different color.
7. The display device according to claim 6, wherein each of the pixel units includes a red pixel island, a green pixel island, and a blue pixel island arranged in the column direction.
8. The display device according to claim 1, wherein the liquid crystal display panel comprises an array substrate, a color film substrate, and a liquid crystal layer disposed between the array substrate and the color film substrate; the grid drive circuit is integrated with the array substrate and comprises a plurality of cascaded shift register units; the grid line is connected with the output end of the shift register unit.
9. The display device according to claim 8, wherein the gate driving circuit includes a first driving unit located outside one end of the gate line, and a second driving unit located outside the other end of the gate line; the first driving unit comprises the shift register unit connected with the odd-numbered lines of the grid lines, and the second driving unit comprises the shift register unit connected with the even-numbered lines of the grid lines.
10. The display device according to claim 8, wherein the shift register units in the liquid crystal display panel are located outside the same end of the gate line.
11. A display driving method applied to the display device according to any one of claims 1 to 10, the display driving method comprising:
in a first period of time when the grid drive circuit scans the grid lines, the positive electrode output end and the odd-numbered row data lines are conducted, and the negative electrode output end and the even-numbered row data lines are conducted;
and in a second period of time when the grid drive circuit scans the grid lines, the negative electrode output end and the odd-numbered row data lines are conducted, and the positive electrode output end and the even-numbered row data lines are conducted.
12. The display driving method according to claim 11, wherein the first period is a period in which the gate driving circuit scans odd-numbered row gate lines, and the second period is a period in which the gate driving circuit scans even-numbered row gate lines.
13. The display driving method according to claim 12, wherein the gate driving circuit is integrated on an array substrate of the display device, and comprises a plurality of cascaded shift register units; the grid driving circuit comprises a first driving unit positioned on the outer side of one end of the grid line and a second driving unit positioned on the outer side of the other end of the grid line; the first driving unit comprises the shift register units connected with the odd-numbered lines of the grid lines, and the second driving unit comprises the shift register units connected with the even-numbered lines of the grid lines;
in the scanning process of the gate drive circuit, the first drive unit is controlled to scan line by line, and then the second drive unit is controlled to scan line by line;
the first period is a period scanned by the first driving unit, and the second period is a period scanned by the second driving unit.
14. The display driving method according to claim 11, wherein the gate driving circuit scans the gate lines row by row, the first period is a first half period of a scanning process of the gate driving circuit, and the second period is a second half period of the scanning process of the gate driving circuit.
15. An electronic apparatus characterized by comprising the display device according to any one of claims 1 to 10.
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| CN116360165B (en) * | 2023-03-31 | 2025-05-27 | 上海天马微电子有限公司 | Liquid crystal grating and holographic display device |
| WO2025129391A1 (en) * | 2023-12-18 | 2025-06-26 | 京东方科技集团股份有限公司 | Display system, display apparatus, and driving method |
| CN118135970B (en) * | 2024-04-12 | 2024-12-06 | 惠科股份有限公司 | Display panel driving method and circuit, and display device |
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