CN114167136B - Impedance method for sampling multiple frequencies by using single channel - Google Patents
Impedance method for sampling multiple frequencies by using single channel Download PDFInfo
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- CN114167136B CN114167136B CN202111396216.0A CN202111396216A CN114167136B CN 114167136 B CN114167136 B CN 114167136B CN 202111396216 A CN202111396216 A CN 202111396216A CN 114167136 B CN114167136 B CN 114167136B
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- 238000005070 sampling Methods 0.000 title claims abstract description 95
- 238000000034 method Methods 0.000 title claims abstract description 30
- 230000003750 conditioning effect Effects 0.000 claims abstract description 11
- 230000005284 excitation Effects 0.000 claims abstract description 9
- 230000001360 synchronised effect Effects 0.000 claims description 9
- 238000006243 chemical reaction Methods 0.000 claims description 6
- 238000004832 voltammetry Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000002847 impedance measurement Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
- H03M1/1255—Synchronisation of the sampling frequency or phase to the input frequency or phase
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Measurement Of Resistance Or Impedance (AREA)
- Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)
Abstract
The invention provides an impedance method for sampling a plurality of frequencies by using a single channel; the method comprises the following steps: step 1, a main controller controls a controllable clock source through a control enabling signal of the controllable clock source; step 2, the output of the controllable clock source is connected with the DDS signal device and the single-channel high-speed ADC; step 3, the DDS signal generating device mainly generates a sine excitation signal with controllable phase; step 4, the DDS signal is subjected to signal conditioning; step 5, sampling signals at the two ends of ab or bc; step 6, signal conditioning is carried out on the sampled signals; and 7, the single-channel high-speed ADC transmits the quantized digital sampling signal to the main controller. The invention has the advantages that; (1) the number of channels that can be used to save a high speed ADC; (2) The sampling control is relatively convenient, and the impedance to be measured can be calculated only by obtaining twice sampling; (3) The modules are mutually independent, and the signal loop is relatively simplified; (4) The method can realize all control and calculation by fully utilizing software.
Description
Technical Field
The invention relates to the technical field of electronics, in particular to an impedance method for sampling a plurality of frequencies by using a single channel.
Background
In a body composition analyzer, it is necessary to measure the body impedance at different frequencies. The body impedance is a vector comprising a real part (resistance R) and an imaginary part (reactance X). The real and imaginary parts need to be measured. The impedance measurement needs a reference impedance, the system needs to sample the reference impedance and the voltages at two ends of the impedance to be measured at the same time, the impedance to be measured can be calculated, and the actual circuit only comprises one path of sampling, namely single-channel sampling. Realizing single-channel synchronous sampling of two signals by utilizing control of software time sequence; improvements are needed.
Disclosure of Invention
Accordingly, in order to solve the above-mentioned shortcomings, the present invention herein provides an impedance method for sampling a plurality of frequencies using a single channel; has the following advantages; (1) the number of channels that can be used to save a high speed ADC; (2) The sampling control is relatively convenient, and the impedance to be measured can be calculated only by obtaining twice sampling; (3) The modules are mutually independent, and the signal loop is relatively simplified; (4) The method can realize all control and calculation by fully utilizing software.
The invention is realized by constructing an impedance method at a plurality of frequencies by single-channel sampling, which is characterized in that; constructing a controllable clock source, a DDS signal device and a single-channel high-speed ADC; the impedance to be measured is connected in series with the standard impedance, and the method is concretely realized as follows;
step 1, a main controller controls a controllable clock source through a control enabling signal of the controllable clock source;
Step 2, the output of the controllable clock source is connected with the DDS signal device and the single-channel high-speed ADC, and is the input clocks of the DDS signal device and the single-channel high-speed ADC;
step 3, the DDS signal generating device mainly generates a sine excitation signal with controllable phase, and the characteristic phase of the signal is controllable;
Step 4, the DDS signal is subjected to signal conditioning and finally applied to two ends of the impedance to be measured and the reference resistor;
step 5, sampling signals at the two ends of ab or sampling signals at the two ends of bc;
step 6, signal conditioning is carried out on the sampled signals, sampling signals after signal conditioning are obtained, and the sampling signals are output to a single-channel high-speed ADC;
and 7, the single-channel high-speed ADC transmits the quantized digital sampling signal to the main controller.
According to the invention, the impedance method for sampling a plurality of frequencies by using a single channel is characterized by comprising the following steps of; the signal sampling method comprises the following steps of;
before measuring impedance of a certain frequency, setting the frequency of a controllable clock source, closing the output of the controllable clock source, and resetting the initial phase of the DDS signal device before starting each time;
the sampling reference resistance R method comprises the following steps:
Switching the sampling input signal to two ends of a reference resistor R (i.e. bc) through a switch; starting a controllable clock to generate a driving signal VG3, wherein at the moment, the signal of the sampling input end of the high-speed ADC is VF1, the main controller acquires sampling conversion results each time by utilizing the VG2 signal, after sampling is completed, the output of a controllable clock source is closed, and starting from an N point, M sampling point data are intercepted, and signal sampling at two ends of a reference resistor R is obtained through Fourier change, wherein the sampling is as follows:
the method for sampling the impedance Z to be measured comprises the following steps:
the sampling input signal is switched to two ends of the impedance Z (namely ab) to be detected through a switch, a controllable clock is started to generate a driving signal VG3, at the moment, the signal of the sampling input end of the high-speed ADC is VF2, the main controller acquires the sampling conversion result of each time by utilizing the VG2 signal, after sampling is completed, the output of the controllable clock source is closed, from the Nth point, M sampling point data are intercepted, and the signal sampling of the two ends of the impedance Z to be detected is obtained through Fourier change, wherein the sampling of the signals of the two ends of the impedance Z to be detected is as follows:
Although the signals are sampled at two different times, since each excitation signal starts from the same phase. Two signals, which can be regarded as synchronous sampling in nature, i.e. a single channel, achieve synchronous sampling;
using the formulas (1), (2) to obtain the formula (3); direct calculation of impedance to be measured by voltammetry
Similarly, different measuring frequencies are set, and the impedance under other frequencies can still be calculated; by means of the method, any signal can be synchronously sampled in a single channel.
The invention has the following advantages: the invention provides an impedance method for sampling a plurality of frequencies by using a single channel, which has the following advantages; (1) the number of channels that can be used to save a high speed ADC; (2) The sampling control is relatively convenient, and the impedance to be measured can be calculated only by obtaining twice sampling; (3) The modules are mutually independent, and the signal loop is relatively simplified; (4) The method can realize all control and calculation by fully utilizing software.
Drawings
FIG. 1 is a flow chart of an embodiment of the present invention;
fig. 2 is a schematic waveform diagram of an important signal terminal in actual sampling enumerated in the present invention.
Detailed Description
The following detailed description of the present invention will provide clear and complete description of the technical solutions of embodiments of the present invention, with reference to fig. 1-2, and it is apparent that the described embodiments are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The present invention provides herein, by modification, an impedance method for sampling a plurality of frequencies using a single channel, as shown in fig. 1; in practical solution, a controllable clock source, a DDS signal device and a single-channel high-speed ADC are needed. The impedance to be measured is connected in series with the standard impedance, and the specific implementation block diagram is shown in fig. 1.
As in fig. 1:
① Representing a control enable signal of the controllable clock source.
② The controllable clock source is the input clock of the DDS and the high-speed ADC.
③ The DDS signal generating device mainly generates a sine excitation signal with controllable phase, and the characteristic phase of the signal is controllable.
④ The DDS signal is subjected to signal conditioning and finally applied to two ends of the impedance to be measured and the reference resistor.
⑤ Representing the sampled signal across ab, or the sampled signal across bc.
⑥ Representing the sampled signal after signal conditioning.
⑦ The subsequent digital sampled signal is quantized.
Under the condition that the input clock is not enabled, the initial phase of the DDS signal generating device is reset, the initial phase is consistent after the input clock is enabled each time, and thus the alignment of the sine excitation signal and the input clock is realized.
The single channel high speed ADC samples according to an external input clock ②, and after sampling, the single channel high speed ADC automatically outputs a clock to inform the external host controller of sampling. The external host controller reads the sampled value by the clock. I.e. to achieve alignment of the sampling signal with the input clock.
Through the above description, after the controllable clock source is enabled, the ADC samples are synchronized with the sinusoidal signal generated by the DDS.
The sampling method corresponding to the invention is as follows:
as shown in fig. 2, waveforms of important signal ends in actual sampling are listed, and in fig. 2;
VG1 represents a sinusoidal excitation signal which is applied to the impedance network to be measured by signal conditioning.
VG2 represents a high-speed ADC single sample completion signal that is synchronized with VG 3.
VG3 represents the signal generated by the controllable clock source, which drives the DDS signal generating means and the high-speed ADC.
VF1 represents a signal waveform after signal processing across the reference resistor R.
VF2 represents the waveform of the signal after signal processing at both ends of the impedance Z to be measured.
Before measuring impedance of a certain frequency, the frequency of the controllable clock source is set, the output of the controllable clock source is closed, and the initial phase of the DDS signal device is reset before each start.
Method for sampling reference resistor R
The sampled input signal ⑤ is switched across the reference resistor R (i.e., bc) by a switch. Starting a controllable clock to generate a driving signal VG3, wherein at the moment, the signal of the sampling input end of the high-speed ADC is VF1, the main controller acquires sampling conversion results each time by utilizing the VG2 signal, after sampling is completed, the output of a controllable clock source is closed, and starting from an N point, M sampling point data are intercepted, and signal sampling at two ends of a reference resistor R is obtained through Fourier change, wherein the sampling is as follows:
method for sampling impedance Z to be measured
The sampling input signal ⑤ is switched to two ends of the impedance Z (namely ab) to be detected through a switch, a controllable clock is started to generate a driving signal VG3, at the moment, the signal of the sampling input end of the high-speed ADC is VF2, the main controller acquires the sampling conversion result each time by utilizing the VG2 signal, after sampling is completed, the output of the controllable clock source is closed, and from the nth point, M sampling point data are intercepted, and the signal sampling at the two ends of the impedance Z to be detected is obtained through Fourier change, wherein the sampling of the signals at the two ends of the impedance Z to be detected is as follows:
although the signals are sampled at two different times, since each excitation signal starts from the same phase. Two signals, which can be regarded as being synchronously sampled in nature, are single-channel implemented synchronous sampling.
The formula (3) is obtained by using the formulas (1) and (2). Direct calculation of impedance to be measured by voltammetry
Similarly, the impedance at other frequencies can be calculated by setting different measurement frequencies. By means of the method, any signal can be synchronously sampled in a single channel.
The sampling method of the invention has the advantages that:
(1) The number of channels of the high-speed ADC can be saved.
(2) The sampling control is relatively convenient, and the impedance to be measured can be calculated only by obtaining twice sampling.
(3) The modules are mutually independent, and the signal loop is relatively simplified.
(4) The method can realize all control and calculation by fully utilizing software.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (1)
1. An impedance method for sampling a plurality of frequencies using a single channel, characterized by:
constructing a controllable clock source, a DDS signal device and a single-channel high-speed ADC; the impedance to be measured is connected in series with the standard impedance, and the method is specifically realized as follows:
step 1, a main controller controls a controllable clock source through a control enabling signal of the controllable clock source;
Step 2, the output of the controllable clock source is connected with the DDS signal device and the single-channel high-speed ADC, and is the input clocks of the DDS signal device and the single-channel high-speed ADC;
Step 3, the DDS signal generating device generates a sine excitation signal with controllable phase, and the characteristic phase of the signal is controllable;
step 4, after the DDS signal is subjected to signal conditioning, the DDS signal is finally applied to two ends of the impedance to be detected and the reference resistor;
step 5, sampling signals at the two ends of ab or sampling signals at the two ends of bc; the signal sampling method comprises the following steps of;
before measuring impedance of a certain frequency, setting the frequency of a controllable clock source, closing the output of the controllable clock source, and resetting the initial phase of the DDS signal device before starting each time;
the sampling reference resistance R method comprises the following steps:
Switching the sampling input signal to two ends of a reference resistor R through a switch; starting a controllable clock to generate a driving signal VG3, wherein at the moment, the signal of the sampling input end of the high-speed ADC is VF1, the main controller acquires sampling conversion results each time by utilizing the VG2 signal, after sampling is completed, the output of a controllable clock source is closed, and starting from an N point, M sampling point data are intercepted, and signal sampling at two ends of a reference resistor R is obtained through Fourier change, wherein the sampling is as follows:
the method for sampling the impedance Z to be measured comprises the following steps:
The sampling input signal is switched to two ends of the impedance Z to be detected through a switch, a controllable clock is started to generate a driving signal VG3, at the moment, the signal of the sampling input end of the high-speed ADC is VF2, the main controller acquires sampling conversion results each time by utilizing the VG2 signal, after sampling is completed, the output of a controllable clock source is closed, from the nth point, M sampling point data are intercepted, and the signal sampling at the two ends of the impedance Z to be detected is obtained through Fourier change, wherein the sampling is as follows:
Although the sampling signals are sampled at two different moments, the excitation signals start from the same phase each time;
Two signals, which are essentially considered to be synchronous samples, i.e. a single channel, enable synchronous sampling;
using the formulas (1), (2) to obtain the formula (3); direct calculation of impedance to be measured by voltammetry
Similarly, different measuring frequencies are set, and the impedance under other frequencies can still be calculated; by means of the impedance method, single-channel synchronous sampling of any signal can be achieved;
step 6, signal conditioning is carried out on the sampled signals, sampling signals after signal conditioning are obtained, and the sampling signals are output to a single-channel high-speed ADC;
and 7, the single-channel high-speed ADC transmits the quantized digital sampling signal to the main controller.
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