CN114141199A - Micro-display passive pixel circuit - Google Patents
Micro-display passive pixel circuit Download PDFInfo
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- CN114141199A CN114141199A CN202111466765.0A CN202111466765A CN114141199A CN 114141199 A CN114141199 A CN 114141199A CN 202111466765 A CN202111466765 A CN 202111466765A CN 114141199 A CN114141199 A CN 114141199A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3216—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using a passive matrix
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Abstract
The invention relates to the technical field of electronic circuits, in particular to a micro-display passive pixel driving circuit. The invention provides a micro-display passive Pixel driving Circuit which comprises a Column Driver module, a Scan Driver module and a Pixel Circuit Array module, wherein the Column Driver module and the Scan Driver module are electrically connected with the Pixel Circuit Array module, and the Column Driver module comprises a PWM (pulse width modulation) realizing Circuit. The invention adopts PWM signal to control the pixel, and uses a counter to realize PWM by inputting R, G, B data, and can compensate and correct by adjusting the pulse width when the brightness is not uniform or the temperature drift occurs.
Description
Technical Field
The invention relates to the technical field of electronic circuits, in particular to a micro-display passive pixel driving circuit.
Background
Micro light emitting diode (micro OLED) displays are the most promising next generation displays and can be classified into passive driving (PMOLED) and active driving (AMOLED) depending on the driving method.
The OLED microdisplay chip has wide application, and is mainly used for military infrared gun aiming displays, digital individual soldier helmet displays, military infrared and night vision instruments, 3D simulation training, 5G virtual reality and augmented reality technology application in the military market. Meanwhile, under the 5G technical condition, the technology has a wide civil market. In the AR/VR field, the system can be used for a mobile internet terminal display system, 3D glasses, a virtual game system and the like; in the field of consumer electronics, the system can be used for vehicle-mounted head-up displays (HUDs), high-end digital camera viewfinders (EVFs), short-range projectors and the like; in the industrial application, the system can be used for fire fighting, anti-terrorism, remote education and training, remote medical treatment (such as medical endoscope and the like), industrial maintenance and detection and the like.
Passive driving has a low manufacturing cost, a simple circuit structure, but it generates a bias voltage in a short time, requires a higher current and a higher voltage to achieve an average brightness on the panel, and thus dissipates more power and rapidly degrades the OLED device.
At present, a DAC is usually adopted for providing voltage and current for a pixel circuit in an AMOLED, but the temperature drift of the DAC is large, the compensation is difficult, and the phenomenon of uneven brightness is difficult to solve.
Disclosure of Invention
The invention aims to solve the defects of the prior art and provides a micro-display passive pixel driving circuit.
The invention provides the following technical scheme:
the micro-display passive Pixel driving Circuit comprises a Column Driver module, a Scan Driver module and a Pixel Circuit Array module, wherein the Column Driver module and the Scan Driver module are electrically connected with the Pixel Circuit Array module, and the Column Driver module comprises a PWM (pulse-width modulation) realizing Circuit;
the Column Driver module is used for driving each Column of LEDs in the OLED display screen to be turned on or turned off, namely driving the Column electrodes connected with the Column Driver module by corresponding pixel brightness values;
the Scan Driver module is used for generating scanning signals and sequentially providing the scanning signals to a plurality of scanning lines, namely generating control signals corresponding to image signals;
and the Pixel Circuit Array module is used for acquiring signals sent by the driver and outputting image information contained in corresponding pixels according to the control signals.
Preferably, the Column Driver module comprises a Shift Registers module, an Input Registers module, a Data Latches module, a PWM Generators module, a Level Shifters module and a Current Drivers module, and the Shift Registers module, the Input Registers module, the Data Latches module, the PWM Generators module, the Level Shifters module and the Current Drivers module are electrically connected in sequence.
Preferably, the Shift Registers module is configured to store the digital signal and output the digital signal to the outside;
the Input Registers module is used for receiving Input data and selectively transmitting the Input data to the outside;
the Data Latches module is used for latching display Data from a memory;
the PWM Generators module is used for generating output PWM signals, and the PWM realization circuit is arranged in the PWM Generators module;
the Level shivers module is used for converting a control signal of the time sequence control circuit into a high-Level signal and outputting the high-Level signal;
the Current Drivers module is used for generating pixel Current corresponding to the input signal.
Preferably, the Column Driver module receives an external Input signal as a 10-bit video data signal, and the 10-bit video data is stored in the Input Registers module.
Preferably, the PWM implementing circuit includes:
the Scan Driver module is electrically connected with the Scan Driver module;
a plurality of data signal lines electrically connected to the plurality of scanning signal lines, respectively;
the PWM realization circuit receives PWM input signals, the PWM input signals are respectively connected with the input end of the inverter and the grid electrode of the third transistor M3, the output end of the inverter is connected with a node on a data signal line, the capacitor is arranged between the output end of the inverter and the node of the data signal line, the input end of the inverter is electrically connected with a pre-charge tube, and the capacitor connected with the node of the data signal line is charged by the pre-charge tube.
Preferably, two inverters are provided, one of the inverter input terminals and the gate of the third transistor M3 are connected to the PWM input signal, and the inverter output terminals are connected to the gate of the first transistor M1 and the input terminal of the other inverter, respectively.
Preferably, the source of the first transistor and the source of the second transistor are both connected to a 5V mirror current source, and the drain of the first transistor M1 is connected to the plurality of data signal lines.
Preferably, the Scan Driver module is further connected to a timing signal and a reset signal, and the Scan signal and the PWM signal respectively control a TX1 transistor and a TX2 transistor.
Preferably, the pixel circuit is further electrically connected to the clock signal generating circuit and the digital circuit module, respectively;
the clock signal generating circuit is used for generating a clock signal, receiving the RGB data signal by the Timing controller module and outputting the clock signal to the Source driver module;
the digital circuit modules include a digital circuit module that generates a row signal and a digital circuit module that generates a column signal.
Preferably, the digital circuit module is electrically connected to an and gate, two input terminals of the and gate are respectively connected to the digital circuit module generating the row signal and the digital circuit module generating the column signal, an output terminal of the and gate is connected to a transmission gate, and the transmission gate receives the converted pixel current and adjusts and outputs the pixel current according to a signal generated by the digital circuit module.
The invention has the beneficial effects that:
when pixel data is input, R, G, B single-pixel PWM signals are realized through a counter, the realized PWM pulse width corresponds to a corresponding R, G, B value, and meanwhile, the pulse width can be adjusted under the condition of uneven brightness or temperature drift to perform compensation correction;
the pixel circuit is provided with the AND gate and the transmission gate, so that the charge injection phenomenon caused by parasitic capacitance is optimized, the influence of the on-resistance and the charge injection phenomenon is reduced, the input signal with burrs or fluctuation is output as a stable output signal, the pixel current output to the pixel array is stable, and the speed and the precision of establishing the pixel voltage are improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 is a block diagram of the overall architecture of an OLED of the present invention;
FIG. 2 is a PWM implementation circuit of the present invention;
fig. 3 is a schematic diagram of a single pixel circuit of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments.
According to fig. 1, the micro-display passive Pixel driving Circuit includes a Column Driver module, a Scan Driver module and a Pixel Circuit Array module, wherein the Column Driver module and the Scan Driver module are electrically connected to the Pixel Circuit Array module, the Column Driver module includes a PWM implementation Circuit, the Scan Driver module is further connected to a timing signal and a reset signal, and the Scan signal and the PWM signal respectively control a TX1 transistor and a TX2 transistor.
The Column Driver module is used for driving each Column of LEDs in the OLED display screen to be turned on or turned off, namely driving the Column electrodes connected with the Column Driver module by corresponding pixel brightness values;
the Scan Driver module is used for generating scanning signals and sequentially providing the scanning signals to a plurality of scanning lines, namely generating control signals corresponding to the image signals;
and the Pixel Circuit Array module is used for acquiring signals sent by the driver and outputting image information contained in the corresponding pixels according to the control signals.
The Column Driver module comprises a Shift Registers module, an Input Registers module, a Data Latches module, a PWM Generators module, a Level shifts module and a Current Drivers module, wherein the Shift Registers module, the Input Registers module, the Data Latches module, the PWM Generators module, the Level shifts module and the Current Drivers module are electrically connected in sequence.
The Shift Registers module is used for storing the digital signals and outputting the digital signals to the outside;
the Input Registers module is used for receiving Input data and selectively transmitting the Input data to the outside;
the Data Latches module is used for latching the display Data from the memory;
the PWM Generators module is used for generating output PWM signals, and the PWM realization circuit is arranged in the PWM Generators module;
the Level Shifters module is used for converting a control signal of the time sequence control circuit into a high-Level signal and outputting the high-Level signal;
and the Current Drivers module is used for generating pixel Current corresponding to the input signal.
The Column Driver module receives an external Input signal as a 10-bit video data signal, and the 10-bit video data is stored in the Input Registers module.
The Shift Registers module takes out digital signal data according to the timing signal clock and transmits the digital signal to the Input Registers module. The Input Registers module also receives the 10-bit video Data signal, the Input Registers module simultaneously Registers the digital signal and the 10-bit video Data signal, and transmits the digital signal and the 10-bit video Data signal to the Data Latches module after receiving the timing sequence signal.
The Data Latches module is connected with the single pixel circuit, selects the Data and outputs corresponding Data. After the data is transmitted to the PWM Generators module, the data of the pixel R, G, B is PWM-generated, and the generated pulse widths respectively correspond to the data values of the pixel R, G, B. The generated PWM is transmitted to a Level shivers module for Level conversion, and the Level of the PWM is converted into high Level.
The converted PWM is transmitted to a Current Drivers module to generate Current to flow into a pixel circuit, and the pixel is lightened.
According to fig. 2, the PWM implementing circuit includes:
the scanning signal lines are electrically connected with the Scan Driver module;
a plurality of data signal lines electrically connected to the plurality of scanning signal lines, respectively;
the PWM realization circuit receives PWM input signals, the PWM input signals are respectively connected with the input end of the inverter and the grid electrode of the third transistor M3, the output end of the inverter is connected with a node on a data signal line, the capacitor is arranged between the output end of the inverter and the node of the data signal line, the input end of the inverter is also electrically connected with the pre-charge transistor, and the pre-charge transistor charges the capacitor connected with the node of the data signal line.
Two inverters are provided, one inverter input terminal and the gate of the third transistor M3 are connected to the PWM input signal, and the inverter output terminals are connected to the gate of the first transistor M1 and the input terminal of the other inverter, respectively.
The source of the first transistor and the source of the second transistor are both connected to a 5V mirror current source, and the drain of the first transistor M1 is connected to a plurality of data signal lines.
Before the PWM signal is input, the pre-charge tube charges a capacitor connected with a data signal line node. The source of the third transistor M3 is connected with the voltage output by the pre-charge transistor, the grid of the third transistor M3 is connected with two inverters in sequence, and the drain of the third transistor M3 is connected with the pixel circuit
After the PWM signals are input, the PWM signals with high and low levels are turned over without delay through the first inverter, and power consumption is reduced.
The mirror current source is connected to the source of the first transistor M1 and the source of the second transistor M2, the gate of the first transistor is connected to the output of the first inverter, and the drain of the first transistor is connected to the pixel circuit. The drain of the second transistor M2 is connected to the negative supply.
The calculation formula of the capacitance value in the PWM realization circuit is as follows:
Cgd_sum=(N-1)*Cpara<0>；
where Cpara is the capacitance of the parasitic capacitor, and Cgd _ sum is the capacitance between the gate and the drain of the first transistor M1 of the pixel switching element.
As shown in fig. 3, the pixel circuit is further electrically connected to the clock signal generating circuit and the digital circuit module, respectively;
the clock signal generating circuit is used for generating a clock signal, receiving the RGB data signal by the Timing controller module and outputting the clock signal to the Source driver module;
the digital circuit modules include a digital circuit module that generates a row signal and a digital circuit module that generates a column signal.
The digital circuit module is electrically connected with the AND gate, two input ends of the AND gate are respectively connected with the digital circuit module for generating row signals and the digital circuit module for generating column signals, the output end of the AND gate is connected with the transmission gate, and the transmission gate receives the converted pixel current and adjusts and outputs the pixel current according to the signals generated by the digital circuit module.
In the frame 1, the MOS tube adopts a low-voltage transistor with the specification of 1.5V, and in the frame 2, the MOS tube adopts a high-voltage transistor with the specification of 5V.
The time sequence signal is transmitted to the digital circuit modules, the two digital circuit modules respectively generate a row signal and a column signal, the row signal and the column signal are simultaneously gated, namely, the input end of the AND gate inputs high level, and the output end of the AND gate outputs a signal of high level.
At the moment, the pixel circuit receives the pixel current of single pixel data, the pixel current and a high-level output signal at the output end of the AND gate are transmitted to the transmission gate circuit together, the on-resistance is reduced through the transmission gate circuit, and the charge injection phenomenon is relieved, so that the speed and the precision of establishing the pixel voltage are improved.
Although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that changes may be made in the embodiments and/or equivalents thereof without departing from the spirit and scope of the invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. The micro-display passive Pixel driving Circuit is characterized by comprising a Column Driver module, a Scan Driver module and a Pixel Circuit Array module, wherein the Column Driver module and the Scan Driver module are electrically connected with the Pixel Circuit Array module, and the Column Driver module comprises a PWM (pulse width modulation) realizing Circuit;
the Column Driver module is used for driving each Column of LEDs in the OLED display screen to be turned on or turned off, namely driving the Column electrodes connected with the Column Driver module by corresponding pixel brightness values;
the Scan Driver module is used for generating scanning signals and sequentially providing the scanning signals to a plurality of scanning lines, namely generating control signals corresponding to image signals;
and the Pixel Circuit Array module is used for acquiring signals sent by the driver and outputting image information contained in corresponding pixels according to the control signals.
2. The microdisplay passive pixel drive circuit of claim 1, wherein the Column Drivers module comprises a Shift Registers module, an Input Registers module, a Data Latches module, a PWM Generators module, a Level Shifters module and a Current Drivers module, the Shift Registers module, the Input Registers module, the Data Latches module, the PWM Generators module, the Level Shifters module and the Current Drivers module being electrically connected in sequence.
3. The microdisplay passive pixel driving circuit according to claim 2, wherein the Shift Registers module is configured to store and output digital signals to the outside;
the Input Registers module is used for receiving Input data and selectively transmitting the Input data to the outside;
the Data Latches module is used for latching display Data from a memory;
the PWM Generators module is used for generating output PWM signals, and the PWM realization circuit is arranged in the PWM Generators module;
the Level shivers module is used for converting a control signal of the time sequence control circuit into a high-Level signal and outputting the high-Level signal;
the Current Drivers module is used for generating pixel Current corresponding to the input signal.
4. The microdisplay passive pixel driving circuit of claim 1, wherein the Column Driver module receives an external Input signal as a 10-bit video data signal, and the 10-bit video data is stored in an Input Registers module.
5. A microdisplay passive pixel drive circuit according to claim 1, wherein the PWM implementing circuit comprises:
the Scan Driver module is electrically connected with the Scan Driver module;
a plurality of data signal lines electrically connected to the plurality of scanning signal lines, respectively;
the PWM realization circuit receives PWM input signals, the PWM input signals are respectively connected with the input end of the inverter and the grid electrode of the third transistor M3, the output end of the inverter is connected with a node on a data signal line, the capacitor is arranged between the output end of the inverter and the node of the data signal line, the input end of the inverter is electrically connected with a pre-charge tube, and the capacitor connected with the node of the data signal line is charged by the pre-charge tube.
6. A microdisplay passive pixel driving circuit according to claim 5 in which there are two inverters, one of which has its input connected to the PWM input signal and the gate of the third transistor M3, and the output of which is connected to the gate of the first transistor M1 and the input of the other inverter respectively.
7. The microdisplay passive pixel driving circuit according to claim 5, wherein the source of the first transistor and the source of the second transistor are both connected to a 5V mirror current source, and the drain of the first transistor M1 is connected to a plurality of the data signal lines.
8. The microdisplay passive pixel driving circuit according to claim 1, wherein the Scan Driver module is further connected to a timing signal and a reset signal, the Scan signal and the PWM signal controlling TX1 and TX2 transistors, respectively.
9. The microdisplay passive pixel drive circuit of claim 1, wherein the pixel circuit is further electrically connected to a clock signal generating circuit and a digital circuit module, respectively;
the clock signal generating circuit is used for generating a clock signal, receiving the RGB data signal by the Timing controller module and outputting the clock signal to the Source driver module;
the digital circuit modules include a digital circuit module that generates a row signal and a digital circuit module that generates a column signal.
10. The microdisplay passive pixel driving circuit according to claim 9, wherein the digital circuit module is electrically connected to an and gate, two input terminals of the and gate are respectively connected to the digital circuit module generating a row signal and the digital circuit module generating a column signal, an output terminal of the and gate is connected to a transmission gate, and the transmission gate receives the converted pixel current and adjusts and outputs the pixel current according to a signal generated by the digital circuit module.
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