CN114121915A - GaN wide bandgap power module packaging structure and packaging method - Google Patents
GaN wide bandgap power module packaging structure and packaging method Download PDFInfo
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- CN114121915A CN114121915A CN202010900712.4A CN202010900712A CN114121915A CN 114121915 A CN114121915 A CN 114121915A CN 202010900712 A CN202010900712 A CN 202010900712A CN 114121915 A CN114121915 A CN 114121915A
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/16—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of types provided for in two or more different subclasses of H10B, H10D, H10F, H10H, H10K or H10N, e.g. forming hybrid circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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Abstract
The invention provides a gallium nitride wide bandgap power module packaging structure, comprising: the packaging structure comprises a packaging substrate, a packaging tube shell and a gallium nitride wide bandgap power module; a packaging substrate is arranged around the frame of the packaging tube shell to form a containing groove; the power module is arranged in the accommodating groove to form a low-inductance symmetrical current conversion and control circuit structure; the gallium nitride wide bandgap power module comprises a lining plate with a metal layer, at least two gallium nitride chip sets symmetrically bonded on the metal layer, a plurality of spring pins, a symmetrical bus power terminal, a plurality of capacitors and a drive control board arranged above the lining plate; the lining plate is bonded on the substrate; the gallium nitride chip sets are symmetrically bonded in the middle of the metal layer; the plurality of spring contact pins are arranged on two sides of the gallium nitride chip set; each gallium nitride chip set is connected with the symmetrical bus power terminal and the spring contact pin through metal layers; is electrically connected with the driving control board through a spring contact pin; a plurality of capacitors are symmetrically bonded to both circumferential edge sides of the metal layer to form a low inductance power loop.
Description
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to a gallium nitride wide bandgap power module packaging structure and a packaging method.
Background
The wide-bandgap power semiconductor has a wide prospect in the field of high-power application, can realize high energy conversion efficiency, high switching frequency, more compact volume, more flexible switching control and the like due to the advantages of high switching speed, low switching loss, high current density and the like of a power semiconductor device, is an ideal power device for meeting the application of wider energy conversion, energy transmission and the like in the future, and can be applied to the new energy fields of electric automobiles, electric airplanes, rail transit, smart grids, industrial application and the like.
The gallium nitride (GaN) power semiconductor chip has the advantages of high current-voltage change rate, high switching frequency, high current density, high chip working temperature saving, high energy conversion efficiency and wide prospect in future energy conversion and transmission. In the field of the current power devices, a common GaN device is applied to the fields of high switching frequency such as high-frequency communication and the like and relatively low power such as a power supply charger and the like, and with the rapid development of the manufacturing and packaging technology, packaging materials and the like of a power semiconductor device, the GaN has a wide application prospect in high and medium power such as a main power inverter of an electric automobile and the like.
The wide bandgap power product has higher requirements on the aspects of package layout and high-temperature materials, and the characteristics of the wide bandgap semiconductor device in the aspects of device current, heat and the like are difficult to embody in the existing various standard packages. The traditional packaging structure design on the current market can not meet the requirements of high switching frequency, high power density and high-integration high-power semiconductor devices on packaging layout, current, heat and the like.
Therefore, a novel package structure and a novel package method for a gallium nitride (GaN) wide bandgap power semiconductor module are needed.
Disclosure of Invention
In view of the above, the present invention provides a gallium nitride wide bandgap power module package structure and a method for packaging the same, so as to solve the foregoing problems.
Based on the above object, the present invention provides a gallium nitride wide bandgap power module package structure, comprising: the packaging structure comprises a packaging substrate, a packaging tube shell and a gallium nitride wide bandgap power module; the frame of the packaging tube shell is surrounded with the packaging substrate to form a containing groove; the wide bandgap power module is arranged in the accommodating groove and is used for forming a low-inductance symmetrical current conversion and control circuit structure;
the gallium nitride wide bandgap power module comprises a lining plate with a metal layer, at least two gallium nitride chip sets symmetrically bonded on the metal layer, a plurality of spring pins, a symmetrical bus power terminal, a plurality of capacitors and a drive control board arranged above the lining plate; the lining plate is bonded on the substrate; at least two gallium nitride chip sets are symmetrically bonded in the middle of the metal layer respectively; the spring contact pins are arranged on two sides of the gallium nitride chip group; each gallium nitride chip set is connected with the symmetrical bus power terminal and the spring contact pin through metal layers; each gallium nitride chip set is electrically connected with the driving control board through the spring contact pin and is used for forming a buffer circuit; the capacitors are symmetrically bonded on two circumferential edge sides of the metal layer to form a low-inductance power loop; the top of the symmetrical busbar power terminal is arranged above the packaging tube shell and extends out of the packaging tube shell.
In one embodiment, the top of the symmetrical female row power terminal extends out of the packaging tube shell, and the bottom pin is bonded on the liner plate; the symmetrical bus bar power terminals comprise direct-current bus bar power terminals and alternating-current bus bar power terminals which are oppositely arranged at two ends of the lining plate; the direct-current busbar power terminal comprises a positive direct-current busbar power terminal and a negative direct-current busbar power terminal, wherein the middle part of the negative direct-current busbar power terminal is matched with the middle part of the positive direct-current busbar power terminal to form an overlapping coupling structure, so that stray inductance is reduced when the direct-current busbar power terminal conducts currents in different directions.
In one embodiment, the dc busbar power terminal comprises a connecting part and two main bodies symmetrically arranged at two sides of the connecting part; the main body part comprises an external power connecting part, a first bent part, a second bent part and a bottom pin; two ends of the second bending part are respectively connected with the main body and the first bending part;
the two ends of the first bending part are respectively connected with the external power connecting part and the bottom pin, the shape of the first bending part is matched with that of the packaging tube shell, so that the external power connecting part extends out of the packaging tube shell, and the bottom pin is bonded on the lining plate; the bottom pin is in a forked shape; two ends of the second bending part are respectively connected with the first bending part and the connecting part, so that the main body is vertically connected with the connecting part.
In one embodiment, the negative dc bus power terminal includes an external main dc connection portion, a negative dc first bending portion, a negative dc second bending portion, a negative dc third bending portion, and a negative dc bottom pin, which are vertically connected in sequence;
the shape of the negative direct current first bending part is matched with that of the packaging tube shell, so that the external main current connecting part extends out of the packaging tube shell; the negative direct current second bending part is matched with the connecting part to form an overlapping coupling structure, and the middle part of the negative direct current second bending part is provided with a branch; the two negative direct current bottom pins are symmetrically arranged on two sides of the fork of the negative direct current second bending part; the negative direct current bottom pin is in a forked shape.
In one embodiment, the alternating current busbar power terminal comprises an alternating current connecting part, an alternating current bending part and two alternating current bottom pins which are reversely and symmetrically arranged, wherein the alternating current connecting part, the alternating current bending part and the two alternating current bottom pins are sequentially and vertically connected;
the alternating-current bent part comprises a first alternating-current bent part and a second alternating-current bent part which are sequentially and vertically connected, and the shape of the first alternating-current bent part is matched with that of the packaging tube shell so that the alternating-current connecting part extends out of the packaging tube shell; and the middle part and the edge of the second alternating current bending part are respectively provided with a spring contact pin avoiding groove group which respectively comprises two symmetrically arranged groove structures so as to form low-interference current.
In one embodiment, the drive control board provides a plurality of series combinations of resistors and capacitors away from the surface of the backing plate; the plurality of series combinations are respectively arranged in parallel with the plurality of chips in the gallium nitride chip group one by one; the positive electrodes and the negative electrodes of the plurality of series combinations are respectively connected with the drain electrodes and the source electrodes of the plurality of chips through spring pins to form an RC Snubber buffer circuit so as to reduce the electromagnetic interference of the gallium nitride chip set.
In one embodiment, the metal layer comprises a first metal layer region and a second metal layer region disposed on the same side of the gallium nitride chipset; the first metal layer region and the second metal layer region are arranged oppositely and at intervals;
the first metal layer region comprises a strip-shaped main body region and two expansion end parts extending from two ends of the strip-shaped main body region to the second metal layer region; the grid electrode of the gallium nitride chip set is connected with the two expansion end parts, and the expansion end parts are connected with the driving control board through spring contact pins arranged in the middle of the strip-shaped main body area; the second metal layer area is rectangular shape, the source electrode of gallium nitride chipset is connected with the both ends of second metal layer area along length direction, second metal layer area is connected through the spring Contact pin that sets up in the regional middle part of rectangular shape main part with the drive control board to form the Kelvin Contact control circuit to the gallium nitride chipset.
In one embodiment, the metal layer region further includes four third metal layer regions symmetrically disposed on two sides of the two enlarged end portions; and a magnetic bead is arranged between the expansion end part and the third metal layer region.
In one embodiment, the spring pin comprises a semi-annular bottom end and an elongated shape connected with the semi-annular bottom end.
The embodiment of the invention also provides a packaging method of the wide bandgap power module, which comprises the following steps:
preparing a lining plate, a plurality of spring contact pins, symmetrical bus power terminals and a drive control board according to a wide bandgap power module to be packaged; the lining plate is provided with a metal layer;
bonding a gallium nitride chip set to the middle part of the lining plate, bonding the gallium nitride chip set and the metal layer of the lining plate through leads, and bonding the spring pins to two sides of the gallium nitride chip set in sequence;
symmetrically bonding a plurality of capacitors on both circumferential edge sides of the metal layer of the backing plate;
bonding the obtained lining plate to a substrate in sequence, and gluing a frame of a packaging tube shell to the edge of the packaging substrate to enable the frame of the packaging tube shell to surround the packaging substrate;
sequentially ultrasonically bonding a symmetrical power bus terminal to the lining plate, arranging the top of the symmetrical power bus terminal above the packaging tube shell, extending out of the packaging tube shell, and welding a PCB (printed circuit board) control board to the upper end of the spring contact pin to form a low-inductance symmetrical current conversion and control circuit structure and a buffer circuit;
and encapsulating the insulating glue into the packaging tube shell and curing.
From the above, the package structure and the package method of the gallium nitride wide bandgap power module provided by the invention have the advantages that by adopting the liner plate with a symmetrical structure, at least two gallium nitride chip sets, a plurality of spring pins, symmetrical bus power terminals and a plurality of capacitors are symmetrically bonded on the metal layer of the liner plate, and the gallium nitride wide bandgap power module is packaged by the spring pins and the liner plate; and the plurality of capacitors are symmetrically arranged in two edge areas of the metal layer of the lining plate, which are perpendicular to the arrangement direction of the symmetrical power bus bar terminals, so that a low-inductance symmetrical current conversion structure is realized, and the parasitic inductance of the power module during large-current energy exchange is greatly reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic block diagram of a module package according to an embodiment of the present invention;
FIG. 2 is a schematic structure diagram of the combination of the ceramic lining plate, the busbar, the chip, the pogo pin and the like according to the embodiment of the invention;
FIG. 3 is a schematic structure diagram of a resistor, a capacitor and a spring pin at the bottom of the driving circuit board according to the embodiment of the present invention;
FIG. 4 is a schematic view of a layout of a ceramic liner according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a positive dc bus bar according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a negative dc bus bar according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of an ac busbar according to an embodiment of the present invention;
FIG. 8 is a schematic structural diagram of a spring pin according to an embodiment of the present invention;
FIG. 9 is a flowchart of a module packaging method according to an embodiment of the present invention;
wherein, the package substrate 1, the package case 2, the lining board 4, the capacitor 41, the gan chip set 47, the spring pin 40, the driving control board 5, the positive dc bus power terminal 31, the negative dc bus power terminal 32, the connecting portion 315, the external power connecting portion 310, the external power connecting via 311, the first sub-bending portion 312, the second sub-bending portion 313, the third sub-bending portion 316, the second bending portion 314, the bottom pin 317, the external main current connecting portion 320, the external main current connecting via 321, the negative dc first bending portion 322, the negative dc second bending portion 323, the negative dc third bending portion 325, the negative dc bottom pin 327, the ac bus power terminal 33, the ac connecting portion 330, the ac connecting via 331, the ac bottom 339, the first ac bending portion 332, the second ac bending portion 333, the third ac bending portion 337, the first spring pin relief groove 334, the second spring pin relief groove 33, the positive dc bus power terminal 31, the negative dc bus power terminal 32, the external main current connecting portion 320, the negative dc first ac connecting portion 321, the negative dc first bending portion 322, the negative dc first spring pin relief groove, Second spring pin avoidance slot 336, third spring pin avoidance slot 335, central portion of first metal layer region 450, enlarged end portion 451, central portion of second metal layer region 460, end of second metal layer region 461, third metal layer region 452, fourth metal layer region 42, end of fourth metal layer region 420 near sixth metal layer region, fifth metal layer region 43, end of fifth metal layer region 430, sixth metal layer region 44, end of sixth metal layer region 440 near chip bonding region, chip bonding region 470, insulation resistance weld 471, seventh metal layer region 481, eighth metal layer region 480, resistance weld 482, ninth metal layer region 435, tenth metal layer region 434, drive control board resistor 51, drive control board capacitor 52, semi-annular bottom end 400, 401.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to specific embodiments and the accompanying drawings.
It is to be noted that technical terms or scientific terms used in the embodiments of the present invention should have the ordinary meanings as understood by those having ordinary skill in the art to which the present disclosure belongs, unless otherwise defined. The use of "first," "second," and similar terms in this disclosure is not intended to indicate any order, quantity, or importance, but rather is used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.
The inventor of the invention finds in long-term research work of gallium nitride wide bandgap power chips that the traditional packaging structure design in the current market can not fully exert the advantages of the gallium nitride wide bandgap power chips, and can not fully embody the characteristics of the gallium nitride wide bandgap power module unique to the traditional silicon-based power device, such as high dv/dt rate when current is switched on, high di/dt when switched off, high switching frequency, high electromagnetic interference harmonic content, high requirements on inductance and capacitance of parasitic parameters and the like; in order to realize the electrical connection among the lining plate, the chip and the pins in the packaging process, electrodes need to be led out through power terminals in addition to module packaging, and the parasitic inductance of a loop can be increased by the leads.
The inventor of the invention provides a novel low-inductance symmetrical current conversion layout structure, a noise reduction capacitor is arranged in the structure, and the electromagnetic interference is reduced by realizing the uniform low inductance of a gate-source control end of a plurality of chips through an internal integrated drive circuit; the packaging structure and the implementation method of the wide bandgap semiconductor power device adopting the novel sintering process route are adopted to fully play the advantages and the characteristics of the wide bandgap device in the aspects of high temperature-saving work, high frequency switching frequency, high heat dissipation, low electromagnetic interference EMI and the like. The fully symmetrical structure is adopted by the lining plate structure, the power terminal structure, the grid control and the like in the module, and the inductance of the main current is effectively reduced by adopting the built-in capacitor; by adopting the structure that the driving control board is connected with the spring Contact pin, the control end is connected with the Kelvin Contact, the control inductance of the grid-source electrode loop is effectively reduced, and the packaging of the GaN power chip with high current switching rate can be optimally met. Meanwhile, in order to meet the requirements of high-power electric driving applications of electric automobiles and the like, the magnetic Bead Ferrite Bead is added in the control loop and the main loop to inhibit and reduce high-frequency signals in the control signal and the main current loop, and electromagnetic interference (EMI) possibly generated by a power device is effectively reduced, so that the switching frequency of the system is improved, and the most important EMI interference source in the whole system is reduced. The power bus bar terminal technology combining the symmetrical low structural stress and the ultrasonic welding USW technology is adopted, and the long-term reliability of the power module in the application scenes of high vibration, high temperature impact and the like of the electric automobile is improved.
Referring to fig. 1 and fig. 2, an embodiment of the invention provides a gallium nitride wide bandgap power module package structure, including: the packaging structure comprises a packaging substrate 1, a packaging tube shell 2 and a gallium nitride wide bandgap power module; the frame of the packaging tube shell 2 is surrounded with the packaging substrate 1 to form a containing groove; the wide bandgap power module is arranged in the accommodating groove and is used for forming a low-inductance symmetrical current conversion circuit structure and a low-inductance symmetrical control circuit structure;
the gallium nitride wide bandgap power module comprises a lining plate 4 with a metal layer, at least two gallium nitride chip sets 47 symmetrically bonded on the metal layer, a plurality of spring pins 40, a symmetrical bus power terminal, a plurality of capacitors 41 and a drive control board 5 arranged above the lining plate 4; the lining plate 4 is bonded on the packaging substrate 1; at least two gallium nitride chip sets 47 are symmetrically bonded to the middle part of the metal layer of the lining plate 4 respectively; the spring pins 40 are arranged on two sides of the gallium nitride chip group; each gallium nitride chip set is connected with the symmetrical bus power terminal and the spring contact pin 40 through the metal layer on the lining plate 4; each gallium nitride chip set is electrically connected with the driving control board 5 through the spring contact pin 40 to form a buffer circuit; the capacitors 41 are symmetrically bonded to two edge regions (namely two circumferential edge sides of the metal layer) of the liner plate 4, where the metal layer is perpendicular to the arrangement direction of the busbar power terminals, so as to form low inductance; the top of the symmetrical busbar power terminal is arranged above the packaging tube shell 2 and extends out of the packaging tube shell 2.
According to the packaging structure of the gallium nitride wide bandgap power module provided by the embodiment of the invention, by adopting the lining plate 4 with a symmetrical structure, at least two gallium nitride chip sets, a plurality of spring pins 40, symmetrical bus power terminals and a plurality of capacitors 41 which are symmetrically bonded on the metal layer of the lining plate 4, and the driving control board 5 which is electrically connected with the lining plate 4 through the spring pins 40; and the capacitors 41 are symmetrically arranged at two circumferential edge regions of the metal layer of the lining plate 4, so that a low-inductance symmetrical current conversion structure is realized, and the parasitic inductance of the power module during large-current energy exchange is greatly reduced.
In one embodiment, a heat sink is also included. The radiator is arranged at the bottom of the substrate to further reduce the electromagnetic interference of the gallium nitride wide bandgap power module.
The package substrate 1 is a metal substrate such as an aluminum substrate, a copper substrate, and an iron substrate. The package substrate 1 may take various shapes, such as a plate shape. The package substrate 1 may be provided with a substrate fastening hole 10. The substrate fastening holes 10 may be provided at four ends of the package substrate 1, in particular. The substrate fastening hole 10 may be specifically a through hole or the like. The substrate fastening holes 10 are respectively formed at the four ends of the package substrate 1, thereby facilitating the packaging.
The lining plate 4 is a ceramic lining plate. Can be a ceramic lining plate with high voltage resistance, insulation, high heat dissipation efficiency and high thermo-mechanical reliability. For example, from aluminium oxide Al2O3A ceramic backing plate prepared from at least one of aluminum nitride AlN and silicon nitride SiN. The upper and lower surfaces of the ceramic lining plate 4 are provided with metal layers for conducting electricity. The lower surface of the backing plate 4 is bonded to the substrate, for example, by soldering or silver sintering. The metal layer on the upper surface of the lining plate 4 completes the functions of electric conduction, control and the like by considering factors such as electromagnetic current sharing and the like.
And the bottom pins of the symmetrical bus power terminals are bonded on the metal layer of the lining plate 4, the middle part of the symmetrical bus power terminals is close to the packaging tube shell 2, and the top of the symmetrical bus power terminals extends out of the packaging tube shell 2. The symmetrical bus power terminals comprise direct-current bus power terminals and alternating-current bus power terminals which are oppositely arranged at two ends of the lining plate 4.
The direct-current busbar power terminal comprises a positive direct-current busbar power terminal 31 and a negative direct-current busbar power terminal 32. The middle part of the negative direct current busbar power terminal 32 is matched with the middle part of the positive direct current busbar power terminal 31 to form an overlapping coupling structure, so that stray inductance is reduced when the direct current busbar power terminal conducts currents in different directions.
Referring to fig. 5, the positive dc bus power terminal 31 includes a connection portion 315 and two main bodies symmetrically disposed at two sides of the connection portion 315. The main body portion includes an external power connection portion 310, a first bent portion, a second bent portion 314, and a bottom pin 317. Two ends of the second bending part 314 are respectively connected to the main body and the connecting part 315, so that the main body is vertically connected to the connecting part 315. That is, two ends of the connecting portion 315 are connected to the first bending portions of the two main bodies through the second bending portion 314, so as to achieve the function of connecting and balancing the currents on the two sides, so that the current magnetic field flowing through the positive dc bus power terminal 31 is coupled to the negative dc bus power terminal 32 and the inductance on the metal layer of the lining plate 4, thereby reducing the overall inductance.
The external power connection portion 310 is provided with an external power connection through hole 311 for connecting with an external main conductive busbar terminal.
Two ends of the first bent portion along the length direction (i.e., two ends of the first bent portion in the height direction) are respectively connected to the external power connection portion 310 and the bottom pin 317. The first bending part is close to the package case 2, the shape of the first bending part is matched with that of the package case 2, so that the external power connecting part 310 extends out of the package case 2, and the bottom pin 317 is bonded on the lining plate 4.
The first bending part includes three sub-bending parts, namely a first sub-bending part 312, a second sub-bending part 313 and a third sub-bending part 316. The external power connection portion 310, the first sub-bending portion 312, the second sub-bending portion 313, the third sub-bending portion 316 and the bottom lead 317 are vertically connected in sequence. The heights and positions of the first sub-bending portion 312, the second sub-bending portion 313 and the third sub-bending portion 316 need to be calculated through simulation so as to be matched with the height and shape of the package case 2, and the stress released by the bottom lead 317 in the ultrasonic bonding and actual working conditions is relieved.
The bottom pin 317 is in a bifurcated shape to increase the contact area between the positive dc bus power terminal 31 and the metal layer of the ceramic lining plate 4, and improve the heat dissipation and the current carrying capacity of the positive dc bus power terminal 31.
Referring to fig. 6, the negative dc bus power terminal 32 includes an external main current connection portion 320, a negative dc first bending portion 322, a negative dc second bending portion 323, a negative dc third bending portion 325, and a negative dc bottom pin 327, which are vertically connected in sequence.
The external main current connection part 320 is provided with an external main current connection through hole 321 for connecting with an external main conductive busbar terminal. The negative dc first bent portion 322, the negative dc second bent portion 323, and the negative dc third bent portion 325 are optimized buffer structures, and the heights and positions thereof need to be calculated by simulation to match the height and shape of the package case 2, and alleviate the electromagnetic force generated by structural stress and high current.
The negative dc first bending portion 322 is disposed near the package case 2, so that the external main current connection portion 320 extends out of the package case 2. The negative dc second bending portion 323 and the connecting portion 315 of the positive dc bus power terminal 31 are matched to form an overlapped coupling structure, so as to reduce the overall inductance.
In one embodiment, the middle of the negative dc second bent part 323 has a branch to divide the current path of the entire negative dc bus power terminal 32 into two parts.
Correspondingly, the negative dc bottom pins 327 are disposed in two, and symmetrically disposed on two sides of the branch of the negative dc second bending portion 323, so as to form two negative dc paths. The negative dc bottom pin 327 is bifurcated to divide two negative dc paths into two pins, so as to increase the contact area between the negative dc bus power terminal 32 and the metal layer of the liner plate 4, and improve the heat dissipation and current carrying capability of the negative dc bus power terminal 32.
Referring to fig. 7, the ac busbar power terminal 33 includes an ac connection portion 330, an ac bending portion, and two ac bottom pins 339 that are symmetrically and reversely disposed in sequence. The ac connection portion is provided with an ac connection through hole 331 for connecting an external ac power source.
The alternating-current bent portion includes a first alternating-current bent portion 332, a second alternating-current bent portion 333, and a third alternating-current bent portion 337, which are vertically connected in sequence. The first ac bending portion 332, the second ac bending portion 333, and the third ac bending portion 337 are optimized buffering structures for relieving the structure stress and the electromagnetic force generated by the high current. The height and the position of the pin need to be calculated through simulation so as to be matched with the height and the shape of the packaging tube shell 2, and the stress released by the alternating current bottom pin 339 in the ultrasonic bonding and actual working conditions is relieved.
The shape of the first ac bending portion 332 is adapted to the shape of the package case 2, so that the ac connecting portion 330 extends out of the package case 2. The middle part and the edge of the second alternating current bending part 333 are respectively provided with a spring contact pin avoiding groove group. Each spring contact pin avoiding groove group comprises two symmetrically-arranged groove structures so as to form low-interference current. It is understood that the spring pin avoiding groove group includes a first spring pin avoiding groove 334 and a second spring pin avoiding groove 336 opened in the middle of the second ac bend 333. The set of spring pin relief slots further includes two third spring pin relief slots 335 formed in the edge of the second ac bend 333. The slot widths and lengths of the first spring pin avoiding groove 334, the second spring pin avoiding groove 336 and the two third spring pin avoiding grooves 335 are obtained through optimization and calculation, so that the first spring pin avoiding groove and the second spring pin avoiding groove are perpendicular to the current flowing through the spring pin 40 on the premise of maximizing the high current carrying capacity, and the mutual interference minimization of the alternating current busbar power terminal current and the direct current of the spring pin 40 is formed.
The third ac bending portions 337 are disposed in two, and are disposed at two ends of the second ac bending portion 333 in an opposite symmetry. The two ac bottom pins 339 are respectively and vertically connected to the two third ac bending portions 337 to divide the ac current into two current paths. Each ac bottom pin 339 is provided with a bifurcated shape to divide two ac paths into two pins, so as to improve the current-carrying conductivity of the ac busbar power terminal and the metal layer on the upper surface of the ceramic lining plate 4.
Referring to fig. 2, the number of the plurality of gan chipsets 47 may be two or four. In one embodiment, two gallium nitride chip sets 47 are provided, and two gallium nitride chip sets 47 are symmetrically ultrasonically bonded in the middle of the metal layer. In one embodiment, the number of the gallium nitride chip sets 47 is set to be plural, a plurality of the gallium nitride chip sets 47 are connected in parallel, and two adjacent gallium nitride chip sets 47 are symmetrically arranged and connected through a chip bonding wire, so as to reduce oscillation and electromagnetic interference caused by a potential difference caused by a large current of the gallium nitride chip sets 47 arranged in parallel.
Each gallium nitride chipset 47 includes a plurality of gallium nitride chips arranged in parallel. Two adjacent chips arranged in parallel are connected through a chip bonding wire, so that the oscillation and the electromagnetic interference caused by the potential difference of the chips connected in parallel due to large current are reduced. The plurality may be two or three. And internal resistors are arranged inside the chip. The gallium nitride chip set 47 constitutes a switch of the module.
It should be noted that the chip is connected to the chip through a chip bonding wire; the chip and the metal layer are connected through a lining plate bonding wire. The chip is connected with the symmetrical bus power terminals and the spring pins 40 through metal layers.
Referring to fig. 2 and 4, the metal layer includes a plurality of gallium nitride chipset bonding regions. That is, the same number of gallium nitride chip group bonding regions as the number of gallium nitride chip groups 47 are provided in the metal layer. Four chip bonding areas 470 connected in sequence are included in the bonding area of the gallium nitride chipset, and a slot-shaped gap is provided between two adjacent chip bonding areas to form an insulating solder resist 471, so that the chips can be bonded by a welding process or a silver sintering process.
The metal layer further comprises a first metal layer region 45 and a second metal layer region 46 respectively arranged on the same side of the bonding region of the gallium nitride chipset; the first metal layer region 45 and the second metal layer region 46 are disposed opposite to each other and spaced apart from each other. That is, the first metal layer region 45 and the second metal layer region 46 are disposed on the same side of the chip bonding region 470. One side of each chip bonding region 470 is provided with a first metal layer region 45 and a second metal layer region 46.
The first metal layer area 45 includes an elongated body area and two enlarged end portions 451 extending from both ends of the elongated body area toward the second metal layer area 46. The middle portion 450 of the elongated body section is provided with a spring pin 40. The grid of the gallium nitride chip group 47 is connected with two expanded end parts 451 through a lining plate bonding wire, and the expanded end parts 451 are connected with the driving control board 5 through spring pins 40 arranged in the middle part 450 of the strip-shaped main body area.
The second metal layer region 46 is elongated and the spring pin 40 is disposed in the middle 460 of the second metal layer region 46. The source of the gallium nitride chip set 47 is connected to two ends 461 of the second metal layer region 46 along the length direction through the lining bonding wires, and the second metal layer region 46 is connected to the driving control board 5 through the spring pin 40 arranged in the middle of the strip-shaped 401 main body region.
The grid of the gallium nitride chip group 47 is connected with two expanded end parts 452 of the first metal layer region 45 through a lining plate bonding wire, and the middle part 450 of the first metal layer region 45 is connected with the driving control board 5 through a spring contact pin 40; the source of the gan chip set 47 is connected to the two ends 461 of the second metal layer region 46 along the length direction through the bonding wires of the substrate 4, and the middle part 460 of the second metal layer region 46 is connected to the driving control board 5 through the spring pin 40, so as to form a Kelvin Contact control loop for the gan chip set 47.
In further embodiments, the metal layer region further comprises four third metal layer regions 452. The four third metal layer regions 452 are respectively symmetrically disposed on two sides of the two enlarged end portions 451, and the gates of the four chips in the gallium nitride chipset 47 are respectively connected to the four third metal layer regions 452 through the liner bonding wires, so as to form a fully symmetric balanced control of the four parallel chips. The connection mode of the grid control end can be symmetrical bridge type cascade connection.
In one embodiment, a magnetic bead is disposed between the enlarged end portion 451 and the third metal layer region 452 to suppress high frequency components in the control signal. The magnetic Bead may be a Ferrite Bead, which may be soldered on both sides of the third metal layer region 452 with a suitable resistance.
In the Kelvin Contact control loop, the balance control of four gallium nitride power chips in the gallium nitride chip set 47 is realized by two spring pins 40 respectively arranged in the middle of the first metal layer region 45 and the second metal layer region 46. The grid-source layout in the control circuit can adapt to the extremely high switching speed of the GaN chip, and realizes the low control loop parasitic parameters and the balanced parasitic parameters of good control signals to the chip. The magnetic beads arranged between the expansion end part 451 and the third metal layer region 452 are combined, potential oscillation of the control end can be reduced, and electromagnetic interference is reduced.
The metal layer is further provided with a fourth metal layer region 42, a fifth metal layer region 43, a sixth metal layer region 44, a seventh metal layer region 481, an eighth metal layer region 480, a ninth metal layer region 435, a tenth metal layer region 434.
Wherein the fourth metal layer region 42 is provided on the circumferential edge side of the backing plate 4, and one end of the fourth metal layer region 42 is provided with an opening. I.e. the fourth metal layer region 42 is provided on four edge sides of the backing plate 4, and the fourth metal layer region 42 is provided with an opening on one edge side of the backing plate 4. The sixth metal layer region 44 is disposed in the opening region and extends from the edge having the opening toward the chip bonding region 470. The first metal layer region 45 and the second metal layer region 46 are arranged in the space between the sixth metal layer region 44 and the chip bonding region 470.
The positive direct-current busbar power terminal 31 is bonded at two end portions 420 of the fourth metal layer region 42 close to the sixth metal layer region 44, and the negative direct-current busbar power terminal 32 is bonded in a region where the sixth metal layer region 44 and the two end portions 420 of the fourth metal layer region are parallel, so that the middle portion of the negative direct-current busbar power terminal 32 and the middle portion of the positive direct-current busbar power terminal 31 are matched to form an overlapping coupling structure. Four bonding regions of the spring pins 40 are simultaneously provided on the side of the sixth metal layer region 44 adjacent to the first metal layer region 45.
The plurality of capacitors 41 are symmetrically disposed, respectively. The number of capacitors 41 may be 4, one set of two capacitors. The two groups of capacitors 41 are respectively and symmetrically arranged in the areas close to the two pins of the positive direct current power busbar terminal 31. Each group of capacitors 41 spans an end portion 440 of the sixth metal layer region 44 near the chip bonding region 470 and a portion of the fourth metal layer region 42 adjacent to the end portion 440, respectively. The capacitor 41 is a decoupling capacitor, and has a suitable capacitance value. The two leads are bonded to the area near the dc power bus bar terminal by a soldering process, for example, ultrasonic bonding. The decoupling capacitor is matched with an external high-capacity DC (direct current) capacitor, a converter circuit with lower inductance can be provided for high-frequency current energy, and high-frequency oscillation possibly generated in the conversion process of the gallium nitride chip set 47 (namely a current switch) is effectively inhibited. The direct-current low-frequency energy conversion is mainly completed through an external direct-current capacitor connected with a direct-current power busbar terminal bar.
The seventh metal layer region 481, the eighth metal layer region 480, the ninth metal layer region 435 and the tenth metal layer region 434 are all arranged on the other side of the chip bonding region 470, i.e. on the side of the chip bonding region 470 remote from the second metal layer region 46. And the seventh metal layer region 481, the eighth metal layer region 480, the ninth metal layer region 435, the tenth metal layer region 434 and the fifth metal layer region 43 are sequentially disposed away from the chip bonding region 470.
The seventh metal layer region 481 and the eighth metal layer region 480 are oppositely arranged at intervals, and a solder resist layer 482 is arranged at the interval between the seventh metal layer region 481 and the eighth metal layer region 480. The four chip upper surfaces in the gallium nitride chip group 47 are bonded to the seventh metal layer region 481 side by bonding metal wires or bonding metal strips or the like. Magnetic beads are arranged between the eighth metal layer region 480 and the ninth metal layer region 435 to suppress high frequency components of the main current flowing through the chip. The magnetic beads may be Ferrite beads (Ferrite beads), which may be provided by welding, with a suitable resistance.
Tenth metal layer area 434 is used to locate spring pins 40. The number of the spring pins 40 provided here is 4, which is equal to the number of chips in the gallium nitride chip set 47, and is four.
The fifth metal layer regions 43 are provided in two and are oppositely spaced apart. Two ends of the fifth metal layer region 43 away from the tenth metal layer region 434 are respectively used for setting two bottom pins 317 of the ac busbar power terminal.
The wide bandgap power module is in a double-switch tube half-bridge structure. In the upper tube working process of the module, the current of the positive dc bus power terminal 31 flows through the gallium nitride chip set 47 near the ac bus power terminal 33 along the fourth metal layer region 42 around the liner plate 4, and then flows through the ac bus power terminal 34 through the two end portions 430 of the fifth metal layer region 43, so as to form a symmetrical upper tube current. When the tube is in operation, external current flows through the two end portions 430 of the fifth metal layer region 43 from the ac busbar power terminal 33, then flows through the gallium nitride chip set 47 close to the dc busbar power terminal, and flows through the sixth metal layer region 44, and then flows through the negative dc busbar power terminal 32, so as to form a symmetrical tube-discharging current.
It should be noted that a plurality of spring pin 40 placement regions are provided on the backing plate 4, and are respectively provided on the side of the sixth metal layer region 44 close to the first metal layer region 45, the middle portion 450 of the first metal layer region 45, the middle portion 460 of the second metal layer region 46, the tenth metal layer region 434, and the side of the fourth metal layer region 42 close to the ac busbar power terminal 33.
Referring to fig. 3, the surface of the driving control board 5 away from the lining board 4 is provided with a plurality of series combinations of driving control board resistors 51 and driving control board capacitors 52, and the plurality of series combinations are respectively connected in parallel with a plurality of chips in the gan chip set 47 one by one. The driving control board 5 is further provided with a plurality of connecting through holes, and the arrangement positions of the connecting through holes are respectively in one-to-one correspondence with the arrangement areas of the spring pins 40 on the lining board 4. The tops of the plurality of spring pins 40 are respectively penetrated with a connecting through hole to electrically connect the driving control board 5 with the lining board 4.
The positive electrodes and the negative electrodes of the series combination are respectively connected with the drain electrodes and the source electrodes of the chips through the spring pins 40 to form the RC Snubber buffer circuit. The RC Snubber buffer circuit can reduce the electromagnetic interference caused by high dV/dt borne by the chip in the turn-on stage. The resistance value of the driving control board resistor 51 and the capacitance value of the driving control board capacitor 52 need to be calculated, and a proper value is selected, so that an effective RC-Snubber buffer circuit of the GaN chip with the fast switching rate is realized, the electromagnetic interference is reduced, and the safe work of the chip is protected. Meanwhile, heat generated by the RC Snubber buffer circuit during operation can be effectively dissipated through the plurality of spring pins 40.
The combination of the driving control board resistor 51 and the driving control board capacitor 52 can be divided into two different combination modes, and the two different combination modes correspond to the gallium nitride chip sets 47 respectively arranged at different positions. That is, the combination of the drive control board resistor 51 and the drive control board capacitor 52 corresponding to the gallium nitride chip group 47 disposed near the dc bus power terminal and near the ac bus power terminal 33 is different. One of them corresponds to two drive control board capacitors 52 for each drive control board resistor 51, and the other corresponds to one drive control board capacitor 52 for each drive control board resistor 51.
Referring to fig. 8, the spring pin 40 includes a semi-annular bottom end 400 and a strip 401 connected to the semi-annular bottom end 400. Wherein, the half-ring bottom 400 is ultrasonically welded on the corresponding area of the lining plate 4, and the strip 401 passes through the driving control plate 5 arranged above the lining plate 4 and extends out of the driving control plate 5. The top end of the strip 401 is welded and conducted with the connecting through hole of the driving control board 5 to form the conducting capability of high-frequency signals or driving current. The semi-annular structure of the bottom end 400 can keep the spring contact pin 40 stably standing on the plane metal layer to play a certain stress buffering role, compared with a commonly adopted two-part pressure contact pin structure press-fit, the spring contact pin 40 is simple in structure and low in cost, and high-reliability bonding can be achieved through simple processes such as welding or ultrasonic bonding.
According to the gallium nitride wide bandgap power module packaging structure provided by the embodiment of the invention, the whole internal structure forms a full-symmetrical structure, and the liner plate structure, the busbar structure, the grid control structure and the like form complete balanced symmetry on the structural design of the main current symmetry and the parasitic parameters of the control loop. Meanwhile, the internal absorption capacitor 14 is directly and symmetrically bonded with the direct-current positive and negative busbar power terminals in the module, and extremely low inductance is formed for high-frequency components of main current flowing through the module, and compared with a module structure without the built-in capacitor 14, the inductance of a main current loop is reduced by 50%. And the pin of the busbar power terminal is bonded by adopting a high-reliability ultrasonic bonding USW process, the overall bonding area of the pin is increased, the heat dissipation and current carrying capacity of the busbar power terminal are improved, and the vibration resistance and high-low temperature impact reliability of the module are improved. A PCB driving control board is integrated on the upper part of the module package, and a control driving circuit is arranged on the PCB driving control board, so that the Gate (Gate) loop distance is reduced, and the requirements of fast switching of GaN-like wide bandgap power chips are met. A Kelvin Contact mode is adopted to realize a symmetrical structure from a control signal input end to a grid of the chip, and efficient current sharing control of multiple chips and high conversion rate and high current is effectively formed. And switching oscillation generated by the change of the magnetic Bead Ferrite Bead and the RC-Snubber buffer circuit is respectively adopted in the control loop and the main loop, so that the electromagnetic interference is reduced. Connecting a direct current capacitor and a resistor in parallel aiming at the main current end of each power chip to form a Snubber buffer circuit; and filtering out potential high-frequency energy components of each chip, and reducing high-frequency components through R-C Snubber to reduce electromagnetic interference of the whole module. Adopt the terminal connection drive control board 5 of novel simple structure spring contact pin 40, the heat dissipation of high frequency Snubber can be through the effective heat conduction of rectangular shape 402 tip of spring contact pin 40, does benefit to the electromagnetic interference who reduces the module.
Referring to fig. 9, an embodiment of the present invention further provides a method for packaging a wide bandgap power module, including:
s100, preparing a lining plate, a plurality of spring pins, symmetrical bus power terminals and a driving control board according to a wide bandgap power module to be packaged; the lining plate is provided with a metal layer.
The symmetrical busbar power terminal comprises a positive direct current busbar power terminal, a negative direct current busbar power terminal and an alternating current busbar power terminal. The alternating current busbar power terminal is provided with a spring contact pin avoiding groove group and comprises two symmetrically arranged groove structures. The arrangement position and the size of the slotted structure are matched with those of the corresponding spring contact pin.
And S200, bonding a gallium nitride chip set to the middle part of the lining plate, bonding the gallium nitride chip set and the metal layer of the lining plate through a lead wire, and bonding the spring pins to two sides of the gallium nitride chip set in sequence.
The method for bonding the gallium nitride chipset and the lining plate metal layer through the lead specifically comprises the following steps: one end of the lead is connected to the upper surface electrode of the gallium nitride chip set through an ultrasonic bonding process, and the other end of the lead is connected to the corresponding metal layer of the lining plate through the ultrasonic bonding process. The leads may be pad bond wires.
And S300, symmetrically bonding a plurality of capacitors on two circumferential edge sides of the metal layer of the lining plate.
And S400, bonding the obtained lining plate to a substrate, and gluing the frame of the packaging tube shell to the edge of the packaging substrate in sequence to enable the frame of the packaging tube shell to surround the packaging substrate.
The package tube is adhered to the edge of the package substrate through the sealant, and the size of the package tube is based on the fact that the package tube can completely cover the circuit structure on the package substrate.
S500, ultrasonic bonding of symmetrical power busbar terminals to the lining plate is sequentially carried out, the tops of the symmetrical power busbar terminals are arranged above the packaging tube shell and extend out of the packaging tube shell, and the PCB control board is welded to the upper end of the spring contact pin, so that a low-inductance symmetrical current conversion and control circuit structure and a current conversion buffer circuit are formed.
S600, encapsulating the insulating glue into the packaging tube shell and curing.
The pouring sealant can be silicone gel. Pouring the mixture into the shell by a dispensing method, standing for 24 hours after pouring, and waiting for the silicon gel to be solidified.
The packaging method provided by the embodiment of the invention is used for preparing the packaging structure, and has the structure and the corresponding effect in the corresponding specific embodiment. And will not be described in detail herein.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, is limited to these examples; within the idea of the invention, also features in the above embodiments or in different embodiments may be combined, steps may be implemented in any order, and there are many other variations of the different aspects of the invention as described above, which are not provided in detail for the sake of brevity.
In addition, well known power/ground connections to Integrated Circuit (IC) chips and other components may or may not be shown within the provided figures for simplicity of illustration and discussion, and so as not to obscure the invention. Furthermore, devices may be shown in block diagram form in order to avoid obscuring the invention, and also in view of the fact that specifics with respect to implementation of such block diagram devices are highly dependent upon the platform within which the present invention is to be implemented (i.e., specifics should be well within purview of one skilled in the art). Where specific details (e.g., circuits) are set forth in order to describe example embodiments of the invention, it should be apparent to one skilled in the art that the invention can be practiced without, or with variation of, these specific details. Accordingly, the description is to be regarded as illustrative instead of restrictive.
While the present invention has been described in conjunction with specific embodiments thereof, many alternatives, modifications, and variations of these embodiments will be apparent to those of ordinary skill in the art in light of the foregoing description.
The embodiments of the invention are intended to embrace all such alternatives, modifications and variances that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, substitutions, improvements and the like that may be made without departing from the spirit and principles of the invention are intended to be included within the scope of the invention.
Claims (10)
1. A gallium nitride wide bandgap power module package structure, comprising: the packaging structure comprises a packaging substrate, a packaging tube shell and a gallium nitride wide bandgap power module; the frame of the packaging tube shell is surrounded with the packaging substrate to form a containing groove; the gallium nitride wide bandgap power module is arranged in the accommodating groove and is used for forming a low-inductance symmetrical current conversion and control circuit structure;
the gallium nitride wide bandgap power module comprises a lining plate with a metal layer, at least two gallium nitride chip sets symmetrically bonded on the metal layer, a plurality of spring pins, a symmetrical bus power terminal, a plurality of capacitors and a drive control board arranged above the lining plate; the lining plate is bonded on the packaging substrate; at least two gallium nitride chip sets are symmetrically bonded in the middle of the metal layer respectively; the spring contact pins are arranged on two sides of the gallium nitride chip group; each gallium nitride chip set is connected with the symmetrical bus power terminal and the spring contact pin through metal layers; each gallium nitride chip set is electrically connected with the driving control board through the spring contact pin to form a buffer circuit; the capacitors are symmetrically bonded on two circumferential edge sides of the metal layer to form a low-inductance power loop; the top of the symmetrical busbar power terminal is arranged above the packaging tube shell and extends out of the packaging tube shell.
2. The gan wide-bandgap power module package structure of claim 1, wherein the top of the symmetrical female power terminals extends out of the package case, and the bottom leads are bonded to the substrate; the symmetrical bus bar power terminals comprise direct-current bus bar power terminals and alternating-current bus bar power terminals which are oppositely arranged at two ends of the lining plate; the direct-current busbar power terminal comprises a positive direct-current busbar power terminal and a negative direct-current busbar power terminal, wherein the middle part of the negative direct-current busbar power terminal is matched with the middle part of the positive direct-current busbar power terminal to form an overlapping coupling structure, so that stray inductance is reduced when the direct-current busbar power terminal conducts currents in different directions.
3. The gallium nitride wide bandgap power module package structure of claim 2, wherein the dc bus bar power terminal comprises a connection portion and two main bodies symmetrically disposed at two sides of the connection portion; the main body part comprises an external power connecting part, a first bent part, a second bent part and a bottom pin; two ends of the second bending part are respectively connected with the main body and the first bending part;
the two ends of the first bending part are respectively connected with the external power connecting part and the bottom pin, the shape of the first bending part is matched with that of the packaging tube shell, so that the external power connecting part extends out of the packaging tube shell, and the bottom pin is bonded on the lining plate; the bottom pin is in a forked shape; two ends of the second bending part are respectively connected with the first bending part and the connecting part, so that the main body is vertically connected with the connecting part.
4. The GaN wide bandgap power module package structure of claim 3, wherein the negative DC bus bar power terminal comprises an external main current connection portion, a negative DC first bending portion, a negative DC second bending portion, a negative DC third bending portion and a negative DC bottom pin, which are vertically connected in sequence;
the shape of the negative direct current first bending part is matched with that of the packaging tube shell, so that the external main current connecting part extends out of the packaging tube shell; the negative direct current second bending part is matched with the connecting part to form an overlapping coupling structure, and the middle part of the negative direct current second bending part is provided with a branch; the two negative direct current bottom pins are symmetrically arranged on two sides of the fork of the negative direct current second bending part; the negative direct current bottom pin is in a forked shape.
5. The gallium nitride wide bandgap power module package structure of claim 2, wherein the ac busbar power terminal comprises an ac connecting portion, an ac bending portion and two ac bottom pins arranged in reverse symmetry, which are vertically connected in sequence;
the alternating-current bent part comprises a first alternating-current bent part and a second alternating-current bent part which are sequentially and vertically connected, and the shape of the first alternating-current bent part is matched with that of the packaging tube shell so that the alternating-current connecting part extends out of the packaging tube shell; and the middle part and the edge of the second alternating current bending part are respectively provided with a spring contact pin avoiding groove group which respectively comprises two symmetrically arranged groove structures so as to form low-interference current.
6. The gan wide bandgap power module package structure of claim 1, wherein the driving control board has a plurality of series combinations of resistors and capacitors on a surface thereof away from the substrate; the plurality of series combinations are respectively arranged in parallel with the plurality of chips in the gallium nitride chip group one by one; the positive electrodes and the negative electrodes of the plurality of series combinations are respectively connected with the drain electrodes and the source electrodes of the plurality of chips through spring pins to form an RC Snubber buffer circuit so as to reduce the electromagnetic interference of the gallium nitride chip set.
7. The gan wide bandgap power module package structure of claim 1, wherein the metal layer comprises a first metal layer region and a second metal layer region disposed on a same side of the gan chipset; the first metal layer region and the second metal layer region are arranged oppositely and at intervals;
the first metal layer region comprises a strip-shaped main body region and two expansion end parts extending from two ends of the strip-shaped main body region to the second metal layer region; the grid electrode of the gallium nitride chip set is connected with the two expansion end parts, and the expansion end parts are connected with the driving control board through spring contact pins arranged in the middle of the strip-shaped main body area; the second metal layer area is rectangular shape, the source electrode of gallium nitride chipset is connected with the both ends of second metal layer area along length direction, second metal layer area is connected through the spring Contact pin that sets up in the regional middle part of rectangular shape main part with the drive control board to form the Kelvin Contact control circuit to the gallium nitride chipset.
8. The gan wide bandgap power module package structure of claim 7, wherein the metal layer region further includes four third metal layer regions symmetrically disposed on two sides of the two enlarged end portions; and a magnetic bead is arranged between the expansion end part and the third metal layer region.
9. The gan wide bandgap power module package structure of claim 1, wherein the spring pin comprises a semi-annular bottom end and a strip shape connected to the semi-annular bottom end.
10. A method for packaging a wide bandgap power module, comprising:
preparing a lining plate, a plurality of spring contact pins, symmetrical bus power terminals and a drive control board according to a wide bandgap power module to be packaged; the lining plate is provided with a metal layer;
bonding a gallium nitride chip set to the middle part of the lining plate, bonding the gallium nitride chip set and the metal layer of the lining plate through leads, and bonding the spring pins to two sides of the gallium nitride chip set in sequence;
symmetrically bonding a plurality of capacitors on both circumferential edge sides of the metal layer of the backing plate;
bonding the obtained lining plate to a substrate in sequence, and gluing a frame of a packaging tube shell to the edge of the packaging substrate to enable the frame of the packaging tube shell to surround the packaging substrate;
sequentially ultrasonically bonding a symmetrical power bus terminal to the lining plate, arranging the top of the symmetrical power bus terminal above the packaging tube shell, extending out of the packaging tube shell, and welding a PCB (printed circuit board) control board to the upper end of the spring contact pin to form a low-inductance symmetrical control circuit structure and a current conversion buffer circuit;
and encapsulating the insulating glue into the packaging tube shell and curing.
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| CN (1) | CN114121915A (en) |
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| CN114725075A (en) * | 2022-03-17 | 2022-07-08 | 华中科技大学 | Power module terminal and power module |
| CN117038627A (en) * | 2023-08-10 | 2023-11-10 | 苏州悉智科技有限公司 | Power module structure and electronic equipment |
| CN118136518A (en) * | 2024-05-08 | 2024-06-04 | 浙江晶能微电子有限公司 | Preparation method of power module |
| CN118572983A (en) * | 2024-05-21 | 2024-08-30 | 北京昕感科技有限责任公司 | Three-level power module |
| WO2024183655A1 (en) * | 2023-03-03 | 2024-09-12 | 比亚迪股份有限公司 | Power module |
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| CN104617071A (en) * | 2015-01-19 | 2015-05-13 | 株洲南车时代电气股份有限公司 | Power terminal group and power electronic module |
| US20180206359A1 (en) * | 2017-01-13 | 2018-07-19 | Cree Fayetteville, Inc. | High Power Multilayer Module Having Low Inductance and Fast Switching for Paralleling Power Devices |
| US20200161224A1 (en) * | 2017-08-30 | 2020-05-21 | Yangzhou Guoyang Electronic Co.,Ltd. | Parallel electrode combination, power module and power module group |
| US20200185302A1 (en) * | 2018-12-10 | 2020-06-11 | Gan Systems Inc. | Power modules for ultra-fast wide-bandgap power switching devices |
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| CN104617071A (en) * | 2015-01-19 | 2015-05-13 | 株洲南车时代电气股份有限公司 | Power terminal group and power electronic module |
| US20180206359A1 (en) * | 2017-01-13 | 2018-07-19 | Cree Fayetteville, Inc. | High Power Multilayer Module Having Low Inductance and Fast Switching for Paralleling Power Devices |
| US20200161224A1 (en) * | 2017-08-30 | 2020-05-21 | Yangzhou Guoyang Electronic Co.,Ltd. | Parallel electrode combination, power module and power module group |
| US20200185302A1 (en) * | 2018-12-10 | 2020-06-11 | Gan Systems Inc. | Power modules for ultra-fast wide-bandgap power switching devices |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114725075A (en) * | 2022-03-17 | 2022-07-08 | 华中科技大学 | Power module terminal and power module |
| WO2024183655A1 (en) * | 2023-03-03 | 2024-09-12 | 比亚迪股份有限公司 | Power module |
| CN117038627A (en) * | 2023-08-10 | 2023-11-10 | 苏州悉智科技有限公司 | Power module structure and electronic equipment |
| CN117038627B (en) * | 2023-08-10 | 2024-03-15 | 苏州悉智科技有限公司 | Power module structure and electronic equipment |
| CN118136518A (en) * | 2024-05-08 | 2024-06-04 | 浙江晶能微电子有限公司 | Preparation method of power module |
| CN118572983A (en) * | 2024-05-21 | 2024-08-30 | 北京昕感科技有限责任公司 | Three-level power module |
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