CN114034920A - Bus current sampling circuit and sampling method based on single-resistor sampling - Google Patents
Bus current sampling circuit and sampling method based on single-resistor sampling Download PDFInfo
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Abstract
The invention discloses a sampling circuit for acquiring bus current based on single resistance sampling, which comprises: the system comprises a three-phase bridge inverter circuit, a three-phase stator winding of a permanent magnet synchronous motor and a bus current analytic circuit; the three-phase bridge type inverter circuit is connected with a three-phase stator winding of the permanent magnet synchronous motor and is used for applying voltage signals to the three-phase stator winding of the permanent magnet synchronous motor and driving the motor to operate by changing the switching time sequence of a power switching device; and the three-phase bridge type inverter circuit is connected with the bus current analytic circuit and is used for analyzing and sampling the bus current according to the conduction time sequence of a power switch tube of the three-phase bridge type inverter circuit. The invention obtains the bus current by using the single resistor, and analyzes the bus current twice in one PWM period, thereby reducing the system cost and improving the sampling precision of the bus current.
Description
Technical Field
The invention relates to the technical field of bus current sampling, in particular to a bus current sampling circuit and a bus current sampling method based on single-resistor sampling.
Background
A key link of the vector control technology of the permanent magnet synchronous motor is current acquisition and reconstruction, and the current acquisition modes comprise a current transformer measurement method, a shunt resistance method and the like.
In the field of sensorless motor control, a current sensor, a double resistor, a triple resistor and the like are adopted in a traditional bus current obtaining mode in a permanent magnet synchronous motor inverter circuit, so that the system cost and complexity are increased.
In the actual process of collecting the bus current by the single resistor, the single resistor plays two roles, namely phase current analysis and bus current analysis, and the problems of moment ripple, ringing and the like can be caused, so that the performance of the motor is influenced.
Disclosure of Invention
The invention provides a bus current sampling circuit and a sampling method based on single-resistor sampling, and aims to solve the problems of high cost and low precision in the conventional single-resistor bus current sampling in the prior art.
The invention provides a sampling circuit for acquiring bus current based on single resistance sampling, which comprises: the system comprises a three-phase bridge inverter circuit, a three-phase stator winding of a permanent magnet synchronous motor and a bus current analytic circuit;
the three-phase bridge type inverter circuit is connected with a three-phase stator winding of the permanent magnet synchronous motor and is used for applying voltage signals to the three-phase stator winding of the permanent magnet synchronous motor and driving the motor to operate by changing the switching time sequence of a power switching device;
and the three-phase bridge type inverter circuit is connected with the bus current analytic circuit and is used for analyzing and sampling the bus current according to the conduction time sequence of a power switch tube of the three-phase bridge type inverter circuit.
Furthermore, the bus current analysis circuit comprises a phase current analysis unit, a bus current analysis unit and a filtering operational amplifier unit; the phase current analyzing unit includes: a sampling resistor Rs and a filter capacitor C2; the bus current system analyzing unit includes: the resistor R11, the resistor R13 and the filter capacitor C1; the filtering operational amplifier unit comprises a resistor R12, a resistor R14, a resistor R21, a resistor R22 and an operational amplifier; one end of the sampling resistor Rs is connected with the negative electrode of the Udc, one end of the resistor R11 and one end of the filter capacitor C2 respectively, and the other end of the sampling resistor Rs is connected with the ground, one end of the resistor R13 and the other end of the filter capacitor C2 respectively; the other end of the resistor R11 is respectively connected with one end of the resistor R12 and one end of the filter capacitor C1; the other end of the resistor R13 is respectively connected with one end of the resistor R14 and the other end of the filter capacitor C1; the other end of the resistor 12 is connected with the inverting input end of the operational amplifier and one end of a resistor R21 respectively; the other end of the resistor R14 is respectively connected with the positive input end of the operational amplifier and one end of the resistor R22; the other end of the resistor R21 is connected with the output end of the operational amplifier; the other end of the resistor R22 is grounded.
Further, the capacitance value of the filter capacitor C1 is more than ten times the capacitance value of the filter capacitor C2.
The invention also provides a sampling method for obtaining the bus current based on single resistance sampling, and the using method comprises the following steps:
step 1: determining a current sampling window according to the conduction time sequence of a power switch tube of the three-phase bridge type inverter circuit;
step 2: when entering a current sampling window, acquiring a first contrast value, a second contrast value and a third contrast value;
and step 3: acquiring first phase current sampling time and forward delay time according to the second contrast value, the third contrast value, the dead time, the ringing time and the ADC starting time;
and 4, step 4: when the sum of the first phase current sampling time and the forward delay time is between the second contrast value and the third contrast value, taking the sum of the first phase current sampling time and the forward delay time as the first bus current sampling time, and collecting the bus current through the first bus current sampling time;
when the sum of the first phase current sampling time and the forward delay time is not between the second contrast value and the third contrast value, taking the first bus current acquired by the previous current sampling window as the first bus current of the current sampling window;
and 5: acquiring second-phase current sampling time and sequential delay time according to the first contrast value, the second contrast value, the dead time, the ringing time and the ADC starting time;
step 6: when the sum of the second-phase current sampling time and the forward delay time is between a first contrast value and a second contrast value, taking the sum of the second-phase current sampling time and the forward delay time as second bus current sampling time, and collecting bus current through the second bus current sampling time pair;
and when the sum of the second-phase current sampling time and the forward delay time is not between the first contrast value and the second contrast value, taking the second bus current acquired by the previous current sampling window as the second bus current of the current sampling window.
And further, according to the turn-on time sequence of the power switch tube of the three-phase bridge type inverter circuit, when the power switch tube is in a non-zero vector state, the power switch tube is used as a current sampling window.
Further, in step 3, the calculation formula of the first phase current sampling time is as follows:
wherein, TmidIs a second contrast value, TminIs a third contrast value, TdeadIs the dead time;
in step 5, the calculation formula of the second phase current sampling time is as follows:
wherein, TmidIs a second contrast value, TmaxIs a first contrast ratio, TdeadIs the dead time.
Further, in the step 3 and the step 5, the calculation formula of the delay time is as follows:
Td＝Ton+TADCs/h+max(Tring+TADCdelay)
wherein, TonFor ADC start-up time, TADCs/hFor ADC sampling time, TringFor ringing time, TADCdelayDelay time is triggered for the ADC.
The invention has the beneficial effects that:
1. the invention obtains the bus current by using the single resistor, and analyzes the bus current twice in one PWM period, thereby reducing the system cost and improving the sampling precision of the bus current.
2. According to the improved circuit for collecting the bus current, after the phase current analysis is completed, the bus current is analyzed after a certain time is delayed, and the interference of the analyzed phase current on the bus current is effectively avoided.
3. The invention can correctly detect the phase current of three phases of the motor by using a control method based on single resistance sampling, and then analyzes the phase current and the bus current to further control the closed-loop operation of the motor, thereby realizing the control of the motor.
Drawings
The features and advantages of the present invention will be more clearly understood by reference to the accompanying drawings, which are illustrative and not to be construed as limiting the invention in any way, and in which:
FIG. 1 is a circuit schematic of an embodiment of the present invention;
FIG. 2 is a schematic diagram of sampling points of phase current and bus current in accordance with an embodiment of the present invention;
FIG. 3 is a flow chart of a method embodying the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The embodiment of the invention provides a sampling circuit for acquiring bus current based on single resistance sampling, which comprises: the system comprises a three-phase bridge inverter circuit, a three-phase stator winding of a permanent magnet synchronous motor and a bus current analytic circuit;
the three-phase bridge type inverter circuit is connected with a three-phase stator winding of the permanent magnet synchronous motor and is used for applying voltage signals to the three-phase stator winding of the permanent magnet synchronous motor and driving the motor to operate by changing the switching time sequence of the power switching device;
the three-phase bridge type inverter circuit is connected with the bus current analytic circuit and used for analyzing and sampling the bus current according to the conduction time sequence of a power switch tube of the three-phase bridge type inverter circuit.
As shown in fig. 1, the bus current analysis circuit includes a phase current analysis unit, a bus current analysis unit and a filtering operational amplifier unit; the phase current analyzing unit includes: a sampling resistor Rs, a filter capacitor C2; the bus current system analysis unit includes: the resistor R11, the resistor R13 and the filter capacitor C1; the filtering operational amplifier unit comprises a resistor R12, a resistor R14, a resistor R21, a resistor R22 and an operational amplifier; one end of a sampling resistor Rs is respectively connected with the negative electrode of the Udc, one end of a resistor R11 and one end of a filter capacitor C2, and the other end of the sampling resistor Rs is respectively connected with the ground, one end of a resistor R13 and the other end of a filter capacitor C2; the other end of the resistor R11 is respectively connected with one end of a resistor R12 and one end of a filter capacitor C1; the other end of the resistor R13 is respectively connected with one end of a resistor R14 and the other end of the filter capacitor C1; the other end of the resistor 12 is connected with the inverting input end of the operational amplifier and one end of the resistor R21 respectively; the other end of the resistor R14 is respectively connected with the positive input end of the operational amplifier and one end of the resistor R22; the other end of the resistor R21 is connected with the output end of the operational amplifier; the other end of the resistor R22 is connected to ground.
Because bus current sampling needs stronger filtering, and phase current sampling needs to be rapid and cannot be omitted, the capacitance value of the filter capacitor C1 is larger than that of the filter capacitor C2, and preferably, the capacitance value of the filter capacitor C1 is more than ten times that of the filter capacitor C2.
The invention also provides a sampling method for obtaining the bus current based on single resistance sampling, as shown in fig. 3, the using method comprises the following steps:
step 1: according to the turn-on sequence of a power switch tube of the three-phase bridge type inverter circuit, when the power switch tube is in a non-zero vector state, the power switch tube is used as a current sampling window;
step 2: when entering a current sampling window, acquiring a first contrast value, a second contrast value and a third contrast value;
and step 3: acquiring first phase current sampling time and forward delay time according to the second contrast value, the third contrast value, the dead time, the ringing time and the ADC starting time;
the calculation formula of the first phase current sampling time is as follows:
wherein, TmidIs a second contrast value, TminIs a third contrast value, TdeadIs the dead time;
and 4, step 4: when the sum of the first phase current sampling time and the forward delay time is between the second contrast value and the third contrast value, taking the sum of the first phase current sampling time and the forward delay time as the first bus current sampling time, and collecting the bus current through the first bus current sampling time;
when the sum of the first phase current sampling time and the forward delay time is not between the second contrast value and the third contrast value, taking the first bus current acquired by the previous current sampling window as the first bus current of the current sampling window;
and 5: acquiring second-phase current sampling time and sequential delay time according to the first contrast value, the second contrast value, the dead time, the ringing time and the ADC starting time;
the calculation formula of the second phase current sampling time is as follows:
wherein, TmidIs a second contrast value, TdeadIs the dead time;
step 6: when the sum of the second-phase current sampling time and the forward delay time is between a first contrast value and a second contrast value, taking the sum of the second-phase current sampling time and the forward delay time as second bus current sampling time, and collecting bus current through the second bus current sampling time pair;
and when the sum of the second-phase current sampling time and the forward delay time is not between the first contrast value and the second contrast value, taking the second bus current acquired by the previous current sampling window as the second bus current of the current sampling window.
In step 3 and step 5, the calculation formula of the sequential delay time is as follows:
Td＝Ton+TADCs/h+max(Tring+TADCdelay)
wherein, TonFor ADC start-up time, TADCs/hFor ADC sampling time, TringFor ringing time, TADCdelayDelay time is triggered for the ADC.
As shown in fig. 2, a sampling point diagram of phase current and bus current in a certain control period is shown. The conduction of the power switch tube is controlled by a timer, and when the counter value of the timer reaches a first contrast value T respectivelymaxSecond contrast value TmidThird contrast value TminAnd the corresponding power switch tube is controlled to be switched on and off. Dead time TdeadAnd switching the conduction state of the lower upper bridge arm and the lower bridge arm of the same bridge arm for fixed delay time.
According to a first contrast value TmaxSecond contrast value TmidThird contrast value TminDead time TdeadDelay calculating the first phase current sampling time T1Second phase current sampling time T2. And further calculating and judging the sampling time of the bus current and judging whether to sample. Due to the sampling time T of the first phase current1The sum of the sum and the lag time is less than a second contrast value TmidThen perform bus currentAnd (6) sampling. Due to the second phase current sampling time T1The sum of the sum and the lag time is less than a first contrast value TmaxThen no bus current sampling is performed.
Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations fall within the scope defined by the appended claims.
Claims (7)
1. A sampling circuit for obtaining bus current based on single resistance sampling is characterized by comprising: the system comprises a three-phase bridge inverter circuit, a three-phase stator winding of a permanent magnet synchronous motor and a bus current analytic circuit;
the three-phase bridge type inverter circuit is connected with a three-phase stator winding of the permanent magnet synchronous motor and is used for applying voltage signals to the three-phase stator winding of the permanent magnet synchronous motor and driving the motor to operate by changing the switching time sequence of a power switching device;
and the three-phase bridge type inverter circuit is connected with the bus current analytic circuit and is used for analyzing and sampling the bus current according to the conduction time sequence of a power switch tube of the three-phase bridge type inverter circuit.
2. The sampling circuit for obtaining the bus current based on the single resistance sampling as claimed in claim 1, wherein the bus current analysis circuit comprises a phase current analysis unit, a bus current analysis unit and a filtering operational amplifier unit; the phase current analyzing unit includes: a sampling resistor Rs and a filter capacitor C2; the bus current system analyzing unit includes: the resistor R11, the resistor R13 and the filter capacitor C1; the filtering operational amplifier unit comprises a resistor R12, a resistor R14, a resistor R21, a resistor R22 and an operational amplifier; one end of the sampling resistor Rs is connected with the negative electrode of the Udc, one end of the resistor R11 and one end of the filter capacitor C2 respectively, and the other end of the sampling resistor Rs is connected with the ground, one end of the resistor R13 and the other end of the filter capacitor C2 respectively; the other end of the resistor R11 is respectively connected with one end of the resistor R12 and one end of the filter capacitor C1; the other end of the resistor R13 is respectively connected with one end of the resistor R14 and the other end of the filter capacitor C1; the other end of the resistor 12 is connected with the inverting input end of the operational amplifier and one end of a resistor R21 respectively; the other end of the resistor R14 is respectively connected with the positive input end of the operational amplifier and one end of the resistor R22; the other end of the resistor R21 is connected with the output end of the operational amplifier; the other end of the resistor R22 is grounded.
3. The single-resistor sampling based bus current sampling circuit as claimed in claim 2, wherein the capacitance of the filter capacitor C1 is more than ten times the capacitance of the filter capacitor C2.
4. A bus current sampling method based on single resistance sampling is characterized by comprising the following steps:
step 1: determining a current sampling window according to the conduction time sequence of a power switch tube of the three-phase bridge type inverter circuit;
step 2: when entering a current sampling window, acquiring a first contrast value, a second contrast value and a third contrast value;
and step 3: acquiring first phase current sampling time and forward delay time according to the second contrast value, the third contrast value, the dead time, the ringing time and the ADC starting time;
and 4, step 4: when the sum of the first phase current sampling time and the forward delay time is between the second contrast value and the third contrast value, taking the sum of the first phase current sampling time and the forward delay time as the first bus current sampling time, and collecting the bus current through the first bus current sampling time;
when the sum of the first phase current sampling time and the forward delay time is not between the second contrast value and the third contrast value, taking the first bus current acquired by the previous current sampling window as the first bus current of the current sampling window;
and 5: acquiring second-phase current sampling time and sequential delay time according to the first contrast value, the second contrast value, the dead time, the ringing time and the ADC starting time;
step 6: when the sum of the second-phase current sampling time and the forward delay time is between a first contrast value and a second contrast value, taking the sum of the second-phase current sampling time and the forward delay time as second bus current sampling time, and collecting bus current through the second bus current sampling time pair;
and when the sum of the second-phase current sampling time and the forward delay time is not between the first contrast value and the second contrast value, taking the second bus current acquired by the previous current sampling window as the second bus current of the current sampling window.
5. The method for sampling the bus current based on the single-resistor sampling as claimed in claim 4, wherein the timing sequence of turning on the power switch tube of the three-phase bridge inverter circuit is used as a current sampling window when the state is a non-zero vector state.
6. The method for sampling the bus current based on the single resistance sampling according to claim 4, wherein in the step 3, the calculation formula of the first phase current sampling time is as follows:
wherein, TmidIs a second contrast value, TminIs a third contrast value, TdeadIs the dead time;
in step 5, the calculation formula of the second phase current sampling time is as follows:
wherein, TmidIs a second contrast value, TmaxIs a first contrast ratio, TdeadIs the dead time.
7. The method for sampling the bus current based on the single-resistor sampling as claimed in claim 4 or 6, wherein in the step 3 and the step 5, the calculation formula of the forward delay time is as follows:
Td＝Ton+TADCs/h+max(Tring+TADCdelay)
wherein, TonFor ADC start-up time, TADCs/hFor ADC sampling time, TringFor ringing time, TADCdelayDelay time is triggered for the ADC.
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Effective date of registration: 20240311 Address after: Development Building 2-207, Office Area 9, Dalian Economic and Technological Development Zone, Dalian City, Liaoning Province, 116000 yuan Patentee after: Dalian Yiyu Technology Co.,Ltd. Country or region after: China Address before: 230000 B-2704, wo Yuan Garden, 81 Ganquan Road, Shushan District, Hefei, Anhui. Patentee before: HEFEI LONGZHI ELECTROMECHANICAL TECHNOLOGY Co.,Ltd. Country or region before: China |
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| CP03 | Change of name, title or address |
Address after: 116000, 1st floor, No.10-13, Chengrun Wanjia, Dalian Economic and Technological Development Zone, Liaoning Province Patentee after: Liaoning Daxiang Group Co.,Ltd. Country or region after: China Address before: Development Building 2-207, Office Area 9, Dalian Economic and Technological Development Zone, Dalian City, Liaoning Province, 116000 yuan Patentee before: Dalian Yiyu Technology Co.,Ltd. Country or region before: China |