Disclosure of Invention
The invention provides a power amplifier bias circuit based on a GaAs HBT process, which can at least solve part of problems mentioned in the background technology.
In order to achieve the purpose, the invention adopts the following technical scheme: a power amplifier bias circuit based on a GaAs HBT process comprises a temperature compensation unit, a standard current mirror bias unit and a multi-order temperature coefficient voltage unit, wherein the standard current mirror bias unit comprises a copy circuit unit and an output circuit unit, and a first HBT tube HBT1 and a third HBT tube HBT3 are respectively arranged in the copy circuit unit and the output circuit unit; the multi-order temperature coefficient voltage unit is arranged in the replica circuit unit and comprises a plurality of HBT (heterojunction bipolar transistor) units which are sequentially connected in series and have collectors connected with bases, wherein the emitter output end of the last HBT unit is connected with the collector of the first HBT unit 1, and the emitter of the first HBT unit 1 is grounded;
be provided with power Vc in the temperature compensation unit, the reference current of its output is through HBT pipe HBTA to first HBT pipe HBT1 back ground connection of establishing ties in proper order all the way, and another way exports bias current behind third HBT pipe HBT 3.
Furthermore, the temperature compensation unit comprises a diode and a resistor R1, the diode is connected between a power supply and the resistor, one path of current of the power supply end is grounded after passing through the diode and the resistor, and the other path of current of the power supply end is connected with the standard current mirror bias unit after passing through the diode and is used for providing reference current for the standard current mirror bias unit.
Furthermore, the replica circuit unit further comprises a resistor R2, one end of the resistor R2 is used as a current input of the replica circuit unit, and the other end of the resistor R2 is connected with a collector of a first HBT tube HBTA in the multi-step temperature coefficient unit.
Further, the collector of the third HBT tube HBT3 is externally connected with a reference voltage, and the reference voltage is used for turning on the third HBT tube HBT 3.
Further, the standard current mirror bias unit further comprises a second HBT tube HBT2, the other end of the resistor R2 is connected to the base of the second HBT tube HBT2, the emitter output terminal of the second HBT tube HBT2 is connected to the base of the first HBT tube HBT1, and the collector of the second HBT tube HBT2 is externally connected to a reference voltage.
Furthermore, the output circuit unit further includes a capacitor C, and the other path of the reference current output by the temperature compensation unit is grounded through the capacitor C.
Further, the emitter output terminal of the third HBT3 is connected to a power amplifier unit including a power amplifier, an input impedance matching unit connected to the input terminal of the power amplifier, and an output impedance matching unit connected to the output terminal of the power amplifier.
Furthermore, the input end of the input impedance matching unit and the output end of the output impedance matching unit are respectively connected with a blocking capacitor.
Further, the input impedance matching unit and the output impedance matching unit are both LC impedance matching circuits.
Furthermore, a power supply Vd is externally connected to the collector of the power amplifier, and a choke inductor L0 is connected between the collector of the power amplifier and the power supply Vd.
The invention has the beneficial effects that:
(1) the bias circuit provided by the invention has the advantages that the multi-order temperature coefficient voltage unit is arranged in the replica circuit unit of the standard current mirror bias unit, the circuit is simplified, and the on-chip integration is facilitated.
(2) According to the invention, the work of the second HBT tube HBT2 and the transistor at the output side of the current mirror is controlled through the external reference voltage, the collector of the transistor is not electrified and is not conducted, and the power consumption in use is reduced.
(3) The invention reduces the shunt of the base electrode current of the transistor at the copying side to the reference current by changing the basic current mirror structure and utilizing the current amplification effect of the second HBT tube HBT2, thereby improving the transmission precision between the output bias current and the input reference current and outputting stable bias current.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Examples
As shown in fig. 1 to 12, the present invention provides a power amplifier bias circuit based on a GaAs HBT process, including a temperature compensation unit, a standard current mirror bias unit, and a multi-stage temperature coefficient voltage unit, where the standard current mirror bias unit includes a replica circuit unit and an output circuit unit, and a first HBT transistor HBT1 and a third HBT transistor HBT3 are respectively disposed in the replica circuit unit and the output circuit unit; the multi-order temperature coefficient voltage unit is arranged in the copying circuit unit and comprises a plurality of HBT tubes HBTA 0-HBTAi which are sequentially connected in series and are connected with a collector electrode and a base electrode, wherein the emitter output end of the last HBT tube HBTAi is connected with the collector electrode of the first HBT tube HBT1, and the emitter of the first HBT tube HBT1 is grounded.
As shown in fig. 1 and 2, a power supply Vc is provided in the temperature compensation unit, one path of output reference current passes through HBT tubes HBTA 0-HBTAi connected in series in sequence, reaches a first HBT tube HBT1, is grounded, and the other path of output reference current passes through the base of a third HBT tube HBT3, and then outputs a bias current Ibias from the emitter; namely, one path of the reference current output by the temperature compensation unit is transmitted to the copy circuit comprising the multi-stage temperature coefficient voltage unit, the other path is transmitted to the output circuit unit, and finally, the output circuit unit outputs stable bias current Ibias.
The invention provides a small-size bias circuit which can realize multi-order temperature compensation and improve transmission precision, and takes the influence of self-heating effect of a power amplifier chip based on GaAs HBT technology on the performance of a current source bias circuit connected with a power amplifier when the power amplifier chip works, namely the self-heating effect of the HBT causes the image precision and the temperature characteristic of the bias circuit to be poor.
According to the temperature characteristic of the HBT tube, when the temperature inside the chip is increased, the R of the HBT tubebeThe temperature compensation principle of the multi-order temperature coefficient voltage unit provided by the invention is as follows:
as shown in fig. 2, the base and collector of the HBT transistors HBT 0-HBTAi in the multi-step temperature coefficient voltage unit are shorted to form a plurality of series-connected diodes (i is not less than 0 and is an integer), when the temperature inside the chip rises, the voltage drop across the diodes decreases due to the temperature characteristics of the diodes, the current on the series branch decreases, and the current rise caused by the thermoelectric positive feedback of the collector of the first HBT transistor HBT1 is further compensated, so that the collector current of the first HBT transistor HBT1 decreases.
As a further improvement of the invention, the temperature compensation unit comprises a diode and a resistor R1, the diode is connected between a power supply Vc and a resistor R1, one path of current of a power supply end passes through the diode and the resistor R1 and then is grounded, and the other path of current passes through the diode and then is connected with the input end of the standard current mirror bias unit for providing reference current for the standard current mirror bias unit.
The ground resistor R1 is used for dividing voltage, the reference current output by the temperature compensation unit can be adjusted by changing the value of the resistor R1, and further, when the temperature compensation unit senses the temperature rise in the chip, the voltage drop across the diode therein is reduced according to the temperature characteristics of the diode, so that the reference current output by the temperature compensation unit is also reduced.
In order to facilitate the control of the magnitude of the bias current Ibias output by the standard current mirror bias unit, the replica circuit unit further comprises a resistor R2, one end of the resistor R2 is used as the current input of the replica circuit unit, and the other end is connected with the collector of the first HBT transistor HBTA0 in the multi-stage temperature coefficient unit. The resistance of the resistor R2 is adjustable, when the resistance of the resistor R2 is increased, the bias voltage generated by the replica circuit unit at the bias point is reduced, the bias current Ibias output by the output circuit unit is also reduced, and therefore the magnitude of the output bias current Ibias is accurately controlled by changing the resistance of the resistor R2.
Further, the collector of the third HBT transistor HBT3 is externally connected to a reference voltage Vref, and the reference voltage Vref is used for turning on the third HBT transistor HBT3 and controlling the operating state thereof. When the reference voltage Vref is greater than the conduction voltage of the third HBT tube HBT3 and the base current on the third HBT tube HBT3 is increased to a certain degree, the third HBT tube HBT3 is conducted and works in a saturation region, the output circuit unit works, and the bias current Ibias is output; when reference voltage Vref is zero or less than the on-voltage of third HBT tube HBT3, third HBT tube HBT3 is turned off, that is, third HBT tube HBT3 does not operate regardless of its base current.
As a further limitation of the present invention, the standard current mirror bias unit further includes a second HBT transistor HBT2, the other end of resistor R2 is simultaneously connected to the base of second HBT transistor HBT2, the emitter output of second HBT transistor HBT2 is connected to the base of first HBT transistor HBT1, and the collector of second HBT transistor HBT2 is externally connected to a reference voltage Vref. Preferably, second HBT tube HBT2 has the same characteristics as first HBT tube HBT1, and when the circuit is operated, second HBT tube HBT2 drives first HBT tube HBT1 to operate in a saturation region, so that emitter output terminal of first HBT tube HBT1 outputs a stable amplified current.
Specifically, in a conventional current mirror structure, in order to ensure that a transistor on a replica side operates in a saturation region and output a stable mirror current, a base and a collector of the transistor on the replica side are usually shorted, so that the base current and the collector current are equal, and a quiescent operating point of the base is provided, so that a stable value of current to voltage (Vgs) is provided.
Therefore, in the present embodiment, the current amplification effect of second HBT tube HBT2 is utilized to reduce the shunt of the base current of first HBT tube HBT1 to the reference current, thereby improving the transmission accuracy between the output bias current and the input reference current, and outputting stable bias current Ibias.
In order to enable the output circuit unit to output stable bias current, the output circuit unit further comprises a grounding capacitor C, and the other path of the reference current output by the temperature compensation unit is grounded through the capacitor C.
As a preferred embodiment of the present invention, the emitter output terminal of third HBT tube HBT3 is connected to a power amplifier unit including a power amplifier, an input impedance matching unit connected to the input terminal of the power amplifier, and an output impedance matching unit connected to the output terminal of the power amplifier. The input impedance matching unit and the output impedance matching unit are used for ensuring effective receiving and transmitting of the power amplifier unit, and both are LC impedance matching circuits, wherein the input impedance matching unit comprises an inductor L1 and a capacitor C2, and the output impedance matching unit comprises an inductor L2 and a capacitor C3.
The power amplifier unit further comprises a blocking capacitor C1 and a blocking capacitor C4, a radio-frequency power signal is input from a radio-frequency signal input end RFin and is connected with the base electrode of the power amplifier HBT _ PA through the blocking capacitor C1 and the input impedance matching unit, and an amplified signal output by the collector electrode of the power amplifier HBT _ PA passes through the output impedance matching unit and the blocking capacitor C4 and is output from a radio-frequency signal output end RFout.
The emitter of the power amplifier HBT _ PA is grounded, the collector of the power amplifier HBT _ PA is externally connected with a voltage Vd through a choke inductor L0, and the inductor L0 reduces current surge instantaneously suffered by the power amplifier HBT _ PA after the collector of the power amplifier HBT _ PA is electrified, so that high-frequency noise of a power line is suppressed, and current is stabilized.
Based on the design of the multi-order temperature coefficient voltage unit, the invention also provides three embodiments, as shown in fig. 3, 4 and 5, which are a first-order temperature compensation bias circuit, a second-order temperature compensation bias circuit and a third-order temperature compensation bias circuit, respectively. Furthermore, in the temperature drift simulation test, the values of various components and the characteristics of transistors in the multi-stage temperature compensation bias circuit are required to be consistent, wherein the power supply Vc is 5V, the reference voltage Vref is 2V, R1 is 2K Ω, R2 is adjustable in the range of 1.6K Ω to 2.4K Ω, and C is adjustable between 0.3pF and 1 pF.
The first embodiment is as follows:
as shown in fig. 3, the first-order temperature compensation bias circuit does not include a multi-stage temperature coefficient voltage unit, the entire bias circuit is temperature compensated by only using the temperature compensation unit and the thermoelectric negative feedback characteristic of the collector current specific to the HBT tube, the base and the emitter of the second HBT tube HBT2 are connected to the collector and the base of the first HBT tube HBT1, one path of the current flowing through the resistor R2 enters the base of the second HBT tube HBT2, and the other path of the current enters the collector of the first HBT tube HBT 1.
Further, as shown in fig. 9, a simulation test performed by an application circuit (fig. 6) of the first-order temperature compensation bias circuit is performed, when the bias circuit has a power supply Vc of 5V, a reference voltage Vref of 2V, R1 of 2K Ω, R2 of 2.1K Ω, and C of 0.7pF, and the internal temperature of the control chip changes, the output bias current fluctuates greatly.
Example two:
as shown in fig. 4, the second-order temperature compensation bias circuit includes a multi-stage temperature coefficient voltage unit, and an HBT transistor HBTA0 having a collector and a base connected to each other is provided in the multi-stage temperature coefficient voltage unit, so that the bias circuit is temperature compensated by using the temperature characteristics of the diode.
Further, as shown in fig. 10, in a simulation test performed by an application circuit (fig. 7) of the second-order temperature compensation bias circuit, when the bias circuit has a power supply Vc of 5V, a reference voltage Vref of 2V, R1 of 2K Ω, R2 of 2.1K Ω, and C of 0.7pF, the fluctuation of the output bias current range is smaller than that of the first-order temperature compensation bias circuit after the internal temperature of the control chip changes.
Example three:
as shown in fig. 5, the third-order temperature compensation bias circuit includes a multi-order temperature coefficient voltage unit, and HBT transistors HBTA0 and HBTA1 are disposed in the multi-order temperature coefficient voltage unit, and are connected in series in sequence, and a collector and a base are connected, and the bias circuit is temperature compensated by using the temperature characteristics of the two diodes.
Further, as shown in fig. 11, in the simulation test performed by the application circuit (fig. 8) of the third-order temperature compensation bias circuit, when the power supply Vc is 5V, the reference voltage Vref is 2V, R1 is 2K Ω, R2 is 2.1K Ω, and C is 0.7pF, the fluctuation of the output bias current range is further reduced after the internal temperature of the control chip is changed.
In the three embodiments, the internal temperature of the chip is changed under temperature compensation of different orders, and a simulated temperature drift curve pair is shown in fig. 12, for example, as the order increases, the fluctuation range of the bias current output by the bias circuit becomes smaller and smaller.
The invention provides a power amplifier bias circuit based on a GaAs HBT process, which can be used for controlling a temperature drift range by designing different orders according to chip area requirements, current drift requirements and temperature changes, and has the design advantages of simplicity, high efficiency and miniaturization. From the simulation result, the temperature drift curve of the current is improved in multiple stages, the temperature change range is obviously reduced, and the design needs to be carried out by considering the layout area and the actual temperature deviation during the comprehensive design.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.