CN113972837B - Constant on-time controller and buck regulator device using the same - Google Patents

Abstract

The present invention discloses a constant on-time controller and a buck regulator device using the controller. A constant on-on (COT) controller consists of: a voltage divider circuit that generates a feedback voltage based on the output voltage of the buck regulator; a current ripple extraction circuit that senses the current in the inductor of the buck regulator and generates The extracted ripple current; the one-shot timer, outputs the COT control signal according to the regulated input voltage of the buck regulator and the output voltage; the comparison circuit, according to the reference voltage signal, the feedback voltage and the extracted ripple The comparison result is output by the wave current; the logic circuit generates a control signal to the step-down regulator according to the comparison result and the constant on-time control signal. The buck regulator compares the DC component sensed in the current cycle with the sensed waveform in the next cycle to generate the extracted ripple current.

Description

Constant on-time controller and buck regulator device using the same

technical field

The present invention relates to a buck regulator, and more particularly to a constant on-time (COT) controller used in a buck regulator device.

Background technique

COT controllers have been widely used in buck regulator devices, which can use a regulator to output voltage ripple, and thereby start when the regulated output voltage (regulator output voltage) drops to a reference voltage A conduction time (on-time). Please refer to FIG. 1A , which illustrates a current waveform of a switch and the corresponding operation. As shown in FIG. 1A , the on-time (ie, the period during which the corresponding logic level is high) can be terminated by the circuit in response to some condition, such as a reference regulator input voltage level. During the on-time of the pulse, electrical energy is supplied from the regulated input voltage to the regulated output voltage directly through the electronic switching means. Similarly, when the pulse exhibiting the on-time terminates, the energy stored in the inductor is supplied to regulate the output voltage.

A buck regulator device with a COT controller typically includes circuitry that adjusts the on-time length of the pulse by reference to the regulated input voltage and regulated the output voltage, so that a nearly constant frequency can be exhibited even as the duty cycle changes . The regulated output voltage ripple (ripple) is affected by the ripple current flowing through the inductor of the equivalent series resistance (ESR) of the output capacitor and has a large range of variation. If a multilayer ceramic capacitor (MLCC) with a small equivalent series resistance is used, the voltage ripple from the inductor will also be relatively small. This creates two major problems with COT controllers, namely instability and susceptibility to noise.

In general, COT controller devices benefit from self-oscillating, simple structure, high efficiency at light load, and fast load transient response. However, the COT controller device encounters some bottlenecks, such as the jitter phenomenon caused by low noise immunity, serious Electromagnetic Interference (EMI) problems, the demand for equivalent series resistance, and poor DC regulation (DC regulation). Therefore, there is a real need for a novel design to solve the above problems.

Contents of the invention

It is an object of the present invention to provide a constant on-time (COT) controller for a buck regulator device to increase the noise margin of the COT controller while maintaining a fast load transient response (noise margin).

Another object of the present invention is to provide a COT controller used in a buck regulator device, so as to reduce the sensitivity of the COT controller to noise, such as greatly reducing non-ideal jitter.

Another object of the present invention is to provide a device for a buck regulator, which includes a buck regulator and a COT controller electrically connected to the buck regulator, to solve the problems of instability and susceptibility to noise .

In order to at least achieve the above object, an embodiment of the present invention provides a COT controller, which includes a voltage divider circuit, a current ripple extraction circuit, a one-shot conduction timer, a comparison circuit, and a logic circuit. The voltage dividing circuit is used for generating a feedback voltage according to an output voltage of a buck regulator. The current ripple extraction circuit is used to sense the current from the inductor of the buck regulator, and generate an extracted ripple current (extracted ripple) without a DC component (DC component) according to the sensed sense current. current). The one-shot on-timer is used for outputting a COT control signal according to the regulated input voltage and the output voltage of the buck regulator. The comparison circuit is electrically connected to the voltage divider circuit and the current ripple extraction circuit, and is used for outputting a comparison result according to a reference voltage signal, the feedback voltage and the extracted ripple current. The logic circuit is electrically connected to the one-shot on-timer and the comparison circuit, and is used for generating a control signal to the step-down regulator according to the comparison result and the constant-on-time control signal. The on-time of the buck regulator is determined according to the constant on-time control signal, and the off-time of the buck regulator is determined according to the comparison result; and the current ripple The wave extraction circuit detects the DC component (DC component) of the sensing waveform in the current cycle at the beginning of the off time of the buck regulator, and compares the DC component sensed in the current cycle with the next cycle of the current cycle The sense waveform in is compared to generate the extracted ripple current.

Furthermore, another embodiment of the present invention provides a buck regulator device including a COT controller. The COT controller includes a voltage divider circuit, a current ripple extraction circuit, a one-shot conduction timer, a comparison circuit, and a logic circuit. The voltage dividing circuit is used for generating a feedback voltage according to an output voltage of a step-down regulator. The current ripple extraction circuit is used for sensing a current from an inductor of the buck regulator, and generating an extracted ripple current without a DC component according to the sensed sensing current. The one-shot on-timer is used for outputting a COT control signal according to the regulated input voltage and the output voltage of the buck regulator. The comparison circuit is electrically connected to the voltage divider circuit and the current ripple extraction circuit, and is used for outputting a comparison result according to a reference voltage signal, the feedback voltage and the extracted ripple current. The logic circuit is electrically connected to the one-shot on-timer and the comparison circuit, and is used for generating a control signal to the step-down regulator according to the comparison result and the constant-on-time control signal. The turn-on time of the step-down regulator is determined according to the constant on-time control signal, and the turn-off time of the step-down regulator is decided according to the comparison result; and the current ripple extraction circuit in the step-down regulator The beginning of the off time detects the DC component of the sensing waveform in the current cycle, and compares the DC component sensed in the current cycle with the sensing waveform in the next cycle of the current cycle to generate the extracted pattern wave current.

According to an embodiment of the present invention, the one-shot timer includes a capacitor, a resistor, and a hysteresis comparator. The capacitor is electrically connected to the ground terminal, and the resistor is connected in series with the capacitor, and the resistor is used for receiving a first voltage on the inductor, wherein the first voltage varies with the regulated input voltage. The hysteresis comparator is electrically connected to a connection end of the capacitor and the resistor, and is used for comparing a second voltage between the connection end of the capacitor and the resistor with the output voltage to generate a hysteresis comparison result signal, as the constant on-time control signal.

According to an embodiment of the present invention, the logic circuit is an RS flip-flop (RS flip flop), and a setting terminal of the RS flip-flop is electrically connected to a comparator and the one-shot conduction timer to receive The comparison result signal and an inversion of the constant on-time control signal, and a reset terminal of the RS flip-flop are electrically connected to the one-shot on-timer to receive the constant on-time control Signal.

According to an embodiment of the present invention, the one-shot timer includes a capacitor, a current source, and a voltage comparator. The current source is electrically connected to a ground terminal through the capacitor and generates a current proportional to the regulated input voltage to form a first voltage across the capacitor. The voltage comparator is electrically connected to a connection end of the capacitor and the current source, and is used for comparing the output voltage with the first voltage to output the constant on-time control signal.

According to an embodiment of the present invention, the COT controller further includes a ramp generator electrically connected to the comparison circuit for generating a ramp voltage signal, wherein the comparison circuit is based on the feedback voltage, the reference The voltage signal, the ramp voltage signal and the extracted ripple current are used to output the comparison result.

According to an embodiment of the present invention, the current ripple extraction circuit includes a current sense amplifier, a sample-and-hold circuit, and a subtractor. The current sense amplifier is used to sense the current from the inductor of the step-down regulator to obtain the sensing current; the sample/hold circuit is electrically connected to the current sense amplifier for controlling The current is sampled and the measured DC component is held; the subtractor is electrically connected to the current sense amplifier and the sample and hold circuit, and is used for subtracting the sensed waveform in the next cycle of the current cycle The measured DC component in the current cycle to generate the extracted ripple current.

According to an embodiment of the present invention, the comparison circuit includes an amplifier, a capacitor, an adder and a modulator. The amplifier is used to receive the reference voltage signal and the feedback voltage to generate an adjusted reference voltage signal; the capacitor has two terminals electrically connected to the amplifier and the ground respectively; the adder is electrically connected to the amplifier for Subtracting the regulated reference voltage signal from a first voltage signal associated with the extracted ripple current to generate a second voltage signal; the modulator (modulator) is electrically connected to the adder for according to the second The voltage signal and the feedback voltage are used to generate the comparison result.

According to an embodiment of the present invention, the comparison circuit includes an adder and a modulator. The adder is used to subtract the reference voltage signal from the extracted ripple current to generate a second voltage signal; the modulator is electrically connected to the adder, and is used to generate a second voltage signal according to the second voltage signal and the feedback voltage to generate this comparison.

According to an embodiment of the present invention, the voltage dividing circuit includes a plurality of resistors connected in series.

In summary, the present invention provides enhanced signal margins and improved load transient response for a COT controller used in a buck regulator device, and in some embodiments can also eliminate or mitigate non-ideal jitter phenomenon, whereby the COT controller can further have improved stability and noise immunity.

Description of drawings

FIG. 1A illustrates a current waveform of a switch and the corresponding operation.

FIG. 1B is a circuit diagram of a buck regulator device according to an embodiment of the present invention.

FIG. 2A is a circuit diagram of a one-shot on-timer according to an embodiment of the invention.

FIG. 2B is a circuit diagram of a one-shot timer according to another embodiment of the invention.

FIG. 3 is a circuit diagram of a current ripple extraction circuit according to an embodiment of the invention.

FIG. 4A is a circuit diagram of a comparison circuit according to an embodiment of the invention.

FIG. 4B is a circuit diagram of a comparison circuit according to another embodiment of the present invention.

FIG. 5A is a waveform diagram of signals of a buck regulator device according to an embodiment of the present invention.

FIG. 5B is a less ideal modulation scenario of the scheme shown in FIG. 5A, illustrating a scenario where the DC value of the sense current is detected at the end of the off-time period.

Fig. 5C illustrates a comparison between the schemes of Fig. 5A and Fig. 5B.

【Symbol Description】

100: Buck regulator device

11: COT controller

12: Buck Regulator

M1, M2: Transistor

122: Electronic switchgear

V _IN: Adjust the input voltage

V _OUT: Regulated input voltage

R _CO : output resistor

C _O : output capacitor

I _SW : current

111: Current ripple extraction circuit

112: Voltage divider circuit

113: Comparison circuit

114: One-shot conduction timer

115: RS type flip-flop

116: Ramp wave generator

V _COT : voltage signal

R _FBH , R _FBL : Resistors

FB: feedback voltage

L _X : Inductor

R _LOAD : load

V _REF : Reference voltage signal

21: Hysteresis comparator

R ₁ : Resistor

C ₁ , C ₂ : Capacitors

GND: ground terminal

31: Current sense amplifier

32: Sample and hold circuit

33: Subtractor

41: Amplifier

42: Adder

43: modulator

V _REF ': Adjusted reference voltage signal

V _SW : Voltage

R _CO : resistance value

Frequency: f _sw

V _REFX : Compare voltage signal

Detailed ways

In order to make it easier for those skilled in the art to understand the purpose, features and effects of the present invention, the present invention provides embodiments and drawings for detailed description.

An embodiment of the present invention provides a buck regulator device, including a constant on-time (constant on-time, COT) controller (such as the COT controller 11 in FIG. 1B ) and a step-down voltage electrically connected to the COT controller. regulator (such as the buck regulator 12 in FIG. 1B ), wherein a current ripple extraction circuit of the COT controller senses the equivalent series resistance (ESR) flowing through an output capacitor from the inductor (the used to sense the low-level current of the buck regulator) to remove the direct current (DC) component of the sensed current, thereby generating an extracted ripple current, and generating a ripple voltage signal based on the extracted ripple current A comparator to the COT controller to increase the noise margin of the COT controller while maintaining fast load transient response.

In addition, in another embodiment of the present invention, the ramp generator is used in the COT controller to provide a ramp voltage signal to the comparator of the COT controller, so that the sensitivity of the COT to noise can be reduced, and the jitter phenomenon can also be substantially reduced. In brief, the COT controller of the buck regulator device provided above can solve the problems of low stability and sensitivity to noise.

Please refer to FIG. 1B. FIG. 1B is a circuit diagram of a buck regulator device according to an embodiment of the present invention. The buck regulator device 100 includes a COT controller 11 and a buck regulator 12 electrically connected to the COT controller 11. However, The COT controller 11 is not limited to constant on-time use. The on and off of the buck regulator 12 is controlled by the COT controller 11 . When the buck regulator 12 is turned on, the COT controller 11 transmits the energy of regulating the input voltage V _IN to regulating the input voltage V _OUT through the electronic switching device 122 including transistors M1 and M2 . For example, the above operations can be realized by turning on the transistor M1 and turning off the transistor M2. When the transistor M1 is off and the transistor M2 is on, the energy stored in the inductor L _X is supplied to regulate the output voltage V _OUT . Please note that the transistor M1 or M2 used in the present invention can be replaced by virtually any type of switching element.

The COT controller 11 receives the regulated output _voltage V _OUT and senses the current I _SW on the inductor L _X , which then flows through the equivalent series resistance of an output capacitor (ie, the series output resistor R _CO and The total resistance of the output capacitor C _O ), and the current I _SW is also the low side (low side) current of the buck regulator 12 . The COT controller 11 generates a feedback voltage FB according to the regulated output voltage V _OUT , and generates extracted ripple current according to the sensing current. The COT controller 11 can determine the turn-off time of the buck regulator 12 according to the feedback voltage FB and the extracted ripple current (that is, the period when the buck regulator 12 is turned off), and adjust the input voltage V _IN and adjust the The output voltage V _OUT determines the conduction time of the buck regulator 12 .

In the related art, since the extracted ripple current has a DC component of the current _ISW- , the DC component of the current _ISW will be amplified in the COT controller 11, resulting in an unsatisfactory noise boundary of the COT controller 11, resulting in COT control regulator 11 cannot precisely control the turn-off time of buck regulator 12. As a result, the above-mentioned DC component will bring more voltage drop or voltage overshoot to the load transient, which means that the load transient response will be deteriorated. This phenomenon will be further described later in the embodiment of FIG. 5C . Besides, the non-ideal jitter phenomenon in the related art is also a problem to be solved.

Details about the buck regulator 12 are described below. The buck regulator 12 includes a pre-driving circuit 121 (which can be replaced by a logic circuit), transistors M1 and M2, inductor _Lx , output capacitor C _O and the output resistor R _CO , wherein the output load R _LOAD can be electrically connected at the regulated output voltage V _OUT . The output capacitor C _O is electrically connected to the output resistor R _CO in series, wherein the output resistor R _CO is electrically connected to the ground terminal through the output capacitor C _O.

The regulated output voltage V _OUT is electrically connected to the output resistor R _CO and the inductor L _X , and the electronic switching device 122 includes at least transistors M1 and M2 (although they are drawn as NMOS transistors in this embodiment, they are also Can be replaced by PMOS). The gates of the transistors M1 and M2 are electrically connected to the pre-driver circuit 121, the drain of the transistor M1 is electrically connected to the regulated input voltage V _IN , the source of the transistor M1 is electrically connected to the inductor _LX and the drain of the transistor M2, and the transistor M1 The source of M2 is electrically connected to the ground terminal. In other words, the transistors M1 and M2 are electrically connected to the COT controller 11 so that the COT controller 11 can sense the current I _SW .

The pre-driver circuit 121 is used for receiving a control signal from the COT controller 11 and outputting a gate control signal to the gates of the transistors M1 and M2 according to the control signal. When the transistor M1 is turned on (at this time, the transistor M2 is turned off), the entire buck regulator 12 will thus be turned on, so that the power for regulating the input voltage V _IN is transferred to the regulating output voltage V _OUT (that is, the current I _SW will be increase); and when transistor M2 is turned on (transistor M1 is turned off at this time), the entire buck regulator 12 will thus be turned off, so that the electric energy stored in the inductor L _X will be provided to regulate the output voltage V _OUT (the current I _SW will therefore drop).

The details of the COT controller 11 are as follows. The COT controller 11 includes a current ripple extraction circuit 111, a voltage divider circuit 112, a comparison circuit 113, a one-shot conduction timer 114, and an RS flip-flop (RS flip flop) 115 and a ramp generator 116. The current ripple extraction circuit 111 is electrically connected to the drain of the transistor M2 and is also electrically connected to the comparison circuit 113 . The voltage dividing circuit 112 is electrically connected to the regulated output voltage V _OUT and the comparison circuit 113 . The ramp generator 116 is electrically connected to the comparison circuit 113 . The input node of the comparison circuit 113 is electrically connected to the reference voltage signal V _REF , and the output node of the comparison circuit 113 is electrically connected to the RS flip-flop 115 . The RS flip-flop 115 is electrically connected to the pre-driver circuit 121 and the one-shot timer 114 .

The current ripple extraction circuit 111 senses the current _ISW flowing through the equivalent series resistance of the output capacitor on the inductor _LX (that is, the lower side current of the buck regulator 12) to generate a sense current, and removes the sense current. The DC component of the current is measured to generate an extracted ripple current (this feature is described later). Next, the current ripple extraction circuit 111 generates a ripple voltage signal to the comparison circuit 113 according to the extracted ripple current.

The ramp generator 116 is used to generate a ramp voltage signal to the comparison circuit 113 , wherein the ramp voltage signal and the ripple voltage signal are combined into a voltage signal V _COT . As mentioned above, the ramp voltage signal is used to reduce the jitter phenomenon caused by noise. If the jitter phenomenon itself is not serious, the use of the ramp voltage signal can also be omitted.

The voltage dividing circuit 112 includes resistors R _FBH and R _FBL , wherein the resistor R _FBH is electrically connected to the regulated output voltage V _OUT , the comparison circuit 113 and the resistor R _FBL , and the resistor R _FBL is electrically connected to the ground. The voltage dividing circuit 112 generates a feedback voltage FB across the resistor R _FBL according to the adjusted output voltage V _OUT , and the feedback voltage FB is provided to the comparison circuit 113 .

The comparison circuit 113 generates an addition result according to the addition of the voltage signal V _COT , the feedback voltage FB and the reference voltage signal V _REF , and outputs the addition result to the setting terminal of the RS-type flip-flop 115 (marked as "S" in the figure "). For example, when the addition result of the voltage signal V _COT and the feedback voltage FB is less than the reference voltage signal V _REF , the RS flip-flop 115 can output a control signal with a high logic level to the pre-driver circuit 121, so that the pre-driver circuit The gate control signal generated by 121 can turn on the transistor M1 and turn off the transistor M2. That is, when the addition result of the voltage signal V _COT and the feedback voltage FB is smaller than the reference voltage signal V _REF , the off-time of the buck regulator 12 can be terminated.

The one-shot on-timer 114 receives the regulated input voltage V _IN and the regulated output voltage V _OUT , and generates the on-time control signal T _ON according to the regulated input voltage V _IN and the regulated output voltage V _OUT (as shown in FIG. 2A and FIG. 2B shown) and an inversion signal of the on-time control signal T _ON . On-time control signal T _ON and inverted signal will be respectively input to a reset terminal (marked as "R" in the figure) and the set terminal of the RS-type flip-flop 115 .

When the on-time control signal T _ON is at a low logic level, the RS flip-flop 115 will output a control signal with a high logic level to the pre-driver circuit 121, and the gate control signal generated by the pre-driver circuit 121 will be turned on. transistor M2 and turns off transistor M1. That is, when the on-time control signal T _ON is at a low logic level, the on-time of the buck regulator 12 is terminated. Thereby, the COT controller 11 can control the turn-on time and turn-off time of the buck regulator 12 .

Please note that the implementation of the COT controller 11 in FIG. 1B is not a limitation of the present invention. Those skilled in the art can understand that some variations that can achieve the functions of the COT controller 11 of the present invention also fall within the scope of the present invention. For example, in a variation, the RS-type flip-flop 115 can be replaced by another type of flip-flop.

Please refer to FIG. 1B and FIG. 2A, FIG. 2A is a circuit diagram of a one-shot timer according to an embodiment of the present invention, wherein FIG. 2A can be an example of the one-shot timer 114 in FIG. 1B, but the present invention does not This is not the limit. The one-shot timer 114 includes a hysteretic comparator 21 , a resistor R ₁ and a capacitor C ₁ . The resistor _R1 is electrically connected to the voltage V _SW at the drain of the transistor M1 and the source of the transistor M2 (ie, the voltage at one end of the inductor _LX ), and is further electrically connected to the ground GND through the capacitor _C1 . The positive input terminal of the hysteresis comparator 21 is electrically connected to the regulated output voltage V _OUT , and the negative input terminal of the hysteresis comparator 21 is electrically connected to the capacitor C ₁ and the resistor R ₁ .

The hysteresis comparator 21 compares the voltage across the capacitor C ₁ with the regulated output voltage V _OUT to output a hysteresis comparison result signal as the on-time control signal T _ON . The voltage V _SW varies with the regulated input voltage V _IN , the voltage across the capacitor C ₁ is generated according to the voltage V _SW , and the on-time control signal T _ON is determined according to the voltage V _SW and the regulated output voltage V _OUT . That is to say, the conduction time of the buck regulator 12 is determined according to the regulated input voltage V _IN and the regulated output voltage V _OUT .

Please refer to FIG. 1B and FIG. 2B together. FIG. 2B is a circuit diagram of the one-shot timer 114 according to another embodiment of the present invention, but the present invention is not limited thereto. The one-shot on timer 114 includes a current source 22 , a voltage comparator 23 and a capacitor C _{T — ON} . The current source 22 is electrically connected to a supply voltage VDD, and is electrically connected to the ground terminal through the capacitor _{CT_ON} . The positive input terminal of the voltage comparator 23 is electrically connected to the current source 22 and the capacitor C _{T_ON} , and the negative input terminal of the voltage comparator 23 is electrically connected to the regulated output voltage V _OUT .

The current source 22 generates a current through the capacitor C _{T_ON} according to the regulated input voltage V _IN , wherein the current is proportional to the regulated input voltage V _IN . The current flowing through the capacitor C _{T_ON} forms a voltage V _C across the capacitor C _{T_ON} , and the voltage comparator 23 compares the voltage V _C with the regulated output voltage V _OUT to generate a comparison result signal as the on-time control signal T _ON . Therefore, the on-time of the buck regulator 12 is determined according to the regulated input voltage V _IN and the regulated output voltage V _OUT .

Next, please refer to FIG. 1B and FIG. 3 together. FIG. 3 is a circuit diagram of a current ripple extraction circuit according to an embodiment of the present invention, wherein FIG. 3 is an example of the current ripple extraction circuit 111 in FIG. 1B , but this The invention is not limited thereto. The current ripple extraction circuit 111 includes a current sense amplifier 31 (marked as CS_AMP), a sample-and-hold circuit 32 (marked as S/H) and a subtractor 33 . One input terminal of the current sense amplifier 31 is electrically connected to the drain of the transistor M1 and the inductor L _X to receive the low-side current of the buck regulator 12 (that is, the current I _SW ), and the other end of the current sense amplifier 31 An input terminal is electrically connected to the ground terminal. The output terminal of the current sense amplifier 31 is electrically connected to the subtractor 33 and the sample-and-hold circuit 32 , and the subtractor 33 is electrically connected to the sample-and-hold circuit 32 and the comparator 113 .

The current sense amplifier 31 is used to sense the current _ISW , wherein the sense current is generated by the current sense amplifier 31 and sent to the subtractor 33 and the sample-and-hold circuit 32 (marked as S/H in FIG. 3 ). . The DC component of the sensing current can be sampled and held by the sample-and-hold circuit 32. In addition, the subtractor 33 can subtract the held DC component (that is, the DC component of the previously sensed current) from the sensing current to generate an extracted ripple current, and the extracted ripple current will be output as a ripple voltage signal. The subtractor 33 can further add the ramp voltage signal from the ramp generator 116 to the ripple voltage signal to form a voltage signal V _COT at the input terminal of the comparison circuit 113 .

Next, please refer to FIG. 1B and FIG. 4A. FIG. 4A is a circuit diagram of a comparing circuit according to an embodiment of the present invention, wherein FIG. 4A is an example of the comparing circuit 113 in FIG. 1B, but the present invention is not limited thereto. The comparison circuit 113 includes an amplifier 41 (marked as AMP), a capacitor C ₂ , an adder 42 and a modulator 43 . An output terminal of the amplifier 41 is electrically connected to one terminal of the capacitor C ₂ , and two input terminals of the amplifier 41 are electrically connected to the feedback voltage FB and the reference voltage signal V _REF respectively. The other end of the capacitor _C2 is electrically connected to the ground. The two input ends of the modulator 43 are electrically connected to the feedback voltage FB and the output end of the adder 42 , and the output end of the modulator 43 is electrically connected to the RS flip-flop 115 . The positive input terminal of the adder 42 is electrically connected to the output terminal of the amplifier 41 , and the negative input terminal of the adder 42 is electrically connected to the voltage signal V _COT .

According to the feedback voltage FB and the reference voltage signal V _REF , the amplifier 41 can generate an adjusted reference voltage signal V _REF ′. The adder 42 subtracts the voltage signal V _COT from the adjusted reference voltage signal V _{REF ′} to generate a voltage signal V _REFX . Next, the modulator 43 generates a comparison result according to the voltage signal V _REFX and the feedback voltage FB.

Please note that since the amplifier 41 is only used to adjust the reference voltage signal V _REF , its accuracy will not be affected by the noise boundary compensation, but the present invention is not limited to the above design. FIG. 4B is a circuit diagram of a comparison circuit according to another embodiment of the present invention. In the embodiment of FIG. 4B , the amplifier 41 and the capacitor _C2 of FIG. 4A are removed. Therefore, the adder 42 in FIG. 4B adds the reference voltage signal V _REF and the voltage signal V _COT to generate the voltage signal V _REFX , and the modulator 43 generates a comparison result according to the voltage signal V _REFX and the feedback voltage FB.

Next, please refer to FIG. 5A , which is a waveform diagram of signals of the buck regulator device 12 according to an embodiment of the present invention. As shown in FIG. 5A , first, the current I _SW increases after the buck regulator 12 is turned on, and then decreases after the buck regulator 12 is turned off. The voltage V _SW is positive during the on-time of the buck regulator 12 and negative during the off-time of the buck regulator 12 . The sense current is sampled and held at the beginning of the off-time period to obtain the maximum DC value of the sense current. Since the sensed current decreases with time during the off-time period, detecting the maximum DC value at the beginning of the off-time period will yield a more precise and accurate DC value, while detection at other points in the off-time period will get less stable results.

For example, please refer to FIG. 5B and FIG. 5C. Figure 5B is a less ideal modulation scenario of the scheme shown in Figure 5A, which illustrates a scenario where the DC value of the sense current is detected at the end of the off-time period, and Figure 5C illustrates the scenario of Figure 5A and Figure 5B Comparison between programs. In the upper left subgraph of FIG. 5C , the DC value is sampled at the end of the off-time period, and is used to subtract the waveform of the next off-time period to obtain the subtraction result. An ideal subtraction result should not contain a DC component (such as the ideal waveform detected in the lower right subgraph of Figure 5C). However, once the detected current changes during the next off-time period, the detection result will be incorrect. For example, the detection result in the upper right sub-graph of FIG. 5C still contains a DC component, which leads to the non-ideal regulated output voltage V _OUT of the COT controller 11 in FIG. 1B .

From the above, it can be seen that the operation of detecting the maximum DC value at the beginning of the off-time period is very helpful to obtain a clean extracted ripple current (the word "clean" here can mean no DC component or only a trace DC component), which is extremely important for realizing an ideal COT controller device. In other words, if the DC component can be completely removed, the variation of the regulated input voltage V _OUT (ie ΔV _OUT ) can be obtained by ΔI _L , where ΔI _L does not have any DC component. Referring to the right half of Figure 1B, ΔV _OUT can be calculated according to the following formula:

Where R _CO represents the resistance value of resistor R _CO and f _sw represents the frequency used.

As mentioned above, since the extracted ripple current does not have a DC component of the current _ISW , the DC component of the current _ISW will not be amplified at the COT controller 11 in the end, whereby the COT controller can be increased. 11, and the COT controller 11 can precisely control the off time of the buck regulator 12. Since the turn-on/turn-off accuracy of the buck regulator 12 has been enhanced, the load transient response is also improved accordingly. In addition, considering the jitter phenomenon caused by noise, the COT controller 11 can further generate a ramp voltage signal, and determine the voltage of the step-down regulator 12 according to the feedback voltage FB, the extracted ripple current, and the ramp voltage signal. Closing time. With the help of the ramp voltage signal, the sensitivity of the COT controller 11 to noise can be reduced, so the jitter phenomenon caused by noise can be reduced. Furthermore, it can be seen from the comparison graph of feedback voltage FB and extracted ripple current shown in the bottom column of Fig. 5A that the noise margin of the COT controller is indeed greatly improved.

The DC component of the sensing current can be sampled and held according to the sample and hold switch. The ripple current extraction circuit 111 can subtract the retained DC component from the currently sensed current to generate an extracted ripple current. The extracted ripple current and the reference voltage signal V _REF can be used to generate the comparison voltage signal V _REFX . The feedback voltage FB and the comparison voltage signal V _REFX can be used to determine the turn-off time of the buck regulator 12 . Especially, when the feedback voltage FB is smaller than the comparison voltage signal V _REFX , the off-time of the buck regulator 12 will be terminated.

In summary, the present invention provides a COT controller for a buck regulator device, and the provided COT controller can obtain an extracted value by sensing the current on the inductor flowing through the ESR of the output capacitor. The ripple current, where the extracted ripple current along with the feedback voltage can be used to determine the off time of the buck regulator. Since the extracted ripple current has no DC component, the provided COT controller can have enhanced load transient response. In addition, the above-mentioned jitter phenomenon can be improved by using the ramp voltage signal to compensate the slope of the extracted ripple current, thereby enabling the controller to have better stability and anti-noise capability.

Although the present invention has been described by specific embodiments, various modifications and changes can be made by those skilled in the art without departing from the scope and spirit of the present invention taught by the claims.

The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the claims of the present invention shall fall within the scope of the present invention.

Claims (18)

1. A constant on-time controller comprising:

the voltage dividing circuit is used for generating feedback voltage according to the output voltage of the buck regulator;

a current ripple extraction circuit for sensing a current from an inductor of the buck regulator and generating an extracted ripple current (extracted ripple current) having no direct current component (DC component) according to the sensed current;

a one-shot on-timer (one-shot on-timer) for outputting a constant on-time control signal according to the regulated input voltage and the output voltage of the buck regulator;

the comparison circuit is electrically connected with the voltage dividing circuit and the current ripple extraction circuit and is used for outputting a comparison result according to the reference voltage signal, the feedback voltage and the extracted ripple current; and

the logic circuit is electrically connected with the single-turn-on timer and the comparison circuit and is used for generating a control signal to the buck regulator according to the comparison result and the constant-turn-on time control signal;

wherein the on-time of the buck regulator is determined according to the constant on-time control signal, and the off-time of the buck regulator is determined according to the comparison result; and the current ripple extraction circuit detects a direct current component (DC component) of a sensing waveform in a current period at the beginning of an off time of the buck regulator, and compares the sensed direct current component of the current period with the sensing waveform in a next period of the current period to generate the extracted ripple current.

2. The constant on-time controller of claim 1, wherein the logic circuit is an RS flip-flop (RS flip-flop), a set terminal of the RS flip-flop is electrically connected to a comparator and the single on-timer to receive the comparison result signal and an inversion signal of the constant on-time control signal, and a reset terminal of the RS flip-flop is electrically connected to the single on-timer to receive the constant on-time control signal.

3. The constant on-time controller of claim 1, wherein the single on-timer comprises:

a capacitor electrically connected to the ground;

a resistor connected in series with the capacitor, the resistor being configured to receive a first voltage across the inductor, wherein the first voltage varies with the regulated input voltage; and

a hysteresis (hysteresis) comparator electrically connected to the connection terminals of the capacitor and the resistor, the hysteresis comparator being configured to compare a second voltage at the connection terminal between the capacitor and the resistor with the output voltage to generate a hysteresis comparison result signal as the constant on-time control signal.

4. The constant on-time controller of claim 1, wherein the single on-timer comprises:

a capacitor;

a current source electrically connected to ground through the capacitor and producing a current proportional to the regulated input voltage to form a first voltage across the capacitor; and

the voltage comparator is electrically connected to the connection end of the capacitor and the current source and is used for comparing the output voltage with the first voltage so as to output the constant on-time control signal.

5. The constant on-time controller of claim 1, further comprising:

a ramp (ramp) generator electrically connected to the comparing circuit for generating a ramp voltage signal;

the comparison circuit outputs the comparison result according to the feedback voltage, the reference voltage signal, the ramp voltage signal and the extracted ripple current.

6. The constant on-time controller of claim 1, wherein the current ripple extraction circuit comprises:

a current sense amplifier for sensing the current from the inductor of the buck regulator to obtain the sensed current;

a sample/hold circuit electrically connected to the current sense amplifier, the sample/hold circuit for sampling a current and holding the measured dc component; and

a subtractor electrically connected to the current sense amplifier and the sample-and-hold circuit, the subtractor subtracting the measured dc component in the current period from the sensed waveform in the next period of the current period to generate the extracted ripple current.

7. The constant on-time controller as claimed in claim 1, wherein the comparison circuit comprises:

the amplifier is used for receiving the reference voltage signal and the feedback voltage to generate a regulated reference voltage signal;

a capacitor having two terminals electrically connected to the amplifier and the ground, respectively;

an adder electrically connected to the amplifier, the adder for subtracting the adjusted reference voltage signal from a first voltage signal associated with the extracted ripple current to generate a second voltage signal; and

and a modulator electrically connected to the adder, the modulator being configured to generate the comparison result according to the second voltage signal and the feedback voltage.

8. The constant on-time controller as claimed in claim 1, wherein the comparison circuit comprises:

an adder for subtracting the reference voltage signal from the current associated with the extracted ripple to generate a second voltage signal; and

the modulator is electrically connected to the adder, and is configured to generate the comparison result according to the second voltage signal and the feedback voltage.

9. The constant on-time controller as claimed in claim 1, wherein the voltage dividing circuit comprises a plurality of resistors connected in series with each other.

10. A buck regulator apparatus comprising:

a constant on-time (COT) controller comprising:

the voltage dividing circuit is used for generating a feedback voltage according to the output voltage of a buck regulator (buck regulator);

a current ripple extraction circuit to sense a current from an inductor of the buck regulator and generate an extracted ripple current having no direct current component (DC component) according to the sensed current;

a one-shot on-timer (one-shot on-timer) for outputting a constant on-time control signal according to the regulated input voltage and the output voltage of the buck regulator;

the comparison circuit is electrically connected with the voltage dividing circuit and the current ripple extraction circuit and is used for outputting a comparison result according to a reference voltage signal, the feedback voltage and the extracted ripple current; and

the logic circuit is electrically connected with the single-turn-on timer and the comparison circuit and is used for generating a control signal to the buck regulator according to the comparison result and the constant-turn-on time control signal;

wherein the on-time of the buck regulator is determined according to the constant on-time control signal, and the off-time of the buck regulator is determined according to the comparison result; and the current ripple extraction circuit detects a direct current component (DC component) of a sensing waveform in a current period at the beginning of an off time of the buck regulator, and compares the direct current component sensed in the current period with the sensing waveform in a next period of the current period to generate the extracted ripple current.

11. The buck regulator according to claim 10, wherein the logic circuit is an RS flip flop (RS flip flop), a set terminal of the RS flip flop is electrically connected to a comparator and the one-time on timer to receive the comparison result signal and an inverted result (inversion) of the constant on-time control signal, and a reset terminal of the RS flip flop is electrically connected to the one-time on timer to receive the constant on-time control signal.

12. The buck regulator apparatus of claim 10, wherein the single turn-on timer comprises:

a capacitor electrically connected to the ground;

a resistor connected in series with the capacitor, the resistor being configured to receive a first voltage across the inductor, wherein the first voltage varies with the regulated input voltage; and

a hysteresis (hysteresis) comparator electrically connected to the connection terminals of the capacitor and the resistor, the hysteresis comparator being configured to compare a second voltage at the connection terminal between the capacitor and the resistor with the output voltage to generate a hysteresis comparison result signal as the constant on-time control signal.

13. The buck regulator apparatus of claim 10, wherein the single turn-on timer comprises:

a capacitor;

a current source electrically connected to ground through the capacitor, producing a current proportional to the regulated input voltage to form a first voltage across the capacitor; and

the voltage comparator is electrically connected to the connection end of the capacitor and the current source and is used for comparing the output voltage with the first voltage so as to output the constant on-time control signal.

14. The buck regulator apparatus of claim 10, further comprising:

a ramp (ramp) generator electrically connected to the comparing circuit for generating a ramp voltage signal;

the comparison circuit outputs the comparison result according to the feedback voltage, the reference voltage signal, the ramp voltage signal and the extracted ripple current.

15. The buck regulator apparatus of claim 10, wherein the current ripple extraction circuit comprises:

a current sense amplifier for sensing the current from the inductor of the buck regulator to obtain the sensed current;

a sample/hold circuit electrically connected to the current sense amplifier, the sample/hold circuit for sampling a current and holding the measured dc component; and

a subtractor electrically connected to the current sense amplifier and the sample-and-hold circuit, the subtractor subtracting the measured dc component in the current period from the sensed waveform in the next period of the current period to generate the extracted ripple current.

16. The buck regulator apparatus of claim 10, wherein the comparison circuit comprises:

the amplifier is used for receiving the reference voltage signal and the feedback voltage to generate a regulated reference voltage signal;

a capacitor having two terminals electrically connected to the amplifier and the ground, respectively;

an adder electrically connected to the amplifier, the adder for subtracting the adjusted reference voltage signal from a first voltage signal associated with the extracted ripple current to generate a second voltage signal; and

and a modulator electrically connected to the adder, the modulator being configured to generate the comparison result according to the second voltage signal and the feedback voltage.

17. The buck regulator apparatus of claim 10, wherein the comparison circuit comprises:

an adder for subtracting the reference voltage signal from the current associated with the extracted ripple to generate a second voltage signal; and

the modulator is electrically connected to the adder, and is configured to generate the comparison result according to the second voltage signal and the feedback voltage.

18. The buck regulator apparatus of claim 10, wherein the voltage divider circuit includes a plurality of resistors connected in series with each other.