CN113916132B - Signal processing methods, devices, equipment and media for silicon wafer height measurement - Google Patents

Abstract

The present disclosure provides a signal processing method for silicon wafer height measurement, comprising: acquiring a moving table position signal, wherein the moving table position signal comprises a moving table position pulse signal and a moving table position coordinate signal; performing delay processing on the motion stage position pulse signals, and generating driving signals according to the motion stage position pulse signals before and after the delay processing so as to drive the measurement of the height signals; and carrying out digital filtering processing on the height signals, and carrying out fitting calculation on the position coordinate signals of the moving table and the filtered height signals to obtain silicon wafer height data. The present disclosure also provides a signal processing device electronic apparatus and a computer-readable storage medium for silicon wafer height measurement.

Description

Signal processing methods, devices, equipment and media for silicon wafer height measurement

Technical field

The present disclosure relates to the field of semiconductor manufacturing, and in particular to signal processing methods, devices, equipment and media for silicon wafer height measurement.

Background technique

In semiconductor manufacturing, due to the undulations on the surface of the silicon wafer, in order to ensure that the surface of the silicon wafer is within the available focal depth range during exposure, the silicon wafer height measurement method must be used to accurately measure the silicon wafer height and silicon wafer inclination. Control the motion stage to adjust the position of the silicon wafer.

When using the optical triangulation principle and spatial spectrometry technology based on Moiré fringes to measure the height of the silicon wafer, the measurement signal is a pair of O light and E light signals with a phase difference of π, and the O light and E light signals are measured using hardware synchronous triggering technology. Synchronous collection. When performing synchronous acquisition, since the position signal of the moving stage is a pulse signal, it is easily affected by level noise. In particular, large spikes and glitches may trigger circuit action and cause false triggering. Traditionally, commonly used methods to reduce false triggering include: adding ground capacitance to the signal line and using the capacitor to charge and discharge to suppress voltage jitter; or filtering out some large spikes and glitches through an RC low-pass filter. Since the capacitance and resistance themselves are affected by parasitic parameters, process accuracy, temperature and other factors, the absolute error is large. Therefore, using traditional methods to reduce false triggering has the problems of complex circuit structure, low precision, and high cost.

In addition, when transmitting measurement signals, the measurement signals are susceptible to interference from temperature, vibration, electrical noise, etc., which affects the measurement accuracy. Among the silicon wafer height measurement methods based on the principles of moire fringe and optical triangulation, there are currently only some simplified circuit designs and simple RC low-pass filtering methods, which cannot effectively reduce the impact of measurement signal noise, and the obtained silicon wafer height accuracy is relatively low. Low, it affects the precise control of the motion stage to adjust the position of the silicon wafer, thereby affecting the improvement of chip yield.

public content

Based on this, on the one hand, the present disclosure provides a signal processing method for silicon wafer height measurement, including: obtaining a moving stage position signal, wherein the moving stage position signal includes a moving stage position pulse signal and a moving stage position coordinate signal; Delay processing is performed on the position pulse signal of the moving table, and a driving signal is generated based on the position pulse signal of the moving table before and after the delay processing to drive the measurement of the height signal; digital filtering is performed on the height signal, and the moving table is The position coordinate signal and the filtered height signal are fitted and calculated to obtain the silicon wafer height data.

According to an embodiment of the present disclosure, generating a driving signal based on the motion table position pulse signal before and after delay processing to drive the measurement of the height signal includes: comparing the motion table position pulse signal before delay with the pulse signal after delay. , to extract the rising edge and falling edge of the moving platform position pulse signal; determine whether the interval time between the rising edge and the falling edge is the same as the high-level duration period of the moving platform position pulse signal. If they are the same, generate a driving signal to drive Measurement of height signals.

According to an embodiment of the present disclosure, the fitting calculation of the motion table position coordinate signal and the filtered height signal includes: using a polynomial fitting method based on least squares to calculate the motion table position coordinate signal and the height signal. The signal is fitted and calculated.

According to an embodiment of the present disclosure, the use of a polynomial fitting method based on least squares to perform fitting calculations on the motion table position coordinate signal and the height signal includes: using the initially measured height signal and the motion table position coordinate signal. Polynomial fitting is used to obtain the fitting coefficient; the height signal measured again and the fitting coefficient are calculated to obtain the height and inclination of the silicon wafer.

According to an embodiment of the present disclosure, before performing delay processing on the moving platform position pulse signal, the method further includes: performing IIR on the moving platform position pulse signal using a moving average filter or a limiting filter. Digital filtering.

According to an embodiment of the present disclosure, performing digital filtering on the height signal includes filtering the height signal using a combination of FIR digital low-pass filtering and first-order lag filtering.

Another aspect of the present disclosure provides a signal processing device for silicon chip height measurement, including: an acquisition module for acquiring a motion table position signal, wherein the motion table position signal includes a motion table position pulse signal and a motion table position Coordinate signal; control module, used to perform delay processing on the position pulse signal of the moving table, and generate a driving signal according to the position pulse signal of the moving table before and after the delay processing to drive the measurement of the height signal; signal processing module, used to perform the measurement of the height signal; The height signal is subjected to digital filtering processing, and the position coordinate signal of the moving stage and the filtered height signal are fitted and calculated to obtain silicon wafer height data.

Another aspect of the present disclosure also provides an electronic device, including: one or more processors; a memory for storing one or more programs, wherein when the one or more programs are processed by the one or more When the processor is executed, the one or more processors are caused to implement the above-mentioned method.

Another aspect of the present disclosure also provides a computer-readable storage medium on which executable instructions are stored. When the instructions are executed by a processor, they cause the processor to implement the above-mentioned method.

Description of the drawings

The above and other objects, features and advantages of the present disclosure will become more apparent from the following description of embodiments of the present disclosure with reference to the accompanying drawings, in which:

FIG. 1 schematically shows the structure of the optical-mechanical part corresponding to the signal processing method of the present embodiment.

FIG. 2 schematically shows a flow chart of a signal processing method for silicon wafer height measurement provided by an embodiment of the present disclosure.

FIG. 3 schematically shows a structural block diagram of a signal processing device provided by an embodiment of the present disclosure.

Figure 4 schematically shows a structural block diagram of a signal processing device provided by yet another embodiment of the present disclosure.

FIG. 5 schematically shows a schematic diagram of the silicon wafer tilt calculation provided by the implementation of the present disclosure.

FIG. 6 schematically shows the processing result diagram provided by the implementation of the present disclosure by applying the signal processing method provided by the embodiment of the present disclosure.

FIG. 7 schematically shows the calculation results of the silicon wafer height after applying the signal processing method provided by the embodiment of the present disclosure.

Figure 8 schematically illustrates a block diagram of an electronic device suitable for implementing the above-described method according to an embodiment of the present disclosure.

Detailed ways

In order to make the purpose, technical solutions and advantages of the present disclosure more clear, the present disclosure will be further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings. Obviously, the described embodiments are some, but not all, of the embodiments of the present disclosure. Based on the embodiments in this disclosure, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of this disclosure.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the disclosure. The terms "comprising," "comprising," and the like, as used herein, indicate the presence of stated features, steps, operations, and/or components but do not exclude the presence or addition of one or more other features, steps, operations, or components.

In this disclosure, unless otherwise clearly stated and limited, the terms "installation", "connection", "connection", "fixing" and other terms should be understood in a broad sense. For example, it can be a fixed connection or a detachable connection. Or integrated; it can be mechanical connection, electrical connection or mutual communication; it can be direct connection, it can be indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in this disclosure can be understood according to specific circumstances.

In the description of the present disclosure, it should be understood that the terms "longitudinal", "length", "circumferential", "front", "rear", "left", "right", "top", "bottom", The orientation or positional relationship indicated by "inside", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for convenience of describing the present disclosure and simplifying the description, and does not indicate or imply that the referred subsystem or element must be Has a specific orientation, is constructed and operates in a specific orientation and therefore is not to be construed as limiting the disclosure.

Throughout the drawings, the same elements are designated by the same or similar reference numerals. Conventional structures or constructions have been omitted when they might obscure the understanding of the present disclosure. Furthermore, the shape, size, and positional relationship of each component in the figure do not reflect the real size, proportion, and actual positional relationship. Furthermore, in the claims, any reference signs placed between parentheses shall not be construed as limiting the claim.

Similarly, in the above description of exemplary embodiments of the disclosure, in order to streamline the disclosure and assist in understanding one or more of the various disclosed aspects, various features of the disclosure are sometimes grouped together into a single embodiment, figure, or grouped together. In description. Reference to a description of the terms "one embodiment," "some embodiments," "an example," "a specific example," or "some examples" or the like means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example includes In at least one embodiment or example of the present disclosure. In this specification, schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

In addition, the terms “first” and “second” are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of indicated technical features. Therefore, features defined as “first” and “second” may explicitly or implicitly include one or more of these features. In the description of the present disclosure, "plurality" means at least two, such as two, three, etc., unless otherwise expressly and specifically limited.

The purpose of the embodiments of the present disclosure is to provide a signal processing method for silicon wafer height measurement, including processing of the position signal of the moving stage and processing of the measured height signal. Digital signal processing methods are used to smooth the motion stage position signal and filter out unnecessary narrow pulses and level glitches, thereby reducing the probability of false triggers in synchronous acquisition. The measurement signal is digitally filtered, and the polynomial fitting method based on least squares is used to calculate the silicon wafer height, thereby reducing measurement errors and improving measurement accuracy. The following is a collection of specific embodiments for detailed introduction.

FIG. 1 schematically shows the structural diagram of the optical-mechanical part corresponding to the signal processing method of the present embodiment.

As shown in Figure 1, the opto-mechanical part includes an illumination light source 1, a projection grating 2, a first bi-telecentric system 3, a first reflector 4, a first reflector 6, a second bi-telecentric system 7, and a spatial light splitting system 8 , detection grating 9 and photodetector array 10. The illumination light source 1 generates an illumination beam that uniformly illuminates the projection grating 2 to form a measurement beam, which is emitted from the first bi-telecentric system 3 and reflected by the first reflector 4 and the second reflector 6 as well as the surface of the silicon wafer 5 into the second bi-telecentric system. The central system 7 is transformed into O light and E light that are completely separated in space through the spatial light splitting system 8, and forms a detection beam through the detection grating 9 and is received by the photodetector array 10. The signal processing method of the embodiment of the present disclosure is used to process the detection light of the photodetector array 10 .

FIG. 2 schematically shows a flow chart of a signal processing method for silicon wafer height measurement provided by an embodiment of the present disclosure.

As shown in FIG. 2 , the signal processing method may include operations S201 to S203, for example.

In operation S201, a moving platform position signal is obtained, where the moving platform position signal includes a moving platform position pulse signal and a moving platform position coordinate signal.

According to an embodiment of the present disclosure, after the moving platform travels to a designated position, a position signal of the moving platform is collected. Among them, the moving platform position signal includes two signals: the moving platform position pulse signal and the moving platform position coordinate signal. The moving stage position pulse signal is a continuous high-level signal with a fixed period, which is used to generate an analog-to-digital conversion drive signal to achieve synchronous triggering of silicon wafer height measurement. The position coordinate signal of the motion table is used to transmit the current position coordinates of the motion table and is used for fitting calculations during data fitting.

In operation S202, delay processing is performed on the position pulse signal of the moving platform, and a driving signal is generated according to the position pulse signal of the moving platform before and after the delay processing to drive the measurement of the height signal.

According to an embodiment of the present disclosure, generating a driving signal based on the motion table position pulse signal before and after delay processing to drive the measurement of the height signal includes: performing IIR digital filtering processing through the motion table position pulse signal digital filtering unit, and passing through the delay unit after processing , compare the moving platform position pulse signal before delay with the delayed pulse signal to extract the rising edge and falling edge of the moving platform position pulse signal. Determine whether the interval time between the rising edge and the falling edge is the same as the high-level duration period of the moving platform position pulse signal. If they are the same, a driving signal is generated to drive the measurement of the height signal. Among them, the IIR digital filtering process can adopt sliding average filtering or limiting filtering. This method can remove large spike burr interference, thereby reducing the probability of false triggering in synchronous acquisition.

In operation S203, digital filtering is performed on the height signal, and the position coordinate signal of the moving stage and the filtered height signal are fitted and calculated to obtain the height and inclination of the silicon wafer.

According to an embodiment of the present disclosure, the fitting calculation of the motion table position coordinate signal and the filtered height signal includes: filtering the height signal using a combination of FIR digital low-pass filtering and first-order lag filtering. The polynomial fitting method based on least squares is used to fit and calculate the position coordinate signal of the moving platform and the filtered height signal. Specifically, the height signal measured for the first time and the position coordinate signal of the moving stage are used for polynomial fitting to obtain the fitting coefficient; the height signal measured again and the fitting coefficient are used for calculation to obtain the height and inclination of the silicon wafer. This method can reduce the influence of random noise in the measurement signal, thereby reducing measurement errors and improving measurement accuracy.

Based on the same inventive concept, embodiments of the present disclosure also provide a signal processing device for silicon wafer height measurement.

FIG. 3 schematically shows a structural block diagram of a signal processing device provided by an embodiment of the present disclosure.

As shown in FIG. 3 , the signal processing device 300 may include, for example, an acquisition module 310 , a control module 320 and a signal processing module 330 .

The acquisition module 310 is used to acquire the motion platform position signal, where the motion platform position signal includes the motion platform position pulse signal and the motion platform position coordinate signal;

The control module 320 is used to perform delay processing on the position pulse signal of the moving platform, and generate a driving signal according to the position pulse signal of the moving platform before and after the delay processing to drive the measurement of the height signal.

The signal processing module 330 is used to perform digital filtering processing on the height signal, and perform fitting calculations on the motion table position coordinate signal and the filtered height signal to obtain silicon wafer height data.

Figure 4 schematically shows a structural block diagram of a signal processing device provided by yet another embodiment of the present disclosure.

As shown in Figure 4, according to an embodiment of the present disclosure, the acquisition module 310 may include, for example, a motion platform position signal receiving unit 311, a photodetector array 312, an analog-to-digital conversion unit 313, and a data collection control unit 314.

The moving platform position signal receiving unit 311 is used to receive the moving platform position signal. The photodetector array 312 is used to receive detection light and convert it into multiple analog signals. The analog-to-digital conversion unit 313 is used to convert multiple analog signals into multiple digital signals. The data acquisition control unit 314 is used to receive and transmit multiple digital signals and motion platform position coordinates.

According to an embodiment of the present disclosure, the control module 320 may include, for example, a pulse filter unit 321, a delay unit 322, and an output control unit 323.

The pulse filter unit 321 is used to filter the moving platform position pulse signal using a moving average filter or a limiting filter. The delay unit 322 is used to perform delay processing on the filtered moving platform position pulse signal. The output control unit 323 is used to generate a driving signal according to the position pulse signal of the moving platform before and after delay processing, so as to drive the analog-to-digital conversion unit 323 to convert multiple analog signals into multiple digital signals.

According to an embodiment of the present disclosure, the signal processing module 330 may include, for example, a data cache unit 331, a digital filtering unit 332, a first data storage unit 333, a first data calculation unit 334, a fitting calculation unit 335, and a second data storage unit 336. , the second data calculation unit 337 and the data output control unit 338.

The data cache unit 331 is used to cache multiple digital electrical signals and moving platform position coordinate signals. The digital filtering unit 332 is used to filter multiple digital electrical signals using a combination of FIR digital low-pass filtering and first-order lag filtering. The first data storage unit 333 is used to store the position coordinate signal of the moving platform. The first data calculation unit 334 is used to calculate the original height value of the silicon wafer based on the filtered multi-channel digital electrical signals. The fitting calculation unit 335 adopts a polynomial fitting method based on least squares, based on the motion table position coordinate signal in the first data storage unit 333, the original value of the silicon wafer height calculated by the first data calculation unit 334, and the second data storage unit A fitting coefficient of 336 is used to calculate the wafer height. Among them, the fitting coefficient obtained by performing the fitting calculation for the first time is stored in the second data storage unit 336, and the fitting coefficient is called when the fitting calculation is performed again to calculate the silicon wafer height. The second data calculation unit 337 is used to calculate the inclination of the silicon wafer using the calculated height of the silicon wafer. The data output control unit 338 is used to communicate with the motion stage and output silicon wafer height and silicon wafer inclination data so as to control the motion stage to adjust the position of the silicon wafer in real time.

According to embodiments of the present disclosure, the silicon wafer height calculation formula may be, for example:

Among them, I _e and I _o are the light intensity of e light and o light formed by the light splitting of the spectroscopic component respectively, offset _e and offset _o are the background noise of e light and o light at the photodetector, G is the proportion coefficient, P is the grating period, α is the measurement light incident angle.

FIG. 5 schematically shows a schematic diagram of the silicon wafer tilt calculation provided by the implementation of the present disclosure.

As shown in Figure 5, the calculation formula is:

Among them, Δh is the height difference of the silicon wafer, and Δx is the detection point spacing of the photodetector array.

In addition, the signal processing device 300 of the embodiment of the present disclosure can be implemented through an FPGA chip, utilizing the efficiency of hardware calculation to increase the signal processing speed, thereby accurately controlling the motion stage to adjust the position of the silicon chip in real time. Among them, it can be implemented using the Xilinx Artix-7 series chip XC7A35TFGG484. The active crystal oscillator frequency used in the system clock is 50MHz; the motion table position signal receiving unit is composed of an SMB interface and an optical coupler; the measurement signal passes through SERDES (SERializer/DESerializer, serializer /demultiplexer) is transmitted to the data cache unit 331, where the SERDES chip is implemented using the SN65LV1023ADB/SN65LV1224BDB chip of Texas Instruments. The data cache unit 331 is implemented through a ping-pong structure, which simultaneously receives and transmits data. The implementation form of the ping-pong structure can be a true dual-port RAM.

In order to more clearly explain the effects brought by the signal processing methods and devices provided by the embodiments of the present disclosure, further auxiliary explanations are provided below in conjunction with test results.

FIG. 6 schematically shows the processing result diagram provided by the implementation of the present disclosure by applying the signal processing method provided by the embodiment of the present disclosure.

As shown in Figure 6, where a represents the actual position signal of the moving platform, which contains level glitches, narrow pulses smaller than the high-level holding time, etc., if its rising edge is directly extracted as the driving signal of the analog-to-digital conversion module, As a result, as shown in b in Figure 6, redundant driving signals N1 and N2 appear, resulting in false triggering. The signal processing method of the disclosed embodiment is used to extract the rising edge of the position signal of the moving platform, as shown in c in Figure 6. Using the signal processing method of the present disclosure, the narrow pulse interference of the position pulse signal is removed, and the probability of false triggering is effectively reduced.

FIG. 7 schematically shows the calculation results of the silicon wafer height after applying the signal processing method provided by the embodiment of the present disclosure.

As shown in Figure 7, a in Figure 7 represents the medium error comparison curve of the silicon wafer height obtained before and after applying the signal processing method of the present disclosure, and b in Figure 7 represents the precision comparison curve of the silicon wafer height obtained before and after applying the signal processing method of the present disclosure. c in Figure 7 represents the comparison curve of the silicon wafer height before and after applying the signal processing method of the present disclosure, where S1 represents that the signal processing method of the present disclosure is not used, and S2 represents that the signal processing method of the present disclosure is adopted. From a and b It can be seen that after applying the signal processing method of the present disclosure, the error and precision of the silicon wafer height are improved and are closer to the ideal height. Among them, the median error of the silicon wafer height at each position point within the linear range (±1.25um) can be reduced by 2.7~44.2nm, and the precision can be reduced by 2.6~31.0nm, effectively improving the measurement accuracy of the silicon wafer height.

Any number of modules, sub-modules, units, sub-units according to embodiments of the present disclosure, or at least part of the functions of any number of them, may be implemented in one module. Any one or more of the modules, sub-modules, units, and sub-units according to the embodiments of the present disclosure may be split into multiple modules for implementation. Any one or more of the modules, sub-modules, units, and sub-units according to embodiments of the present disclosure may be at least partially implemented as hardware circuits, such as field programmable gate arrays (FPGAs), programmable logic arrays (PLA), System-on-a-chip, system-on-substrate, system-on-package, application-specific integrated circuit (ASIC), or any other reasonable means of integrating or packaging circuits that can be implemented in hardware or firmware, or in a combination of software, hardware, and firmware Any one of these implementation methods or an appropriate combination of any of them. Alternatively, one or more of the modules, sub-modules, units, and sub-units according to the embodiments of the present disclosure may be at least partially implemented as a computer program module, and when the computer program module is executed, corresponding functions may be performed.

For example, any one of the acquisition module 310, the control module 320 and the signal processing module 330 can be combined and implemented in one module/unit/sub-unit, or any one of the modules/units/sub-units can be split into multiple Module/unit/subunit. Alternatively, at least part of the functionality of one or more of these modules/units/subunits may be combined with at least part of the functionality of other modules/units/subunits and combined in one module/unit/subunit realized in. According to embodiments of the present disclosure, at least one of the acquisition module 310, the control module 320, and the signal processing module 330 may be at least partially implemented as a hardware circuit, such as a field programmable gate array (FPGA), a programmable logic array (PLA) , system-on-a-chip, system-on-substrate, system-on-package, application-specific integrated circuit (ASIC), or may be implemented in hardware or firmware in any other reasonable manner that integrates or packages circuits, or in software, hardware, and firmware Any one of the three implementation methods or an appropriate combination of any of them can be implemented. Alternatively, at least one of the acquisition module 310, the control module 320 and the signal processing module 330 may be at least partially implemented as a computer program module, and when the computer program module is executed, corresponding functions may be performed.

It should be noted that the signal processing device part in the embodiment of the present disclosure corresponds to the signal processing method part in the embodiment of the present disclosure, and the specific implementation details are also the same, and will not be described again here.

Figure 8 schematically illustrates a block diagram of an electronic device suitable for implementing the above-described method according to an embodiment of the present disclosure. The electronic device shown in FIG. 8 is only an example and should not impose any limitations on the functions and scope of use of the embodiments of the present disclosure.

As shown in FIG. 8 , an electronic device 800 according to an embodiment of the present disclosure includes a processor 801 that can be loaded into a random access memory (RAM) 803 according to a program stored in a read-only memory (ROM) 802 or from a storage part 808 program to perform various appropriate actions and processes. Processor 801 may include, for example, a general purpose microprocessor (eg, a CPU), an instruction set processor and/or associated chipset, and/or a special purpose microprocessor (eg, an application specific integrated circuit (ASIC)), among others. Processor 801 may also include onboard memory for caching purposes. The processor 801 may include a single processing unit or multiple processing units for performing different actions of the method flow according to the embodiments of the present disclosure.

In the RAM 803, various programs and data required for the operation of the electronic device 800 are stored. The processor 801, ROM 802 and RAM 803 are connected to each other through a bus 804. The processor 801 performs various operations according to the method flow of the embodiment of the present disclosure by executing programs in the ROM 802 and/or RAM 803. It should be noted that the program may also be stored in one or more memories other than ROM 802 and RAM 803. The processor 801 may also perform various operations according to the method flow of embodiments of the present disclosure by executing programs stored in the one or more memories.

According to embodiments of the present disclosure, the electronic device 800 may further include an input/output (I/O) interface 805 that is also connected to the bus 804 . Electronic device 800 may also include one or more of the following components connected to I/O interface 805: an input portion 806 including a keyboard, mouse, etc.; including a cathode ray tube (CRT), liquid crystal display (LCD), etc., and An output section 807 including a speaker and the like; a storage section 808 including a hard disk and the like; and a communication section 809 including a network interface card such as a LAN card, a modem and the like. The communication section 809 performs communication processing via a network such as the Internet. Driver 810 is also connected to I/O interface 805 as needed. Removable media 811, such as magnetic disks, optical disks, magneto-optical disks, semiconductor memories, etc., are installed on the drive 810 as needed, so that a computer program read therefrom is installed into the storage portion 808 as needed.

According to embodiments of the present disclosure, the method flow according to the embodiments of the present disclosure may be implemented as a computer software program. For example, embodiments of the present disclosure include a computer program product including a computer program carried on a computer-readable storage medium, the computer program containing program code for performing the method illustrated in the flowchart. In such embodiments, the computer program may be downloaded and installed from the network via communications portion 809 and/or installed from removable media 811 . When the computer program is executed by the processor 801, the above-described functions defined in the system of the embodiment of the present disclosure are performed. According to embodiments of the present disclosure, the systems, devices, devices, modules, units, etc. described above may be implemented by computer program modules.

The present disclosure also provides a computer-readable storage medium. The computer-readable storage medium may be included in the device/device/system described in the above embodiments; it may also exist independently without being assembled into the device/system. in the device/system. The above computer-readable storage medium carries one or more programs. When the above one or more programs are executed, the method according to the embodiment of the present disclosure is implemented.

According to embodiments of the present disclosure, the computer-readable storage medium may be a non-volatile computer-readable storage medium. Examples may include but are not limited to: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), portable compact disk read-only memory (CD-ROM), ROM), optical storage device, magnetic storage device, or any suitable combination of the above. In this disclosure, a computer-readable storage medium may be any tangible medium that contains or stores a program for use by or in connection with an instruction execution system, apparatus, or device.

For example, according to embodiments of the present disclosure, the computer-readable storage medium may include one or more memories other than ROM 802 and/or RAM 803 and/or ROM 802 and RAM 803 described above.

The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operations of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code that contains one or more logic functions that implement the specified executable instructions. It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown one after another may actually execute substantially in parallel, or they may sometimes execute in the reverse order, depending on the functionality involved. It will also be noted that each block in the block diagram or flowchart illustration, and combinations of blocks in the block diagram or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or operations, or may be implemented by special purpose hardware-based systems that perform the specified functions or operations. Achieved by a combination of specialized hardware and computer instructions. Those skilled in the art will understand that features recited in various embodiments and/or claims of the present disclosure may be combined and/or combined in various ways, even if such combinations or combinations are not explicitly recited in the present disclosure. In particular, various combinations and/or combinations of features recited in the various embodiments and/or claims of the disclosure may be made without departing from the spirit and teachings of the disclosure. All such combinations and/or combinations fall within the scope of this disclosure.

Claims (6)

1. A signal processing method for silicon wafer height measurement, including: Obtain a moving platform position signal, wherein the moving platform position signal includes a moving platform position pulse signal and a moving platform position coordinate signal; Delay processing is performed on the motion table position pulse signal, and a driving signal is generated based on the motion table position pulse signal before and after delay processing to drive the measurement of the height signal, including: combining the motion table position pulse signal before delay and the motion table position pulse signal after delay. Compare the moving platform position pulse signal to extract the rising edge and falling edge of the moving platform position pulse signal; determine whether the interval time between the rising edge and the falling edge is the same as the high-level duration period of the moving platform position pulse signal. If If they are the same, a driving signal is generated to drive the measurement of the height signal; The height signal is digitally filtered, and the least squares polynomial fitting method is used to fit the motion table position coordinate signal and the filtered height signal to obtain the silicon wafer height data. The method is based on The least squares polynomial fitting method is used to calculate the fitting of the motion table position coordinate signal and the height signal, including: using the initially measured height signal and the motion table position coordinate signal to perform polynomial fitting to obtain a fitting coefficient; using again The measured height signal is calculated with the fitting coefficient to obtain the height and inclination of the silicon wafer. 2. The signal processing method according to claim 1, before performing delay processing on the moving platform position pulse signal, the method further includes: The moving platform position pulse signal is filtered using moving average filtering or limiting filtering. 3. The signal processing method according to claim 1, wherein said performing digital filtering processing on the height signal includes: The height signal is filtered using a combination of FIR digital low-pass filtering and first-order lag filtering. 4. A signal processing device for silicon wafer height measurement, including: An acquisition module, configured to acquire a motion platform position signal, where the motion platform position signal includes a motion platform position pulse signal and a motion platform position coordinate signal; A control module for performing delay processing on the motion table position pulse signal, and generating a driving signal based on the motion table position pulse signal before and after the delay processing to drive the measurement of the height signal, including: converting the motion table position pulse signal before delay processing The signal is compared with the delayed motion platform position pulse signal to extract the rising edge and falling edge of the motion platform position pulse signal; determine the interval between the rising edge and the falling edge and the high level duration of the motion platform position pulse signal. Whether the periods are the same, if so, a driving signal is generated to drive the measurement of the height signal; The signal processing module is used to digitally filter the height signal, and use the least squares polynomial fitting method to perform fitting calculations on the position coordinate signal of the motion table and the filtered height signal to obtain silicon wafer height data, Wherein, the use of a polynomial fitting method based on least squares to perform the fitting calculation on the position coordinate signal of the motion table and the height signal includes: using the initially measured height signal and the position coordinate signal of the motion table to perform polynomial fitting, to obtain Fitting coefficient: Calculate using the height signal measured again and the fitting coefficient to obtain the height and inclination of the silicon wafer. 5. An electronic device, including: one or more processors; memory for storing one or more programs, Wherein, when the one or more programs are executed by the one or more processors, the one or more processors are caused to implement the method described in any one of claims 1 to 3. 6. A computer-readable storage medium having executable instructions stored thereon, which when executed by a processor causes the processor to implement the method according to any one of claims 1 to 3.