CN113896165A

CN113896165A - Piezoelectric micromechanical ultrasonic transducer and manufacturing method thereof

Info

Publication number: CN113896165A
Application number: CN202010642684.0A
Authority: CN
Inventors: 库玛拉奇许; 夏佳杰; 钱优
Original assignee: Vanguard International Semiconductor Corp
Current assignee: Vanguard International Semiconductor Corp
Priority date: 2020-07-06
Filing date: 2020-07-06
Publication date: 2022-01-07

Abstract

A piezoelectric micromechanical ultrasonic transducer comprises a substrate, a barrier structure and a film layer, wherein the substrate and the barrier structure comprise the same material. The substrate includes a cavity penetrating the substrate, and the barrier structure protrudes from a top surface of the substrate and surrounds an edge of the cavity. The film layer is arranged on the cavity and attached to the barrier structure.

Description

Piezoelectric micromechanical ultrasonic transducer and manufacturing method thereof

Technical Field

The invention relates to the technical field of Micro Electro Mechanical Systems (MEMS), in particular to a piezoelectric Micro Mechanical ultrasonic transducer (PMUT) and a manufacturing method thereof.

Background

Micro Mechanical Ultrasonic Transducers (MUTs) have been widely studied in the past decades and have become important components of various consumer electronics products, such as fingerprint sensors, proximity sensors, and gesture sensors. Generally, MUTs can be divided into two broad categories, for example, Capacitive Micromachined Ultrasonic Transducers (CMUTs) and Piezoelectric Micromachined Ultrasonic Transducers (PMUTs). For a typical piezoelectric micromachined ultrasonic transducer, the piezoelectric micromachined ultrasonic transducer includes a membrane layer formed by an elastic material, an electrode and a piezoelectric material, and the membrane layer is disposed on a cavity serving as an acoustic wave resonator to improve the acoustic performance of the piezoelectric micromachined ultrasonic transducer. During the operation of the piezoelectric micromachined ultrasonic transducer, the ultrasonic wave generated by the vibration of the membrane layer is transmitted from the piezoelectric micromachined ultrasonic transducer to the target object, and then the piezoelectric micromachined ultrasonic transducer can detect the reflected acoustic wave generated after the ultrasonic wave strikes the target object.

Typically, piezoelectric micromachined ultrasonic transducers operate at the membrane layer's flexural resonance frequency, which can be determined by choosing the correct materials, membrane dimensions and thickness. Therefore, good matching of the resonant frequencies of the individual piezoelectric micromachined ultrasonic transducers is a necessary condition for proper operation. However, since the cavity under the film is usually formed by etching the back surface of the substrate, a cavity opening is formed on the front surface of the substrate to define the size of the film. The size of the cavity opening may vary considerably in different areas within the same wafer or between different wafers, which inevitably results in variations in the resonant frequency of each piezoelectric micromachined ultrasonic transducer.

Therefore, it is desirable to provide an improved piezoelectric micromachined ultrasonic transducer and a method for fabricating the same, so that the size of the membrane layer in the piezoelectric micromachined ultrasonic transducer can be precisely controlled.

Disclosure of Invention

In view of the above, in order to improve the uniformity of the resonant frequency of the piezoelectric micromachined ultrasonic transducer, it is necessary to provide an improved piezoelectric micromachined ultrasonic transducer and a method for manufacturing the same.

According to one embodiment of the present invention, a piezoelectric micromachined ultrasonic transducer includes a substrate, a barrier structure, and a membrane layer, wherein the substrate and the barrier structure are composed of the same material. The substrate includes a cavity penetrating the substrate, and the barrier structure protrudes from a top surface of the substrate and surrounds an edge of the cavity. The film layer is disposed over the cavity and attached to the barrier structure.

According to another embodiment of the invention, a method of fabricating a piezoelectric micromachined ultrasonic transducer is disclosed, comprising the following steps. The substrate is first etched to form barrier structures protruding from the substrate, and then a sacrificial layer is formed on the substrate, wherein the barrier structures are exposed to the sacrificial layer. Then, a film layer is formed on the barrier structure and the sacrificial layer. A cavity is then formed through the substrate to expose a portion of the sacrificial layer. Subsequently, a portion of the sacrificial layer exposed to the cavity is removed by using the barrier structure as an etch stop structure.

According to the above embodiments of the present invention, the blocking structure is a structure protruding from the top surface of the substrate, and the size of the film layer can be adjusted by controlling the position of the blocking structure. Since the barrier structure is formed by etching the substrate, the barrier structure can be tightly attached to the substrate without peeling off from the substrate, and can also have vertical sidewalls. By the aid of the method, the reliability and the electrical performance of the piezoelectric type micro-mechanical ultrasonic transducer can be effectively improved.

Drawings

For the following to be more readily understood, reference is made to the accompanying drawings and detailed description thereof, when read in conjunction with the following description. The embodiments of the present invention will be described in detail herein with reference to the accompanying drawings, which are used to explain the principles of the embodiments of the present invention. Furthermore, for purposes of clarity, the various features in the drawings may not be to scale and the dimensions of some of the features in some drawings may be exaggerated or minimized.

Fig. 1 is a schematic top view of a Piezoelectric Micromachined Ultrasonic Transducer (PMUT) depicted in accordance with an embodiment of the present invention.

Fig. 2 is a schematic cross-sectional view taken along line a-a' of fig. 1 according to an embodiment of the invention.

Fig. 3 is a schematic diagram illustrating a barrier structure formed on a substrate according to an embodiment of the invention.

Fig. 4 is a cross-sectional view of a substrate after a sacrificial layer is formed thereon according to an embodiment of the invention.

Fig. 5 is a cross-sectional view of a base layer formed on a barrier structure and a sacrificial layer according to an embodiment of the invention.

Fig. 6 is a schematic cross-sectional view illustrating a film formed by stacking layers on a base layer according to an embodiment of the invention.

Fig. 7 is a schematic cross-sectional view illustrating a contact pad after being formed according to an embodiment of the invention.

Fig. 8 is a cross-sectional view of a film layer after a cut-off portion is formed therein according to an embodiment of the invention.

Fig. 9 is a schematic cross-sectional view illustrating a through-substrate cavity formed according to an embodiment of the invention.

Fig. 10 is a flowchart illustrating a method for fabricating a piezoelectric micromachined ultrasonic transducer according to an embodiment of the present invention.

Wherein the reference numerals are as follows:

100 … piezoelectric micro-mechanical ultrasonic transducer

102 … substrate

102s … top surface

104 … blocking structure

104s … top surface

106 … film layer

108 … body part

110 … base

112 … truncation

114 … first contact pad

116 … second contact pad

120 … cavity

Edge of 120e …

122 … first part

122s … top surface

124 … second part

124s … top surface

126 … sacrificial layer

130 … base layer

132 … dielectric layer

134 … bottom conductive layer

136 … piezoelectric layer

138 … Top conductive layer

140 … passivation layer

152 … truncation

200 … method

202 … step

204 … step

206 … step

208 … step

210 … step

212 … step

Distance D …

O … opening

Detailed Description

The present invention provides several different embodiments, which can be used to implement different features of the present invention. For simplicity of illustration, examples of specific components and arrangements are also described. These examples are provided for the purpose of illustration only and are not intended to be limiting in any way. For example, the following description of the first feature being formed over or on the second feature may refer to the first feature being in direct contact with the second feature, or to the second feature being in the presence of other features, such that the first feature is not in direct contact with the second feature. Moreover, various embodiments of the present invention may use repeated reference characters and/or written notation. These repeated reference characters and notations are used to make the description more concise and unambiguous and are not used to indicate any relationship between the different embodiments and/or configurations.

In addition, for spatially related descriptive words mentioned in the present invention, for example: the use of "under", "lower", "under", "over", "under", "top", "bottom" and the like in describing, for purposes of convenience, the relative relationship of one element or feature to another element(s) or feature in the drawings, is intended to be illustrative. In addition to the orientation shown in the drawings, these spatially relative terms are also used to describe possible orientations of the semiconductor device during use and operation. With respect to the swinging direction of the semiconductor device (rotated 90 degrees or other orientations), the spatially relative descriptions for describing the swinging direction should be interpreted in a similar manner.

Although the present invention has been described using terms such as first, second, third, etc. to describe various elements, components, regions, layers and/or sections, it should be understood that such elements, components, regions, layers and/or sections should not be limited by such terms. These terms are only used to distinguish one element, component, region, layer and/or block from another element, component, region, layer and/or block, and do not denote any order or importance, nor do they denote any order or importance, but rather the term "sequence" or "sequence" is used to distinguish one element, component, region, layer and/or block from another. Thus, a first element, component, region, layer or block discussed below could be termed a second element, component, region, layer or block without departing from the scope of embodiments of the present invention.

The term "about" or "substantially" as used herein generally means within 20%, preferably within 10%, and more preferably within 5%, or within 3%, or within 2%, or within 1%, or within 0.5% of a given value or range. It should be noted that the amounts provided in the specification are approximate, i.e., the meaning of "about" or "substantially" may be implied without specifically stating "about" or "substantially".

The specific order or hierarchy of process blocks disclosed in the process/flow diagrams below may be understood as exemplary illustrations. It will be appreciated that the specific order or hierarchy of blocks in the process/flow diagram disclosed may be rearranged based on various design preferences. Furthermore, portions of the flow diagrams may be combined or omitted. The method claims are presented for the elements of the flow diagrams in the exemplary order in which they are presented, and this is not meant to imply that the method claims are limited to this particular order or hierarchy.

Although the present invention is described below in terms of specific embodiments, the principles of the present invention can be applied to other embodiments as well. Moreover, certain details have been left out in order not to obscure the spirit of the invention, which details are within the knowledge of a person of ordinary skill in the art.

Fig. 1 is a schematic top view of a Piezoelectric Micromachined Ultrasonic Transducer (PMUT) depicted in accordance with an embodiment of the present invention. Referring to fig. 1, a piezoelectric micromachined ultrasonic transducer 100 includes at least a substrate 102, a barrier structure 104, a membrane layer 106, a cut-out 112, a first contact pad 114, and a second contact pad 116. According to an embodiment of the invention, the barrier structure 104 may be a ring-shaped structure protruding from the top surface of the substrate 102, such that a portion of the film layer 106 may be attached to the barrier structure 104. The shape of the barrier structure 104 is not limited thereto, and the barrier structure 104 may be a polygon or an arc disposed along the edge of the film layer 106. The membrane layer 106 may include a body portion 108 disposed over the cavity (not shown) and a base portion 110 disposed about the periphery of the body portion 108. The shape of the body portion 108 may be defined by the shape of the cutout 112 and may be any shape, such as a circle, a sector, or a polygon. The barrier structure 104 may be disposed along the periphery of the cutout 112 and the periphery of the body portion 108. The body portion 108 of the membrane layer 106 may be a multi-layer structure including electrodes and piezoelectric material. The base 110 is attached to the barrier structure 104 and may be considered as a portion extending from the body portion 108 of the film layer 106. First and

second contact pads

114 and 116 may be disposed on opposite sides of the membrane layer 106, which may be electrically coupled to electrodes of the membrane layer 106, respectively. In addition, to avoid the generation of undesired parasitic capacitance between the first contact pad 114 and the second contact pad 116, the sizes of the first contact pad 114 and the second contact pad 116 may be reduced as much as possible, but are not limited thereto. According to an embodiment of the invention, the first contact pad 114 and the second contact pad 116 may be disposed on the same side of the film layer 106 or anywhere as long as the first contact pad 114 and the second contact pad 116 may be electrically coupled to the electrodes of the film layer 106. Electrically conductive traces (not shown) electrically coupled to the first and

second contact pads

114, 116 may additionally be disposed on the substrate 102 to transmit electrical signals into or out of the film layer 106. During operation of the piezoelectric micromachined ultrasonic transducer 100, the membrane 106, and particularly the body portion 108 of the membrane 106, may vibrate when an acoustic wave applies an acoustic pressure to the membrane 106 or an electrical signal is applied to the membrane 106. By using the barrier structure 104, the size and location of the film layer 106 can be precisely and independently defined regardless of the size and location of the cavity beneath the film layer 106. Therefore, the resonance frequency uniformity of each piezoelectric micromachined ultrasonic transducer 100 can be effectively improved.

FIG. 2 is a schematic cross-sectional view taken along line A-A' of FIG. 1 according to an embodiment of the present invention. Referring to fig. 2, the barrier structure 104 may protrude from the top surface 102s of the substrate 102. The substrate 102 may be a semiconductor substrate, such as a bulk silicon substrate, but is not limited thereto. The substrate 102 and the barrier structure 104 may be composed of the same material, such as single crystal silicon, polycrystalline silicon, amorphous silicon, glass, ceramic material, or other suitable material. According to an embodiment of the invention, the substrate 102 may be an SOI substrate. The composition of the sacrificial layer 126 is different from that of the substrate 102, the barrier structure 104 is disposed on the substrate 102, and the sacrificial layer 126 surrounds the barrier structure 104. In the case where the substrate 102 and/or the barrier structure 104 are composed of a semiconductor material (e.g., Si), the sacrificial layer 126 may be a dielectric layer, such as silicon oxide (SiO)_x) For example, silicon oxide (SiO)_x) May be silicon dioxide (SiO)₂) Or silicon oxide where x is other number. Furthermore, a top surface of the sacrificial layer 126 may be substantially aligned with a top surface of the barrier structure 104 such that layers disposed on the sacrificial layer 126 and the barrier structure 104 may have a planar bottom surface. Referring to fig. 2, although the width of the barrier structure 104 is much smaller than the width of the sacrificial layer 126, the width of the barrier structure 104 may be designed to be larger than the width of the sacrificial layer 126 according to another embodiment of the present invention. Furthermore, according to another embodiment of the present invention, when the width of the barrier structure 104 is large enough, most of the sacrificial layer 126 may be replaced with the barrier structure 104. The stacked layers may include a base layer 130, a dielectric layer 132, a bottom conductive layer 134, a piezoelectric layer 136, a top conductive layer 138, and a passivation layer 140 sequentially disposed on the substrate 102. A portion of the stacked layers may be disposed over the cavity 120. An edge 120e of the cavity 120 may be adjacent to the stacked layers, and the blocking structure 104 may surround the edge 120e of the cavity 120. Thus, the stacked layers disposed over the cavity 120 may constitute the membrane layer 106. In addition, the membrane layer 106 may be penetrated by the cut-off 112, thereby relieving stress in the stacked layers. Specifically, the base layer 130 of the film layer 106 may have a desired elasticity (elasticity), so that the film layer 106 may vibrate at a certain frequency when an acoustic wave or an electrical signal is applied to the film layer 106. The bottom and top

conductive layers

134, 138 of the film layer 106 may be electrically coupled to the firstA contact pad 114 and a second contact pad 116. It is noted that the mechanical behavior of the membrane layer 106 is primarily determined by the base layer 130 of the membrane layer 106, since the thickness of the stacked layers disposed on the base layer 130 is much less than the thickness of the base layer 130. For example, the overall thickness of the stacked layers of the dielectric layer 132, the bottom conductive layer 134, the piezoelectric layer 136, the top conductive layer 138 and the passivation layer 140 may be only 1/3-1/10 of the thickness of the underlying base layer 130.

In order to enable one of ordinary skill in the art to practice the present invention, a method of fabricating a piezoelectric micromachined ultrasonic transducer will be further described. In addition, since the piezoelectric micromachined ultrasonic transducer can be fabricated by a standard CMOS process, related electronic components such as a field effect transistor, an amplifier, and an integrated circuit can be fabricated on the same substrate of the piezoelectric micromachined ultrasonic transducer by the same CMOS process.

Fig. 3 is a schematic cross-sectional view illustrating a barrier structure formed on a substrate according to an embodiment of the invention. Figure 10 is a flow diagram illustrating a method of fabricating a piezoelectric micromachined ultrasonic transducer according to one embodiment of the present invention. Referring to fig. 3, in step 202 of the method 200, a substrate 102 is provided, and the substrate 102 may be selected from a semiconductor substrate or an insulating substrate according to different requirements. According to an embodiment of the present invention, the substrate 102 may be a single crystal silicon substrate. Then, in step 204, the barrier structure 104 protruding from the top surface 102s of the substrate 102 may be formed by etching from the front surface of the substrate 102. Specifically, in the process of fabricating the barrier structure 104, photolithography and etching processes may be performed. Since the size of the barrier structure 104 can be precisely defined by photolithography, the distance D between two opposite points of the barrier structure 104 can also be precisely controlled. While the distance D may be used to precisely control the dimensions of the barrier structure 104 and the dimensions of the film layer 106.

Fig. 4 is a schematic diagram illustrating a sacrificial layer formed on a substrate according to an embodiment of the invention. Referring to fig. 4, in step 206, a sacrificial layer including a first portion 122 and a second portion 124 may be formed on the substrate 102, wherein a top surface of the barrier structure 104 is exposed to the sacrificial layer. A first portion 122 of the sacrificial layer may be surrounded by the barrier structure 104 and a second portion 124 of the sacrificial layer may be separated from the first portion 122 by the barrier structure 104. According to an embodiment of the present invention, the process of forming the sacrificial layer may include the following steps: (1) blanket depositing a sacrificial material on the substrate 102 (e.g., chemical vapor deposition or plasma enhanced chemical vapor deposition) such that the sacrificial material covers the top surface 104s of the barrier structure 104; and (2) planarizing the sacrificial material until the top surface 104s of the barrier structure 104 is exposed. In addition, according to another embodiment of the present invention, the process of forming the sacrificial layer may include the following steps: (1) performing a spin-on process to coat a layer of sacrificial material on the substrate 102; and (2) etching the sacrificial material until the top surface 104s of the barrier structure 104 is exposed. Thus, by any of the above processes for forming the sacrificial layer, the

top surfaces

122s and 124s of the respective separated portions of the sacrificial layer can be aligned with the top surface 104s of the barrier structure 104.

Continuing with step 208, a layer is formed on the substrate 120. According to an embodiment of the invention, step 208 may include the sub-steps shown in fig. 5 and 6, respectively.

Fig. 5 is a cross-sectional view of a base layer formed on a barrier structure and a sacrificial layer according to an embodiment of the invention. Referring to fig. 5, a base layer 130 may be deposited on the barrier structure 104, on the first portion 122 of the sacrificial layer, and on the second portion 124 of the sacrificial layer. The base layer 130 may include a material having appropriate elasticity, such as crystalline silicon (c-Si), amorphous silicon (a-Si), silicon-rich nitride (SiN)_x) Silicon carbide (SiC), and the like, but is not limited thereto. Since barrier structure 104 and

sacrificial layers

122, 124 under base layer 130 include a planar top surface, the bottom surface of base layer 130 may also be a planar bottom surface. In addition, in order to obtain a flat top surface of the base layer 130, a planarization process may be optionally performed to planarize the top surface of the base layer 130.

Fig. 6 is a schematic cross-sectional view illustrating a film formed by stacking layers on a base layer according to an embodiment of the invention. Referring to fig. 6, a dielectric layer 132, a bottom conductive layer 134, a piezoelectric layer 136, a top conductive layer 138, and a passivation layer 140 may be sequentially deposited on a substrate 130 to form a film disposed on a substrate 120Layer 150. The dielectric layer 132 may be composed of an insulating material, such as SiO₂SiON, AlN or scandium-doped aluminum nitride (AlScN) for electrically insulating the bottom conductive layer 134 and the top conductive layer 138 from the base layer 130. According to an embodiment of the present invention, the dielectric layer 132 may also serve as a seed layer for a plurality of layers subsequently deposited on the dielectric layer 132. In addition, the surface structure of the dielectric layer 132 may affect the crystallinity of the plurality of layers deposited thereon. The bottom conductive layer 134 and the top conductive layer 138 may be the same or different materials composed of molybdenum (Mo), titanium (Ti), aluminum (Al), or platinum (Pt), but are not limited thereto. The piezoelectric layer 136 may be composed of, but not limited to, aluminum nitride (AlN), scandium-doped aluminum nitride (AlScN), lead zirconate titanate (PZT), zinc oxide (ZnO), polyvinylidene fluoride (PVDF), or lead niobate titanate (PMN-PT). The passivation layer 140 may be a selective layer of an insulating material, such as SiO₂SiON or AlN, but not limited thereto. In addition, the piezoelectric layer 136 is a different material than the base layer 130.

Fig. 7 is a schematic cross-sectional view illustrating a contact pad after being formed according to an embodiment of the invention. Referring to fig. 7, a plurality of contact holes may be formed in the film 150 to expose the bottom conductive layer 134 and the top conductive layer 136, respectively. Then, contact pads, i.e., the first contact pad 114 and the second contact pad 116, may be filled into each contact hole. Thereby, the first contact pad 114 may be electrically coupled to the bottom conductive layer 134, and the second contact pad 116 may be electrically coupled to the top conductive layer 136.

Fig. 8 is a cross-sectional view of a film layer after a cut-off portion is formed therein according to an embodiment of the invention. Referring to fig. 8, the

truncations

112 and 152 may be formed by removing a portion of the film layer 150. Accordingly, the first portion 122 of the sacrificial layer may be exposed from the bottom of the truncation 112, and a portion of the base layer 130 may be exposed from the bottom of the truncation 152. Although the cut-off

portions

112 and 152 are shown in fig. 8 as being separate, the cut-off

portions

112 and 152 may also be continuous pores, such as ring pores, when the structure shown in fig. 8 is viewed from the top to the bottom. Further, the shape of the

cutout portions

112 and 152 in plan view is not limited to the shape shown in fig. 1. For example, the

truncations

112 and 152 may be polygonal apertures that partially surround the membrane layer 106.

Fig. 9 is a schematic cross-sectional view illustrating a through-substrate cavity formed according to an embodiment of the invention. Referring to fig. 9, in step 210, a cavity 120 may be formed through the substrate 102 by etching the backside of the substrate 102. Thus, the bottom surface of the first portion 122 of the sacrificial layer may be exposed from the cavity 120. The cavity 120 may include an opening O. The edge 120e of the cavity 120 is adjacent to the film layer disposed on the front surface of the substrate 102, and the edge 120e of the cavity 120 may be used to define the opening O.

The aperture length defined by the opening O may be shorter than the distance D defined by the opposing points of the barrier structure 104. Since the distance D may be used to define the position of the membrane layer in the piezoelectric micromachined ultrasonic transducer, and the distance D is mainly defined by the barrier structure 104, even if the position or size of the opening O is slightly shifted, the position and size of the membrane layer of the piezoelectric micromachined ultrasonic transducer will not be changed.

Thereafter, in step 212, an etching process may be performed to remove the first portion 122 of the sacrificial layer exposed to the cavity 120. When the sacrificial layer is composed of silicon oxide, the etchant may be gaseous hydrofluoric Acid (VHF). In removing the sacrificial layer exposed to the cavity 120, since the etch selectivity of the sacrificial layer compared to the barrier structure 104 and the base layer 130 is greater than 10, the etchant can only remove the first portion 122 of the sacrificial layer. In addition, since the barrier structure 104 prevents the etchant from reaching the second portion 124 of the sacrificial layer, the second portion 124 of the sacrificial layer is not etched away during the etching process. Thus, a structure comprising a released membrane (released membrane) as shown in FIG. 2 can be obtained.

According to the above-described embodiment of the present invention, since the barrier structure 104 is formed by etching the front surface of the substrate 102, the barrier structure 104 may be closely attached to the substrate 102 without being peeled off from the substrate 102, and may have vertical sidewalls. In addition, the size and the position of the film 106 can be precisely defined without being affected by the size and the position of the cavity 120 below the film 106, so that the uniformity of the resonant frequency between the piezoelectric micromachined ultrasonic transducers 100 is effectively improved, and the reliability and the electrical performance of each piezoelectric micromachined ultrasonic transducer are further improved.

The above description is only a preferred embodiment of the present invention, and all the equivalent changes and modifications made by the claims of the present invention should fall within the protection scope of the present invention.

Claims

1. A piezoelectric micromachined ultrasonic transducer, comprising:

a substrate including a cavity penetrating the substrate;

a blocking structure protruding from a top surface of the substrate and surrounding an edge of the cavity; and

a membrane layer disposed over the cavity and attached to the barrier structure,

wherein the substrate and the barrier structure comprise the same material.

2. The piezoelectric micromachined ultrasonic transducer of claim 1, wherein the edge of the cavity is adjacent to the membrane layer.

3. The piezoelectric micromachined ultrasonic transducer of claim 1, wherein the blocking structure is an annular, polygonal, or arcuate structure disposed along an edge of the membrane.

4. The piezoelectric micromachined ultrasonic transducer of claim 1, wherein the membrane layer is a multilayer structure.

5. The piezoelectric micromachined ultrasonic transducer of claim 4, wherein the multilayer structure comprises:

a base layer;

a dielectric layer disposed on the base layer;

two conductive layers stacked on the base layer; and

and the piezoelectric layer is arranged between the two conductive layers.

6. The piezoelectric micromachined ultrasonic transducer of claim 5, wherein the composition of the base layer is different from the composition of the piezoelectric layer.

7. The piezoelectric micromachined ultrasonic transducer of claim 1, further comprising a cut through the membrane layer.

8. The piezoelectric micromachined ultrasonic transducer of claim 7, wherein the blocking structure is disposed along a periphery of the cutout.

9. The piezoelectric micromachined ultrasonic transducer of claim 1, further comprising a sacrificial layer disposed on the top surface of the substrate and surrounding the barrier structure.

10. The piezoelectric micromachined ultrasonic transducer of claim 9, wherein a top surface of the sacrificial layer is aligned with a top surface of the barrier structure.

11. A method of fabricating a piezoelectric micromachined ultrasonic transducer, comprising:

providing a substrate;

etching the substrate to form a barrier structure protruding from the substrate;

forming a sacrificial layer on the substrate, wherein the barrier structure is exposed to the sacrificial layer;

forming a film layer on the barrier structure and the sacrificial layer;

forming a cavity penetrating through the substrate to expose a portion of the sacrificial layer; and

utilizing the barrier structure as an etch stop structure to remove the portion of the sacrificial layer exposed to the cavity.

12. The method of claim 11, wherein the blocking structure is an annular, polygonal, or curved structure disposed along an edge of the membrane.

13. The method of fabricating a piezoelectric micromachined ultrasonic transducer of claim 11, wherein the substrate and the barrier structure comprise the same material.

14. The method of fabricating a piezoelectric micromachined ultrasonic transducer according to claim 11, wherein the step of forming the sacrificial layer on the substrate comprises:

depositing a sacrificial material on the substrate and the barrier structure; and

planarizing the sacrificial material to expose the barrier structure.

15. The method of fabricating a piezoelectric micromachined ultrasonic transducer according to claim 11, wherein the membrane is a multilayer structure comprising:

a base layer;

a dielectric layer disposed on the base layer;

two conductive layers stacked on the base layer; and

and a piezoelectric layer disposed between the two conductive layers.

16. The method of fabricating a piezoelectric micromachined ultrasonic transducer according to claim 11, further comprising forming a cut through the membrane.

17. The method of fabricating a piezoelectric micromachined ultrasonic transducer according to claim 16, wherein the blocking structure is disposed along a periphery of the cutout.

18. The method of fabricating a piezoelectric micromachined ultrasonic transducer according to claim 11, wherein when the step of forming the sacrificial layer on the substrate is completed, the sacrificial layer comprises:

a first portion surrounded by the barrier structure; and

a second portion separated from the first portion by the barrier structure.

19. The method of fabricating a piezoelectric micromachined ultrasonic transducer according to claim 18, wherein the second portion of the sacrificial layer is retained on the substrate when the step of removing the portion of the sacrificial layer exposed to the cavity is completed.

20. The method of fabricating a piezoelectric micromachined ultrasonic transducer according to claim 11, wherein in the step of removing the portion of the sacrificial layer exposed to the cavity, an etch selectivity ratio between the sacrificial layer and the barrier structure is greater than 10.