CN113883318B

CN113883318B - PWM driving method and system of AMT electromagnetic valve

Info

Publication number: CN113883318B
Application number: CN202111173721.9A
Authority: CN
Inventors: 刘福伟; 姚元吉; 杨钢
Original assignee: Dongfeng Trucks Co ltd
Current assignee: Dongfeng Trucks Co ltd
Priority date: 2021-09-30
Filing date: 2021-09-30
Publication date: 2024-02-02
Anticipated expiration: 2041-09-30
Also published as: CN113883318A

Abstract

The invention discloses a PWM driving method and a system of an AMT electromagnetic valve, wherein the process is as follows: setting a plurality of PWM sequences, and selecting one or more PWM sequences; an output command of high level or low level for a duration of output in a start output period according to the selected PWM sequence; the main control chip outputs high level or low level of duration time to the electromagnetic valve according to the output command, and after the output time is over, the main control chip sends out a level switching trigger command through internal peripheral interrupt; and controlling the main control chip to switch the output high level and the output low level according to the level switching trigger command and the PWM sequence. The invention can realize the level switching rapidly in real time, can control the delay error to be even smaller in microsecond level, and greatly reduces the larger delay response caused by the increase of periodic task load in the prior art.

Description

PWM driving method and system of AMT electromagnetic valve

Technical Field

The invention belongs to the technical field of electromagnetic valve driving, and particularly relates to a PWM driving method and system of an AMT electromagnetic valve.

Background

The control of the AMT gear selecting and shifting actuating mechanism and the clutch of the commercial vehicle is realized by controlling the action of the mechanism by controlling the air source pressure or the engine oil pressure through a series of electromagnetic valves. The existing design scheme of electromagnetic valve PWM driving software mostly sets electromagnetic valve opening time (or closing time) in the 5ms period scheduling task of the operating system, the electromagnetic valve is closed (or opened) after the opening time (or closing time) is finished, then the electromagnetic valve opening time (or opening and closing time) is continuously set in the next period task, and so on, by setting different electromagnetic valve opening/closing times in the multiple period scheduling task, the electromagnetic valve opening/closing times are spliced together, and finally, the PWM driving waveform with the preset frequency and duty ratio is output, and the application example is described with reference to fig. 1.

In fig. 1, the expected output period is 16ms, where the PWM waveform with high level 6ms and low level 10ms can be spliced by 4 tasks with 5ms, where the first task is to set the continuous output high level, the second task is to set the continuous output high level 1ms and then output low level 6ms, the third task is to continuously output low level, the fourth task is to output 1ms low level and then output high level. However, since the second task has a higher load rate, the setting command is issued after a delay of 1ms (delay 1 ms), resulting in that the final 4 tasks splice and output waveforms of 7ms at high level and 9ms at low level, which have larger errors than expected.

Under the prior art scheme, the output of the electromagnetic valve PWM waveform is formed by splicing the opening/closing time set in a plurality of 5ms periodic scheduling tasks, and the set time of the opening/closing time of the electromagnetic valve in a specific certain task depends on the sending time of a set instruction in the task. Because the task loads may be different in different task periods, the time when the command is sent is also different, and the PWM waveform of the solenoid valve is eventually inconsistent with the expected result, and in extreme cases, the error may reach several milliseconds, and the error may eventually cause the execution action of the control system to be out of control.

Disclosure of Invention

The invention aims to solve the defects in the background technology, and provides a PWM driving method and system for an AMT electromagnetic valve, which can realize level switching rapidly in real time and control delay errors to be at microsecond level or even smaller.

The technical scheme adopted by the invention is as follows: a PWM driving method of AMT electromagnetic valve, presume a plurality of PWM sequences, choose one or more PWM sequences;

an output command of high level or low level for a duration of output in a start output period according to the selected PWM sequence;

the main control chip outputs high level or low level of duration time to the electromagnetic valve according to the output command, and after the output time is over, the main control chip sends out a level switching trigger command through internal peripheral interrupt;

and controlling the main control chip to switch the output high level and the output low level according to the level switching trigger command and the PWM sequence.

Further, the PWM sequence includes a sequence number, a duty cycle, a PWM waveform pattern, and an output cycle.

Further, the PWM waveform pattern includes a duty ratio and an output order of high and low levels in one output period.

Further, when a plurality of PWM sequences are selected, the main control chip sends out a sequence switching trigger command through internal peripheral interrupt, and the main control chip is controlled to switch the PWM sequences according to the sequence switching trigger command and the next PWM sequence to be switched.

Further, the selected plurality of PWM sequences are sequentially or alternately switched.

A PWM driving system of an AMT electromagnetic valve comprises

The sequence setting module is used for setting a plurality of PWM sequences and outputting one or more PWM sequences to the control module;

the control module is used for outputting a high-level or low-level output command with duration to the main control chip according to the received PWM sequence in an initial output period and outputting a high-level or low-level output command with duration to the main control chip according to a level switching trigger command

The main control chip is used for outputting high level or low level of duration to the electromagnetic valve according to the output command, and sending a level switching trigger command to the control module through internal peripheral interrupt after the output time is over.

Further, when the sequence setting module outputs a plurality of PWM sequences, the main control chip sends out a sequence switching trigger command through internal peripheral interrupt, and the control module controls the main control chip to switch the PWM sequences according to the sequence switching trigger command and the next PWM sequence to be switched.

Further, the plurality of PWM sequences outputted are sequentially switched or alternately switched.

The beneficial effects of the invention are as follows:

1. the sequence mode of PWM control is added, namely, a series of PWM sequences are predefined according to the actual application requirement of a control system, so that most application scenes can be covered, and the universality is strong.

2. The application layer software only needs to send a command once to enter a sequence mode according to the need in a periodic task, and the bottom layer software can control the repeated output of the designated PWM sequence according to the command, so that the response speed is high.

3. The switching of the high level and the low level in the PWM waveform is performed in the interrupt of the PWM peripheral of the main control chip, so that the larger delay response caused by the increase of the periodic task load in the prior art scheme is greatly reduced.

Drawings

Fig. 1 is a schematic diagram of a prior art PWM drive waveform.

Fig. 2 is a schematic diagram of the driving system of the present invention.

Fig. 3 is a schematic diagram of a PWM waveform of a repetitive output sequence according to the present invention.

Fig. 4 is a schematic diagram of switching between different sequences according to the present invention.

Detailed Description

The following describes the embodiments of the present invention further with reference to the drawings. The description of these embodiments is provided to assist understanding of the present invention, but is not intended to limit the present invention. In addition, technical features of the embodiments of the present invention described below may be combined with each other as long as they do not collide with each other.

In the description of the present invention, it should be understood that the terms "upper," "lower," "front," "rear," "left," "right," "top," "bottom," "inner," "outer," and the like indicate or are based on the orientation or positional relationship shown in the drawings, merely to facilitate description of the present invention and to simplify the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention.

Where the terms "comprising," "having," and "including" are used in this specification, there may be additional or alternative parts unless the use is made, the terms used may generally be in the singular but may also mean the plural.

It should be noted that although the terms "first," "second," "top," "bottom," "one side," "another side," "one end," "the other end," etc. may be used and used in this specification to describe various components, these components and portions should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, with top and bottom elements, under certain circumstances, also being interchangeable or convertible with one another; the components at one end and the other end may be the same or different in performance from each other.

In addition, when constituting the components, although not explicitly described, it is understood that a certain error region is necessarily included.

In describing positional relationships, for example, when positional sequences are described as "on," "above," "below," and "next," unless words or terms such as "just" or "directly" are used, it is also possible to include cases where there is no contact or contact between them. If a first element is referred to as being "on" a second element, it does not mean that the first element must be located above the second element in the figures. The upper and lower portions of the component will change in response to changes in the angle and orientation of the view. Thus, in the drawings or in actual construction, if it is referred to that a first element is "on" a second element, it can comprise the case that the first element is "under" the second element and the case that the first element is "over" the second element. In describing the time relationship, unless "just" or "direct" is used, a case where there is no discontinuity between steps may be included in describing "after", "subsequent" and "preceding".

The features of the various embodiments of the invention may be combined or spliced with one another, either in part or in whole, and may be implemented in a variety of different configurations as will be well understood by those skilled in the art. Embodiments of the present invention may be performed independently of each other or may be performed together in an interdependent relationship.

As shown in FIG. 2, the present invention provides a PWM driving system of an AMT solenoid valve, comprising

The sequence setting module (namely application software) is used for setting a plurality of PWM sequences and outputting one or more PWM sequences to the control module; the PWM sequence includes a sequence number, a duty cycle, a PWM waveform pattern, and an output cycle. As shown in table 1 below, the PWM waveform pattern includes a duty ratio and an output order of high and low levels in one output period.

Table 1 PWM waveform patterns in predefined PWM sequences

A control module (i.e. bottom software) for outputting a high-level or low-level output command with duration to the main control chip according to the received PWM sequence in an initial output period, and for outputting a high-level or low-level output command with duration to the main control chip according to the level switching trigger command

The main control chip (including PWM peripheral interrupt) is used for outputting high level or low level of duration to the electromagnetic valve according to the output command, and sending a level switching trigger command to the control module through the internal peripheral interrupt after the output time is over.

When the sequence setting module outputs a plurality of PWM sequences, the main control chip sends out a sequence switching trigger command through internal peripheral interrupt, and the control module controls the main control chip to switch the PWM sequences according to the sequence switching trigger command and the next PWM sequence to be switched. The output PWM sequences are sequentially or alternately switched.

Based on the PWM driving system, the invention also provides a PWM driving method of the AMT electromagnetic valve, which comprises the following steps of

The sequence setting module sets a plurality of PWM sequences, and selects one or more PWM sequences to output to the control module; the PWM sequence includes a sequence number, a duty cycle, a PWM waveform pattern, and an output cycle. The PWM waveform form includes a duty ratio and an output order of high and low levels in one output period.

The control module outputs a high-level or low-level output command with duration time in a starting output period according to the selected PWM sequence; and controlling the main control chip to switch the output high level and the output low level according to the level switching trigger command and the PWM sequence.

when a plurality of PWM sequences are selected, the main control chip sends out a sequence switching trigger command through internal peripheral interrupt, and the main control chip is controlled to switch the PWM sequences according to the sequence switching trigger command and the next PWM sequence to be switched. The selected plurality of PWM sequences are sequentially or alternately switched.

In the invention, a PWM 'sequence mode' is used as a main control mode, because in practical application, most of the time, PWM waveforms are switched among a limited number of sequences, and once a sequence is selected, the PWM waveforms are repeatedly output according to the sequence for most of the time, and in a few cases, the desired waveforms are spliced and output by a plurality of sequences. In order to cope with the scene, the scheme adds a 'sequence mode' of PWM driving, and the bottom software predefines a limited common PWM sequence, wherein the sequence attribute comprises cycle, duty ratio, high-low level sequence and the like, the application layer software only needs to send out a selected sequence command once in a cycle task, and then the bottom software can control the main control chip to repeatedly output a designated PWM sequence after receiving the command; when different sequences are required to be switched or spliced into a new waveform, the application layer software can send out the next sequence to be switched within a 5ms scheduling period, then the bottom layer software receives a switching command sent out by the application layer software, and after the ongoing sequence output is completed, the next sequence is switched to the new sequence output. In the scheme, the switching of the high level and the low level of the PWM waveform in one sequence and the switching among different sequences are completely triggered by the interruption of the PWM peripheral of the main control chip, the interruption belongs to the function of chip hardware, and the real-time property of response is far higher than that of software, so that the switching of the level can be realized in real time and rapidly, the delay error is controlled to be even smaller at the microsecond level (determined by the performance of the main control chip), the influence on the control precision of a control system is negligible, and the larger delay response caused by the increase of the periodic task load in the prior art scheme is greatly reduced.

In addition, the scheme adopts the predefined PWM sequence, so that the control algorithm of the application layer software is greatly simplified. In the original scheme, the duration time of the high level and the low level is required to be calculated and updated in each 5ms period task, and the scheme can be realized only by inputting a specified serial number.

Example 1: repeatedly outputting PWM waveforms of a specified sequence

First, a limited number of PWM waveform sequences are predefined according to the control system requirements, wherein the attributes of the sequences include a period, a duty cycle, a high-low level sequence, and a switching time, for example, 8 sequences are predefined in this example (for definition of the sequences, refer to table 1).

The PWM waveform control timing of the repeated output sequence 4 (6 ms high level, 10ms low level) in the "sequence mode" is described as follows (refer to fig. 3):

(1) The application layer software sets a PWM output control mode as a sequence mode in a 5ms periodic task according to control requirements, and simultaneously designates a sequence number as 4 (16 ms period, 6ms high level, 10ms low level);

(2) The bottom layer software controls the PWM peripheral of the main control chip to start and output a designated PWM waveform sequence according to the sequence mode command and the corresponding sequence number of the application layer software;

(3) In the example, the main control chip outputs a high level for 6ms, when the period of time of the main control chip is 6ms, the PWM peripheral interrupt of the main control chip triggers a PWM interrupt service routine positioned at the bottom software, and the high-low level switching is performed in the interrupt service routine, namely the output level is switched from a low level to a high level, and meanwhile, the high level output duration is set to be 10ms;

(4) When the high level duration reaches 10ms, the PWM peripheral equipment of the main control chip is triggered to interrupt again, meanwhile, whether the sequence mode of the application layer and the sequence number are updated or not is detected in an interrupt service program, if not, the process is repeated continuously according to the current sequence, namely 6ms high level and 10ms low level are started again and output. If there is an update, then execute according to the new pattern and sequence.

In the step (3) and the step (4), the switching of the level between the high level of 6ms and the low level of 10ms is triggered by the interrupt of the PWM peripheral of the main control chip, and then the duration of the new level is set in the interrupt service program. In addition, as long as the serial number command sent by the application layer is not updated, the PWM waveform of the appointed sequence can be repeatedly output completely through interruption, and the instantaneity is further ensured.

Example 2: switching between different sequences

First, a limited number of PWM waveform sequences are predefined as in example 1, in which an output sequence 4 (6 ms high level, 10ms low level) is set first, and then an output sequence 5 (4 ms high level, 16ms low level) is set, and the control timing is described as follows (refer to fig. 4):

(1) The application layer software sets the PWM output control mode as a sequence mode in a 5ms periodic task, and simultaneously designates a sequence number as 4 (6 ms high level and 10ms low level);

(2) The bottom layer software controls the PWM peripheral equipment of the main control chip to start and output 6ms high level according to the sequence number set by the application layer software, and simultaneously sets a 'start new sequence output flag bit' as 1, and the flag bit is circularly read in a 5ms periodic task by the application layer software;

(3) Consistent with the step (3) in the example 1, when the duration of the high level reaches 6ms, the PWM peripheral of the main control chip is triggered to interrupt, and the high level of 10ms is started and output in an interrupt service routine;

(4) In the process of the steps, the application layer software continuously reads a 'start new sequence output flag bit' in the step (2) in a 5ms periodic task, and once the flag bit is 1, a new sequence number is set, in the example, 5 is set, and meanwhile, the flag bit is cleared;

(5) When the 10ms high level duration of the sequence 4 is over, the PWM peripheral interrupt of the main control chip is triggered again, a new sequence number 5 (4 ms high level and 16ms low level) set by the application layer software is detected in an interrupt service routine, and then the 4ms high level is started to be output;

(6) And (5) repeating the steps (2) to (5) in the subsequent control time sequence, and setting a new sequence by the application layer software according to the step (4).

In accordance with example (1), switching of high and low levels in a single sequence and switching between different sequences are also realized by interruption in this example, so that the real-time performance of PWM waveform output is ensured.

It should be understood that the specific order or hierarchy of steps in the processes disclosed are examples of exemplary approaches. Based on design preferences, it is understood that the specific order or hierarchy of steps in the processes may be rearranged without departing from the scope of the present disclosure. The accompanying method claims present elements of the various steps in a sample order, and are not meant to be limited to the specific order or hierarchy presented.

The foregoing description of the embodiments and specific examples of the present invention has been presented for purposes of illustration and description; this is not the only form of practicing or implementing the invention as embodied. The description covers the features of the embodiments and the method steps and sequences for constructing and operating the embodiments. However, other embodiments may be utilized to achieve the same or equivalent functions and sequences of steps.

In the foregoing detailed description, various features are grouped together in a single embodiment for the purpose of streamlining the disclosure. This method of disclosure is not to be interpreted as reflecting an intention that the claimed embodiments of the subject matter require more features than are expressly recited in each claim. Rather, as the following claims reflect, invention lies in less than all features of a single disclosed embodiment. Thus the following claims are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate preferred embodiment of this invention.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. As will be apparent to those skilled in the art; various modifications to these embodiments will be readily apparent, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the disclosure. Thus, the present disclosure is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

The foregoing description includes examples of one or more embodiments. It is, of course, not possible to describe every conceivable combination of components or methodologies for purposes of describing the aforementioned embodiments, but one of ordinary skill in the art may recognize that many further combinations and permutations of various embodiments are possible. Accordingly, the embodiments described herein are intended to embrace all such alterations, modifications and variations that fall within the scope of the appended claims. Furthermore, as used in the specification or claims, the term "comprising" is intended to be inclusive in a manner similar to the term "comprising," as interpreted when employed as a transitional word in a claim. Furthermore, any use of the term "or" in the specification of the claims is intended to mean "non-exclusive or".

Those of skill in the art will further appreciate that the various illustrative logical blocks (illustrative logical block), units, and steps described in connection with the embodiments of the invention may be implemented by electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components (illustrative components), elements, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design requirements of the overall system. Those skilled in the art may implement the described functionality in varying ways for each particular application, but such implementation is not to be understood as beyond the scope of the embodiments of the present invention.

The various illustrative logical blocks or units described in the embodiments of the invention may be implemented or performed with a general purpose processor, a digital signal processor, an Application Specific Integrated Circuit (ASIC), a field programmable gate array or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described. A general purpose processor may be a microprocessor, but in the alternative, the general purpose processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a digital signal processor and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a digital signal processor core, or any other similar configuration.

The foregoing description is only of the preferred embodiments of the invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, and that various obvious changes, rearrangements, combinations, and substitutions can be made by those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.

Claims

1. A PWM driving method of an AMT electromagnetic valve is characterized in that:

setting a plurality of PWM sequences, and selecting one or more PWM sequences; when different sequences are required to be switched or spliced into a new waveform, a next sequence to be switched is sent out in a 5ms scheduling period;

outputting an output command of high level or low level for a duration in a start output period according to the selected PWM sequence; after completing the output of the ongoing sequence, sending out an output command for switching to a new sequence;

2. The PWM driving method of AMT electromagnetic valve according to claim 1, characterized in that: the PWM sequence includes a sequence number, a duty cycle, a PWM waveform pattern, and an output cycle.

3. The PWM driving method of the AMT electromagnetic valve according to claim 2, characterized in that: the PWM waveform pattern includes a duty ratio and an output order of high and low levels in one output period.

4. The PWM driving method of AMT electromagnetic valve according to claim 1, characterized in that: when a plurality of PWM sequences are selected, the main control chip sends out a sequence switching trigger command through internal peripheral interrupt, and the main control chip is controlled to switch the PWM sequences according to the sequence switching trigger command and the next PWM sequence to be switched.

5. The PWM driving method of AMT electromagnetic valve according to claim 4, characterized in that: the selected plurality of PWM sequences are sequentially or alternately switched.

6. The PWM driving system of the AMT electromagnetic valve is characterized in that: comprising

The sequence setting module is used for setting a plurality of PWM sequences and outputting one or more PWM sequences to the control module; when different sequences are required to be switched or spliced into a new waveform, a next sequence to be switched is sent out in a 5ms scheduling period;

the control module is used for outputting a high-level or low-level output command with duration to the main control chip according to the received PWM sequence in an initial output period, outputting the high-level or low-level output command with duration to the main control chip according to a level switching trigger command, and sending out an output command switched to a new sequence after completing the output of the ongoing sequence;

7. The PWM driving system of AMT electromagnetic valve according to claim 6, further comprising: the PWM sequence includes a sequence number, a duty cycle, a PWM waveform pattern, and an output cycle.

8. The PWM driving system of AMT electromagnetic valve according to claim 7, wherein: the PWM waveform pattern includes a duty ratio and an output order of high and low levels in one output period.

9. The PWM driving system of AMT electromagnetic valve according to claim 6, further comprising: when the sequence setting module outputs a plurality of PWM sequences, the main control chip sends out a sequence switching trigger command through internal peripheral interrupt, and the control module controls the main control chip to switch the PWM sequences according to the sequence switching trigger command and the next PWM sequence to be switched.

10. The PWM driving system of AMT electromagnetic valve according to claim 9, wherein: the output PWM sequences are sequentially or alternately switched.