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CN113872429B - PFC converter output capacitance value and harmonic monitoring device and method - Google Patents

PFC converter output capacitance value and harmonic monitoring device and method Download PDF

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Publication number
CN113872429B
CN113872429B CN202111023028.3A CN202111023028A CN113872429B CN 113872429 B CN113872429 B CN 113872429B CN 202111023028 A CN202111023028 A CN 202111023028A CN 113872429 B CN113872429 B CN 113872429B
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resistor
capacitor
output
harmonic
voltage
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CN113872429A (en
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张博
姚凯
邵蕃光
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Nanjing University of Science and Technology
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Nanjing University of Science and Technology
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
    • G01R23/16—Spectrum analysis; Fourier analysis
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/26—Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
    • G01R27/2605—Measuring capacitance
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/14—Arrangements for reducing ripples from DC input or output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Mathematical Physics (AREA)
  • Measurement Of Current Or Voltage (AREA)

Abstract

The invention discloses a PFC converter output capacitance value and harmonic monitoring device and method. The converter is a PFC converter and is suitable for any topology. By using the method, the harmonic times, the harmonic content and the output capacitance C contained in the input current of the PFC converter can be measured. The device comprises a PFC main circuit, a ripple isolation amplifying circuit, a trigger circuit, a signal processing module and a display module. The method comprises the following steps: firstly, a trigger circuit determines sampling time, then, output voltage ripple is sampled, fourier decomposition is carried out in a signal processing module, harmonic times in input current are determined, and contents of all the harmonics and an output capacitance C are calculated and displayed in real time. The scheme provided by the invention can monitor and display the capacitance value C of the output capacitor and the input current harmonic wave under the condition that the main circuit is not stopped, is simple and easy to realize, and provides a basis for the life prediction of the capacitor and the power supply.

Description

PFC converter output capacitance value and harmonic monitoring device and method
Technical Field
The invention relates to the technical field of monitoring in an electric energy conversion device, in particular to a PFC converter output capacitance value and harmonic monitoring device and method.
Background
Aluminum electrolytic capacitors are often used in PFC converters as output capacitors to balance input and output power and suppress output voltage ripple, however, aluminum electrolytic capacitors are the most susceptible devices to failure in converters. Failure of aluminum electrolytic capacitors is generally manifested as a decrease in capacitance C and an increase in ESR. When the output capacitor ages, ripple of the output voltage is increased, the performance of the converter is affected, and loss is increased, so that monitoring parameters of the aluminum electrolytic capacitor in the PFC converter has very important significance.
Currently, studies on capacitance monitoring technologies are mainly divided into two main categories: off-line monitoring and on-line/quasi-on-line monitoring. The off-line monitoring calculates the capacitance parameters by applying excitation signals to both ends of the capacitance to be measured and measuring the resulting response, which has the advantage of simplicity and reliability, but the method requires equipment to be shut down and sometimes even the capacitance to be measured to be removed, so the method has low practicability. Compared with the off-line monitoring, the on-line monitoring can calculate the capacitance parameters by adding the information such as the voltage, the current and the like when the sensor measures the capacitance to work under the condition that the circuit works normally, the method can accurately monitor the working state of the capacitance in real time, but the cost is too high, and the added sensor also can damage the original structure of the circuit to influence the performance of the circuit.
Disclosure of Invention
The invention aims to overcome the defects of the background technology and provides a PFC converter output capacitance value and harmonic monitoring device and method.
The invention adopts the following technical scheme for solving the technical problems:
the PFC converter outputs a capacitance value and a harmonic monitoring device and method, the converter is of any circuit topology, input current of any working mode contains harmonic PFC converter, and the PFC converter comprises a PFC main circuit (1), a ripple isolation amplifying circuit (2), a trigger circuit (3), a signal processing module (4) and a display unit (5), wherein:
the input end of the ripple isolation amplifying circuit (2) is connected with the output voltage end of the PFC main circuit (1), and the output end of the ripple isolation amplifying circuit (2) is connected with the input end of the signal processing module (4); the input end of the trigger circuit (3) is connected with the input end of the PFC main circuit (1), and the circuit output end of the trigger circuit (3) is connected with the input end of the signal processing module (4); the output end of the signal processing module (4) is connected with the input end of the display unit (5).
Further, the PFC main circuit (1) comprises an input voltage source v in EMI filter, rectifier bridge RB, PFC converter, output capacitor C and load resistor R L Wherein:
the input voltage source v in The positive electrode of the (a) is connected with one end of the EMI filter, and the other end of the EMI filter is connected with the positive electrode of the (b); the input end of the trigger circuit (3) is input with a voltage source v in The negative electrode of (2) is a reference point zero GND; the output end of the EMI filter is connected with the input end of the rectifier bridge RB; the output end of the rectifier bridge RB is connected with the PFC converter, and the output end of the PFC converter is connected with the output capacitor C and the load resistor R L The other end of the output capacitor C is a reference potential zero GND; load resistor R L The other end of (2) is the reference potential zero GND.
Further, the ripple isolation amplifying circuit (2) comprises a first resistor R 1 A second resistor R 2 First capacitor C 1 First voltage transformer T 1 Third resistor R 3 Fourth resistor R 4 A second capacitor C 2 First operational amplifier amp 1 Fifth resistor R 5 Sixth resistor R 6 Third capacitor C 3 Seventh resistor R 7 Eighth resistor R 8 First bias power supply V offset . Wherein:
the first resistor R 1 One end is connected with the output voltage of the PFC main circuit (1), and the other end is respectively connected with the second resistor R 2 First capacitor C 1 Connecting; second resistor R 2 The other end of the capacitor is connected with a reference potential zero GND; first capacitor C 1 The other end of the transformer is connected with a first voltage transformer T 1 Is the same-name end of the primary side of the steel plate; first voltage transformer T 1 The other end of the primary side of (1) is connected with a reference potential zero GND, a first voltage transformer T 1 The same-name end of the secondary side of the transformer is connected with an analog reference potential zero point AGND, a first voltage transformer T 1 The other end of the secondary side of (B) is connected with a third resistor R 3 And a fourth resistor R 4 Is a member of the group; third resistor R 3 The other end of the capacitor is connected with an analog reference potential zero point AGND; fourth resistor R 4 The other end of (C) is connected with a second capacitor C 2 And a first operational amplifier amp 1 Is provided with a non-inverting input terminal; second capacitor C 2 The other end of the capacitor is connected with an analog reference potential zero point; first operational amplifier amp 1 The inverting input ends of (a) are respectively connected with a fifth resistor R 5 Sixth resistor R 6 And a third capacitor C 3 Is a first operational amplifier amp 1 The output end of (2) is connected with a sixth resistor R 6 And a third capacitor C 3 The other end of (2) and a seventh resistor R 7 Is a member of the group; fifth resistor R 5 The other end of the capacitor is connected with an analog reference potential zero point AGND; seventh resistor R 7 The other end of (B) is connected with an eighth resistor R 8 And an input of the signal processing module (4); eighth resistor R 8 The other end of (a) is connected with a first bias power supply V offset Is a member of the group; first bias power supply V offset The other end of the capacitor is connected with an analog reference potential zero point AGND.
Further, the trigger circuit (3) comprises a ninth resistor R 9 Second voltage transformer T 2 Tenth resistor R 10 Second operational amplifier amp 2 Eleventh resistor R 11 Fourth capacitor C 4 First comparator comp 1 Wherein:
one end of the ninth resistor is connected with an input voltage source v in The other end is connected with a second voltage transformer T 2 Is the same-name end of the primary side of the steel plate; second voltage transformer T 2 The other end of the primary side of (1) is connected with a reference potential zero GND, a second voltage transformer T 2 The same-name end of the secondary side of the transformer is connected with an analog reference potential zero point AGND, and a second voltage transformer T 2 The other ends of the secondary sides of the (B) are respectively connected with a tenth resistor R 10 And a second operational amplifier amp 2 Is provided; the non-inverting input end of the second operational amplifier is connected with the analog reference potential zero point AGND, and the output ends are respectively connected with a tenth resistor R 10 The other end of (A) and the eleventh resistor R 11 Is a member of the group; eleventh resistor R 11 The other ends of the capacitors are respectively connected with a fourth capacitor C 4 And a first comparator comp 1 Is provided with a non-inverting input terminal; fourth capacitor C 4 The other end of the capacitor is connected with an analog reference potential zero point AGND; first comparator comp 1 The inverting input end of the signal processing module is connected with the analog reference potential zero point AGND, and the output end of the signal processing module (4).
Further, the signal processing module is a DSP chip TMS320F28335.
Further, the display unit is a 1602 liquid crystal display.
The PFC converter output capacitance value and harmonic monitoring device and method are characterized by comprising the following steps:
step 1, a trigger circuit obtains a zero time of an input voltage as a sampling time of an output voltage ripple;
step 2, after a pulse capturing unit in a signal processing module captures a trigger signal of a trigger circuit, setting a proper sampling frequency to sample output voltage ripples, carrying out Fourier decomposition on sampled data in the signal processing module, and determining harmonic times contained in input current;
step 3, after harmonic times are determined, calculating a harmonic calculation formula and a calculation formula of the capacitance value of the output capacitor according to theoretical derivation, and calculating the harmonic content and the capacitance value C of the output capacitor in a signal processing module;
and 4, sending the obtained output capacitance C and the content of each subharmonic into a display unit for real-time display.
The harmonic calculation formula in the step 3 and the calculation formula of the capacitance value of the output capacitor are as follows:
in the method, in the process of the invention,for each subharmonic, C is the capacitance of the output capacitor, P o For output power, V o For output voltage, ω is 100 pi, a i To output the value of each subharmonic of the voltage ripple.
Compared with the prior art, the technical scheme provided by the invention has the following technical effects:
1. the capacitance value and the harmonic wave of the output capacitor can be monitored under the condition that the main circuit is not stopped;
2. the method is simple and easy to realize without a current sensor, and provides a basis for life prediction of the capacitor and the power supply.
Drawings
Fig. 1 is a schematic diagram of the output capacitance and harmonic monitoring device and method of the PFC converter of the present invention.
Fig. 2 is a schematic diagram of a ripple isolation amplifying circuit in the present invention.
Fig. 3 is a schematic diagram of the trigger circuit according to the present invention.
Detailed Description
The invention will be described in further detail with reference to the accompanying drawings and specific examples.
This invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
1 theory derivation
When the power p is input in Greater than the output power P o When the output capacitor stores energy; when the power p is input in Less than the output power P o When the output capacitor releases energy to the load.
The expressions of the input voltage and the input current are as follows:
v in ＝V m sinωt (1)
wherein I is 2n+1 Is the magnitude of each odd harmonic.
Instantaneous input power p in Is represented by the expression:
the bus capacitor is used for balancing input and output energy, and the power p of the bus capacitor can be obtained because the loss on ESR is small and can be ignored C 。
The energy stored on the capacitor is expressed as:
wherein v is C (0) Is the initial voltage of the capacitor. The expression of the capacitance voltage can be obtained according to the formula (5) and the formula (6):
wherein the method comprises the steps ofIs the per unit value of each odd harmonic.
In the Taylor series, there are the following relational expressions:
equation (7) can be simplified from equation (8):
neglecting ESR, the output voltage is equal to the capacitor voltage.
Integrating the power frequency in a half power frequency period, and then averaging to obtain the power frequency:
the ripple expression of the output voltage is:
the expression of the output voltage ripple can be written in another form, where m=n+1:
regarding sin2 ωt as the fundamental wave of the output voltage ripple, define a 1 To output the fundamental wave amplitude of voltage ripple, a m To output the amplitude of the voltage ripple m-order harmonic, let a=p o /2ωCV o Then the output voltage ripple can be reduced to:
wherein the method comprises the steps of
Sampling the output voltage ripple, and performing Fourier decomposition to obtain the amplitude of each subharmonic of the output voltage ripple, namely a m . The harmonic frequency contained in the input current can be deduced from the output voltage ripple, the deduction is as follows:
if the output voltage is up to sin2mωt after Fourier decomposition, i.e., sin2 (m+1) ωt, sin2 (m+2) ωt, sin2 (m+3) ωt, etc., none exists, the coefficients a corresponding to these terms m+1 、a m+2 、a m+3 Equal to 0, i.e. the values of two adjacent harmonics are equal
Obviously, the above equation is satisfied when all the latter harmonics are 0. Therefore, when the output voltage ripple is up to sin2mωt after fourier decomposition, the highest order of harmonics included in the input current is 2m-1.
The highest order of harmonics contained in the input current is 2m-1, the output voltage ripple can be written as:
the expressions of A and the respective subharmonics, which can be obtained from the formulas (14) to (16) and (17), are:
since m=n+1, the input current harmonic expression can be written as:
the expression of the output capacitance C obtained by the expression (19) is:
wherein V is o For output voltage, ω is 100 pi, P o Is the output power. PFC converters can be classified into continuous mode, critical mode, and discontinuous mode from inductor current mode, PFC converters for inductor current continuous or critical modeThe inductor current is required to be sampled so as to control the current, and the value of the output power can be obtained through the sampled current; for PFC converters in the inductor current interrupt mode, the duty cycle can reflect the magnitude of the output power, i.e. knowing the rated power of the converter and the duty cycle at the rated power, the output power can be determined by the duty cycle when in operation. The monitoring and method of the input current harmonic wave and the output capacitance value of the PFC converter can be obtained based on the formulas (21) - (22).
Implementation of 2 ripple isolation amplifying circuit
Referring to fig. 1 and 2, the output voltage transient value of the pfc converter is v o By means of a resistor R 1 Resistance R 2 、R 3 After voltage division, pass through a capacitor C 1 And isolating direct current and extracting alternating current ripple components of the output voltage. 1:1 voltage transformer T is adopted 1 The secondary side voltage of the isolation ripple isolation amplifying circuit and the main power circuit is the alternating current ripple v of the output voltage of the PFC converter A . The PFC converter works in a high-frequency switching state, and because of the non-ideal characteristic of the output electrolytic capacitor, the output power frequency ripple voltage contains high-frequency switching components, which is unfavorable for collecting voltage signals, and the resistor R is used 4 Resistance R 5 Resistance R 6 Capacitance C 2 Capacitance C 3 Operational amplifier amp 1 The first-order active low-pass filter attenuates the switching noise and amplifies the signal to obtain v B . To match the input voltage range of the signal processing module (4), a bias power supply V is used for offset And resistance R 7 And R is 8 The bias voltage generated is superimposed on v B On, obtain the processed output voltage ripple v os . I.e.
Implementation of 3-shot circuits
In connection with fig. 3, the input voltage of the pfc converter is a high voltage, which cannot be directly sampled, using a resistor R 9 Resistance R 10 Operational amplifier amp 2 And a voltage transformer T 2 Converting input voltageForming voltage signal v with smaller amplitude and same waveform shape C V, i.e C ＝(R 10 /R 9 )v in ＝(R 10 /R 9 )V m sin ωt. Passing the signal through R 11 And C 4 The low-pass filter composed of the components is filtered and then sent to a zero-crossing comparator comp 1 The sampling trigger signal Trig1 at the moment 0 can be obtained.
4 output capacitance value and harmonic wave monitoring device and method of PFC converter of the invention
Referring to fig. 1, the output capacitance value and harmonic monitoring device and method of the PFC converter of the present invention include a PFC main circuit (1), a ripple isolation amplifying circuit (2), a trigger circuit (3), a signal processing module (4) and a display unit (5), wherein:
the input end of the ripple isolation amplifying circuit (2) is connected with the output voltage end of the PFC main circuit (1), and the output end of the ripple isolation amplifying circuit (2) is connected with the input end of the signal processing module (4); the input end of the trigger circuit (3) is connected with the input end of the PFC main circuit (1), and the circuit output end of the trigger circuit (3) is connected with the input end of the signal processing module (4); the output end of the signal processing module (4) is connected with the input end of the display unit (5).
Further, the PFC main circuit (1) comprises an input voltage source v in EMI filter, rectifier bridge RB, PFC converter, output capacitor C and load resistor R L Wherein:
the input voltage source v in The positive electrode of the (a) is connected with one end of the EMI filter, and the other end of the EMI filter is connected with the positive electrode of the (b); the input end of the trigger circuit (3) is input with a voltage source v in The negative electrode of (2) is a reference point zero GND; the output end of the EMI filter is connected with the input end of the rectifier bridge RB; the output end of the rectifier bridge RB is connected with the PFC converter, and the output end of the PFC converter is connected with the output capacitor C and the load resistor R L The other end of the output capacitor C is a reference potential zero GND; load resistor R L The other end of (2) is the reference potential zero GND.
Further, the ripple isolation amplifying circuit (2) comprises a first resistor R 1 A second resistor R 2 First capacitor C 1 First voltage transformerT 1 Third resistor R 3 Fourth resistor R 4 A second capacitor C 2 First operational amplifier amp 1 Fifth resistor R 5 Sixth resistor R 6 Third capacitor C 3 Seventh resistor R 7 Eighth resistor R 8 First bias power supply V offset . Wherein:
the first resistor R 1 One end is connected with the output voltage of the PFC main circuit (1), and the other end is respectively connected with the second resistor R 2 First capacitor C 1 Connecting; second resistor R 2 The other end of the capacitor is connected with a reference potential zero GND; first capacitor C 1 The other end of the transformer is connected with a first voltage transformer T 1 Is the same-name end of the primary side of the steel plate; first voltage transformer T 1 The other end of the primary side of (1) is connected with a reference potential zero GND, a first voltage transformer T 1 The same-name end of the secondary side of the transformer is connected with an analog reference potential zero point AGND, a first voltage transformer T 1 The other end of the secondary side of (B) is connected with a third resistor R 3 And a fourth resistor R 4 Is a member of the group; third resistor R 3 The other end of the capacitor is connected with an analog reference potential zero point AGND; fourth resistor R 4 The other end of (C) is connected with a second capacitor C 2 And a first operational amplifier amp 1 Is provided with a non-inverting input terminal; second capacitor C 2 The other end of the capacitor is connected with an analog reference potential zero point; first operational amplifier amp 1 The inverting input ends of (a) are respectively connected with a fifth resistor R 5 Sixth resistor R 6 And a third capacitor C 3 Is a first operational amplifier amp 1 The output end of (2) is connected with a sixth resistor R 6 And a third capacitor C 3 The other end of (2) and a seventh resistor R 7 Is a member of the group; fifth resistor R 5 The other end of the capacitor is connected with an analog reference potential zero point AGND; seventh resistor R 7 The other end of (B) is connected with an eighth resistor R 8 And an input of the signal processing module (4); eighth resistor R 8 The other end of (a) is connected with a first bias power supply V offset Is a member of the group; first bias power supply V offset The other end of the capacitor is connected with an analog reference potential zero point AGND.
Further, the trigger circuit (3) comprises a ninth resistor R 9 First, theTwo voltage transformer T 2 Tenth resistor R 10 Second operational amplifier amp 2 Eleventh resistor R 11 Fourth capacitor C 4 First comparator comp 1 Wherein:
one end of the ninth resistor is connected with an input voltage source v in The other end is connected with a second voltage transformer T 2 Is the same-name end of the primary side of the steel plate; second voltage transformer T 2 The other end of the primary side of (1) is connected with a reference potential zero GND, a second voltage transformer T 2 The same-name end of the secondary side of the transformer is connected with an analog reference potential zero point AGND, and a second voltage transformer T 2 The other ends of the secondary sides of the (B) are respectively connected with a tenth resistor R 10 And a second operational amplifier amp 2 Is provided; the non-inverting input end of the second operational amplifier is connected with the analog reference potential zero point AGND, and the output ends are respectively connected with a tenth resistor R 10 The other end of (A) and the eleventh resistor R 11 Is a member of the group; eleventh resistor R 11 The other ends of the capacitors are respectively connected with a fourth capacitor C 4 And a first comparator comp 1 Is provided with a non-inverting input terminal; fourth capacitor C 4 The other end of the capacitor is connected with an analog reference potential zero point AGND; first comparator comp 1 The inverting input end of the signal processing module is connected with the analog reference potential zero point AGND, and the output end of the signal processing module (4).
Further, the signal processing module (4) is a DSP chip TMS320F28335.
Further, the display unit (5) is a 1602 liquid crystal display.
The PFC converter output capacitance value and harmonic monitoring device and method are characterized by comprising the following steps:
step 1, a trigger circuit obtains a zero time of an input voltage as a sampling time of an output voltage ripple;
step 2, after a pulse capturing unit in a signal processing module captures a trigger signal of a trigger circuit, setting a proper sampling frequency to sample output voltage ripples, carrying out Fourier decomposition on sampled data in the signal processing module, and determining harmonic times contained in input current;
step 3, after harmonic times are determined, calculating a harmonic calculation formula and a calculation formula of the capacitance value of the output capacitor according to theoretical derivation, and calculating the harmonic content and the capacitance value C of the output capacitor in a signal processing module;
and 4, sending the obtained output capacitance C and the content of each subharmonic into a display unit for real-time display.
The harmonic calculation formula in the step 3 and the calculation formula of the capacitance value of the output capacitor are as follows:
in the method, in the process of the invention,for each subharmonic, C is the capacitance of the output capacitor, P o For output power, V o For output voltage, ω is 100 pi, a i To output the value of each subharmonic of the voltage ripple.
The monitoring device and the monitoring method can monitor the capacitance value and the harmonic content of the output capacitor of the PFC converter with harmonic contained in the input current in real time and predict the service lives of the electrolytic capacitor and the power supply.
Although the present invention has been described with reference to the foregoing embodiments, it will be apparent to those skilled in the art that the foregoing embodiments may be modified or equivalents may be substituted for elements thereof without departing from the spirit and principles of the invention.

Claims (4)

  1. The PFC converter output capacitance and harmonic monitoring device is characterized in that the converter is of any circuit topology, and input current of any working mode containsThe harmonic PFC converter comprises a PFC main circuit, a ripple isolation amplifying circuit, a trigger circuit, a signal processing module and a display unit, wherein the input end of the ripple isolation amplifying circuit (2) is connected with the output voltage end of the PFC main circuit (1), and the output end of the ripple isolation amplifying circuit (2) is connected with the input end of the signal processing module (4); the input end of the trigger circuit (3) is connected with the input end of the PFC main circuit (1), and the circuit output end of the trigger circuit (3) is connected with the input end of the signal processing module (4); the output end of the signal processing module (4) is connected with the input end of the display unit (5), and the ripple isolation amplifying circuit comprises a first resistorR 1 A second resistorR 2 A first capacitorC 1 First voltage transformerT 1 Third resistorR 3 Fourth resistorR 4 A second capacitorC 2 First operational amplifier amp 1 Fifth resistorR 5 Sixth resistorR 6 Third capacitorC 3 Seventh resistorR 7 Eighth resistorR 8 First bias power supplyThe first resistorR 1 One end is connected with the output voltage of the PFC main circuit (1), and the other end is respectively connected with a second resistorR 2 A first capacitorC 1 Connecting; second resistorR 2 The other end of the capacitor is connected with a reference potential zero GND; first capacitorC 1 The other end of the first voltage transformer is connected withT 1 Is the same-name end of the primary side of the steel plate; first voltage transformerT 1 The other end of the primary side of the transformer is connected with a reference potential zero GND, a first voltage transformerT 1 The same-name end of the secondary side of the transformer is connected with an analog reference potential zero point AGND, a first voltage transformerT 1 The other end of the secondary side of (B) is connected with a third resistorR 3 And a fourth resistorR 4 Is a member of the group; third resistorR 3 The other end of the capacitor is connected with an analog reference potential zero point AGND; fourth resistorR 4 The other end of (a) is connected with a second capacitorC 2 And a first operational amplifier amp 1 Is provided with a non-inverting input terminal; second capacitorC 2 The other end of the capacitor is connected with an analog reference potential zero point; first operational amplifier amp 1 The inverting input ends of (a) are respectively connected with a fifth resistorR 5 Sixth resistorR 6 And a third capacitorC 3 Is a first operational amplifier amp 1 The output end of (2) is connected with a sixth resistorR 6 And a third capacitorC 3 And the other end of (C) and seventh resistorR 7 Is a member of the group; fifth resistorR 5 The other end of the capacitor is connected with an analog reference potential zero point AGND; seventh resistorR 7 Is connected with an eighth resistorR 8 And an input of the signal processing module (4); eighth resistorR 8 The other end of the first power supply is connected with the first bias power supply>Is a member of the group; first bias supply +.>The other end of the trigger circuit is connected with an analog reference potential zero point AGND, and the trigger circuit comprises a ninth resistorR 9 Second voltage transformerT 2 Tenth resistorR 10 Second operational amplifier amp 2 Eleventh resistorR 11 Fourth capacitorC 4 First comparator comp 1 One end of the ninth resistor is connected with an input voltage source +.>The other end is connected with a second voltage transformerT 2 Is the same-name end of the primary side of the steel plate; second voltage transformerT 2 The other end of the primary side of the transformer is connected with a reference potential zero GND, a second voltage transformerT 2 The same-name end of the secondary side of the transformer is connected with an analog reference potential zero point AGND, and a second voltage transformerT 2 The other ends of the secondary sides of the pair of the capacitors are respectively connected with a tenth resistorR 10 And a second operational amplifier amp 2 Is provided; the non-inverting input end of the second operational amplifier is connected with the analog referenceThe output ends of the potential zero AGND are respectively connected with a tenth resistorR 10 Is the other end, eleventh resistorR 11 Is a member of the group; eleventh resistorR 11 The other ends of the first and second capacitors are respectively connected with a fourth capacitorC 4 And a first comparator comp 1 Is provided with a non-inverting input terminal; fourth capacitorC 4 The other end of the capacitor is connected with an analog reference potential zero point AGND; first comparator comp 1 The reverse phase input end of the monitoring device is connected with an analog reference potential zero point AGND, the output end of the monitoring device is connected with the input end of the signal processing module (4), and the working process of the monitoring device comprises the following steps:
    step 1, a trigger circuit obtains a zero time of an input voltage as a sampling time of an output voltage ripple;
    step 2, after a pulse capturing unit in a signal processing module captures a trigger signal of a trigger circuit, setting a proper sampling frequency to sample output voltage ripples, carrying out Fourier decomposition on sampled data in the signal processing module, and determining harmonic times contained in input current;
    step 3, after the harmonic frequency is determined, calculating a harmonic content and a capacitance value of the output capacitor in a signal processing module according to a theoretical derived harmonic calculation formula and a capacitance value of the output capacitorC；
    ，
    In the method, in the process of the invention,as per unit value of each subharmonic,Cin order to output the capacitance value of the capacitor,P o in order to output the power of the power supply,V o for outputting voltage +.>100 is given asπ，/>For each time of output voltage rippleThe value of the harmonic;
    step 4, the obtained output capacitance valueCAnd the content of each subharmonic is sent to a display unit for real-time display.
  2. 2. The PFC converter output capacitance and harmonic monitoring device of claim 1, wherein the PFC main circuit comprises an input voltage sourceEMI filter, rectifier bridgeRBPFC converter, output capacitorCAnd a load resistorR L 。
  3. 3. The PFC converter output capacitance and harmonic monitoring device of claim 1, wherein the signal processing module is a DSP chip TMS320F28335.
  4. 4. The PFC converter output capacitance and harmonic monitoring device of claim 1, wherein the display unit is a 1602 liquid crystal display.
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Citations (4)

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Publication number Priority date Publication date Assignee Title
CN103605084A (en) * 2013-11-14 2014-02-26 南京理工大学 Monitoring apparatus and method for ESR and C of boost PFC converter
CN104836445A (en) * 2015-04-29 2015-08-12 南京理工大学 Device and method for monitoring ESR and C of output capacitor of flyback PFC converter
CN108075657A (en) * 2017-12-19 2018-05-25 新奥泛能网络科技股份有限公司 Small-power APFC circuits
CN111856145A (en) * 2019-04-28 2020-10-30 南京理工大学 Monitoring device and method for ESR and L of boost DC/DC converter

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103390995B (en) * 2013-07-18 2015-09-30 矽力杰半导体技术(杭州)有限公司 A kind of pfc circuit

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103605084A (en) * 2013-11-14 2014-02-26 南京理工大学 Monitoring apparatus and method for ESR and C of boost PFC converter
CN104836445A (en) * 2015-04-29 2015-08-12 南京理工大学 Device and method for monitoring ESR and C of output capacitor of flyback PFC converter
CN108075657A (en) * 2017-12-19 2018-05-25 新奥泛能网络科技股份有限公司 Small-power APFC circuits
CN111856145A (en) * 2019-04-28 2020-10-30 南京理工大学 Monitoring device and method for ESR and L of boost DC/DC converter

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